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- $ arm-none-eabi-objdump main.elf -D
- main.elf: file format elf32-littlearm
- Disassembly of section .isr_vector:
- 08000000 <isr_vector>:
- 8000000: 20008000 andcs r8, r0, r0
- 8000004: 080001cf stmdaeq r0, {r0, r1, r2, r3, r6, r7, r8}
- 8000008: 080001c9 stmdaeq r0, {r0, r3, r6, r7, r8}
- 800000c: 080001c9 stmdaeq r0, {r0, r3, r6, r7, r8}
- 8000010: 080001c9 stmdaeq r0, {r0, r3, r6, r7, r8}
- 8000014: 080001c9 stmdaeq r0, {r0, r3, r6, r7, r8}
- ...
- 800002c: 080001c9 stmdaeq r0, {r0, r3, r6, r7, r8}
- 8000030: 080001c9 stmdaeq r0, {r0, r3, r6, r7, r8}
- 8000034: 00000000 andeq r0, r0, r0
- 8000038: 080001c9 stmdaeq r0, {r0, r3, r6, r7, r8}
- 800003c: 080001c9 stmdaeq r0, {r0, r3, r6, r7, r8}
- ...
- Disassembly of section .text:
- 080001c8 <default_handler>:
- 80001c8: b480 push {r7}
- 80001ca: af00 add r7, sp, #0
- 80001cc: e7fe b.n 80001cc <default_handler+0x4>
- 080001ce <reset_handler>:
- 80001ce: b580 push {r7, lr}
- 80001d0: b088 sub sp, #32
- 80001d2: af00 add r7, sp, #0
- 80001d4: 4a1a ldr r2, [pc, #104] @ (8000240 <reset_handler+0x72>)
- 80001d6: 4b1b ldr r3, [pc, #108] @ (8000244 <reset_handler+0x76>)
- 80001d8: 1ad3 subs r3, r2, r3
- 80001da: 617b str r3, [r7, #20]
- 80001dc: 4b1a ldr r3, [pc, #104] @ (8000248 <reset_handler+0x7a>)
- 80001de: 613b str r3, [r7, #16]
- 80001e0: 4b18 ldr r3, [pc, #96] @ (8000244 <reset_handler+0x76>)
- 80001e2: 60fb str r3, [r7, #12]
- 80001e4: 2300 movs r3, #0
- 80001e6: 61fb str r3, [r7, #28]
- 80001e8: e00a b.n 8000200 <reset_handler+0x32>
- 80001ea: 693a ldr r2, [r7, #16]
- 80001ec: 69fb ldr r3, [r7, #28]
- 80001ee: 441a add r2, r3
- 80001f0: 68f9 ldr r1, [r7, #12]
- 80001f2: 69fb ldr r3, [r7, #28]
- 80001f4: 440b add r3, r1
- 80001f6: 7812 ldrb r2, [r2, #0]
- 80001f8: 701a strb r2, [r3, #0]
- 80001fa: 69fb ldr r3, [r7, #28]
- 80001fc: 3301 adds r3, #1
- 80001fe: 61fb str r3, [r7, #28]
- 8000200: 69fa ldr r2, [r7, #28]
- 8000202: 697b ldr r3, [r7, #20]
- 8000204: 429a cmp r2, r3
- 8000206: d3f0 bcc.n 80001ea <reset_handler+0x1c>
- 8000208: 4a10 ldr r2, [pc, #64] @ (800024c <reset_handler+0x7e>)
- 800020a: 4b11 ldr r3, [pc, #68] @ (8000250 <reset_handler+0x82>)
- 800020c: 1ad3 subs r3, r2, r3
- 800020e: 60bb str r3, [r7, #8]
- 8000210: 4b0f ldr r3, [pc, #60] @ (8000250 <reset_handler+0x82>)
- 8000212: 607b str r3, [r7, #4]
- 8000214: 2300 movs r3, #0
- 8000216: 61bb str r3, [r7, #24]
- 8000218: e007 b.n 800022a <reset_handler+0x5c>
- 800021a: 687a ldr r2, [r7, #4]
- 800021c: 69bb ldr r3, [r7, #24]
- 800021e: 4413 add r3, r2
- 8000220: 2200 movs r2, #0
- 8000222: 701a strb r2, [r3, #0]
- 8000224: 69bb ldr r3, [r7, #24]
- 8000226: 3301 adds r3, #1
- 8000228: 61bb str r3, [r7, #24]
- 800022a: 69ba ldr r2, [r7, #24]
- 800022c: 68bb ldr r3, [r7, #8]
- 800022e: 429a cmp r2, r3
- 8000230: d3f3 bcc.n 800021a <reset_handler+0x4c>
- 8000232: f000 f80f bl 8000254 <main>
- 8000236: bf00 nop
- 8000238: 3720 adds r7, #32
- 800023a: 46bd mov sp, r7
- 800023c: bd80 pop {r7, pc}
- 800023e: bf00 nop
- 8000240: 20000000 andcs r0, r0, r0
- 8000244: 20000000 andcs r0, r0, r0
- 8000248: 080002b0 stmdaeq r0, {r4, r5, r7, r9}
- 800024c: 20000000 andcs r0, r0, r0
- 8000250: 20000000 andcs r0, r0, r0
- 08000254 <main>:
- 8000254: b480 push {r7}
- 8000256: b083 sub sp, #12
- 8000258: af00 add r7, sp, #0
- 800025a: 4b11 ldr r3, [pc, #68] @ (80002a0 <main+0x4c>)
- 800025c: 681b ldr r3, [r3, #0]
- 800025e: 4a10 ldr r2, [pc, #64] @ (80002a0 <main+0x4c>)
- 8000260: f043 0301 orr.w r3, r3, #1
- 8000264: 6013 str r3, [r2, #0]
- 8000266: 4b0e ldr r3, [pc, #56] @ (80002a0 <main+0x4c>)
- 8000268: 681b ldr r3, [r3, #0]
- 800026a: 603b str r3, [r7, #0]
- 800026c: 4b0c ldr r3, [pc, #48] @ (80002a0 <main+0x4c>)
- 800026e: 681b ldr r3, [r3, #0]
- 8000270: 603b str r3, [r7, #0]
- 8000272: 4b0c ldr r3, [pc, #48] @ (80002a4 <main+0x50>)
- 8000274: 681b ldr r3, [r3, #0]
- 8000276: 4a0b ldr r2, [pc, #44] @ (80002a4 <main+0x50>)
- 8000278: f443 6380 orr.w r3, r3, #1024 @ 0x400
- 800027c: 6013 str r3, [r2, #0]
- 800027e: 4b0a ldr r3, [pc, #40] @ (80002a8 <main+0x54>)
- 8000280: 681b ldr r3, [r3, #0]
- 8000282: 4a09 ldr r2, [pc, #36] @ (80002a8 <main+0x54>)
- 8000284: f483 5300 eor.w r3, r3, #8192 @ 0x2000
- 8000288: 6013 str r3, [r2, #0]
- 800028a: 2300 movs r3, #0
- 800028c: 607b str r3, [r7, #4]
- 800028e: e002 b.n 8000296 <main+0x42>
- 8000290: 687b ldr r3, [r7, #4]
- 8000292: 3301 adds r3, #1
- 8000294: 607b str r3, [r7, #4]
- 8000296: 687b ldr r3, [r7, #4]
- 8000298: 4a04 ldr r2, [pc, #16] @ (80002ac <main+0x58>)
- 800029a: 4293 cmp r3, r2
- 800029c: d9f8 bls.n 8000290 <main+0x3c>
- 800029e: e7ee b.n 800027e <main+0x2a>
- 80002a0: 40023830 andmi r3, r2, r0, lsr r8
- 80002a4: 40020800 andmi r0, r2, r0, lsl #16
- 80002a8: 40020014 andmi r0, r2, r4, lsl r0
- 80002ac: 000f423f andeq r4, pc, pc, lsr r2 @ <UNPREDICTABLE>
- Disassembly of section .comment:
- 00000000 <.comment>:
- 0: 3a434347 bcc 10d0d24 <isr_vector-0x6f2f2dc>
- 4: 72412820 subvc r2, r1, #32, 16 @ 0x200000
- 8: 4e47206d cdpmi 0, 4, cr2, cr7, cr13, {3}
- c: 6f542055 svcvs 0x00542055
- 10: 68636c6f stmdavs r3!, {r0, r1, r2, r3, r5, r6, sl, fp, sp, lr}^
- 14: 206e6961 rsbcs r6, lr, r1, ror #18
- 18: 322e3331 eorcc r3, lr, #-1006632960 @ 0xc4000000
- 1c: 6c65722e sfmvs f7, 2, [r5], #-184 @ 0xffffff48
- 20: 42282031 eormi r2, r8, #49 @ 0x31
- 24: 646c6975 strbtvs r6, [ip], #-2421 @ 0xfffff68b
- 28: 6d726120 ldfvse f6, [r2, #-128]! @ 0xffffff80
- 2c: 2e33312d rsfcssp f3, f3, #5.0
- 30: 20292937 eorcs r2, r9, r7, lsr r9
- 34: 322e3331 eorcc r3, lr, #-1006632960 @ 0xc4000000
- 38: 3220312e eorcc r3, r0, #-2147483637 @ 0x8000000b
- 3c: 31333230 teqcc r3, r0, lsr r2
- 40: 00393030 eorseq r3, r9, r0, lsr r0
- Disassembly of section .ARM.attributes:
- 00000000 <.ARM.attributes>:
- 0: 00002d41 andeq r2, r0, r1, asr #26
- 4: 61656100 cmnvs r5, r0, lsl #2
- 8: 01006962 tsteq r0, r2, ror #18
- c: 00000023 andeq r0, r0, r3, lsr #32
- 10: 2d453705 stclcs 7, cr3, [r5, #-20] @ 0xffffffec
- 14: 0d06004d stceq 0, cr0, [r6, #-308] @ 0xfffffecc
- 18: 02094d07 andeq r4, r9, #448 @ 0x1c0
- 1c: 01140412 tsteq r4, r2, lsl r4
- 20: 03170115 tsteq r7, #1073741829 @ 0x40000005
- 24: 01190118 tsteq r9, r8, lsl r1
- 28: 061e011a @ <UNDEFINED> instruction: 0x061e011a
- 2c: Address 0x2c is out of bounds.
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