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Nov 15th, 2019
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  1. diff --git a/litex/soc/software/bios/sdram.c b/litex/soc/software/bios/sdram.c
  2. index f0c12edf..19303065 100644
  3. --- a/litex/soc/software/bios/sdram.c
  4. +++ b/litex/soc/software/bios/sdram.c
  5. @@ -22,6 +22,8 @@
  6.  
  7.  #include "sdram.h"
  8.  
  9. +#define CSR_DATA_BYTES CONFIG_CSR_DATA_WIDTH/8
  10. +
  11.  // FIXME(hack): If we don't have main ram, just target the sram instead.
  12.  #ifndef MAIN_RAM_BASE
  13.  #define MAIN_RAM_BASE SRAM_BASE
  14. @@ -227,15 +229,15 @@ void sdrwr(char *startaddr)
  15.  #if defined (USDDRPHY)
  16.  #define ERR_DDRPHY_DELAY 512
  17.  #define ERR_DDRPHY_BITSLIP 8
  18. -#define NBMODULES DFII_PIX_DATA_SIZE/2
  19. +#define NBMODULES DFII_PIX_DATA_SIZE*CSR_DATA_BYTES/2
  20.  #elif defined (ECP5DDRPHY)
  21.  #define ERR_DDRPHY_DELAY 8
  22.  #define ERR_DDRPHY_BITSLIP 1
  23. -#define NBMODULES DFII_PIX_DATA_SIZE/4
  24. +#define NBMODULES DFII_PIX_DATA_SIZE*CSR_DATA_BYTES/4
  25.  #else
  26.  #define ERR_DDRPHY_DELAY 32
  27.  #define ERR_DDRPHY_BITSLIP 8
  28. -#define NBMODULES DFII_PIX_DATA_SIZE/2
  29. +#define NBMODULES DFII_PIX_DATA_SIZE*CSR_DATA_BYTES/2
  30.  #endif
  31.  
  32.  #ifdef CSR_DDRPHY_WLEVEL_EN_ADDR
  33. @@ -444,7 +446,8 @@ static void read_bitslip_inc(char m)
  34.  static int read_level_scan(int module, int bitslip)
  35.  {
  36.     unsigned int prv;
  37. -   unsigned char prs[DFII_NPHASES*DFII_PIX_DATA_SIZE];
  38. +   //unsigned char prs[DFII_NPHASES*DFII_PIX_DATA_SIZE];
  39. +   unsigned int prs[DFII_NPHASES*DFII_PIX_DATA_SIZE];
  40.     int p, i, j;
  41.     int score;
  42.  
  43. @@ -489,10 +492,17 @@ static int read_level_scan(int module, int bitslip)
  44.         cdelay(15);
  45.         working = 1;
  46.         for(p=0;p<DFII_NPHASES;p++) {
  47. +           unsigned int mask = 0x00ff00ff << (module * 8);
  48. +           unsigned int got = MMPTR(sdram_dfii_pix_rddata_addr[p]);
  49. +           unsigned int exp = prs[DFII_PIX_DATA_SIZE*p];
  50. +           if ((exp & mask) != (got & mask))
  51. +               working = 0;
  52. +/*
  53.             if(MMPTR(sdram_dfii_pix_rddata_addr[p]+DFII_ADDR_SHIFT*(NBMODULES-module-1)) != prs[DFII_PIX_DATA_SIZE*p+(NBMODULES-module-1)])
  54.                 working = 0;
  55.             if(MMPTR(sdram_dfii_pix_rddata_addr[p]+DFII_ADDR_SHIFT*(2*NBMODULES-module-1)) != prs[DFII_PIX_DATA_SIZE*p+2*NBMODULES-module-1])
  56.                 working = 0;
  57. +*/
  58.         }
  59.  #ifdef ECP5DDRPHY
  60.         if (((ddrphy_burstdet_seen_read() >> module) & 0x1) != 1)
  61. @@ -517,7 +527,8 @@ static int read_level_scan(int module, int bitslip)
  62.  static void read_level(int module)
  63.  {
  64.     unsigned int prv;
  65. -   unsigned char prs[DFII_NPHASES*DFII_PIX_DATA_SIZE];
  66. +   //unsigned char prs[DFII_NPHASES*DFII_PIX_DATA_SIZE];
  67. +   unsigned int prs[DFII_NPHASES*DFII_PIX_DATA_SIZE];
  68.     int p, i, j;
  69.     int working;
  70.     int delay, delay_min, delay_max;
  71. @@ -560,10 +571,17 @@ static void read_level(int module)
  72.         cdelay(15);
  73.         working = 1;
  74.         for(p=0;p<DFII_NPHASES;p++) {
  75. +           unsigned int mask = 0x00ff00ff << (module * 8);
  76. +           unsigned int got = MMPTR(sdram_dfii_pix_rddata_addr[p]);
  77. +           unsigned int exp = prs[DFII_PIX_DATA_SIZE*p];
  78. +           if ((exp & mask) != (got & mask))
  79. +               working = 0;
  80. +/*
  81.             if(MMPTR(sdram_dfii_pix_rddata_addr[p]+DFII_ADDR_SHIFT*(NBMODULES-module-1)) != prs[DFII_PIX_DATA_SIZE*p+(NBMODULES-module-1)])
  82.                 working = 0;
  83.             if(MMPTR(sdram_dfii_pix_rddata_addr[p]+DFII_ADDR_SHIFT*(2*NBMODULES-module-1)) != prs[DFII_PIX_DATA_SIZE*p+2*NBMODULES-module-1])
  84.                 working = 0;
  85. +*/
  86.         }
  87.  #ifdef ECP5DDRPHY
  88.         if (((ddrphy_burstdet_seen_read() >> module) & 0x1) != 1)
  89. @@ -598,10 +616,17 @@ static void read_level(int module)
  90.         cdelay(15);
  91.         working = 1;
  92.         for(p=0;p<DFII_NPHASES;p++) {
  93. +           unsigned int mask = 0x00ff00ff << (module * 8);
  94. +           unsigned int got = MMPTR(sdram_dfii_pix_rddata_addr[p]);
  95. +           unsigned int exp = prs[DFII_PIX_DATA_SIZE*p];
  96. +           if ((exp & mask) != (got & mask))
  97. +               working = 0;
  98. +/*
  99.             if(MMPTR(sdram_dfii_pix_rddata_addr[p]+DFII_ADDR_SHIFT*(NBMODULES-module-1)) != prs[DFII_PIX_DATA_SIZE*p+(NBMODULES-module-1)])
  100.                 working = 0;
  101.             if(MMPTR(sdram_dfii_pix_rddata_addr[p]+DFII_ADDR_SHIFT*(2*NBMODULES-module-1)) != prs[DFII_PIX_DATA_SIZE*p+2*NBMODULES-module-1])
  102.                 working = 0;
  103. +*/
  104.         }
  105.  #ifdef ECP5DDRPHY
  106.         if (((ddrphy_burstdet_seen_read() >> module) & 0x1) != 1)
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