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  1. #####################################################
  2. ### SPARTAN-3E STARTER KIT BOARD CONSTRAINTS FILE
  3. #####################################################
  4.  
  5. # ==== Analog-to-Digital Converter (ADC) ====
  6. # some connections shared with SPI Flash, DAC, ADC, and AMP
  7. NET "AD_CONV" LOC = "P11" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ;
  8.  
  9.  
  10. # ==== Programmable Gain Amplifier (AMP) ====
  11. # some connections shared with SPI Flash, DAC, ADC, and AMP
  12. NET "AMP_CS" LOC = "N7" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ;
  13. NET "AMP_DOUT" LOC = "E18" | IOSTANDARD = LVCMOS33 ;
  14. NET "AMP_SHDN" LOC = "P7" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ;
  15.  
  16.  
  17. # ==== Pushbuttons (BTN) ====
  18. NET "BTN_EAST" LOC = "H13" | IOSTANDARD = LVTTL | PULLDOWN ;
  19. NET "BTN_NORTH" LOC = "V4" | IOSTANDARD = LVTTL | PULLDOWN ;
  20. NET "BTN_SOUTH" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN ;
  21. NET "BTN_WEST" LOC = "D18" | IOSTANDARD = LVTTL | PULLDOWN ;
  22.  
  23.  
  24. # ==== Clock inputs (CLK) ====
  25. NET "CLK_50MHZ" LOC = "C9" | IOSTANDARD = LVCMOS33 ;
  26. # Define clock period for 50 MHz oscillator (40%/60% duty-cycle)
  27. NET "CLK_50MHZ" PERIOD = 20.0ns HIGH 40%;
  28. NET "CLK_AUX" LOC = "B8" | IOSTANDARD = LVCMOS33 ;
  29. NET "CLK_SMA" LOC = "A10" | IOSTANDARD = LVCMOS33 ;
  30.  
  31.  
  32. # ==== Digital-to-Analog Converter (DAC) ====
  33. # some connections shared with SPI Flash, DAC, ADC, and AMP
  34. NET "DAC_CLR" LOC = "P8" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
  35. NET "DAC_CS" LOC = "N8" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
  36.  
  37.  
  38. # ==== 1-Wire Secure EEPROM (DS)
  39. NET "DS_WIRE" LOC = "U4" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
  40.  
  41.  
  42. # ==== Ethernet PHY (E) ====
  43. NET "E_COL" LOC = "U6" | IOSTANDARD = LVCMOS33 ;
  44. NET "E_CRS" LOC = "U13" | IOSTANDARD = LVCMOS33 ;
  45. NET "E_MDC" LOC = "P9" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
  46. NET "E_MDIO" LOC = "U5" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
  47. NET "E_RX_CLK" LOC = "V3" | IOSTANDARD = LVCMOS33 ;
  48. NET "E_RX_DV" LOC = "V2" | IOSTANDARD = LVCMOS33 ;
  49. NET "E_RXD<0>" LOC = "V8" | IOSTANDARD = LVCMOS33 ;
  50. NET "E_RXD<1>" LOC = "T11" | IOSTANDARD = LVCMOS33 ;
  51. NET "E_RXD<2>" LOC = "U11" | IOSTANDARD = LVCMOS33 ;
  52. NET "E_RXD<3>" LOC = "V14" | IOSTANDARD = LVCMOS33 ;
  53. NET "E_RXD<4>" LOC = "U14" | IOSTANDARD = LVCMOS33 ;
  54. NET "E_TX_CLK" LOC = "T7" | IOSTANDARD = LVCMOS33 ;
  55. NET "E_TX_EN" LOC = "P15" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
  56. NET "E_TXD<0>" LOC = "R11" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
  57. NET "E_TXD<1>" LOC = "T15" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
  58. NET "E_TXD<2>" LOC = "R5" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
  59. NET "E_TXD<3>" LOC = "T5" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
  60. NET "E_TXD<4>" LOC = "R6" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
  61.  
  62.  
  63. # ==== FPGA Configuration Mode, INIT_B Pins (FPGA) ====
  64. NET "FPGA_M0" LOC = "M10" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
  65. NET "FPGA_M1" LOC = "V11" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
  66. NET "FPGA_M2" LOC = "T10" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
  67. NET "FPGA_INIT_B" LOC = "T3" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ;
  68. NET "FPGA_RDWR_B" LOC = "U10" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4 ;
  69. NET "FPGA_HSWAP" LOC = "B3" | IOSTANDARD = LVCMOS33 ;
  70.  
  71. # ==== FX2 Connector (FX2) ====
  72. NET "FX2_CLKIN" LOC = "E10" | IOSTANDARD = LVCMOS33 ;
  73. NET "FX2_CLKIO" LOC = "D9" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  74. NET "FX2_CLKOUT" LOC = "D10" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  75. # These four connections are shared with the J1 6-pin accessory header
  76. NET "FX2_IO<1>" LOC = "B4" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  77. NET "FX2_IO<2>" LOC = "A4" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  78. NET "FX2_IO<3>" LOC = "D5" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  79. NET "FX2_IO<4>" LOC = "C5" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  80. # These four connections are shared with the J2 6-pin accessory header
  81. NET "FX2_IO<5>" LOC = "A6" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  82. NET "FX2_IO<6>" LOC = "B6" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  83. NET "FX2_IO<7>" LOC = "E7" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  84. NET "FX2_IO<8>" LOC = "F7" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  85. # These four connections are shared with the J4 6-pin accessory header
  86. NET "FX2_IO<9>" LOC = "D7" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  87. NET "FX2_IO<10>" LOC = "C7" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  88. NET "FX2_IO<11>" LOC = "F8" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  89. NET "FX2_IO<12>" LOC = "E8" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  90. # The discrete LEDs are shared with the following 8 FX2 connections
  91. #NET "FX2_IO<13>" LOC = "F9" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  92. #NET "FX2_IO<14>" LOC = "E9" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  93. #NET "FX2_IO<15>" LOC = "D11" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  94. #NET "FX2_IO<16>" LOC = "C11" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  95. #NET "FX2_IO<17>" LOC = "F11" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  96. #NET "FX2_IO<18>" LOC = "E11" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  97. #NET "FX2_IO<19>" LOC = "E12" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  98. #NET "FX2_IO<20>" LOC = "F12" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  99. NET "FX2_IO<21>" LOC = "A13" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  100. NET "FX2_IO<22>" LOC = "B13" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  101. NET "FX2_IO<23>" LOC = "A14" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  102. NET "FX2_IO<24>" LOC = "B14" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  103. NET "FX2_IO<25>" LOC = "C14" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  104. NET "FX2_IO<26>" LOC = "D14" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  105. NET "FX2_IO<27>" LOC = "A16" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  106. NET "FX2_IO<28>" LOC = "B16" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  107. NET "FX2_IO<29>" LOC = "E13" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  108. NET "FX2_IO<30>" LOC = "C4" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  109. NET "FX2_IO<31>" LOC = "B11" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  110. NET "FX2_IO<32>" LOC = "A11" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  111. NET "FX2_IO<33>" LOC = "A8" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  112. NET "FX2_IO<34>" LOC = "G9" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  113. NET "FX2_IP<35>" LOC = "D12" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  114. NET "FX2_IP<36>" LOC = "C12" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  115. NET "FX2_IP<37>" LOC = "A15" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  116. NET "FX2_IP<38>" LOC = "B15" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  117. NET "FX2_IO<39>" LOC = "C3" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  118. NET "FX2_IP<40>" LOC = "C15" | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 ;
  119.  
  120.  
  121. # ==== 6-pin header J1 ====
  122. # These are shared connections with the FX2 connector
  123. #NET "J1<0>" LOC = "B4" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;
  124. #NET "J1<1>" LOC = "A4" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;
  125. #NET "J1<2>" LOC = "D5" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;
  126. #NET "J1<3>" LOC = "C5" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;
  127.  
  128.  
  129. # ==== 6-pin header J2 ====
  130. # These are shared connections with the FX2 connector
  131. #NET "J2<0>" LOC = "A6" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;
  132. #NET "J2<1>" LOC = "B6" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;
  133. #NET "J2<2>" LOC = "E7" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;
  134. #NET "J2<3>" LOC = "F7" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;
  135.  
  136.  
  137. # ==== 6-pin header J4 ====
  138. # These are shared connections with the FX2 connector
  139. #NET "J4<0>" LOC = "D7" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;
  140. #NET "J4<1>" LOC = "C7" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;
  141. #NET "J4<2>" LOC = "F8" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;
  142. #NET "J4<3>" LOC = "E8" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 6 ;
  143.  
  144.  
  145. # ==== Character LCD (LCD) ====
  146. NET "LCD_E" LOC = "M18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  147. NET "LCD_RS" LOC = "L18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  148. NET "LCD_RW" LOC = "L17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  149. # LCD data connections are shared with StrataFlash connections SF_D<11:8>
  150. #NET "SF_D<8>" LOC = "R15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  151. #NET "SF_D<9>" LOC = "R16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  152. #NET "SF_D<10>" LOC = "P17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  153. #NET "SF_D<11>" LOC = "M15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  154.  
  155.  
  156. # ==== Discrete LEDs (LED) ====
  157. # These are shared connections with the FX2 connector
  158. NET "LED<0>" LOC = "F12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
  159. NET "LED<1>" LOC = "E12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
  160. NET "LED<2>" LOC = "E11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
  161. NET "LED<3>" LOC = "F11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
  162. NET "LED<4>" LOC = "C11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
  163. NET "LED<5>" LOC = "D11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
  164. NET "LED<6>" LOC = "E9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
  165. NET "LED<7>" LOC = "F9" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
  166.  
  167.  
  168. # ==== PS/2 Mouse/Keyboard Port (PS2) ====
  169. NET "PS2_CLK" LOC = "G14" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;
  170. NET "PS2_DATA" LOC = "G13" | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;
  171.  
  172.  
  173. # ==== Rotary Pushbutton Switch (ROT) ====
  174. NET "ROT_A" LOC = "K18" | IOSTANDARD = LVTTL | PULLUP ;
  175. NET "ROT_B" LOC = "G18" | IOSTANDARD = LVTTL | PULLUP ;
  176. NET "ROT_CENTER" LOC = "V16" | IOSTANDARD = LVTTL | PULLDOWN ;
  177.  
  178.  
  179. # ==== RS-232 Serial Ports (RS232) ====
  180. NET "RS232_DCE_RXD" LOC = "R7" | IOSTANDARD = LVTTL ;
  181. NET "RS232_DCE_TXD" LOC = "M14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW ;
  182. NET "RS232_DTE_RXD" LOC = "U8" | IOSTANDARD = LVTTL ;
  183. NET "RS232_DTE_TXD" LOC = "M13" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW ;
  184.  
  185.  
  186. # ==== DDR SDRAM (SD) ==== (I/O Bank 3, VCCO=2.5V)
  187. NET "SD_A<0>" LOC = "T1" | IOSTANDARD = SSTL2_I ;
  188. NET "SD_A<1>" LOC = "R3" | IOSTANDARD = SSTL2_I ;
  189. NET "SD_A<2>" LOC = "R2" | IOSTANDARD = SSTL2_I ;
  190. NET "SD_A<3>" LOC = "P1" | IOSTANDARD = SSTL2_I ;
  191. NET "SD_A<4>" LOC = "F4" | IOSTANDARD = SSTL2_I ;
  192. NET "SD_A<5>" LOC = "H4" | IOSTANDARD = SSTL2_I ;
  193. NET "SD_A<6>" LOC = "H3" | IOSTANDARD = SSTL2_I ;
  194. NET "SD_A<7>" LOC = "H1" | IOSTANDARD = SSTL2_I ;
  195. NET "SD_A<8>" LOC = "H2" | IOSTANDARD = SSTL2_I ;
  196. NET "SD_A<9>" LOC = "N4" | IOSTANDARD = SSTL2_I ;
  197. NET "SD_A<10>" LOC = "T2" | IOSTANDARD = SSTL2_I ;
  198. NET "SD_A<11>" LOC = "N5" | IOSTANDARD = SSTL2_I ;
  199. NET "SD_A<12>" LOC = "P2" | IOSTANDARD = SSTL2_I ;
  200. NET "SD_BA<0>" LOC = "K5" | IOSTANDARD = SSTL2_I ;
  201. NET "SD_BA<1>" LOC = "K6" | IOSTANDARD = SSTL2_I ;
  202. NET "SD_CAS" LOC = "C2" | IOSTANDARD = SSTL2_I ;
  203. NET "SD_CK_N" LOC = "J4" | IOSTANDARD = SSTL2_I ;
  204. NET "SD_CK_P" LOC = "J5" | IOSTANDARD = SSTL2_I ;
  205. NET "SD_CKE" LOC = "K3" | IOSTANDARD = SSTL2_I ;
  206. NET "SD_CS" LOC = "K4" | IOSTANDARD = SSTL2_I ;
  207. NET "SD_DQ<0>" LOC = "L2" | IOSTANDARD = SSTL2_I ;
  208. NET "SD_DQ<1>" LOC = "L1" | IOSTANDARD = SSTL2_I ;
  209. NET "SD_DQ<2>" LOC = "L3" | IOSTANDARD = SSTL2_I ;
  210. NET "SD_DQ<3>" LOC = "L4" | IOSTANDARD = SSTL2_I ;
  211. NET "SD_DQ<4>" LOC = "M3" | IOSTANDARD = SSTL2_I ;
  212. NET "SD_DQ<5>" LOC = "M4" | IOSTANDARD = SSTL2_I ;
  213. NET "SD_DQ<6>" LOC = "M5" | IOSTANDARD = SSTL2_I ;
  214. NET "SD_DQ<7>" LOC = "M6" | IOSTANDARD = SSTL2_I ;
  215. NET "SD_DQ<8>" LOC = "E2" | IOSTANDARD = SSTL2_I ;
  216. NET "SD_DQ<9>" LOC = "E1" | IOSTANDARD = SSTL2_I ;
  217. NET "SD_DQ<10>" LOC = "F1" | IOSTANDARD = SSTL2_I ;
  218. NET "SD_DQ<11>" LOC = "F2" | IOSTANDARD = SSTL2_I ;
  219. NET "SD_DQ<12>" LOC = "G6" | IOSTANDARD = SSTL2_I ;
  220. NET "SD_DQ<13>" LOC = "G5" | IOSTANDARD = SSTL2_I ;
  221. NET "SD_DQ<14>" LOC = "H6" | IOSTANDARD = SSTL2_I ;
  222. NET "SD_DQ<15>" LOC = "H5" | IOSTANDARD = SSTL2_I ;
  223. NET "SD_LDM" LOC = "J2" | IOSTANDARD = SSTL2_I ;
  224. NET "SD_LDQS" LOC = "L6" | IOSTANDARD = SSTL2_I ;
  225. NET "SD_RAS" LOC = "C1" | IOSTANDARD = SSTL2_I ;
  226. NET "SD_UDM" LOC = "J1" | IOSTANDARD = SSTL2_I ;
  227. NET "SD_UDQS" LOC = "G3" | IOSTANDARD = SSTL2_I ;
  228. NET "SD_WE" LOC = "D1" | IOSTANDARD = SSTL2_I ;
  229. # Path to allow connection to top DCM connection
  230. NET "SD_CK_FB" LOC = "B9" | IOSTANDARD = LVCMOS33 ;
  231. # Prohibit VREF pins
  232. CONFIG PROHIBIT = D2;
  233. CONFIG PROHIBIT = G4;
  234. CONFIG PROHIBIT = J6;
  235. CONFIG PROHIBIT = L5;
  236. CONFIG PROHIBIT = R4;
  237.  
  238.  
  239. # ==== Intel StrataFlash Parallel NOR Flash (SF) ====
  240. NET "SF_A<0>" LOC = "H17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  241. NET "SF_A<1>" LOC = "J13" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  242. NET "SF_A<2>" LOC = "J12" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  243. NET "SF_A<3>" LOC = "J14" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  244. NET "SF_A<4>" LOC = "J15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  245. NET "SF_A<5>" LOC = "J16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  246. NET "SF_A<6>" LOC = "J17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  247. NET "SF_A<7>" LOC = "K14" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  248. NET "SF_A<8>" LOC = "K15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  249. NET "SF_A<9>" LOC = "K12" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  250. NET "SF_A<10>" LOC = "K13" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  251. NET "SF_A<11>" LOC = "L15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  252. NET "SF_A<12>" LOC = "L16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  253. NET "SF_A<13>" LOC = "T18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  254. NET "SF_A<14>" LOC = "R18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  255. NET "SF_A<15>" LOC = "T17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  256. NET "SF_A<16>" LOC = "U18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  257. NET "SF_A<17>" LOC = "T16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  258. NET "SF_A<18>" LOC = "U15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  259. NET "SF_A<19>" LOC = "V15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  260. NET "SF_A<20>" LOC = "T12" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  261. NET "SF_A<21>" LOC = "V13" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  262. NET "SF_A<22>" LOC = "V12" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  263. NET "SF_A<23>" LOC = "N11" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  264. NET "SF_A<24>" LOC = "A11" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  265. NET "SF_BYTE" LOC = "C17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  266. NET "SF_CE0" LOC = "D16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  267. NET "SF_D<1>" LOC = "P10" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  268. NET "SF_D<2>" LOC = "R10" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  269. NET "SF_D<3>" LOC = "V9" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  270. NET "SF_D<4>" LOC = "U9" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  271. NET "SF_D<5>" LOC = "R9" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  272. NET "SF_D<6>" LOC = "M9" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  273. NET "SF_D<7>" LOC = "N9" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  274. NET "SF_D<8>" LOC = "R15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  275. NET "SF_D<9>" LOC = "R16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  276. NET "SF_D<10>" LOC = "P17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  277. NET "SF_D<11>" LOC = "M15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  278. NET "SF_D<12>" LOC = "M16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  279. NET "SF_D<13>" LOC = "P6" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  280. NET "SF_D<14>" LOC = "R8" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  281. NET "SF_D<15>" LOC = "T8" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  282. NET "SF_OE" LOC = "C18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  283. NET "SF_STS" LOC = "B18" | IOSTANDARD = LVCMOS33 ;
  284. NET "SF_WE" LOC = "D17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  285.  
  286.  
  287. # ==== STMicro SPI serial Flash (SPI) ====
  288. # some connections shared with SPI Flash, DAC, ADC, and AMP
  289. NET "SPI_MISO" LOC = "N10" | IOSTANDARD = LVCMOS33 ;
  290. NET "SPI_MOSI" LOC = "T4" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ;
  291. NET "SPI_SCK" LOC = "U16" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ;
  292. NET "SPI_SS_B" LOC = "U3" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ;
  293. NET "SPI_ALT_CS_JP11" LOC = "R12" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ;
  294.  
  295.  
  296. # ==== Slide Switches (SW) ====
  297. NET "SW<0>" LOC = "L13" | IOSTANDARD = LVTTL | PULLUP ;
  298. NET "SW<1>" LOC = "L14" | IOSTANDARD = LVTTL | PULLUP ;
  299. NET "SW<2>" LOC = "H18" | IOSTANDARD = LVTTL | PULLUP ;
  300. NET "SW<3>" LOC = "N17" | IOSTANDARD = LVTTL | PULLUP ;
  301.  
  302.  
  303. # ==== VGA Port (VGA) ====
  304. NET "VGA_BLUE" LOC = "G15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
  305. NET "VGA_GREEN" LOC = "H15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
  306. NET "VGA_HSYNC" LOC = "F15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
  307. NET "VGA_RED" LOC = "H14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
  308. NET "VGA_VSYNC" LOC = "F14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
  309.  
  310.  
  311. # ==== Xilinx CPLD (XC) ====
  312. NET "XC_CMD<0>" LOC = "P18" | IOSTANDARD = LVTTL | DRIVE = 4 | SLEW = SLOW ;
  313. NET "XC_CMD<1>" LOC = "N18" | IOSTANDARD = LVTTL | DRIVE = 4 | SLEW = SLOW ;
  314. NET "XC_CPLD_EN" LOC = "B10" | IOSTANDARD = LVTTL ;
  315. NET "XC_D<0>" LOC = "G16" | IOSTANDARD = LVTTL | DRIVE = 4 | SLEW = SLOW ;
  316. NET "XC_D<1>" LOC = "F18" | IOSTANDARD = LVTTL | DRIVE = 4 | SLEW = SLOW ;
  317. NET "XC_D<2>" LOC = "F17" | IOSTANDARD = LVTTL | DRIVE = 4 | SLEW = SLOW ;
  318. NET "XC_TRIG" LOC = "R17" | IOSTANDARD = LVCMOS33 ;
  319. NET "XC_GCK0" LOC = "H16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
  320. NET "GCLK10" LOC = "C9" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ;
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