LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;

entity KOLOKWIUM is
port(clk: in std_logic;
gray:	out std_logic_vector(3 downto 0));
end entity;

architecture A of KOLOKWIUM is

begin
process(clk)
variable dec: integer range 0 to 9 := 0;
variable x: std_logic_vector(3 downto 0);

begin

if rising_edge(clk) then
	if dec = 9 then
	dec:=0;
	else
	dec:=dec+1;
	end if;

end if;

case dec is
when 0 => x:="0000";
gray(3) <= x(3);
gray(2) <= x(3) xor x(2);
gray(1) <= x(2) xor x(1);
gray(0) <= x(1) xor x(0);

when 1 => x:="0001";
gray(3) <= x(3);
gray(2) <= x(3) xor x(2);
gray(1) <= x(2) xor x(1);
gray(0) <= x(1) xor x(0);

when 2 => x:="0010";
gray(3) <= x(3);
gray(2) <= x(3) xor x(2);
gray(1) <= x(2) xor x(1);
gray(0) <= x(1) xor x(0);

when 3 => x:="0011";
gray(3) <= x(3);
gray(2) <= x(3) xor x(2);
gray(1) <= x(2) xor x(1);
gray(0) <= x(1) xor x(0);

when 4 => x:="0100";
gray(3) <= x(3);
gray(2) <= x(3) xor x(2);
gray(1) <= x(2) xor x(1);
gray(0) <= x(1) xor x(0);


when 5 => x:="0101";
gray(3) <= x(3);
gray(2) <= x(3) xor x(2);
gray(1) <= x(2) xor x(1);
gray(0) <= x(1) xor x(0);

when 6 => x:="0110";
gray(3) <= x(3);
gray(2) <= x(3) xor x(2);
gray(1) <= x(2) xor x(1);
gray(0) <= x(1) xor x(0);

when 7 => x:="0111";
gray(3) <= x(3);
gray(2) <= x(3) xor x(2);
gray(1) <= x(2) xor x(1);
gray(0) <= x(1) xor x(0);

when 8 => x:="1000";
gray(3) <= x(3);
gray(2) <= x(3) xor x(2);
gray(1) <= x(2) xor x(1);
gray(0) <= x(1) xor x(0);

when 9 => x:="1001";
gray(3) <= x(3);
gray(2) <= x(3) xor x(2);
gray(1) <= x(2) xor x(1);
gray(0) <= x(1) xor x(0);

end case;
end process;
end;