diff --git a/common/design_utils.h b/common/design_utils.h
index 8a42d21..f3d91e6 100644
--- a/common/design_utils.h
+++ b/common/design_utils.h
@@ -82,6 +82,13 @@ template <typename F1> CellInfo *net_driven_by(const Context *ctx, const NetInfo
     }
 }

+// If a net is NULL or doesn't go anywhere
+static inline bool
+net_is_unused( const NetInfo *net)
+{
+   return (net == nullptr) || (net->users.size() == 0);
+}
+
 // Connect a net to a port
 void connect_port(const Context *ctx, NetInfo *net, CellInfo *cell, IdString port_name);

diff --git a/ice40/arch_place.cc b/ice40/arch_place.cc
index f3a6274..a4cf944 100644
--- a/ice40/arch_place.cc
+++ b/ice40/arch_place.cc
@@ -151,7 +151,7 @@ bool Arch::isValidBelForCell(CellInfo *cell, BelId bel) const
                     break;

                 // Is that SB_IO used at an input ?
-                if ((cell->ports[id_D_IN_0].net == nullptr) && (cell->ports[id_D_IN_1].net == nullptr))
+                if (net_is_unused(cell->ports[id_D_IN_0].net) && net_is_unused(cell->ports[id_D_IN_1].net))
                     break;

                 // Are we perhaps a PAD INPUT Bel that can be placed here?
diff --git a/ice40/pack.cc b/ice40/pack.cc
index 4de88ab..0140d68 100644
--- a/ice40/pack.cc
+++ b/ice40/pack.cc
@@ -804,8 +804,8 @@ static void place_plls(Context *ctx)
         // Only consider bound IO that are used as inputs
         if (!io_ci->attrs.count(ctx->id("BEL")))
             continue;
-        if ((!io_ci->ports.count(id_D_IN_0) || (io_ci->ports[id_D_IN_0].net == nullptr)) &&
-            (!io_ci->ports.count(id_D_IN_1) || (io_ci->ports[id_D_IN_1].net == nullptr)))
+        if ((!io_ci->ports.count(id_D_IN_0) || net_is_unused(io_ci->ports[id_D_IN_0].net)) &&
+            (!io_ci->ports.count(id_D_IN_1) || net_is_unused(io_ci->ports[id_D_IN_1].net)))
             continue;

         // Check all placed PLL (either forced by user, or forced by PACKAGEPIN)