.def tmp = r16
.def mask = r17
.def counter = r18
.def step = r22

.cseg
	rjmp reset


.org $002
	rjmp i0
.org $004
	rjmp i1
.org $00C
	rjmp dimaj
.org $010
	rjmp dimaj


reset:
	ldi tmp, high(RAMEND)
	out SPH, tmp
	ldi tmp, low(RAMEND)
	out SPL, tmp

	ldi tmp, 0xff
	out PORTA, tmp
	out DDRA, tmp

	ldi tmp, (1 << WGM10)
	out TCCR1A, tmp

	ldi tmp, (1 << WGM12) | (1 << CS10)
	out TCCR1B, tmp

	ldi tmp, 130
	out OCR1AL, tmp

	ldi tmp, (1 << OCIE1A) | (1 << TOIE1)
	out TIMSK, tmp

	ldi tmp, (1 << ISC11) | (1 << ISC01)
	out MCUCR, tmp

	ldi tmp, (1 << INT0) | (1 << INT1)
	out GICR, tmp

	sei

	ldi tmp, 0xff
	ldi mask, 0x01
	ldi step, 5

start:

    rjmp start


dimaj:
	in tmp, PORTA
	eor tmp, mask
	out PORTA, tmp
reti



i0:
	in counter, OCR1AL

	cpi counter, 245
	brne i0_jump
		rjmp i0_end
	i0_jump:
		add counter, step
	i0_end:
	out OCR1AL, counter
reti


i1:
	in counter, OCR1AL

	cpi counter, 10
	brne i1_jump
		rjmp i1_end
	i1_jump:
		sub counter, step
	i1_end:
	out OCR1AL, counter
reti



debounce:
	clr r19
	clr r20
	ldi r21, 4

	delay_loop:
		dec r19
		brne delay_loop
			dec r20
			brne delay_loop
				dec r21
				brne delay_loop

	push tmp
	ldi tmp, (1 << INTF0) | (1 << INTF1)
	out GIFR, tmp
	pop tmp
ret