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ECE270 - COMPUTER - LAB 13

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Apr 18th, 2012
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  1. MODULE COMPUTER
  2. TITLE 'Computer'
  3.  
  4. DECLARATIONS
  5.  
  6. CLOCK PIN 1; " System CLOCK input
  7. ARS PIN 2; " Asynchronous system reset
  8.  
  9. "-----------------------------------------------------------------------
  10. "
  11. " Microsequencer state variable
  12. " SQ = 0 -> Fetch
  13. " SQ = 1 -> Execute
  14. "
  15. " Note: SQ drives !MRD input of instruction ROM
  16.  
  17. SQ PIN 24 istype 'reg_D,buffer'; " machine state
  18.  
  19. "-----------------------------------------------------------------------
  20. "
  21. " Switch input port
  22.  
  23. I3 PIN 8;
  24. I2 PIN 9;
  25. I1 PIN 10;
  26. I0 PIN 11;
  27.  
  28. "-----------------------------------------------------------------------
  29. "
  30. " Latched opcode
  31.  
  32. C2 PIN 25 istype 'reg_D,buffer';
  33. C1 PIN 26 istype 'reg_D,buffer';
  34. C0 PIN 27 istype 'reg_D,buffer';
  35.  
  36. "-----------------------------------------------------------------------
  37. "
  38. " ALU / data display
  39.  
  40. ALU0 PIN 19 istype 'reg_D,buffer';
  41. ALU1 PIN 20 istype 'reg_D,buffer';
  42. ALU2 PIN 22 istype 'reg_D,buffer';
  43. ALU3 PIN 23 istype 'reg_D,buffer';
  44.  
  45.  
  46. "-----------------------------------------------------------------------
  47. "
  48. " ROM data (instruction fetch) bus
  49.  
  50. DB0 PIN 12; " Input
  51. DB1 PIN 13; " Input
  52. DB2 PIN 14; " Input
  53.  
  54. "-----------------------------------------------------------------------
  55. "
  56. " PC state / ROM address bus
  57.  
  58. PC0 PIN 15 istype 'reg_D,buffer';
  59. PC1 PIN 16 istype 'reg_D,buffer';
  60. PC2 PIN 17 istype 'reg_D,buffer';
  61. PC3 PIN 18 istype 'reg_D,buffer';
  62.  
  63. "-----------------------------------------------------------------------
  64. "
  65. " Internal system control signals (all a function of SQ)
  66.  
  67. POA = !SQ;
  68. PCC = !SQ;
  69. IRL = !SQ;
  70. ALE = SQ;
  71.  
  72. "-----------------------------------------------------------------------
  73. "
  74. " Calculation conditions
  75.  
  76. IN = !C2 & !C1 & !C0; " Load value
  77. OUT = !C2 & !C1 & C0; " Display loaded value
  78. ORA = !C2 & C1 & !C0; " OR loaded value with inputs
  79. ANA = !C2 & C1 & C0; " AND loaded value with inputs
  80. ROL = C2 & !C1 & !C0; " Rotate loaded value left
  81. ROR = C2 & !C1 & C0; " Rotate loaded value right
  82. ASL = C2 & C1 & !C0; " Shift loaded value left
  83. ASR = C2 & C1 & C0; " Shift loaded value right
  84.  
  85. "-----------------------------------------------------------------------
  86. "
  87. "
  88.  
  89. EQUATIONS
  90.  
  91. " Micro-sequencer...just a T flip flop
  92.  
  93. SQ := !SQ;
  94.  
  95. SQ.CLK = CLOCK;
  96.  
  97. SQ.AR = ARS;
  98.  
  99.  
  100. " Equations for the Program Counter / Memory Address Bus
  101.  
  102. PC0 := !PCC & PC0.Q # PCC & !PC0.Q;
  103. PC1 := !PCC & PC1.Q # PCC & (PC1.Q $ PC0.Q);
  104. PC2 := !PCC & PC2.Q # PCC & (PC2.Q $ (PC1.Q & PC0.Q));
  105. PC3 := !PCC & PC3.Q # PCC & (PC3.Q $ (PC2.Q & PC1.Q & PC0.Q));
  106.  
  107. [PC0..PC3].OE = POA;
  108.  
  109. [PC0..PC3].CLK = CLOCK;
  110.  
  111. [PC0..PC3].AR = ARS;
  112.  
  113. " Equations for the Instruction Register
  114.  
  115. [C0..C2] := IRL & [DB0..DB2] # !IRL & [C0..C2];
  116.  
  117. [C0..C2].CLK = CLOCK;
  118.  
  119. [C0..C2].AR = ARS;
  120.  
  121. " Next state equations for the ALU
  122.  
  123. ALU0 := !ALE&ALU0 # ALE & (IN&I0 # OUT&ALU0 # ORA&(ALU0#I0) # ANA&(ALU0&I0) # ROL&ALU3 # ROR&ALU1 # ASL&0 # ASR&ALU1);
  124.  
  125. ALU1 := !ALE&ALU1 # ALE & (IN&I1 # OUT&ALU1 # ORA&(ALU1#I1) # ANA&(ALU1&I1) # ROL&ALU0 # ROR&ALU2 # ASL&ALU0 # ASR&ALU2);
  126.  
  127. ALU2 := !ALE&ALU2 # ALE & (IN&I2 # OUT&ALU2 # ORA&(ALU2#I2) # ANA&(ALU2&I2) # ROL&ALU1 # ROR&ALU3 # ASL&ALU1 # ASR&ALU3);
  128.  
  129. ALU3 := !ALE&ALU3 # ALE & (IN&I3 # OUT&ALU3 # ORA&(ALU3#I3) # ANA&(ALU3&I3) # ROL&ALU2 # ROR&ALU0 # ASL&ALU2 # ASR&ALU3);
  130.  
  131. [ALU0..ALU3].OE = ALE & OUT;
  132.  
  133. [ALU0..ALU3].CLK = CLOCK;
  134.  
  135. [ALU0..ALU3].AR = ARS;
  136.  
  137. END
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