contribution file for lab 7

// set_property PACKAGE_PIN W5 [get_ports clk]
// set_property IOSTANDARD LVCMOS33 [get_ports clk]

// //uart
// set_property PACKAGE_PIN U16 [get_ports {RxData[0]}]
// set_property IOSTANDARD LVCMOS33 [get_ports {RxData[0]}]
// set_property PACKAGE_PIN E19 [get_ports {RxData[1]}]
// set_property IOSTANDARD LVCMOS33 [get_ports {RxData[1]}]
// set_property PACKAGE_PIN U19 [get_ports {RxData[2]}]
// set_property IOSTANDARD LVCMOS33 [get_ports {RxData[2]}]
// set_property PACKAGE_PIN V19 [get_ports {RxData[3]}]
// set_property IOSTANDARD LVCMOS33 [get_ports {RxData[3]}]
// set_property PACKAGE_PIN W18 [get_ports {RxData[4]}]
// set_property IOSTANDARD LVCMOS33 [get_ports {RxData[4]}]
// set_property PACKAGE_PIN U15 [get_ports {RxData[5]}]
// set_property IOSTANDARD LVCMOS33 [get_ports {RxData[5]}]
// set_property PACKAGE_PIN U14 [get_ports {RxData[6]}]
// set_property IOSTANDARD LVCMOS33 [get_ports {RxData[6]}]
// set_property PACKAGE_PIN V14 [get_ports {RxData[7]}]
// set_property IOSTANDARD LVCMOS33 [get_ports {RxData[7]}]
// set_property PACKAGE_PIN L1 [get_ports output_level]
// set_property IOSTANDARD LVCMOS33 [get_ports output_level]

// // //sevensegment  inputs
// // set_property PACKAGE_PIN W7 [get_ports {outputsevensegmentfinal[0]}]
// // set_property IOSTANDARD LVCMOS33 [get_ports {outputsevensegmentfinal[0]}]
// // set_property PACKAGE_PIN W6 [get_ports {outputsevensegmentfinal[1]}]
// // set_property IOSTANDARD LVCMOS33 [get_ports {outputsevensegmentfinal[1]}]
// // set_property PACKAGE_PIN U8 [get_ports {outputsevensegmentfinal[2]}]
// // set_property IOSTANDARD LVCMOS33 [get_ports {outputsevensegmentfinal[2]}]
// // set_property PACKAGE_PIN V8 [get_ports {outputsevensegmentfinal[3]}]
// // set_property IOSTANDARD LVCMOS33 [get_ports {outputsevensegmentfinal[3]}]
// // set_property PACKAGE_PIN U5 [get_ports out{outputsevensegmentfinal[4]}]
// // set_property IOSTANDARD LVCMOS33 [get_ports {outputsevensegmentfinal[4]}]
// // set_property PACKAGE_PIN V5 [get_ports {outputsevensegmentfinal[5]}]
// // set_property IOSTANDARD LVCMOS33 [get_ports {outputsevensegmentfinal[5]]}]
// // set_property PACKAGE_PIN U7 [get_ports {outputsevensegmentfinal[6]}]
// // set_property IOSTANDARD LVCMOS33 [get_ports {outputsevensegmentfinal[6]}]