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  1. // DEVCFG2
  2. #pragma config FPLLIDIV = DIV_2 // PLL Input Divider (1x Divider)
  3. #pragma config FPLLMUL = MUL_20 // PLL Multiplier (24x Multiplier)
  4. #pragma config UPLLIDIV = DIV_2 // USB PLL Input Divider (12x Divider)
  5. #pragma config UPLLEN = OFF // USB PLL Enable (Disabled and Bypassed)
  6. #pragma config FPLLODIV = DIV_1 // System PLL Output Clock Divider (PLL Divide by 256)
  7. // DEVCFG1
  8. #pragma config FNOSC = PRIPLL // Oscillator Selection Bits (Primary Osc w/PLL (XT+,HS+,EC+PLL))
  9. #pragma config FSOSCEN = ON // Secondary Oscillator Enable (Enabled)
  10. #pragma config IESO = ON // Internal/External Switch Over (Enabled)
  11. #pragma config POSCMOD = HS // Primary Oscillator Configuration (HS osc mode)
  12. #pragma config OSCIOFNC = ON // CLKO Output Signal Active on the OSCO Pin (Enabled)
  13. #pragma config FPBDIV = DIV_8 // Peripheral Clock Divisor (Pb_Clk is Sys_Clk/8)
  14. #pragma config FCKSM = CSDCMD // Clock Switching and Monitor Selection (Clock Switch Disable, FSCM Disabled)
  15. #pragma config WDTPS = PS1048576 // Watchdog Timer Postscaler (1:1048576)
  16. #pragma config FWDTEN = OFF // Watchdog Timer Enable (WDT Disabled (SWDTEN Bit Controls))
  17. // DEVCFG0
  18. #pragma config DEBUG = OFF // Background Debugger Enable (Debugger is disabled)
  19. #pragma config ICESEL = ICS_PGx2 // ICE/ICD Comm Channel Select (ICE EMUC2/EMUD2 pins shared with PGC2/PGD2)
  20. #pragma config PWP = OFF // Program Flash Write Protect (Disable)
  21. #pragma config BWP = OFF // Boot Flash Write Protect bit (Protection Disabled)
  22. #pragma config CP = OFF // Code Protect (Protection Disabled)
  23.  
  24. #define CONFIG1 (ADC_MODULE_ON | ADC_FORMAT_INTG32 | ADC_CLK_AUTO | ADC_AUTO_SAMPLING_ON)
  25. #define CONFIG2 (ADC_VREF_AVDD_AVSS | ADC_OFFSET_CAL_DISABLE | ADC_SCAN_ON |ADC_SAMPLES_PER_INT_1 | ADC_ALT_BUF_OFF | ADC_ALT_INPUT_OFF)
  26. #define CONFIG3 (ADC_CONV_CLK_INTERNAL_RC | ADC_SAMPLE_TIME_15)
  27. #define CONFIGPORT (ENABLE_AN1_ANA)
  28. #define CONFIGSCAN (SKIP_SCAN_AN0 | SKIP_SCAN_AN2 | SKIP_SCAN_AN3 | SKIP_SCAN_AN4 |SKIP_SCAN_AN5 | SKIP_SCAN_AN6 | SKIP_SCAN_AN7 | SKIP_SCAN_AN8 | SKIP_SCAN_AN9 |SKIP_SCAN_AN10 | SKIP_SCAN_AN11 | SKIP_SCAN_AN12 | SKIP_SCAN_AN13 | SKIP_SCAN_AN14 |SKIP_SCAN_AN15)
  29.  
  30. #define PORT_CLOCK LATBbits.LATB13
  31. #define PORT_DATA LATBbits.LATB14
  32.  
  33. #define bitN(arg,n) (((arg)>>(n))&1)
  34.  
  35. #define constrain(amt,low,high) ((amt)<(low)?(low):((amt)>(high)?(high):(amt)))
  36.  
  37. #define SYSCLK 80000000
  38.  
  39.  
  40. #include <p32xxxx.h>
  41. #include <plib.h> // Include the PIC32 Peripheral Library.
  42.  
  43. int n = 0;
  44. int dato = 0;
  45. int nbit = 0;
  46. int readFlag = 0;
  47.  
  48. void initializeADC(){
  49. CloseADC10(); // Generally, you should disable the ADC before setup.
  50. // Use ground as negative reference for channel A instead of pin AN1 (RB1)
  51. SetChanADC10( ADC_CH0_NEG_SAMPLEA_NVREF);
  52. OpenADC10( CONFIG1, CONFIG2, CONFIG3, CONFIGPORT, CONFIGSCAN);
  53. // Setup for the ADC10.
  54. EnableADC10(); // Enables the ADC10.
  55. }
  56. long map(long x, long in_min, long in_max, long out_min, long out_max)
  57. {
  58. return (x - in_min) * (out_max - out_min) / (in_max - in_min) + out_min;
  59. }
  60.  
  61.  
  62. void main(void) {
  63.  
  64. SYSTEMConfigPerformance(SYSCLK);
  65. initializeADC();
  66.  
  67. TRISB = 0x0000;
  68. TRISD = 0x0000;
  69. TRISG = 0x0000;
  70. TRISD = 0xffff;
  71. TRISDbits.TRISD4 = 1;
  72. TRISDbits.TRISD5 = 1;
  73. TRISDbits.TRISD6 = 1;
  74. TRISDbits.TRISD7 = 1;
  75. TRISDbits.TRISD8 = 1;
  76. TRISDbits.TRISD11 = 1;
  77.  
  78. TRISBbits.TRISB1 = 1 ;
  79.  
  80. TRISBbits.TRISB2 = 1 ;
  81.  
  82. int btn_addresses[6] = {4,5,6,7,8,11};
  83. int oldbtn_states[6] = {PORTDbits.RD4,PORTDbits.RD5,PORTDbits.RD6,PORTDbits.RD7,PORTDbits.RD8,PORTDbits.RD11};
  84. int data_addresses[3] = {0b000, 0b001, 0b010};
  85. int amount = 0;
  86. int i = 0;
  87. int interval = 0;
  88.  
  89. OpenTimer2( T2_ON | T2_SOURCE_INT | T2_PS_1_1, 0x04E2);
  90. OpenTimer3( T3_ON | T3_SOURCE_INT | T3_PS_1_64, 0x04E2);
  91.  
  92. ConfigIntTimer2( T2_INT_OFF | T2_INT_PRIOR_2);
  93. ConfigIntTimer3( T3_INT_ON | T3_INT_PRIOR_3);
  94.  
  95. INTEnableSystemMultiVectoredInt();
  96. PORT_CLOCK = 1;
  97. mJTAGPortEnable(0);
  98. while(1){
  99.  
  100. if (oldbtn_states[i] & !bitN(PORTD,btn_addresses[i]))
  101. {
  102. amount = ReadADC10(0);
  103.  
  104. if(i%2 == 0){
  105. interval = +1;
  106. }
  107. else{
  108. interval = -1;
  109. }
  110.  
  111.  
  112. //POTENZIOMETRO boi
  113.  
  114. amount = ReadADC10(0);
  115. int mappato = map(amount, 0 ,1022, 0, 15);
  116. dato = data_addresses[i/2] | i%2 <<3 | mappato<<4;
  117.  
  118. ConfigIntTimer2( T2_INT_ON | T2_INT_PRIOR_2);
  119. }
  120. if(readFlag){
  121. readFlag = 0;
  122. oldbtn_states[i] = bitN(PORTD,btn_addresses[i]);
  123. i++;
  124. i = i % 6;
  125. }
  126.  
  127. }
  128. // i++;
  129. // i = i%6;
  130. return;
  131. }
  132.  
  133. void __ISR(_TIMER_2_VECTOR, ipl2) handlesTimer2Ints(void){
  134. // **make sure iplx matches the timer?s interrupt priority level
  135. n++;
  136.  
  137. if(n >= 10){
  138. n = 0;
  139. PORT_DATA = bitN(dato,nbit);
  140. nbit++;
  141. if(nbit == 8){
  142. nbit = 0;
  143. PORT_CLOCK = 0;
  144. PORT_DATA = 0;
  145. ConfigIntTimer2( T2_INT_OFF | T2_INT_PRIOR_2);
  146. }
  147. }
  148. if(n % 5 == 0)
  149. PORT_CLOCK = PORT_CLOCK ^1;
  150.  
  151.  
  152. mT2ClearIntFlag();
  153. // Clears the interrupt flag so that the program returns to the main loop
  154. } // END Timer2 ISR
  155.  
  156. void __ISR(_TIMER_3_VECTOR, ipl3) handlesTimer3Ints(void){
  157. // **make sure iplx matches the timer?s interrupt priority level
  158. readFlag = 1;
  159. mT3ClearIntFlag();
  160. // Clears the interrupt flag so that the program returns to the main loop
  161. }
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