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- ;; Sharp LR35902 Chip for GameBoy
- ;; Copyright (C) 2018 moecmks
- ;; This file is part of KS3578.
- ;;
- ;; LR35902.asm is free software; you can redistribute it and/or modify it under the
- ;; terms of the GNU General Public License as published by the Free Software
- ;; Foundation; either version 3 of the License, or (at your option) any later
- ;; version.
- .686 ; create 32 bit code
- .model flat, stdcall ; 32 bit memory model
- option casemap :none ; case sensitive
- ;; Sharp LR35902 Chip opcode mapper
- ;; http://www.pastraiser.com/cpu/gameboy/gameboy_opcodes.html
- ;; Register F Mask
- ;; The register flag field is different from the standard, in order to optimize instruction operation.
- Z_FLAG equ 040H
- H_FLAG equ 010H
- N_FLAG equ 002H
- C_FLAG equ 001H
- ;; extern memory/IO read/write
- extrn MmuRead@4:proc ;; prototype uint8_t __stdcall MmuRead (void *GameboyObj, uint64_t addresss)
- extrn MmuWrite@8:proc ;; prototype void __stdcall MmuWrite (void *GameboyObj, uint64_t addresss)
- extrn MmuReadWord@4:proc ;; prototype uint16_t __stdcall MmuReadWord (void *GameboyObj, uint64_t addresss, uint8_t value)
- extrn MmuWriteWord@8:proc ;; prototype void __stdcall MmuWriteWord (void *GameboyObj, uint64_t addresss, uint16_t value)
- ;; IRQ Interrupt mask
- IRQ_1 equ 001H ;; VBLANK (NMI)
- IRQ_2 equ 002H ;; LCDC
- IRQ_3 equ 004H ;; Programmable timer
- IRQ_4 equ 008H ;; Serial port switching
- IRQ_5 equ 010H ;; P14-15 Descent edge acknowledge
- ;; Interrupt exec address
- IRQ_1_ADDRESS equ 040H
- IRQ_2_ADDRESS equ 048H
- IRQ_3_ADDRESS equ 050H
- IRQ_4_ADDRESS equ 058H
- IRQ_5_ADDRESS equ 060H
- ;; define union .
- defREG macro _REG_LO, _REG_HI
- union
- struct
- _REG_LO db ?
- _REG_HI db ?
- ends
- _REG_HI&_REG_LO dw ?
- ends
- endm
- defREG2 macro _REG_LO, _REG_HI, _REG_BLOCK
- union
- struct
- _REG_LO db ?
- _REG_HI db ?
- ends
- _REG_BLOCK dw ?
- ends
- endm
- ;; XXX:memory order dep.
- LR35902 struct
- defREG F, A ;; A (Accumulator)
- ;; probably the most commonly used register.
- ;; Many instructions have special extended operation codes for accumulators.
- ;; F (Program status byte)
- ;; defREG C, B ;; A2008: syntax error : C
- union
- struct
- C_ db ?
- B db ?
- ends
- BC dw ?
- ends ;; Register BC, without special explanation.
- defREG E, D ;; Register DE, without special explanation.
- defREG L, H ;; Register HL, which is mostly used to address 16-bit address data,
- ;; also has the basic properties of BC, DE registers
- defREG2 SP_LO, SP_HI, SP_ ;; Stack Pointer.
- defREG2 PC_LO, PC_HI, PC ;; Program Pointer.
- IME db ? ;; Interrupt Master Enable
- Halted db ? ;; for Halt
- GameBoyObj dd ?
- LR35902 ends
- .code
- ;; prototype int32_t LR35902_exec (LR35902 *cpu);
- LR35902_exec proc C
- option prologue:none, epilogue:none
- push ebx ;U - save old frame
- push edi ;V - save old frame
- push esi
- nop
- YG_PF_8 equ bl
- YG_PF equ ebx
- YG_PC equ esi
- YG_GP equ edi
- ; ebx <- save now P (LR35902's PSB reg)
- ; esi <- save now PC (LR35902's EIP reg)
- ; edi <- save regs root
- ; eax <- calc temp or final calc out reslt
- ; ecx <- calc temp
- ; edx <- calc temp
- mov YG_GP, [esp+4+12] ;; fetch CPU struct
- mov si, [YG_GP].PC
- mov bl, [YG_GP].F
- assume edi:ptr LR35902
- ; Fetch Opcode, PC++
- push YG_PC
- push [YG_GP].GameBoyObj
- call MmuRead@4
- inc YG_PC
- FetchCurrentPC_ToEax macro
- push edx
- push [YG_GP].GameBoyObj
- call MmuRead@4
- endm
- FetchCurrentPC_ToEax_Inc macro
- FetchCurrentPC_ToEax
- inc edx
- endm
- FetchCurrentPC_Word_ToEax macro
- push edx
- push [YG_GP].GameBoyObj
- call MmuReadWord@4
- endm
- FetchCurrentPC_ToEax_Word_Inc macro
- FetchCurrentPC_Word_ToEax
- add edx, 2
- endm
- SetCyclesAndRet macro Cycles
- ;; write back PC
- mov [YG_GP].PC, si
- mov eax, Cycles
- jmp V_EXIT
- endm
- SetCyclesRetP macro Cycles
- ;; write back PC
- mov [YG_GP].F, bl
- SetCyclesAndRet Cycles
- endm
- ;; Register access-read unwind
- B_Write macro
- mov [YG_GP].B, al
- endm
- C_Write macro
- mov [YG_GP].C_, al
- endm
- D_Write macro
- mov [YG_GP].D, al
- endm
- E_Write macro
- mov [YG_GP].E, al
- endm
- H_Write macro
- mov [YG_GP].H, al
- endm
- L_Write macro
- mov [YG_GP].L, al
- endm
- A_Write macro
- mov [YG_GP].A, al
- endm
- SP_Write macro
- mov [YG_GP].SP_, ax
- endm
- DE_Write macro
- mov [YG_GP].DE, ax
- endm
- BC_Write macro
- mov [YG_GP].BC, ax
- endm
- HL_Write macro
- mov [YG_GP].HL, ax
- endm
- xImm16_WriteReg16 macro _Reg
- mov cx, [YG_GP]._Reg
- push ecx
- push eax
- push [YG_GP].GameBoyObj
- call MmuWriteWord@8
- endm
- xImm16_WriteRegSP macro
- mov cx, [YG_GP].SP_
- push ecx
- push eax
- push [YG_GP].GameBoyObj
- call MmuWriteWord@8
- endm
- xImm16_WriteRegA macro
- mov cl, [YG_GP].A
- push ecx
- push eax
- push [YG_GP].GameBoyObj
- call MmuWrite@8
- endm
- xBC_Write macro
- push eax
- mov ax, [YG_GP].BC
- push eax
- push [YG_GP].GameBoyObj
- call MmuWrite@8
- endm
- xDE_Write macro
- push eax
- mov ax, [YG_GP].DE
- push eax
- push [YG_GP].GameBoyObj
- call MmuWrite@8
- endm
- xHL_Write macro
- push eax
- mov ax, [YG_GP].HL
- push eax
- push [YG_GP].GameBoyObj
- call MmuWrite@8
- endm
- xHL_Write_Inc macro
- push eax
- mov ax, [YG_GP].HL
- push eax
- push [YG_GP].GameBoyObj
- call MmuWrite@8
- add [YG_GP].HL, 1
- endm
- xHL_Write_Dec macro
- push eax
- mov ax, [YG_GP].HL
- push eax
- push [YG_GP].GameBoyObj
- call MmuWrite@8
- sub [YG_GP].HL, 1
- endm
- xSP_Write macro
- push eax
- mov ax, [YG_GP].SP
- push eax
- push [YG_GP].GameBoyObj
- call MmuWrite@8
- endm
- ;; Register access-read unwind
- B_Read macro
- mov al, [YG_GP].B
- endm
- C_Read macro
- mov al, [YG_GP].C_
- endm
- D_Read macro
- mov al, [YG_GP].D
- endm
- E_Read macro
- mov al, [YG_GP].E
- endm
- H_Read macro
- mov al, [YG_GP].H
- endm
- L_Read macro
- mov al, [YG_GP].L
- endm
- A_Read macro
- mov al, [YG_GP].A
- endm
- BC_Read macro
- mov ax, [YG_GP].BC
- endm
- DE_Read macro
- mov ax, [YG_GP].DE
- endm
- HL_Read macro
- mov ax, [YG_GP].HL
- endm
- SP_Read macro
- mov ax, [YG_GP].SP_
- endm
- Imm8_Read macro
- push edx
- push [YG_GP].GameBoyObj
- call MmuRead@4
- inc edx
- endm
- Read_BySpecRegister macro _Reg
- push _Reg
- push [YG_GP].GameBoyObj
- call MmuRead@4
- inc edx
- endm
- Imm8Read_ExpandAddress16 macro
- Imm8_Read
- add eax, 0FF00h
- endm
- C_ExpandAddress16 macro
- mov al, [YG_GP].C_
- add eax, 0FF00h
- endm
- Imm8Read_ExpandAddress16_Fetch macro
- Imm8Read_ExpandAddress16
- Read_BySpecRegister eax
- endm
- Imm16Read_Address_Fetch macro
- Imm16_Read
- Read_BySpecRegister eax
- endm
- C_ExpandAddress16_Fetch macro
- mov al, [YG_GP].C_
- add eax, 0FF00h
- Read_BySpecRegister eax
- endm
- Imm16_Read macro
- push edx
- push [YG_GP].GameBoyObj
- call MmuReadWord@4
- add edx, 2
- endm
- xBC_Read macro
- mov ax, [YG_GP].BC
- push eax
- push [YG_GP].GameBoyObj
- call MmuRead@4
- endm
- xDE_Read macro
- mov ax, [YG_GP].DE
- push eax
- push [YG_GP].GameBoyObj
- call MmuRead@4
- endm
- xHL_Read macro
- mov ax, [YG_GP].HL
- push eax
- push [YG_GP].GameBoyObj
- call MmuRead@4
- endm
- xHL_Read_Inc macro
- mov ax, [YG_GP].HL
- push eax
- push [YG_GP].GameBoyObj
- call MmuRead@4
- add [YG_GP].HL, 1
- endm
- xHL_Read_Dec macro
- mov ax, [YG_GP].HL
- push eax
- push [YG_GP].GameBoyObj
- call MmuRead@4
- sub [YG_GP].HL, 1
- endm
- xSP_Read macro
- mov ax, [YG_GP].SP
- push eax
- push [YG_GP].GameBoyObj
- call MmuRead@4
- endm
- LD@Imm8 macro OpCase, Cycles_, WhoWrite
- OpCase&:
- FetchCurrentPC_ToEax_Inc
- WhoWrite
- SetCyclesAndRet Cycles_
- endm
- LD@Imm8 OP06, 8, B_Write ;; LD B Imm8, 2, Cycles:8
- LD@Imm8 OP0E, 8, C_Write ;; LD C Imm8, 2, Cycles:8
- LD@Imm8 OP16, 8, D_Write ;; LD D Imm8, 2, Cycles:8
- LD@Imm8 OP1E, 8, E_Write ;; LD E Imm8, 2, Cycles:8
- LD@Imm8 OP26, 8, H_Write ;; LD H Imm8, 2, Cycles:8
- LD@Imm8 OP2E, 8, L_Write ;; LD L Imm8, 2, Cycles:8
- LD@Imm8 OP36,12, xHL_Write ;; LD xHL Imm8, 2, Cycles:8
- LD@Imm8 OP3E, 8, A_Write ;; LD A Imm8, 2, Cycles:8
- LD@Imm16 macro OpCase, Cycles_, WhoRegister
- OpCase&:
- FetchCurrentPC_ToEax_Word_Inc
- mov [YG_GP].&WhoRegister, ax
- SetCyclesAndRet Cycles_
- endm
- LD@Imm16 OP01, 12, BC ;; LD BC Imm16, 3 Cycles:12
- LD@Imm16 OP11, 12, DE ;; LD DE Imm16, 3 Cycles:12
- LD@Imm16 OP21, 12, HL ;; LD HL Imm16, 3 Cycles:12
- LD@Imm16 OP31, 12, SP_ ;; LD SP Imm16, 3 Cycles:12
- LD@RxHLToRxHL macro OpCase, Cycles_, WhoLoad, WhoWrite
- OpCase&:
- WhoLoad
- WhoWrite
- SetCyclesAndRet Cycles_
- endm
- LD@RxHLToRxHL OP40, 4, B_Read, B_Write ;; LD B B, 1 Cycles:4
- LD@RxHLToRxHL OP41, 4, C_Read, B_Write ;; LD B C, 1 Cycles:4
- LD@RxHLToRxHL OP42, 4, D_Read, B_Write ;; LD B D, 1 Cycles:4
- LD@RxHLToRxHL OP43, 4, E_Read, B_Write ;; LD B E, 1 Cycles:4
- LD@RxHLToRxHL OP44, 4, H_Read, B_Write ;; LD B H, 1 Cycles:4
- LD@RxHLToRxHL OP45, 4, L_Read, B_Write ;; LD B L, 1 Cycles:4
- LD@RxHLToRxHL OP46, 8, xHL_Read, B_Write ;; LD B xHL, 1 Cycles:8
- LD@RxHLToRxHL OP47, 4, A_Read, B_Write ;; LD B A, 1 Cycles:4
- LD@RxHLToRxHL OP48, 4, B_Read, C_Write ;; LD C B, 1 Cycles:4
- LD@RxHLToRxHL OP49, 4, C_Read, C_Write ;; LD C C, 1 Cycles:4
- LD@RxHLToRxHL OP4A, 4, D_Read, C_Write ;; LD C D, 1 Cycles:4
- LD@RxHLToRxHL OP4B, 4, E_Read, C_Write ;; LD C E, 1 Cycles:4
- LD@RxHLToRxHL OP4C, 4, H_Read, C_Write ;; LD C H, 1 Cycles:4
- LD@RxHLToRxHL OP4D, 4, L_Read, C_Write ;; LD C L, 1 Cycles:4
- LD@RxHLToRxHL OP4E, 8, xHL_Read, C_Write ;; LD C xHL, 1 Cycles:8
- LD@RxHLToRxHL OP4F, 4, A_Read, C_Write ;; LD C A, 1 Cycles:4
- LD@RxHLToRxHL OP50, 4, B_Read, D_Write ;; LD D B, 1 Cycles:4
- LD@RxHLToRxHL OP51, 4, C_Read, D_Write ;; LD D C, 1 Cycles:4
- LD@RxHLToRxHL OP52, 4, D_Read, D_Write ;; LD D D, 1 Cycles:4
- LD@RxHLToRxHL OP53, 4, E_Read, D_Write ;; LD D E, 1 Cycles:4
- LD@RxHLToRxHL OP54, 4, H_Read, D_Write ;; LD D H, 1 Cycles:4
- LD@RxHLToRxHL OP55, 4, L_Read, D_Write ;; LD D L, 1 Cycles:4
- LD@RxHLToRxHL OP56, 8, xHL_Read, D_Write ;; LD D xHL, 1 Cycles:8
- LD@RxHLToRxHL OP57, 4, A_Read, D_Write ;; LD D A, 1 Cycles:4
- LD@RxHLToRxHL OP58, 4, B_Read, E_Write ;; LD E B, 1 Cycles:4
- LD@RxHLToRxHL OP59, 4, C_Read, E_Write ;; LD E C, 1 Cycles:4
- LD@RxHLToRxHL OP5A, 4, D_Read, E_Write ;; LD E D, 1 Cycles:4
- LD@RxHLToRxHL OP5B, 4, E_Read, E_Write ;; LD E E, 1 Cycles:4
- LD@RxHLToRxHL OP5C, 4, H_Read, E_Write ;; LD E H, 1 Cycles:4
- LD@RxHLToRxHL OP5D, 4, L_Read, E_Write ;; LD E L, 1 Cycles:4
- LD@RxHLToRxHL OP5E, 8, xHL_Read, E_Write ;; LD E xHL, 1 Cycles:8
- LD@RxHLToRxHL OP5F, 4, A_Read, E_Write ;; LD E A, 1 Cycles:4
- LD@RxHLToRxHL OP60, 4, B_Read, H_Write ;; LD H B, 1 Cycles:4
- LD@RxHLToRxHL OP61, 4, C_Read, H_Write ;; LD H C, 1 Cycles:4
- LD@RxHLToRxHL OP62, 4, D_Read, H_Write ;; LD H D, 1 Cycles:4
- LD@RxHLToRxHL OP63, 4, E_Read, H_Write ;; LD H E, 1 Cycles:4
- LD@RxHLToRxHL OP64, 4, H_Read, H_Write ;; LD H H, 1 Cycles:4
- LD@RxHLToRxHL OP65, 4, L_Read, H_Write ;; LD H L, 1 Cycles:4
- LD@RxHLToRxHL OP66, 8, xHL_Read, H_Write ;; LD H xHL, 1 Cycles:8
- LD@RxHLToRxHL OP67, 4, A_Read, H_Write ;; LD H A, 1 Cycles:4
- LD@RxHLToRxHL OP68, 4, B_Read, L_Write ;; LD L B, 1 Cycles:4
- LD@RxHLToRxHL OP69, 4, C_Read, L_Write ;; LD L C, 1 Cycles:4
- LD@RxHLToRxHL OP6A, 4, D_Read, L_Write ;; LD L D, 1 Cycles:4
- LD@RxHLToRxHL OP6B, 4, E_Read, L_Write ;; LD L E, 1 Cycles:4
- LD@RxHLToRxHL OP6C, 4, H_Read, L_Write ;; LD L H, 1 Cycles:4
- LD@RxHLToRxHL OP6D, 4, L_Read, L_Write ;; LD L L, 1 Cycles:4
- LD@RxHLToRxHL OP6E, 8, xHL_Read, L_Write ;; LD L xHL, 1 Cycles:8
- LD@RxHLToRxHL OP6F, 4, A_Read, L_Write ;; LD L A, 1 Cycles:4
- LD@RxHLToRxHL OP70, 8, B_Read, xHL_Write ;; LD xHL B, 1 Cycles:8
- LD@RxHLToRxHL OP71, 8, C_Read, xHL_Write ;; LD xHL C, 1 Cycles:8
- LD@RxHLToRxHL OP72, 8, D_Read, xHL_Write ;; LD xHL D, 1 Cycles:8
- LD@RxHLToRxHL OP73, 8, E_Read, xHL_Write ;; LD xHL E, 1 Cycles:8
- LD@RxHLToRxHL OP74, 8, H_Read, xHL_Write ;; LD xHL H, 1 Cycles:8
- LD@RxHLToRxHL OP75, 8, L_Read, xHL_Write ;; LD xHL L, 1 Cycles:8
- ;; LD@RxHLToRxHL OP76, 8, xHL_Read, xHL_Write ;; LD xHL xHL, 1 Cycles:8
- LD@RxHLToRxHL OP02, 8, A_Read, xBC_Write ;; LD xBC A, 1 Cycles:8
- LD@RxHLToRxHL OP12, 8, A_Read, xDE_Write ;; LD xDE A, 1 Cycles:8
- LD@RxHLToRxHL OP77, 8, A_Read, xHL_Write ;; LD xHL A, 1 Cycles:8
- LD@RxHLToRxHL OP22, 8, A_Read, xHL_Write_Inc;; LD xHL++ A, 1 Cycles:8
- LD@RxHLToRxHL OP32, 8, A_Read, xHL_Write_Dec ;; LD xHL-- A, 1 Cycles:8
- LD@RxHLToRxHL OP78, 4, B_Read, A_Write ;; LD A B, 1 Cycles:4
- LD@RxHLToRxHL OP79, 4, C_Read, A_Write ;; LD A C, 1 Cycles:4
- LD@RxHLToRxHL OP7A, 4, D_Read, A_Write ;; LD A D, 1 Cycles:4
- LD@RxHLToRxHL OP7B, 4, E_Read, A_Write ;; LD A E, 1 Cycles:4
- LD@RxHLToRxHL OP7C, 4, H_Read, A_Write ;; LD A H, 1 Cycles:4
- LD@RxHLToRxHL OP7D, 4, L_Read, A_Write ;; LD A L, 1 Cycles:4
- LD@RxHLToRxHL OP0A, 8, xBC_Read, A_Write ;; LD A xBC, 1 Cycles:8
- LD@RxHLToRxHL OP1A, 8, xDE_Read, A_Write ;; LD A xDE, 1 Cycles:8
- LD@RxHLToRxHL OP7E, 8, xHL_Read, A_Write ;; LD A xHL, 1 Cycles:8
- LD@RxHLToRxHL OP2A, 8, xHL_Read_Inc, A_Write ;; LD A xHL++, 1 Cycles:8
- LD@RxHLToRxHL OP3A, 8, xHL_Read_Dec, A_Write ;; LD A xHL--, 1 Cycles:8
- LD@RxHLToRxHL OP7F, 4, A_Read, A_Write ;; LD A A, 1 Cycles:4
- ;; MISC LD
- LD@RxHLToRxHL OP08,20, Imm16_Read, xImm16_WriteRegSP ;; LD (Imm16) SP, 3 Cycles:20
- LD@RxHLToRxHL OPEA,16, Imm16_Read, xImm16_WriteRegA ;; LD (Imm16) A, 3 Cycles:16
- LD@RxHLToRxHL OPE0,12, Imm8Read_ExpandAddress16, xImm16_WriteRegA ;; LD (Imm8+0FF00h) A, 2 Cycles:12
- LD@RxHLToRxHL OPE2, 8, C_ExpandAddress16, xImm16_WriteRegA ;; LD (C+0FF00h) A, 2 Cycles:8
- LD@RxHLToRxHL OPF0,12, Imm8Read_ExpandAddress16_Fetch, A_Write ;; LD A, (Imm8+0FF00h) 2 Cycles:12
- LD@RxHLToRxHL OPF2, 8, C_ExpandAddress16_Fetch, A_Write ;; LD A, (C+0FF00h) 2 Cycles:8
- LD@RxHLToRxHL OPFA,16, Imm16Read_Address_Fetch, A_Write ;; LD A, (Imm16) 3 Cycles:16
- LD@RxHLToRxHL OPF9, 8, HL_Read, SP_Write ;; LD SP HL 1 Cycles:8
- OPF8: ;; LD HL SP+Imm8(sign8) 2 Cycles:12
- Imm8_Read
- ;; Clear Reg-f
- xor YG_PF, YG_PF
- xor edx, edx
- ;; ext sign
- movsx ax, al
- mov cx, [YG_GP].SP_
- and ecx, 0FFFFh
- and eax, 0FFFFh
- lea edx, [ecx+eax]
- ;; SetH
- mov [YG_GP].HL, dx
- xor cx, ax
- mov ax, dx
- xor cx, ax
- and cx, 01000h
- shr cx, 8
- or YG_PF, ecx
- ;; SetC
- and dx, 010000h
- shr dx, 16
- or YG_PF, edx
- SetCyclesRetP 12
- ;; ALU, LOGIC 0x8x- 0xBx---------------------------------------------------------------------------------------
- Add_base macro atomic_it, Cycles
- ;; source <- eax
- ;; target <- always register A
- ;; clear psb .
- xor YG_PF, YG_PF
- movzx edx, [YG_GP].A
- and eax, 0FFh
- lea ecx, [eax+edx+atomic_it]
- ;; always write back A.
- mov [YG_GP].A, cl
- ;; SetH
- xor dx, ax
- mov ax, cx
- xor ax, dx
- and ax, 010h
- or YG_PF, eax
- ;; SetC
- or YG_PF_8, ch
- ;; SetZ XXX:ZTable
- test cl, cl
- setz cl
- shl ecx, 6
- or YG_PF, ecx
- endm
- Sub_base macro atomic_it, Cycles, Register ;; [YG_GP].A || cl for cmp opcode
- ;; source <- eax
- ;; target <- always register A
- ;; clear psb .
- mov YG_PF, N_FLAG
- movzx edx, [YG_GP].A
- and eax, 0FFh
- mov ecx, edx
- sub ecx, eax
- sub ecx, atomic_it
- and ecx, 0FFFFh
- ;; always write back A. or nodone
- mov Register, cl
- ;; SetH
- xor dx, ax
- mov ax, cx
- xor ax, dx
- and ax, 010h
- or YG_PF, eax
- ;; SetC
- mov edx, ecx
- shr edx, 15
- or YG_PF_8, dl
- ;; SetZ XXX:ZTable
- test cl, cl
- setz cl
- shl ecx, 6
- or YG_PF, ecx
- endm
- ;; XOR | OR | AND do unwind base .
- Logic_base macro Cycles, initFlags, LogicOp
- ;; source <- eax
- ;; target <- always register A
- ;; clear psb .
- mov YG_PF, initFlags
- movzx edx, [YG_GP].A
- LogicOp eax, edx
- ;; always write back A.
- mov [YG_GP].A, al
- ;; SetZ XXX:ZTable
- test al, al
- setz al
- shl eax, 6
- or YG_PF, eax
- endm
- ;; unwind
- Add_ macro Cycles
- Add_base 0, Cycles
- endm
- Adc_ macro Cycles
- Add_base 1, Cycles
- endm
- Sub_ macro Cycles
- Sub_base 0, Cycles, [YG_GP].A
- endm
- Sbc_ macro Cycles
- Sub_base 1, Cycles, [YG_GP].A
- endm
- Cmp_ macro Cycles
- Sub_base 0, Cycles, cl
- endm
- And_ macro Cycles
- Logic_base Cycles, H_FLAG, and
- endm
- Xor_ macro Cycles
- Logic_base Cycles, 0, xor
- endm
- Or_ macro Cycles
- Logic_base Cycles, 0, or
- endm
- AddWord_ macro
- ;; source <- eax
- ;; target <- always register HL
- ;; clear psb . save old Z
- and YG_PF, Z_FLAG
- movzx ecx, [YG_GP].HL
- and eax, 0FFFFh
- lea edx, [eax+ecx]
- ;; always write back A.
- mov [YG_GP].HL, dx
- ;; SetH
- xor cx, ax
- mov ax, dx
- xor cx, ax
- and cx, 01000h
- shr cx, 8
- or YG_PF, ecx
- ;; SetC
- and dx, 010000h
- shr dx, 16
- or YG_PF, edx
- endm
- DecWord_ macro
- dec eax
- endm
- IncWord_ macro
- inc eax
- endm
- Inc_ macro ;; !!!!!!!!!!!!!!!!!!!!!!!
- ;; source <- eax
- ;; clear psb . save old Z
- and YG_PF, C_FLAG
- and eax, 0FFh
- lea edx, [eax+1]
- mov ecx, edx
- ;; SetH
- xor cx, ax
- and cx, 010h
- or YG_PF, ecx
- mov eax, edx
- test dl, dl
- setz dl
- shl dl, 6
- or YG_P, edx
- endm
- Dec_ macro ;; !!!!!!!!!!!!!!!!!!!!!!!
- ;; source <- eax
- ;; clear psb . save old Z
- and YG_PF, C_FLAG
- or YG_PF, N_FLAG
- and eax, 0FFh
- lea edx, [eax-1]
- mov ecx, edx
- ;; SetH
- xor cx, ax
- and cx, 010h
- or YG_PF, ecx
- mov eax, edx
- test dl, dl
- setz dl
- shl dl, 6
- or YG_P, edx
- endm
- ;; !!! Include OP, imm8 and ADD Word Register.
- Opcode@MainALU macro Opcode, Cycles, whoRead, Op, whoWrite
- Opcode&:
- whoRead
- Op
- ;; whoWrite
- SetCyclesRetP Cycles
- endm
- Opcode@MainALU OP80, 4, B_Read, Add_, A_Write ;; ADD A, B 1 Cycles:4
- Opcode@MainALU OP81, 4, C_Read, Add_, A_Write ;; ADD A, C 1 Cycles:4
- Opcode@MainALU OP82, 4, D_Read, Add_, A_Write ;; ADD A, D 1 Cycles:4
- Opcode@MainALU OP83, 4, E_Read, Add_, A_Write ;; ADD A, E 1 Cycles:4
- Opcode@MainALU OP84, 4, H_Read, Add_, A_Write ;; ADD A, H 1 Cycles:4
- Opcode@MainALU OP85, 4, L_Read, Add_, A_Write ;; ADD A, L 1 Cycles:4
- Opcode@MainALU OP86, 8, xHL_Read, Add_, A_Write ;; ADD A, xHL 1 Cycles:8
- Opcode@MainALU OP87, 4, A_Read, Add_, A_Write ;; ADD A, A 1 Cycles:4
- Opcode@MainALU OPC6, 8, Imm8_Read, Add_, A_Write ;; ADD A, Imm8 2 Cycles:8
- Opcode@MainALU OP09, 8, BC_Read, AddWord_, A_Write ;; ADD HL, BC 1 Cycles:8
- Opcode@MainALU OP19, 8, DE_Read, AddWord_, A_Write ;; ADD HL, DE 1 Cycles:8
- Opcode@MainALU OP29, 8, HL_Read, AddWord_, A_Write ;; ADD HL, HL 1 Cycles:8
- Opcode@MainALU OP39, 8, SP_Read, AddWord_, A_Write ;; ADD HL, SP 1 Cycles:8
- Opcode@MainALU OP88, 4, B_Read, Adc_, A_Write ;; ADC A, B 1 Cycles:4
- Opcode@MainALU OP89, 4, C_Read, Adc_, A_Write ;; ADC A, C 1 Cycles:4
- Opcode@MainALU OP8A, 4, D_Read, Adc_, A_Write ;; ADC A, D 1 Cycles:4
- Opcode@MainALU OP8B, 4, E_Read, Adc_, A_Write ;; ADC A, E 1 Cycles:4
- Opcode@MainALU OP8C, 4, H_Read, Adc_, A_Write ;; ADC A, H 1 Cycles:4
- Opcode@MainALU OP8D, 4, L_Read, Adc_, A_Write ;; ADC A, L 1 Cycles:4
- Opcode@MainALU OP8E, 8, xHL_Read, Adc_, A_Write ;; ADC A, xHL 1 Cycles:8
- Opcode@MainALU OP8F, 4, A_Read, Adc_, A_Write ;; ADC A, A 1 Cycles:4
- Opcode@MainALU OPCE, 8, Imm8_Read, Adc_, A_Write ;; ADC A, Imm8 2 Cycles:8
- Opcode@MainALU OP03, 8, BC_Read, IncWord_, BC_Write ;; INC BC Cycles:8
- Opcode@MainALU OP13, 8, DE_Read, IncWord_, DE_Write ;; INC DE Cycles:8
- Opcode@MainALU OP23, 8, HL_Read, IncWord_, HL_Write ;; INC HL Cycles:8
- Opcode@MainALU OP33, 8, SP_Read, IncWord_, SP_Write ;; INC SP Cycles:8
- Opcode@MainALU OP04, 4, B_Read, Inc_, B_Write ;; INC B 1 Cycles:4
- Opcode@MainALU OP14, 4, C_Read, Inc_, C_Write ;; INC C 1 Cycles:4
- Opcode@MainALU OP24, 4, D_Read, Inc_, D_Write ;; INC D 1 Cycles:4
- Opcode@MainALU OP34, 4, E_Read, Inc_, E_Write ;; INC E 1 Cycles:4
- Opcode@MainALU OP0C, 4, H_Read, Inc_, H_Write ;; INC H 1 Cycles:4
- Opcode@MainALU OP1C, 4, L_Read, Inc_, L_Write ;; INC L 1 Cycles:4
- Opcode@MainALU OP2C,12, xHL_Read, Inc_, xHL_Write ;; INC xHL 1 Cycles:12
- Opcode@MainALU OP3C, 4, A_Read, Inc_, A_Write ;; INC A 1 Cycles:4
- Opcode@MainALU OP90, 4, B_Read, Sub_, A_Write ;; SUB A, B 1 Cycles:4
- Opcode@MainALU OP91, 4, C_Read, Sub_, A_Write ;; SUB A, C 1 Cycles:4
- Opcode@MainALU OP92, 4, D_Read, Sub_, A_Write ;; SUB A, D 1 Cycles:4
- Opcode@MainALU OP93, 4, E_Read, Sub_, A_Write ;; SUB A, E 1 Cycles:4
- Opcode@MainALU OP94, 4, H_Read, Sub_, A_Write ;; SUB A, H 1 Cycles:4
- Opcode@MainALU OP95, 4, L_Read, Sub_, A_Write ;; SUB A, L 1 Cycles:4
- Opcode@MainALU OP96, 8, xHL_Read, Sub_, A_Write ;; SUB A, xHL 1 Cycles:8
- Opcode@MainALU OP97, 4, A_Read, Sub_, A_Write ;; SUB A, A 1 Cycles:4
- Opcode@MainALU OPD6, 8, Imm8_Read, Sub_, A_Write ;; SUB A, Imm8 2 Cycles:8
- Opcode@MainALU OP98, 4, B_Read, Sbc_, A_Write ;; SBC A, B 1 Cycles:4
- Opcode@MainALU OP99, 4, C_Read, Sbc_, A_Write ;; SBC A, C 1 Cycles:4
- Opcode@MainALU OP9A, 4, D_Read, Sbc_, A_Write ;; SBC A, D 1 Cycles:4
- Opcode@MainALU OP9B, 4, E_Read, Sbc_, A_Write ;; SBC A, E 1 Cycles:4
- Opcode@MainALU OP9C, 4, H_Read, Sbc_, A_Write ;; SBC A, H 1 Cycles:4
- Opcode@MainALU OP9D, 4, L_Read, Sbc_, A_Write ;; SBC A, L 1 Cycles:4
- Opcode@MainALU OP9E, 8, xHL_Read, Sbc_, A_Write ;; SBC A, xHL 1 Cycles:8
- Opcode@MainALU OP9F, 4, A_Read, Sbc_, A_Write ;; SBC A, A 1 Cycles:4
- Opcode@MainALU OPDE, 8, Imm8_Read, Sbc_, A_Write ;; SBC A, Imm8 2 Cycles:8
- Opcode@MainALU OP0B, 8, BC_Read, IncWord_, BC_Write ;; DEC BC Cycles:8
- Opcode@MainALU OP1B, 8, DE_Read, IncWord_, DE_Write ;; DEC DE Cycles:8
- Opcode@MainALU OP2B, 8, HL_Read, IncWord_, HL_Write ;; DEC HL Cycles:8
- Opcode@MainALU OP3B, 8, SP_Read, IncWord_, SP_Write ;; DEC SP Cycles:8
- Opcode@MainALU OP05, 4, B_Read, Dec_, B_Write ;; DEC B 1 Cycles:4
- Opcode@MainALU OP15, 4, C_Read, Dec_, C_Write ;; DEC C 1 Cycles:4
- Opcode@MainALU OP25, 4, D_Read, Dec_, D_Write ;; DEC D 1 Cycles:4
- Opcode@MainALU OP35, 4, E_Read, Dec_, E_Write ;; DEC E 1 Cycles:4
- Opcode@MainALU OP0D, 4, H_Read, Dec_, H_Write ;; DEC H 1 Cycles:4
- Opcode@MainALU OP1D, 4, L_Read, Dec_, L_Write ;; DEC L 1 Cycles:4
- Opcode@MainALU OP2D,12, xHL_Read, Dec_, xHL_Write ;; DEC xHL 1 Cycles:12
- Opcode@MainALU OP3D, 4, A_Read, Dec_, A_Write ;; DEC A 1 Cycles:4
- Opcode@MainALU OPA0, 4, B_Read, And_, A_Write ;; AND A, B 1 Cycles:4
- Opcode@MainALU OPA1, 4, C_Read, And_, A_Write ;; AND A, C 1 Cycles:4
- Opcode@MainALU OPA2, 4, D_Read, And_, A_Write ;; AND A, D 1 Cycles:4
- Opcode@MainALU OPA3, 4, E_Read, And_, A_Write ;; AND A, E 1 Cycles:4
- Opcode@MainALU OPA4, 4, H_Read, And_, A_Write ;; AND A, H 1 Cycles:4
- Opcode@MainALU OPA5, 4, L_Read, And_, A_Write ;; AND A, L 1 Cycles:4
- Opcode@MainALU OPA6, 8, xHL_Read, And_, A_Write ;; AND A, xHL 1 Cycles:8
- Opcode@MainALU OPA7, 4, A_Read, And_, A_Write ;; AND A, A 1 Cycles:4
- Opcode@MainALU OPE6, 8, Imm8_Read, Add_, A_Write ;; AND A, Imm8 2 Cycles:8
- Opcode@MainALU OPA8, 4, B_Read, Xor_, A_Write ;; XOR A, B 1 Cycles:4
- Opcode@MainALU OPA9, 4, C_Read, Xor_, A_Write ;; XOR A, C 1 Cycles:4
- Opcode@MainALU OPAA, 4, D_Read, Xor_, A_Write ;; XOR A, D 1 Cycles:4
- Opcode@MainALU OPAB, 4, E_Read, Xor_, A_Write ;; XOR A, E 1 Cycles:4
- Opcode@MainALU OPAC, 4, H_Read, Xor_, A_Write ;; XOR A, H 1 Cycles:4
- Opcode@MainALU OPAD, 4, L_Read, Xor_, A_Write ;; XOR A, L 1 Cycles:4
- Opcode@MainALU OPAE, 8, xHL_Read, Xor_, A_Write ;; XOR A, xHL 1 Cycles:8
- Opcode@MainALU OPAF, 4, A_Read, Xor_, A_Write ;; XOR A, A 1 Cycles:4
- Opcode@MainALU OPEE, 8, Imm8_Read, Xor_, A_Write ;; XOR A, Imm8 2 Cycles:8
- Opcode@MainALU OPB0, 4, B_Read, Or_, A_Write ;; OR A, B 1 Cycles:4
- Opcode@MainALU OPB1, 4, C_Read, Or_, A_Write ;; OR A, C 1 Cycles:4
- Opcode@MainALU OPB2, 4, D_Read, Or_, A_Write ;; OR A, D 1 Cycles:4
- Opcode@MainALU OPB3, 4, E_Read, Or_, A_Write ;; OR A, E 1 Cycles:4
- Opcode@MainALU OPB4, 4, H_Read, Or_, A_Write ;; OR A, H 1 Cycles:4
- Opcode@MainALU OPB5, 4, L_Read, Or_, A_Write ;; OR A, L 1 Cycles:4
- Opcode@MainALU OPB6, 8, xHL_Read, Or_, A_Write ;; OR A, xHL 1 Cycles:8
- Opcode@MainALU OPB7, 4, A_Read, Or_, A_Write ;; OR A, A 1 Cycles:4
- Opcode@MainALU OPF6, 8, Imm8_Read, Or_, A_Write ;; OR A, Imm8 2 Cycles:8
- Opcode@MainALU OPB8, 4, B_Read, Cmp_, A_Write ;; CP A, B 1 Cycles:4
- Opcode@MainALU OPB9, 4, C_Read, Cmp_, A_Write ;; CP A, C 1 Cycles:4
- Opcode@MainALU OPBA, 4, D_Read, Cmp_, A_Write ;; CP A, D 1 Cycles:4
- Opcode@MainALU OPBB, 4, E_Read, Cmp_, A_Write ;; CP A, E 1 Cycles:4
- Opcode@MainALU OPBC, 4, H_Read, Cmp_, A_Write ;; CP A, H 1 Cycles:4
- Opcode@MainALU OPBD, 4, L_Read, Cmp_, A_Write ;; CP A, L 1 Cycles:4
- Opcode@MainALU OPBE, 8, xHL_Read, Cmp_, A_Write ;; CP A, xHL 1 Cycles:8
- Opcode@MainALU OPBF, 4, A_Read, Cmp_, A_Write ;; CP A, A 1 Cycles:4
- Opcode@MainALU OPFE, 8, Imm8_Read, Cmp_, A_Write ;; CP A, Imm8 2 Cycles:8
- V_EXIT:
- pop esi
- pop YG_GP
- pop ebx
- ret
- int 3
- align 16
- OPTAB dd OP00, OP01, OP02, OP03, OP04, OP05, OP06, OP07, OP08, OP09, OP0A, OP0B, OP0C, OP0D, OP0E, OP0F
- dd OP10, OP11, OP12, OP13, OP14, OP15, OP16, OP17, OP18, OP19, OP1A, OP1B, OP1C, OP1D, OP1E, OP1F
- dd OP20, OP21, OP22, OP23, OP24, OP25, OP26, OP27, OP28, OP29, OP2A, OP2B, OP2C, OP2D, OP2E, OP2F
- dd OP30, OP31, OP32, OP33, OP34, OP35, OP36, OP37, OP38, OP39, OP3A, OP3B, OP3C, OP3D, OP3E, OP3F
- dd OP40, OP41, OP42, OP43, OP44, OP45, OP46, OP47, OP48, OP49, OP4A, OP4B, OP4C, OP4D, OP4E, OP4F
- dd OP50, OP51, OP52, OP53, OP54, OP55, OP56, OP57, OP58, OP59, OP5A, OP5B, OP5C, OP5D, OP5E, OP5F
- dd OP60, OP61, OP62, OP63, OP64, OP65, OP66, OP67, OP68, OP69, OP6A, OP6B, OP6C, OP6D, OP6E, OP6F
- dd OP70, OP71, OP72, OP73, OP74, OP75, OP76, OP77, OP78, OP79, OP7A, OP7B, OP7C, OP7D, OP7E, OP7F
- dd OP80, OP81, OP82, OP83, OP84, OP85, OP86, OP87, OP88, OP89, OP8A, OP8B, OP8C, OP8D, OP8E, OP8F
- dd OP90, OP91, OP92, OP93, OP94, OP95, OP96, OP97, OP98, OP99, OP9A, OP9B, OP9C, OP9D, OP9E, OP9F
- dd OPA0, OPA1, OPA2, OPA3, OPA4, OPA5, OPA6, OPA7, OPA8, OPA9, OPAA, OPAB, OPAC, OPAD, OPAE, OPAF
- dd OPB0, OPB1, OPB2, OPB3, OPB4, OPB5, OPB6, OPB7, OPB8, OPB9, OPBA, OPBB, OPBC, OPBD, OPBE, OPBF
- dd OPC0, OPC1, OPC2, OPC3, OPC4, OPC5, OPC6, OPC7, OPC8, OPC9, OPCA, OPCB, OPCC, OPCD, OPCE, OPCF
- dd OPD0, OPD1, OPD2, OPD3, OPD4, OPD5, OPD6, OPD7, OPD8, OPD9, OPDA, OPDB, OPDC, OPDD, OPDE, OPDF
- dd OPE0, OPE1, OPE2, OPE3, OPE4, OPE5, OPE6, OPE7, OPE8, OPE9, OPEA, OPEB, OPEC, OPED, OPEE, OPEF
- dd OPF0, OPF1, OPF2, OPF3, OPF4, OPF5, OPF6, OPF7, OPF8, OPF9, OPFA, OPFB, OPFC, OPFD, OPFE, OPFF
- align 16
- CBTAB dd CB00, CB01, CB02, CB03, CB04, CB05, CB06, CB07, CB08, CB09, CB0A, CB0B, CB0C, CB0D, CB0E, CB0F
- dd CB10, CB11, CB12, CB13, CB14, CB15, CB16, CB17, CB18, CB19, CB1A, CB1B, CB1C, CB1D, CB1E, CB1F
- dd CB20, CB21, CB22, CB23, CB24, CB25, CB26, CB27, CB28, CB29, CB2A, CB2B, CB2C, CB2D, CB2E, CB2F
- dd CB30, CB31, CB32, CB33, CB34, CB35, CB36, CB37, CB38, CB39, CB3A, CB3B, CB3C, CB3D, CB3E, CB3F
- dd CB40, CB41, CB42, CB43, CB44, CB45, CB46, CB47, CB48, CB49, CB4A, CB4B, CB4C, CB4D, CB4E, CB4F
- dd CB50, CB51, CB52, CB53, CB54, CB55, CB56, CB57, CB58, CB59, CB5A, CB5B, CB5C, CB5D, CB5E, CB5F
- dd CB60, CB61, CB62, CB63, CB64, CB65, CB66, CB67, CB68, CB69, CB6A, CB6B, CB6C, CB6D, CB6E, CB6F
- dd CB70, CB71, CB72, CB73, CB74, CB75, CB76, CB77, CB78, CB79, CB7A, CB7B, CB7C, CB7D, CB7E, CB7F
- dd CB80, CB81, CB82, CB83, CB84, CB85, CB86, CB87, CB88, CB89, CB8A, CB8B, CB8C, CB8D, CB8E, CB8F
- dd CB90, CB91, CB92, CB93, CB94, CB95, CB96, CB97, CB98, CB99, CB9A, CB9B, CB9C, CB9D, CB9E, CB9F
- dd CBA0, CBA1, CBA2, CBA3, CBA4, CBA5, CBA6, CBA7, CBA8, CBA9, CBAA, CBAB, CBAC, CBAD, CBAE, CBAF
- dd CBB0, CBB1, CBB2, CBB3, CBB4, CBB5, CBB6, CBB7, CBB8, CBB9, CBBA, CBBB, CBBC, CBBD, CBBE, CBBF
- dd CBC0, CBC1, CBC2, CBC3, CBC4, CBC5, CBC6, CBC7, CBC8, CBC9, CBCA, CBCB, CBCC, CBCD, CBCE, CBCF
- dd CBD0, CBD1, CBD2, CBD3, CBD4, CBD5, CBD6, CBD7, CBD8, CBD9, CBDA, CBDB, CBDC, CBDD, CBDE, CBDF
- dd CBE0, CBE1, CBE2, CBE3, CBE4, CBE5, CBE6, CBE7, CBE8, CBE9, CBEA, CBEB, CBEC, CBED, CBEE, CBEF
- dd CBF0, CBF1, CBF2, CBF3, CBF4, CBF5, CBF6, CBF7, CBF8, CBF9, CBFA, CBFB, CBFC, CBFD, CBFE, CBFF
- LR35902_exec endp
- end
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