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Sound via PWM

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Mar 5th, 2012
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  1. // ATtiny2313, 20MHz
  2. #define F_CPU 20000000UL
  3.  
  4. #include <avr/io.h>
  5. //#include <util/delay.h>
  6. #include <avr/interrupt.h>
  7. #include <avr/pgmspace.h>
  8.  
  9. #define pwmout 5
  10.  
  11. // TCCRxX
  12. #define WGMx0 0
  13. #define WGMx2 3
  14. #define COMxB0 4
  15. #define CSx0 0
  16.  
  17. // TIMSK
  18. #define OCIE1A 6
  19. #define OCIE1B 5
  20.  
  21. typedef unsigned char uint8;
  22. typedef unsigned short uint16;
  23.  
  24. volatile uint8 i;
  25. const uint8 wavetable[340] PROGMEM = {
  26. 0x82, 0x86, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x8D, 0x95, 0x96, 0x95, 0x95, 0x95,
  27. 0x95, 0x95, 0x95, 0x94, 0x97, 0xA0, 0xA5, 0xA4, 0xA4, 0xA4, 0xA4, 0xA4, 0xA4, 0xA3, 0xA3, 0xAA,
  28. 0xB3, 0xB4, 0xB3, 0xB3, 0xB3, 0xB3, 0xB3, 0xB3, 0xB2, 0xB4, 0xBD, 0xC3, 0xC2, 0xC2, 0xC2, 0xC2,
  29. 0xC1, 0xC1, 0xC1, 0xC0, 0xC6, 0xCD, 0xCF, 0xCE, 0xCD, 0xCD, 0xCD, 0xCD, 0xCD, 0xCC, 0xCE, 0xD5,
  30. 0xDA, 0xDA, 0xD9, 0xD9, 0xD9, 0xD9, 0xD8, 0xD8, 0xD7, 0xDC, 0xE3, 0xE5, 0xE4, 0xE4, 0xE4, 0xE4,
  31. 0xE4, 0xE3, 0xE2, 0xE4, 0xEA, 0xF0, 0xF0, 0xEF, 0xEF, 0xEF, 0xEF, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
  32. 0xED, 0xED, 0xED, 0xED, 0xED, 0xEC, 0xEC, 0xED, 0xEB, 0xE5, 0xDE, 0xDD, 0xDE, 0xDE, 0xDD, 0xDD,
  33. 0xDD, 0xDD, 0xDD, 0xDA, 0xD2, 0xCE, 0xCF, 0xCF, 0xCE, 0xCE, 0xCE, 0xCE, 0xCE, 0xCE, 0xC8, 0xC1,
  34. 0xBF, 0xC0, 0xC0, 0xC0, 0xC0, 0xBF, 0xBF, 0xC0, 0xBD, 0xB5, 0xB1, 0xB1, 0xB2, 0xB1, 0xB1, 0xB1,
  35. 0xB1, 0xB2, 0xB1, 0xAB, 0xA2, 0xA0, 0xA1, 0xA1, 0xA1, 0xA1, 0xA0, 0xA0, 0xA1, 0x9F, 0x96, 0x90,
  36. 0x90, 0x91, 0x90, 0x90, 0x90, 0x90, 0x91, 0x91, 0x8B, 0x82, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
  37. 0x80, 0x81, 0x80, 0x78, 0x71, 0x71, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x73, 0x6D, 0x64, 0x61,
  38. 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x63, 0x62, 0x5A, 0x53, 0x52, 0x53, 0x53, 0x53, 0x53, 0x53,
  39. 0x54, 0x55, 0x50, 0x47, 0x43, 0x44, 0x45, 0x45, 0x45, 0x45, 0x45, 0x46, 0x45, 0x3C, 0x33, 0x32,
  40. 0x33, 0x33, 0x33, 0x34, 0x34, 0x34, 0x35, 0x31, 0x26, 0x21, 0x22, 0x23, 0x23, 0x23, 0x23, 0x23,
  41. 0x24, 0x24, 0x1C, 0x12, 0x11, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13, 0x14, 0x11, 0x06, 0x01, 0x01,
  42. 0x02, 0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x04, 0x04, 0x04, 0x04, 0x05, 0x05, 0x05, 0x06, 0x06,
  43. 0x05, 0x08, 0x13, 0x1A, 0x1A, 0x19, 0x1A, 0x1A, 0x1A, 0x1A, 0x1A, 0x1A, 0x21, 0x2C, 0x2F, 0x2E,
  44. 0x2E, 0x2E, 0x2E, 0x2F, 0x2F, 0x2E, 0x30, 0x3A, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x43, 0x42,
  45. 0x42, 0x48, 0x53, 0x57, 0x55, 0x55, 0x56, 0x56, 0x56, 0x56, 0x55, 0x57, 0x5F, 0x66, 0x67, 0x66,
  46. 0x66, 0x66, 0x66, 0x66, 0x66, 0x65, 0x6A, 0x73, 0x77, 0x76, 0x76, 0x76, 0x76, 0x76, 0x77, 0x76,
  47. 0x77, 0x7E, 0x85, 0x85
  48. };
  49.  
  50.  
  51.  
  52. ISR(TIMER1_COMPA_vect) {
  53. OCR0B = pgm_read_byte(wavetable+i);
  54. if(i!=339) {
  55. i++;
  56. }
  57. else {
  58. i=0;
  59. }
  60. }
  61.  
  62. int main(void) {
  63. DDRD |= (1 << pwmout);
  64. PORTD |= (1 << pwmout);
  65.  
  66. TCCR0A |= (3 << WGMx0); // 0-normal, 1-phase correct pwm ,2-ctc, 3-fast pwm
  67. TCCR0A |= (3 << COMxB0); // ^ V
  68. TCCR0B |= (1 << CSx0); // clock source - CPU/1
  69.  
  70. TCCR1B |= (1 << WGMx2); // CTC mode
  71. TCCR1B |= (1 << CSx0); // clock source - CPU/8
  72. TIMSK |= (1 << OCIE1A); // enable timer1 compA interrupt
  73. OCR1A = 57; // 44100kHz (57)
  74. // OCR1A = 169; // 14714kHz
  75.  
  76. i=0;
  77. sei();
  78. while(1) {
  79. asm("nop");
  80.  
  81. }
  82. return 0;
  83. }
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