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odroid c2 device tree file for 4x serial and 1x hwclk@i2c-b

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Jan 20th, 2020
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  1. /dts-v1/;
  2.  
  3. / {
  4. compatible = "amlogic, Gxbb";
  5. model = "ODROID-C2";
  6. interrupt-parent = <0x1>;
  7. #address-cells = <0x2>;
  8. #size-cells = <0x2>;
  9.  
  10. cpus {
  11. #address-cells = <0x2>;
  12. #size-cells = <0x0>;
  13. #cooling-cells = <0x2>;
  14. linux,phandle = <0x3a>;
  15. phandle = <0x3a>;
  16.  
  17. cpu@0 {
  18. device_type = "cpu";
  19. compatible = "arm,cortex-a53", "arm,armv8";
  20. reg = <0x0 0x0>;
  21. enable-method = "psci";
  22. timer = <0x2>;
  23. };
  24.  
  25. cpu@1 {
  26. device_type = "cpu";
  27. compatible = "arm,cortex-a53", "arm,armv8";
  28. reg = <0x0 0x1>;
  29. enable-method = "psci";
  30. timer = <0x4>;
  31. };
  32.  
  33. cpu@2 {
  34. device_type = "cpu";
  35. compatible = "arm,cortex-a53", "arm,armv8";
  36. reg = <0x0 0x2>;
  37. enable-method = "psci";
  38. timer = <0x5>;
  39. };
  40.  
  41. cpu@3 {
  42. device_type = "cpu";
  43. compatible = "arm,cortex-a53", "arm,armv8";
  44. reg = <0x0 0x3>;
  45. enable-method = "psci";
  46. timer = <0x6>;
  47. };
  48. };
  49.  
  50. meson_timer {
  51. compatible = "arm, meson-timer";
  52. #address-cells = <0x2>;
  53. #size-cells = <0x2>;
  54. ranges;
  55. reg = <0x0 0xc1109990 0x0 0x4 0x0 0xc1109988 0x0 0x4>;
  56.  
  57. timer-f {
  58. timer_name = "MESON TIMER-F";
  59. clockevent-rating = <0x12c>;
  60. clockevent-shift = <0x14>;
  61. clockevent-features = <0x3>;
  62. interrupts = <0x0 0x3c 0x1>;
  63. bit_enable = <0x10>;
  64. bit_mode = <0xc>;
  65. bit_resolution = <0x0>;
  66. reg = <0x0 0xc1109994 0x0 0x4>;
  67. linux,phandle = <0x2>;
  68. phandle = <0x2>;
  69. };
  70.  
  71. timer-g {
  72. timer_name = "MESON TIMER-G";
  73. clockevent-rating = <0x12c>;
  74. clockevent-shift = <0x14>;
  75. clockevent-features = <0x3>;
  76. interrupts = <0x0 0x3d 0x1>;
  77. bit_enable = <0x11>;
  78. bit_mode = <0xd>;
  79. bit_resolution = <0x2>;
  80. reg = <0x0 0xc1109998 0x0 0x4>;
  81. linux,phandle = <0x4>;
  82. phandle = <0x4>;
  83. };
  84.  
  85. timer-h {
  86. timer_name = "MESON TIMER-H";
  87. clockevent-rating = <0x12c>;
  88. clockevent-shift = <0x14>;
  89. clockevent-features = <0x3>;
  90. interrupts = <0x0 0x3e 0x1>;
  91. bit_enable = <0x12>;
  92. bit_mode = <0xe>;
  93. bit_resolution = <0x4>;
  94. reg = <0x0 0xc110999c 0x0 0x4>;
  95. linux,phandle = <0x5>;
  96. phandle = <0x5>;
  97. };
  98.  
  99. timer-i {
  100. timer_name = "MESON TIMER-I";
  101. clockevent-rating = <0x12c>;
  102. clockevent-shift = <0x14>;
  103. clockevent-features = <0x3>;
  104. interrupts = <0x0 0x3f 0x1>;
  105. bit_enable = <0x13>;
  106. bit_mode = <0xf>;
  107. bit_resolution = <0x6>;
  108. reg = <0x0 0xc11099a0 0x0 0x4>;
  109. linux,phandle = <0x6>;
  110. phandle = <0x6>;
  111. };
  112. };
  113.  
  114. timer {
  115. compatible = "arm,armv8-timer";
  116. interrupts = <0x1 0xd 0xff01 0x1 0xe 0xff01 0x1 0xb 0xff01 0x1 0xa 0xff01>;
  117. };
  118.  
  119. arm_pmu {
  120. compatible = "arm,armv8-pmuv3";
  121. interrupts = <0x0 0x89 0x4 0x0 0x8a 0x4 0x0 0x99 0x4 0x0 0x9a 0x4>;
  122. };
  123.  
  124. pm {
  125. compatible = "amlogic, pm";
  126. gxbaby-suspend;
  127. reg = <0x0 0xc81000a8 0x0 0x4 0x0 0xc810023c 0x0 0x4>;
  128. };
  129.  
  130. mali@d00c0000 {
  131. #cooling-cells = <0x2>;
  132. compatible = "arm,mali-450";
  133. interrupt-parent = <0x1>;
  134. reg = <0x0 0xd00c0000 0x0 0x40000 0x0 0xc883c000 0x0 0x4 0x0 0xc8100000 0x0 0x4>;
  135. interrupts = <0x0 0xa0 0x4 0x0 0xa1 0x4 0x0 0xa2 0x4 0x0 0xa3 0x4 0x0 0xa4 0x4 0x0 0xa5 0x4 0x0 0xa6 0x4 0x0 0xa7 0x4 0x0 0xa8 0x4 0x0 0xa9 0x4>;
  136. interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP", "IRQPMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1", "IRQPP2", "IRQPPMMU2";
  137. pmu_domain_config = <0x1 0x2 0x4 0x4 0x0 0x0 0x0 0x0 0x0 0x1 0x2 0x0>;
  138. pmu_switch_delay = <0xffff>;
  139. num_of_pp = <0x3>;
  140. def_clk = <0x4>;
  141. sc_mpp = <0x3>;
  142. min_pp = <0x3>;
  143. min_clk = <0x4>;
  144. tbl = <0x7 0x8 0x9 0xa 0xb 0xc>;
  145. clocks = <0xd 0x8 0xd 0x9 0xd 0x11 0xd 0x12 0xd 0x1e 0xd 0x15 0xd 0x13 0xd 0x14>;
  146. clock-names = "fclk_div3", "fclk_div4", "fclk_div5", "fclk_div7", "gp0_pll", "clk_mali", "clk_mali_0", "clk_mali_1";
  147. control_interval = <0xc8>;
  148. dvfs_tbl = <0xe>;
  149. linux,phandle = <0x3d>;
  150. phandle = <0x3d>;
  151.  
  152. clk125_cfg {
  153. clk_freq = <0x7735940>;
  154. clk_parent = "fclk_div4";
  155. clkp_freq = <0x1dcd6500>;
  156. voltage = <0x47e>;
  157. keep_count = <0x5>;
  158. threshold = <0x1e 0x78>;
  159. linux,phandle = <0x7>;
  160. phandle = <0x7>;
  161. };
  162.  
  163. clk250_cfg {
  164. clk_freq = <0xee6b280>;
  165. clk_parent = "fclk_div4";
  166. clkp_freq = <0x1dcd6500>;
  167. voltage = <0x47e>;
  168. keep_count = <0x5>;
  169. threshold = <0x50 0xaa>;
  170. };
  171.  
  172. clk285_cfg {
  173. clk_freq = <0x10fcc140>;
  174. clk_parent = "fclk_div7";
  175. clkp_freq = <0x10fcc140>;
  176. voltage = <0x47e>;
  177. keep_count = <0x5>;
  178. threshold = <0x64 0xbe>;
  179. linux,phandle = <0x8>;
  180. phandle = <0x8>;
  181. };
  182.  
  183. clk400_cfg {
  184. clk_freq = <0x17d78400>;
  185. clk_parent = "fclk_div5";
  186. clkp_freq = <0x17d78400>;
  187. voltage = <0x47e>;
  188. keep_count = <0x5>;
  189. threshold = <0x98 0xcf>;
  190. linux,phandle = <0x9>;
  191. phandle = <0x9>;
  192. };
  193.  
  194. clk500_cfg {
  195. clk_freq = <0x1dcd6500>;
  196. clk_parent = "fclk_div4";
  197. clkp_freq = <0x1dcd6500>;
  198. voltage = <0x47e>;
  199. keep_count = <0x5>;
  200. threshold = <0xb4 0xdc>;
  201. linux,phandle = <0xa>;
  202. phandle = <0xa>;
  203. };
  204.  
  205. clk666_cfg {
  206. clk_freq = <0x27b25a80>;
  207. clk_parent = "fclk_div3";
  208. clkp_freq = <0x27b25a80>;
  209. voltage = <0x47e>;
  210. keep_count = <0x5>;
  211. threshold = <0xd2 0xec>;
  212. linux,phandle = <0xb>;
  213. phandle = <0xb>;
  214. };
  215.  
  216. clk800_cfg {
  217. clk_freq = <0x2f34f600>;
  218. clk_parent = "gp0_pll";
  219. clkp_freq = <0x2f34f600>;
  220. voltage = <0x47e>;
  221. keep_count = <0x5>;
  222. threshold = <0xe6 0xff>;
  223. linux,phandle = <0xc>;
  224. phandle = <0xc>;
  225. };
  226. };
  227.  
  228. interrupt-controller@c4301000 {
  229. compatible = "arm,gic-400", "arm,cortex-a15-gic", "arm,cortex-a9-gic";
  230. #interrupt-cells = <0x3>;
  231. #address-cells = <0x0>;
  232. interrupt-controller;
  233. reg = <0x0 0xc4301000 0x0 0x1000 0x0 0xc4302000 0x0 0x2000 0x0 0xc4304000 0x0 0x2000 0x0 0xc4306000 0x0 0x2000>;
  234. interrupts = <0x1 0x9 0xf04>;
  235. linux,phandle = <0x1>;
  236. phandle = <0x1>;
  237. };
  238.  
  239. aml_restart {
  240. compatible = "aml, restart";
  241. sys_reset = <0x84000009>;
  242. sys_poweroff = <0x84000008>;
  243. };
  244.  
  245. psci {
  246. compatible = "arm,psci";
  247. method = "smc";
  248. cpu_suspend = <0xc4000001>;
  249. cpu_off = <0x84000002>;
  250. cpu_on = <0xc4000003>;
  251. migrate = <0xc4000005>;
  252. };
  253.  
  254. secmon {
  255. compatible = "aml,secmon";
  256. memory-region = <0xf>;
  257. in_base_func = <0x82000020>;
  258. out_base_func = <0x82000021>;
  259. };
  260.  
  261. securitykey {
  262. compatible = "aml, securitykey";
  263. storage_query = <0x82000060>;
  264. storage_read = <0x82000061>;
  265. storage_write = <0x82000062>;
  266. storage_tell = <0x82000063>;
  267. storage_verify = <0x82000064>;
  268. storage_status = <0x82000065>;
  269. storage_list = <0x82000067>;
  270. storage_remove = <0x82000068>;
  271. storage_in_func = <0x82000023>;
  272. storage_out_func = <0x82000024>;
  273. storage_block_func = <0x82000025>;
  274. storage_size_func = <0x82000027>;
  275. };
  276.  
  277. cpu_iomap {
  278. compatible = "amlogic,iomap";
  279. #address-cells = <0x2>;
  280. #size-cells = <0x2>;
  281. ranges;
  282.  
  283. io_cbus_base {
  284. reg = <0x0 0xc1100000 0x0 0x100000>;
  285. };
  286.  
  287. io_apb_base {
  288. reg = <0x0 0xd0000000 0x0 0x200000>;
  289. };
  290.  
  291. io_aobus_base {
  292. reg = <0x0 0xc8100000 0x0 0x100000>;
  293. };
  294. };
  295.  
  296. cpufreq-meson {
  297. compatible = "amlogic, cpufreq-scpi";
  298. status = "okay";
  299. clocks = <0x10 0x0>;
  300. clock-names = "cpu_clk";
  301. };
  302.  
  303. amlogic-watchdog {
  304. compatible = "amlogic,meson-gxbb-wdt";
  305. status = "okay";
  306. reg = <0x0 0xc11098d0 0x0 0x10>;
  307. clocks = <0xd 0x2>;
  308. };
  309.  
  310. meson_clock {
  311. compatible = "amlogic, gxbb-clock";
  312. reg = <0x0 0xc883c000 0x0 0x1000 0x0 0xc8100000 0x0 0x1000>;
  313. #clock-cells = <0x1>;
  314. #reset-cells = <0x1>;
  315. sys_max = <0x5b8d8000>;
  316. linux,phandle = <0xd>;
  317. phandle = <0xd>;
  318. };
  319.  
  320. pinmux {
  321. compatible = "amlogic, pinmux-gxbb";
  322. dev_name = "pinmux";
  323. #pinmux-cells = <0x2>;
  324. #address-cells = <0x2>;
  325. #size-cells = <0x2>;
  326. reg = <0x0 0xc1109880 0x0 0x10>;
  327. interrupts = <0x0 0x40 0x1 0x0 0x41 0x1 0x0 0x42 0x1 0x0 0x43 0x1 0x0 0x44 0x1 0x0 0x45 0x1 0x0 0x46 0x1 0x0 0x47 0x1>;
  328. ranges;
  329.  
  330. banks@c11080b0 {
  331. reg = <0x0 0xc88344b0 0x0 0x28 0x0 0xc88344e8 0x0 0x14 0x0 0xc8834120 0x0 0x14 0x0 0xc8834430 0x0 0x40>;
  332. reg-names = "mux", "pull", "pull-enable", "gpio";
  333. gpio-controller;
  334. #gpio-cells = <0x2>;
  335. linux,phandle = <0x13>;
  336. phandle = <0x13>;
  337. };
  338.  
  339. ao-bank@c1108030 {
  340. reg = <0x0 0xc8100014 0x0 0x8 0x0 0xc810002c 0x0 0x4 0x0 0xc8100024 0x0 0x8>;
  341. reg-names = "mux", "pull", "gpio";
  342. gpio-controller;
  343. #gpio-cells = <0x2>;
  344. linux,phandle = <0x25>;
  345. phandle = <0x25>;
  346. };
  347.  
  348. eth_pins {
  349. amlogic,setmask = <0x6 0x3fff>;
  350. amlogic,clrmask = <0x6 0xc000 0x5 0x3c0000f0 0x4 0x300>;
  351. amlogic,pins = "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4", "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9", "GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_15";
  352. linux,phandle = <0x1f>;
  353. phandle = <0x1f>;
  354. };
  355.  
  356. remote_pin {
  357. amlogic,setmask = <0x10 0x1>;
  358. amlogic,pins = "GPIOAO_7";
  359. linux,phandle = <0x42>;
  360. phandle = <0x42>;
  361. };
  362.  
  363. ao_uart {
  364. amlogic,setmask = <0x10 0x1800>;
  365. amlogic,pins = "GPIOAO_0", "GPIOAO_1";
  366. linux,phandle = <0x2c>;
  367. phandle = <0x2c>;
  368. };
  369.  
  370. ao_b_uart {
  371. amlogic,setmask = <0x10 0x1800000>;
  372. amlogic,pins = "GPIOAO_4", "GPIOAO_5";
  373. };
  374.  
  375. a_uart {
  376. amlogic,setmask = <0x4 0x3c00>;
  377. amlogic,pins = "GPIOX_12", "GPIOX_13", "GPIOX_14", "GPIOX_15";
  378. linux,phandle = <0x2d>;
  379. phandle = <0x2d>;
  380. };
  381.  
  382. b_uart {
  383. amlogic,setmask = <0x2 0x30000000>;
  384. amlogic,pins = "GPIODV_24", "GPIODV_25";
  385. linux,phandle = <0x43>;
  386. phandle = <0x43>;
  387. };
  388.  
  389. c_uart {
  390. amlogic,setmask = <0x1 0xc0000>;
  391. amlogic,pins = "GPIOY_13", "GPIOY_14";
  392. linux,phandle = <0x44>;
  393. phandle = <0x44>;
  394. };
  395.  
  396. wifi_32k_pins {
  397. amlogic,setmask = <0x2 0x40000000>;
  398. amlogic,clrmask = <0x2 0x400000 0x3 0x8000>;
  399. amlogic,pins = "GPIOX_19";
  400. };
  401.  
  402. sd_clk_cmd_pins {
  403. amlogic,setmask = <0x2 0xc00 0x10 0x1800>;
  404. amlogic,pins = "CARD_2", "CARD_3";
  405. amlogic,enable-output = <0x1>;
  406. amlogic,pullup = <0x1>;
  407. amlogic,pullupen = <0x1>;
  408. linux,phandle = <0x23>;
  409. phandle = <0x23>;
  410. };
  411.  
  412. sd_all_pins {
  413. amlogic,setmask = <0x2 0xfc00 0x10 0x1800>;
  414. amlogic,pins = "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4", "CARD_5";
  415. amlogic,enable-output = <0x1>;
  416. amlogic,pullup = <0x1>;
  417. amlogic,pullupen = <0x1>;
  418. linux,phandle = <0x24>;
  419. phandle = <0x24>;
  420. };
  421.  
  422. sd_1bit_pins {
  423. amlogic,setmask = <0x2 0x8c00 0x10 0x1800>;
  424. amlogic,pins = "CARD_1", "CARD_2", "CARD_3";
  425. amlogic,enable-output = <0x1>;
  426. amlogic,pullup = <0x1>;
  427. amlogic,pullupen = <0x1>;
  428. };
  429.  
  430. sd_clk_cmd_uart_pins {
  431. amlogic,setmask = <0x2 0xc00 0x8 0x600>;
  432. amlogic,pins = "CARD_2", "CARD_3";
  433. amlogic,enable-output = <0x1>;
  434. amlogic,pullup = <0x1>;
  435. amlogic,pullupen = <0x1>;
  436. };
  437.  
  438. sd_1bit_uart_pins {
  439. amlogic,setmask = <0x2 0x8c00 0x8 0x600>;
  440. amlogic,pins = "CARD_1", "CARD_2", "CARD_3";
  441. amlogic,enable-output = <0x1>;
  442. amlogic,pullup = <0x1>;
  443. amlogic,pullupen = <0x1>;
  444. };
  445.  
  446. sd_to_ao_uart_pins {
  447. amlogic,setmask = <0x10 0x1800>;
  448. amlogic,clrmask = <0x8 0x600>;
  449. amlogic,pins = "GPIOAO_0", "GPIOAO_1";
  450. amlogic,enable-output = <0x1>;
  451. amlogic,pullup = <0x1>;
  452. amlogic,pullupen = <0x1>;
  453. };
  454.  
  455. ao_to_sd_uart_pins {
  456. amlogic,setmask = <0x8 0x600>;
  457. amlogic,clrmask = <0x10 0x1800 0x2 0x3000>;
  458. amlogic,pins = "CARD_4", "CARD_5";
  459. amlogic,enable-output = <0x1>;
  460. amlogic,pullup = <0x1>;
  461. amlogic,pullupen = <0x1>;
  462. };
  463.  
  464. emmc_clk_cmd_pins {
  465. amlogic,setmask = <0x4 0xc00c0000>;
  466. amlogic,pins = "BOOT_8", "BOOT_10";
  467. amlogic,enable-output = <0x1>;
  468. amlogic,pullup = <0x1>;
  469. amlogic,pullupen = <0x1>;
  470. linux,phandle = <0x26>;
  471. phandle = <0x26>;
  472. };
  473.  
  474. emmc_all_pins {
  475. amlogic,setmask = <0x4 0xc00c0000>;
  476. amlogic,pins = "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4", "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_10";
  477. amlogic,enable-output = <0x1>;
  478. amlogic,pullup = <0x1>;
  479. amlogic,pullupen = <0x1>;
  480. linux,phandle = <0x27>;
  481. phandle = <0x27>;
  482. };
  483.  
  484. sdio_clk_cmd_pins {
  485. amlogic,setmask = <0x8 0x3>;
  486. amlogic,pins = "GPIOX_4", "GPIOX_5";
  487. amlogic,enable-output = <0x1>;
  488. amlogic,pullup = <0x1>;
  489. amlogic,pullupen = <0x1>;
  490. };
  491.  
  492. sdio_all_pins {
  493. amlogic,setmask = <0x8 0x3f>;
  494. amlogic,pins = "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4", "GPIOX_5";
  495. amlogic,enable-output = <0x1>;
  496. amlogic,pullup = <0x1>;
  497. amlogic,pullupen = <0x1>;
  498. };
  499.  
  500. conf_nand_pulldown {
  501. amlogic,pins = "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4", "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_15";
  502. amlogic,pullup = <0x0>;
  503. amlogic,pullupen = <0x1>;
  504. };
  505.  
  506. conf_nand_pullup {
  507. amlogic,pins = "BOOT_8", "BOOT_10";
  508. amlogic,pullup = <0x1>;
  509. amlogic,pullupen = <0x1>;
  510. };
  511.  
  512. all_nand_pins {
  513. amlogic,setmask = <0x4 0x7ff00000>;
  514. amlogic,clrmask = <0x0 0x80000 0x4 0x800c0000 0x5 0xf>;
  515. amlogic,pins = "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4", "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9", "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14", "BOOT_15", "BOOT_16", "BOOT_17";
  516. amlogic,enable-output = <0x1>;
  517. };
  518.  
  519. nand_cs {
  520. amlogic,setmask = <0x4 0xc000000>;
  521. amlogic,clrmask = <0x4 0x40000>;
  522. amlogic,pins = "BOOT_8", "BOOT_9";
  523. };
  524.  
  525. hdmitx_hpd {
  526. amlogic,setmask = <0x1 0x4000000>;
  527. amlogic,pins = "GPIOH_0";
  528. linux,phandle = <0x28>;
  529. phandle = <0x28>;
  530. };
  531.  
  532. hdmitx_ddc {
  533. amlogic,setmask = <0x1 0x3000000>;
  534. amlogic,pins = "GPIOH_1", "GPIOH_2";
  535. linux,phandle = <0x29>;
  536. phandle = <0x29>;
  537. };
  538.  
  539. hdmitx_aocec {
  540. amlogic,setmask = <0x10 0x8000>;
  541. amlogic,clrmask = <0x10 0x24000 0x11 0x1>;
  542. amlogic,pins = "GPIOAO_12";
  543. linux,phandle = <0x2b>;
  544. phandle = <0x2b>;
  545. };
  546.  
  547. hdmitx_eecec {
  548. amlogic,setmask = <0x10 0x4000>;
  549. amlogic,clrmask = <0x10 0x28000 0x11 0x1>;
  550. amlogic,pins = "GPIOAO_12";
  551. };
  552.  
  553. a_i2c {
  554. amlogic,setmask = <0x7 0xc000000>;
  555. amlogic,clrmask = <0x0 0x18c0 0x2 0x30000000 0x5 0x1800>;
  556. amlogic,pins = "GPIODV_24", "GPIODV_25";
  557. linux,phandle = <0x11>;
  558. phandle = <0x11>;
  559. };
  560.  
  561. b_i2c {
  562. amlogic,setmask = <0x7 0x3000000>;
  563. amlogic,clrmask = <0x0 0x600 0x2 0xc000000 0x5 0x700>;
  564. amlogic,pins = "GPIODV_26", "GPIODV_27";
  565. linux,phandle = <0x12>;
  566. phandle = <0x12>;
  567. };
  568.  
  569. c_i2c {
  570. amlogic,setmask = <0x7 0xc00000>;
  571. amlogic,clrmask = <0x3 0x700000>;
  572. amlogic,pins = "GPIODV_28", "GPIODV_29";
  573. linux,phandle = <0x14>;
  574. phandle = <0x14>;
  575. };
  576.  
  577. d_i2c {
  578. amlogic,setmask = <0x4 0xc>;
  579. amlogic,clrmask = <0x2 0x3000000 0x3 0x1000>;
  580. amlogic,pins = "GPIOX_16", "GPIOX_17";
  581. linux,phandle = <0x15>;
  582. phandle = <0x15>;
  583. };
  584.  
  585. dvb_p_ts0_pins {
  586. amlogic,setmask = <0x3 0x37>;
  587. amlogic,clrmask = <0x2 0xf0000 0x1 0x30ff>;
  588. amlogic,pins = "GPIOY_0", "GPIOY_1", "GPIOY_2", "GPIOY_3", "GPIOY_4", "GPIOY_5", "GPIOY_6", "GPIOY_7", "GPIOY_8", "GPIOY_9", "GPIOY_10";
  589. };
  590.  
  591. dvb_s_ts0_pins {
  592. amlogic,setmask = <0x3 0x17>;
  593. amlogic,clrmask = <0x2 0xf0000 0x1 0x7>;
  594. amlogic,pins = "GPIOY_0", "GPIOY_1", "GPIOY_2", "GPIOY_3";
  595. };
  596.  
  597. audio_pin {
  598. amlogic,setmask = <0x10 0x78000000>;
  599. amlogic,clrmask = <0x10 0x40000>;
  600. amlogic,pins = "GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11";
  601. linux,phandle = <0x34>;
  602. phandle = <0x34>;
  603. };
  604.  
  605. audio_pin1 {
  606. amlogic,setmask = <0x10 0x10000>;
  607. amlogic,clrmask = <0x10 0x40000>;
  608. amlogic,pins = "GPIOAO_6";
  609. linux,phandle = <0x2e>;
  610. phandle = <0x2e>;
  611. };
  612.  
  613. led_pin {
  614. amlogic,setmask = <0x10 0x0>;
  615. amlogic,clrmask = <0x10 0x80000018>;
  616. amlogic,pins = "GPIOAO_13";
  617. linux,phandle = <0x3f>;
  618. phandle = <0x3f>;
  619. };
  620.  
  621. odroid_pwm0 {
  622. amlogic,setmask = <0x3 0x20000>;
  623. amlogic,clrmask = <0x3 0x200>;
  624. amlogic,pins = "GPIOX_6";
  625. linux,phandle = <0x40>;
  626. phandle = <0x40>;
  627. };
  628.  
  629. odroid_pwm1 {
  630. amlogic,setmask = <0x3 0x20000 0x3 0x60000>;
  631. amlogic,clrmask = <0x3 0x300 0x8 0x800>;
  632. amlogic,pins = "GPIOX_6", "GPIOX_7";
  633. linux,phandle = <0x41>;
  634. phandle = <0x41>;
  635. };
  636. };
  637.  
  638. cpu_version {
  639. reg = <0x0 0xc8100220 0x0 0x4>;
  640. };
  641.  
  642. meson_clk_msr {
  643. compatible = "amlogic, gxbb_measure";
  644. reg = <0x0 0xc110875c 0x0 0x4 0x0 0xc1108764 0x0 0x4>;
  645. };
  646.  
  647. i2c@c11087c0 {
  648. compatible = "amlogic, meson-i2c";
  649. dev_name = "i2c-B";
  650. status = "okay";
  651. reg = <0x0 0xc11087c0 0x0 0x20>;
  652. device_id = <0x2>;
  653. pinctrl-names = "default";
  654. pinctrl-0 = <0x12>;
  655. #address-cells = <0x1>;
  656. #size-cells = <0x0>;
  657. use_pio = <0x0>;
  658. master_i2c_speed = <0x493e0>;
  659. clocks = <0xd 0xa>;
  660. clock-names = "clk_i2c";
  661. resets = <0xd 0x9>;
  662.  
  663. pcf8563@51 {
  664. status = "okay";
  665. compatible = "nxp,pcf8563";
  666. reg = <0x51>;
  667. #clock-cells = <0x0>;
  668. };
  669.  
  670. sx865x@49 {
  671. status = "okay";
  672. compatible = "semtech,sx8650";
  673. reg = <0x49>;
  674. #clock-cells = <0x0>;
  675. gpio-pendown = <0x13 0x52 0x0>;
  676. gpio-reset = <0x13 0x58 0x0>;
  677. invert-x = <0x0>;
  678. invert-y = <0x1>;
  679. swap-xy = <0x1>;
  680. };
  681. };
  682.  
  683. i2c@c11087e0 {
  684. compatible = "amlogic, meson-i2c";
  685. dev_name = "i2c-C";
  686. status = "disabled";
  687. reg = <0x0 0xc11087e0 0x0 0x20>;
  688. device_id = <0x3>;
  689. pinctrl-names = "default";
  690. pinctrl-0 = <0x14>;
  691. #address-cells = <0x1>;
  692. #size-cells = <0x0>;
  693. use_pio = <0x0>;
  694. master_i2c_speed = <0x493e0>;
  695. clocks = <0xd 0xa>;
  696. clock-names = "clk_i2c";
  697. resets = <0xd 0x9>;
  698. };
  699.  
  700. i2c@c1108d20 {
  701. compatible = "amlogic, meson-i2c";
  702. dev_name = "i2c-D";
  703. status = "disabled";
  704. reg = <0x0 0xc1108d20 0x0 0x20>;
  705. device_id = <0x4>;
  706. pinctrl-names = "default";
  707. pinctrl-0 = <0x15>;
  708. #address-cells = <0x1>;
  709. #size-cells = <0x0>;
  710. use_pio = <0x0>;
  711. master_i2c_speed = <0x493e0>;
  712. clocks = <0xd 0xa>;
  713. clock-names = "clk_i2c";
  714. resets = <0xd 0x9>;
  715. };
  716.  
  717. efuse {
  718. compatible = "amlogic, efuse";
  719. read_cmd = <0x82000030>;
  720. write_cmd = <0x82000031>;
  721. get_max_cmd = <0x82000033>;
  722. key = <0x16>;
  723. resets = <0xd 0x3e>;
  724. reset-names = "efuse_clk";
  725. status = "okay";
  726. };
  727.  
  728. efusekey {
  729. keynum = <0x4>;
  730. key0 = <0x17>;
  731. key1 = <0x18>;
  732. key2 = <0x19>;
  733. key3 = <0x1a>;
  734. linux,phandle = <0x16>;
  735. phandle = <0x16>;
  736.  
  737. key0 {
  738. keyname = "mac";
  739. offset = <0x0>;
  740. size = <0x6>;
  741. linux,phandle = <0x17>;
  742. phandle = <0x17>;
  743. };
  744.  
  745. key1 {
  746. keyname = "mac_bt";
  747. offset = <0x6>;
  748. size = <0x6>;
  749. linux,phandle = <0x18>;
  750. phandle = <0x18>;
  751. };
  752.  
  753. key2 {
  754. keyname = "mac_wifi";
  755. offset = <0xc>;
  756. size = <0x6>;
  757. linux,phandle = <0x19>;
  758. phandle = <0x19>;
  759. };
  760.  
  761. key3 {
  762. keyname = "usid";
  763. offset = <0x12>;
  764. size = <0x10>;
  765. linux,phandle = <0x1a>;
  766. phandle = <0x1a>;
  767. };
  768. };
  769.  
  770. mhu@c883c400 {
  771. compatible = "amlogic, meson_mhu";
  772. reg = <0x0 0xc883c400 0x0 0x4c 0x0 0xc8013000 0x0 0x800>;
  773. interrupts = <0x0 0xd1 0x8 0x0 0xd2 0x8>;
  774. #mbox-cells = <0x1>;
  775. mbox-names = "cpu_to_scp_low", "cpu_to_scp_high";
  776. mboxes = <0x1b 0x0 0x1b 0x1>;
  777. linux,phandle = <0x1b>;
  778. phandle = <0x1b>;
  779. };
  780.  
  781. scpi_clocks {
  782. compatible = "arm,scpi-clks";
  783.  
  784. scpi_clocks@0 {
  785. compatible = "arm,scpi-clk-indexed";
  786. #clock-cells = <0x1>;
  787. clock-indices = <0x0>;
  788. clock-output-names = "vcpu";
  789. linux,phandle = <0x10>;
  790. phandle = <0x10>;
  791. };
  792. };
  793.  
  794. rng {
  795. compatible = "amlogic,meson-rng";
  796. reg = <0x0 0xc8834000 0x0 0x4>;
  797. };
  798.  
  799. audio_data {
  800. compatible = "amlogic, audio_data";
  801. query_licence_cmd = <0x82000050>;
  802. status = "disabled";
  803. };
  804.  
  805. saradc {
  806. compatible = "amlogic, saradc";
  807. status = "okay";
  808. interrupts = <0x0 0x9 0x1>;
  809. interrupt-names = "saradc_int";
  810. clocks = <0xd 0x2>;
  811. clock-names = "saradc_clk";
  812. resets = <0xd 0x56>;
  813. reg = <0x0 0xc1108680 0x0 0x30 0x0 0xc883c3d8 0x0 0x8>;
  814. };
  815.  
  816. aliases {
  817. serial0 = "/serial@c81004c0";
  818. serial1 = "/serial@c11084c0";
  819. serial2 = "/serial@c11084dc";
  820. serial3 = "/serial@c1108700";
  821. spi0 = "/spi-gpio";
  822. };
  823.  
  824. gpu_dvfs_tbl {
  825. sc_mpp = <0x3>;
  826. tbl = <0x8 0x9 0xa 0xb 0xc>;
  827. linux,phandle = <0xe>;
  828. phandle = <0xe>;
  829. };
  830.  
  831. gpiomem {
  832. compatible = "amlogic,meson-gpiomem";
  833. reg = <0x0 0xc8834000 0x0 0x1000>;
  834. status = "okay";
  835. };
  836.  
  837. memory@00000000 {
  838. device_type = "memory";
  839. linux,usable-memory = <0x0 0x1000000 0x0 0x7f000000>;
  840. };
  841.  
  842. reserved-memory {
  843. #address-cells = <0x2>;
  844. #size-cells = <0x2>;
  845. ranges;
  846.  
  847. linux,secmon {
  848. compatible = "aml_secmon_memory";
  849. reg = <0x0 0x10000000 0x0 0x200000>;
  850. no-map;
  851. linux,phandle = <0xf>;
  852. phandle = <0xf>;
  853. };
  854.  
  855. linux,meson-fb {
  856. compatible = "amlogic, fb-memory";
  857. size = <0x0 0x8000000>;
  858. no-map;
  859. linux,phandle = <0x1c>;
  860. phandle = <0x1c>;
  861. };
  862.  
  863. linux,di {
  864. compatible = "amlogic, di-mem";
  865. size = <0x0 0x1e00000>;
  866. multi-use;
  867. linux,phandle = <0x22>;
  868. phandle = <0x22>;
  869. };
  870.  
  871. linux,ion-dev {
  872. compatible = "amlogic, idev-mem";
  873. size = <0x0 0x2000000>;
  874. multi-use;
  875. linux,phandle = <0x20>;
  876. phandle = <0x20>;
  877. };
  878.  
  879. linux,codec_mm_cma {
  880. compatible = "shared-dma-pool";
  881. reusable;
  882. size = <0x0 0xbc00000>;
  883. alignment = <0x0 0x400000>;
  884. linux,contiguous-region;
  885. linux,phandle = <0x1d>;
  886. phandle = <0x1d>;
  887. };
  888.  
  889. linux,picdec {
  890. compatible = "shared-dma-pool";
  891. reusable;
  892. size = <0x0 0x3000000>;
  893. alignment = <0x0 0x400000>;
  894. linux,contiguous-region;
  895. linux,phandle = <0x21>;
  896. phandle = <0x21>;
  897. };
  898.  
  899. linux,codec_mm_reserved {
  900. compatible = "amlogic, codec-mm-reserved";
  901. size = <0x0 0x4100000>;
  902. alignment = <0x0 0x100000>;
  903. linux,phandle = <0x1e>;
  904. phandle = <0x1e>;
  905. };
  906.  
  907. linux,jpegenc_cma {
  908. compatible = "shared-dma-pool";
  909. linux,phandle = <0x3>;
  910. reusable;
  911. size = <0x0 0x2400000>;
  912. alignment = <0x0 0x400000>;
  913. };
  914. };
  915.  
  916. meson-vout {
  917. compatible = "amlogic, meson-vout";
  918. dev_name = "meson-vout";
  919. status = "okay";
  920. };
  921.  
  922. meson-fb {
  923. compatible = "amlogic, meson-fb";
  924. memory-region = <0x1c>;
  925. dev_name = "meson-fb";
  926. status = "okay";
  927. interrupts = <0x0 0x3 0x1 0x0 0x59 0x1>;
  928. interrupt-names = "viu-vsync", "rdma";
  929. mem_size = <0x6000000 0x100000>;
  930. vmode = <0x3>;
  931. scale_mode = <0x1>;
  932. 4k2k_fb = <0x1>;
  933. display_size_default = <0x780 0x438 0x780 0x870 0x20>;
  934. };
  935.  
  936. ge2d {
  937. compatible = "amlogic, ge2d";
  938. dev_name = "ge2d";
  939. status = "okay";
  940. interrupts = <0x0 0x96 0x1>;
  941. interrupt-names = "ge2d";
  942. clocks = <0xd 0x17 0xd 0x19>;
  943. clock-names = "clk_vapb_0", "clk_ge2d";
  944. resets = <0xd 0x34>;
  945. reset-names = "ge2d";
  946. };
  947.  
  948. codec_io {
  949. compatible = "amlogic, codec_io";
  950. #address-cells = <0x2>;
  951. #size-cells = <0x2>;
  952. ranges;
  953.  
  954. io_cbus_base {
  955. reg = <0x0 0xc1100000 0x0 0x100000>;
  956. };
  957.  
  958. io_dos_base {
  959. reg = <0x0 0xc8820000 0x0 0x10000>;
  960. };
  961.  
  962. io_hiubus_base {
  963. reg = <0x0 0xc883c000 0x0 0x2000>;
  964. };
  965.  
  966. io_aobus_base {
  967. reg = <0x0 0xc8100000 0x0 0x100000>;
  968. };
  969.  
  970. io_vcbus_base {
  971. reg = <0x0 0xd0100000 0x0 0x40000>;
  972. };
  973.  
  974. io_dmc_base {
  975. reg = <0x0 0xc8838000 0x0 0x400>;
  976. };
  977. };
  978.  
  979. codec_mm {
  980. compatible = "amlogic, codec, mm";
  981. memory-region = <0x1d 0x1e>;
  982. dev_name = "codec_mm";
  983. status = "okay";
  984. };
  985.  
  986. ethernet@0xc9410000 {
  987. compatible = "amlogic, gxbb-rgmii-dwmac";
  988. reg = <0x0 0xc9410000 0x0 0x10000 0x0 0xc8834540 0x0 0x8>;
  989. interrupts = <0x0 0x8 0x1>;
  990. phy-mode = "rgmii";
  991. pinctrl-names = "eth_pins";
  992. pinctrl-0 = <0x1f>;
  993. rst_pin-gpios = <0x13 0xe 0x0>;
  994. mc_val = <0x1621>;
  995. resets = <0xd 0x23>;
  996. reset-names = "ethpower";
  997. interrupt-names = "macirq";
  998. clocks = <0xd 0xa>;
  999. clock-names = "ethclk81";
  1000. max-frame-size = <0xdfe>;
  1001. };
  1002.  
  1003. mesonstream {
  1004. compatible = "amlogic, codec, streambuf";
  1005. dev_name = "mesonstream";
  1006. status = "okay";
  1007. resets = <0xd 0x39 0xd 0x59 0xd 0x24 0xd 0x1>;
  1008. reset-names = "parser_top", "vpu_intr", "demux", "vdec";
  1009. };
  1010.  
  1011. amvideocap {
  1012. compatible = "amlogic, amvideocap";
  1013. dev_name = "amvideocap.0";
  1014. status = "okay";
  1015. };
  1016.  
  1017. ion_dev {
  1018. compatible = "amlogic, ion_dev";
  1019. memory-region = <0x20>;
  1020. };
  1021.  
  1022. vdec {
  1023. compatible = "amlogic, vdec";
  1024. dev_name = "vdec.0";
  1025. status = "okay";
  1026. interrupts = <0x0 0x3 0x1 0x0 0x17 0x1 0x0 0x20 0x1 0x0 0x2b 0x1 0x0 0x2c 0x1 0x0 0x2d 0x1>;
  1027. interrupt-names = "vsync", "demux", "parser", "mailbox_0", "mailbox_1", "mailbox_2";
  1028. };
  1029.  
  1030. picdec {
  1031. compatible = "amlogic, picdec";
  1032. memory-region = <0x21>;
  1033. dev_name = "picdec";
  1034. status = "okay";
  1035. };
  1036.  
  1037. ppmgr {
  1038. compatible = "amlogic, ppmgr";
  1039. memory-region = <0x20>;
  1040. dev_name = "ppmgr";
  1041. status = "okay";
  1042. };
  1043.  
  1044. deinterlace {
  1045. compatible = "amlogic, deinterlace";
  1046. status = "okay";
  1047. memory-region = <0x22>;
  1048. interrupts = <0x0 0x2e 0x1 0x0 0x6 0x1>;
  1049. interrupt-names = "de_irq", "timerc";
  1050. buffer-size = <0x2fd000>;
  1051. hw-version = <0x2>;
  1052. };
  1053.  
  1054. amvdec_656in0 {
  1055. compatible = "amlogic, amvdec_656in";
  1056. dev_name = "amvdec_656in0";
  1057. status = "ok";
  1058. reg = <0x0 0xd0048000 0x0 0x7c>;
  1059. clocks = <0xd 0x7 0xd 0x26>;
  1060. clock-names = "fclk_div2", "cts_bt656_clk0";
  1061. bt656_id = <0x0>;
  1062. };
  1063.  
  1064. amvdec_656in1 {
  1065. compatible = "amlogic, amvdec_656in";
  1066. dev_name = "amvdec_656in1";
  1067. status = "ok";
  1068. reg = <0x0 0xd0050000 0x0 0x7c>;
  1069. clocks = <0xd 0x7 0xd 0x27>;
  1070. clock-names = "fclk_div2", "cts_bt656_clk1";
  1071. bt656_id = <0x1>;
  1072. };
  1073.  
  1074. amvenc_avc {
  1075. compatible = "amlogic, amvenc_avc";
  1076. dev_name = "amvenc_avc";
  1077. status = "okay";
  1078. interrupts = <0x0 0x2d 0x1>;
  1079. interrupt-names = "mailbox_2";
  1080. };
  1081.  
  1082. jpegenc {
  1083. compatible = "amlogic, jpegenc";
  1084. memory-region = <0x3>;
  1085. dev_name = "jpegenc";
  1086. status = "okay";
  1087. interrupts = <0x0 0x2d 0x1>;
  1088. interrupt-names = "mailbox_2";
  1089. };
  1090.  
  1091. vpu {
  1092. compatible = "amlogic, vpu";
  1093. dev_name = "vpu";
  1094. status = "ok";
  1095. clk_level = <0x7>;
  1096. };
  1097.  
  1098. sd {
  1099. compatible = "amlogic, aml_sd_emmc";
  1100. dev_name = "aml_newsd.0";
  1101. status = "okay";
  1102. reg = <0x0 0xd0072000 0x0 0x2000>;
  1103. interrupts = <0x0 0xd9 0x1 0x0 0x43 0x1 0x0 0x45 0x1>;
  1104. pinctrl-names = "sd_clk_cmd_pins", "sd_all_pins";
  1105. pinctrl-0 = <0x23>;
  1106. pinctrl-1 = <0x24>;
  1107.  
  1108. sd {
  1109. status = "okay";
  1110. pinname = "sd";
  1111. ocr_avail = <0x200080>;
  1112. caps = "MMC_CAP_4_BIT_DATA", "MMC_CAP_MMC_HIGHSPEED", "MMC_CAP_SD_HIGHSPEED", "MMC_CAP_UHS_SDR50", "MMC_CAP_UHS_SDR104";
  1113. f_min = <0x61a80>;
  1114. f_max = <0x510ff40>;
  1115. max_req_size = <0x20000>;
  1116. gpio_dat3 = <0x13 0x2a 0x0>;
  1117. jtag_pin = <0x13 0x26 0x0>;
  1118. gpio_cd = <0x13 0x2c 0x0>;
  1119. gpio_volsw = <0x25 0x3 0x1>;
  1120. gpio_power = <0x13 0x57 0x0>;
  1121. power_level = <0x1>;
  1122. irq_in = <0x3>;
  1123. irq_out = <0x5>;
  1124. card_type = <0x5>;
  1125. };
  1126. };
  1127.  
  1128. emmc {
  1129. compatible = "amlogic, aml_sd_emmc";
  1130. dev_name = "aml_newsd.0";
  1131. status = "okay";
  1132. reg = <0x0 0xd0074000 0x0 0x2000>;
  1133. interrupts = <0x0 0xda 0x1>;
  1134. pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
  1135. pinctrl-0 = <0x26>;
  1136. pinctrl-1 = <0x27>;
  1137.  
  1138. emmc {
  1139. status = "okay";
  1140. pinname = "emmc";
  1141. ocr_avail = <0x200080>;
  1142. caps = "MMC_CAP_8_BIT_DATA", "MMC_CAP_MMC_HIGHSPEED", "MMC_CAP_SD_HIGHSPEED", "MMC_CAP_NONREMOVABLE", "MMC_CAP_HW_RESET", "MMC_CAP_ERASE";
  1143. caps2 = "MMC_CAP2_HS200_1_8V_SDR", "MMC_CAP2_BROKEN_VOLTAGE", "MMC_CAP2_BOOTPART_NOACC";
  1144. f_min = <0x61a80>;
  1145. f_max = <0xbebc200>;
  1146. max_req_size = <0x20000>;
  1147. gpio_dat3 = <0x13 0x17 0x0>;
  1148. hw_reset = <0x13 0x1d 0x0>;
  1149. card_type = <0x1>;
  1150. };
  1151. };
  1152.  
  1153. amhdmitx {
  1154. compatible = "amlogic, amhdmitx";
  1155. dev_name = "amhdmitx";
  1156. status = "okay";
  1157. pinctrl-names = "hdmitx_hpd", "hdmitx_ddc";
  1158. pinctrl-0 = <0x28>;
  1159. pinctrl-1 = <0x29>;
  1160. vend-data = <0x2a>;
  1161. interrupts = <0x0 0x39 0x1>;
  1162. interrupt-names = "hdmitx_hpd";
  1163. clocks = <0xd 0xb 0xd 0xc 0xd 0xd 0xd 0xe 0xd 0xf 0xd 0x16>;
  1164. clock-names = "hdmitx_clk_sys", "hdmitx_clk_encp", "hdmitx_clk_enci", "hdmitx_clk_pixel", "hdmitx_clk_phy", "hdmitx_clk_vid";
  1165.  
  1166. vend_data {
  1167. compatible = "amlogic, amlogic-cec";
  1168. status = "okay";
  1169. vendor_name = "Hardkernel";
  1170. vendor_id = <0x0>;
  1171. product_desc = "ODROID-C2";
  1172. cec_osd_string = "ODROID-C2";
  1173. interrupts = <0x0 0xc7 0x1>;
  1174. interrupt-names = "hdmitx_cec";
  1175. pinctrl-names = "hdmitx_aocec";
  1176. pinctrl-0 = <0x2b>;
  1177. linux,phandle = <0x2a>;
  1178. phandle = <0x2a>;
  1179. };
  1180. };
  1181.  
  1182. aocec {
  1183. compatible = "amlogic, amlogic-aocec";
  1184. device_name = "aocec";
  1185. status = "okay";
  1186. vendor_name = "Hardkernel";
  1187. vendor_id = <0x0>;
  1188. product_desc = "ODROID-C2";
  1189. cec_osd_string = "ODROID-C2";
  1190. port_num = <0x3>;
  1191. arc_port_mask = <0x0>;
  1192. interrupts = <0x0 0xc7 0x1>;
  1193. interrupt-names = "hdmi_aocec";
  1194. pinctrl-names = "hdmitx_aocec";
  1195. pinctrl-0 = <0x2b>;
  1196. reg = <0x0 0xc810023c 0x0 0x4 0x0 0xc8100000 0x0 0x200 0x0 0xda83e000 0x0 0x10>;
  1197. };
  1198.  
  1199. serial@c81004c0 {
  1200. compatible = "amlogic, meson-uart";
  1201. reg = <0x0 0xc81004c0 0x0 0x14>;
  1202. interrupts = <0x0 0xc1 0x1>;
  1203. status = "okay";
  1204. clocks = <0xd 0x2>;
  1205. clock-names = "clk_uart";
  1206. fifosize = <0x40>;
  1207. pinctrl-names = "default";
  1208. pinctrl-0 = <0x2c>;
  1209. };
  1210.  
  1211. serial@c11084c0 {
  1212. compatible = "amlogic, meson-uart";
  1213. reg = <0x0 0xc11084c0 0x0 0x14>;
  1214. interrupts = <0x0 0x1a 0x1>;
  1215. status = "okay";
  1216. clocks = <0xd 0x2>;
  1217. clock-names = "clk_uart";
  1218. fifosize = <0x80>;
  1219. pinctrl-names = "default";
  1220. pinctrl-0 = <0x2d>;
  1221. };
  1222.  
  1223. serial@c11084dc {
  1224. compatible = "amlogic, meson-uart";
  1225. reg = <0x0 0xc11084dc 0x0 0x14>;
  1226. interrupts = <0x0 0x4b 0x1>;
  1227. status = "okay";
  1228. clocks = <0xd 0x2>;
  1229. clock-names = "clk_uart";
  1230. fifosize = <0x40>;
  1231. pinctrl-names = "default";
  1232. pinctrl-0 = <0x43>;
  1233. reset = <0xd 0x30>;
  1234. };
  1235.  
  1236. serial@c1108700 {
  1237. compatible = "amlogic, meson-uart";
  1238. reg = <0x0 0xc1108700 0x0 0x14>;
  1239. interrupts = <0x0 0x5d 0x1>;
  1240. status = "okay";
  1241. clocks = <0xd 0x2>;
  1242. clock-names = "clk_uart";
  1243. fifosize = <0x40>;
  1244. pinctrl-names = "default";
  1245. pinctrl-0 = <0x44>;
  1246. reset = <0xd 0x4f>;
  1247. };
  1248.  
  1249.  
  1250. canvas {
  1251. compatible = "amlogic, meson, canvas";
  1252. dev_name = "amlogic-canvas";
  1253. status = "ok";
  1254. reg = <0x0 0xc8838000 0x0 0x400>;
  1255. };
  1256.  
  1257. rdma {
  1258. compatible = "amlogic, meson, rdma";
  1259. dev_name = "amlogic-rdma";
  1260. status = "ok";
  1261. interrupts = <0x0 0x59 0x1>;
  1262. interrupt-names = "rdma";
  1263. };
  1264.  
  1265. dwc2_b {
  1266. compatible = "amlogic,dwc2";
  1267. reg = <0x0 0xc9100000 0x0 0x40000>;
  1268. interrupts = <0x0 0x1f 0x4>;
  1269. status = "okay";
  1270. pl-periph-id = <0x1>;
  1271. clock-src = "usb1";
  1272. port-id = <0x1>;
  1273. port-type = <0x1>;
  1274. port-speed = <0x0>;
  1275. port-config = <0x0>;
  1276. port-dma = <0x0>;
  1277. port-id-mode = <0x1>;
  1278. gpio-hub-rst = "GPIOAO_4";
  1279. gpios = <0x25 0x4 0x0>;
  1280. phy-reg = <0xc0000020>;
  1281. phy-reg-size = <0x20>;
  1282. usb-fifo = <0x400>;
  1283. host-only-core = <0x1>;
  1284. pmu-apply-power = <0x1>;
  1285. cpu-type = "gxbaby";
  1286. resets = <0xd 0x3a 0xd 0x48 0xd 0x36>;
  1287. reset-names = "usb_general", "usb1", "usb1_to_ddr";
  1288. };
  1289.  
  1290. odroid_sysfs {
  1291. compatible = "odroid-sysfs";
  1292. };
  1293.  
  1294. dwc2_a {
  1295. compatible = "amlogic,dwc2";
  1296. reg = <0x0 0xc9000000 0x0 0x40000>;
  1297. interrupts = <0x0 0x1e 0x4>;
  1298. status = "okay";
  1299. pl-periph-id = <0x0>;
  1300. clock-src = "usb0";
  1301. port-id = <0x0>;
  1302. port-type = <0x0>;
  1303. port-speed = <0x0>;
  1304. port-config = <0x0>;
  1305. port-dma = <0x0>;
  1306. port-id-mode = <0x0>;
  1307. gpio-vbus-power = "GPIOAO_5";
  1308. gpios = <0x25 0x5 0x0>;
  1309. gpio-work-mask = <0x1>;
  1310. phy-reg = <0xc0000000>;
  1311. phy-reg-size = <0x20>;
  1312. usb-fifo = <0x400>;
  1313. cpu-type = "gxbaby";
  1314. resets = <0xd 0x3a 0xd 0x49 0xd 0x35>;
  1315. reset-names = "usb_general", "usb0", "usb0_to_ddr";
  1316. };
  1317.  
  1318. I2S {
  1319. compatible = "amlogic, aml-i2s-dai";
  1320. #sound-dai-cells = <0x0>;
  1321. resets = <0xd 0x26 0xd 0x12 0xd 0x28 0xd 0x29 0xd 0x2a 0xd 0x2b 0xd 0x2c 0xd 0x2d 0xd 0x2f 0xd 0x8e 0xd 0x22>;
  1322. reset-names = "top_glue", "aud_buf", "i2s_out", "amclk_measure", "aififo2", "aud_mixer", "mixer_reg", "adc", "top_level", "aoclk", "aud_in";
  1323. clocks = <0xd 0x1f 0xd 0x22>;
  1324. clock-names = "mpll0", "mclk";
  1325. linux,phandle = <0x32>;
  1326. phandle = <0x32>;
  1327. };
  1328.  
  1329. i2s_platform {
  1330. compatible = "amlogic, aml-i2s";
  1331. linux,phandle = <0x31>;
  1332. phandle = <0x31>;
  1333. };
  1334.  
  1335. SPDIF {
  1336. compatible = "amlogic, aml-spdif-dai";
  1337. #sound-dai-cells = <0x0>;
  1338. resets = <0xd 0x27 0xd 0x90>;
  1339. reset-names = "iec958", "iec958_amclk";
  1340. clocks = <0xd 0x20 0xd 0x24 0xd 0x22 0xd 0x25>;
  1341. clock-names = "mpll1", "i958", "mclk", "spdif";
  1342. };
  1343.  
  1344. spdif_codec {
  1345. #sound-dai-cells = <0x0>;
  1346. compatible = "amlogic, aml-spdif-codec";
  1347. pinctrl-names = "aml_audio_spdif";
  1348. pinctrl-0 = <0x2e>;
  1349. linux,phandle = <0x33>;
  1350. phandle = <0x33>;
  1351. };
  1352.  
  1353. PCM {
  1354. #sound-dai-cells = <0x0>;
  1355. compatible = "amlogic, aml-pcm-dai";
  1356. };
  1357.  
  1358. pcm_platform {
  1359. compatible = "amlogic, aml-pcm";
  1360. };
  1361.  
  1362. pcm_codec {
  1363. #sound-dai-cells = <0x0>;
  1364. compatible = "amlogic, pcm2BT-codec";
  1365. };
  1366.  
  1367. dummy {
  1368. #sound-dai-cells = <0x0>;
  1369. compatible = "amlogic, aml_dummy_codec";
  1370. status = "okay";
  1371. };
  1372.  
  1373. pcm5102 {
  1374. #sound-dai-cells = <0x0>;
  1375. compatible = "hardkernel, pcm5102";
  1376. status = "okay";
  1377. linux,phandle = <0x37>;
  1378. phandle = <0x37>;
  1379. };
  1380.  
  1381. odroid_hdmi {
  1382. compatible = "sound_card, odroid_hdmi";
  1383. status = "okay";
  1384. aml-sound-card,format = "i2s";
  1385. aml_sound_card,name = "ODROID-HDMI";
  1386. cpu_list = <0x2f>;
  1387. codec_list = <0x30>;
  1388. plat_list = <0x31>;
  1389.  
  1390. i2sdai0 {
  1391. sound-dai = <0x32>;
  1392. linux,phandle = <0x2f>;
  1393. phandle = <0x2f>;
  1394. };
  1395.  
  1396. dit0 {
  1397. sound-dai = <0x33>;
  1398. linux,phandle = <0x30>;
  1399. phandle = <0x30>;
  1400. };
  1401. };
  1402.  
  1403. odroid_dac {
  1404. compatible = "sound_card, odroid_dac";
  1405. status = "okay";
  1406. aml-sound-card,format = "i2s";
  1407. aml_sound_card,name = "ODROID-DAC";
  1408. pinctrl-names = "aml_snd_i2s";
  1409. pinctrl-0 = <0x34>;
  1410. cpu_list = <0x35>;
  1411. codec_list = <0x36>;
  1412. plat_list = <0x31>;
  1413.  
  1414. cpudai0 {
  1415. sound-dai = <0x32>;
  1416. linux,phandle = <0x35>;
  1417. phandle = <0x35>;
  1418. };
  1419.  
  1420. codec0 {
  1421. sound-dai = <0x37>;
  1422. linux,phandle = <0x36>;
  1423. phandle = <0x36>;
  1424. };
  1425. };
  1426.  
  1427. odroid_dac2 {
  1428. compatible = "sound_card, odroid_dac2";
  1429. aml,sound_card = "ODROID-DAC2";
  1430. pinctrl-names = "odroid_i2s";
  1431. pinctrl-0 = <0x34>;
  1432. status = "okay";
  1433. };
  1434.  
  1435. aml-sensor@0 {
  1436. compatible = "amlogic, aml-thermal";
  1437. #thermal-sensor-cells = <0x1>;
  1438. cpu_dyn_coeff = <0x8c>;
  1439. min_state = <0x7a120 0x190 0x1 0x2>;
  1440. gpu_dyn_coeff = <0x1b5>;
  1441. linux,phandle = <0x38>;
  1442. phandle = <0x38>;
  1443. };
  1444.  
  1445. thermal_cpu_cores {
  1446. #cooling-cells = <0x2>;
  1447. linux,phandle = <0x3c>;
  1448. phandle = <0x3c>;
  1449. };
  1450.  
  1451. thermal_gpu_cores {
  1452. #cooling-cells = <0x2>;
  1453. linux,phandle = <0x3e>;
  1454. phandle = <0x3e>;
  1455. };
  1456.  
  1457. thermal-zones {
  1458.  
  1459. soc_thermal {
  1460. polling-delay = <0x3e8>;
  1461. polling-delay-passive = <0x64>;
  1462. sustainable-power = <0xe10>;
  1463. thermal-sensors = <0x38 0x3>;
  1464.  
  1465. trips {
  1466.  
  1467. trip-point@0 {
  1468. temperature = <0x14c08>;
  1469. hysteresis = <0x3e8>;
  1470. type = "passive";
  1471. };
  1472.  
  1473. trip-point@1 {
  1474. temperature = <0x15f90>;
  1475. hysteresis = <0x3e8>;
  1476. type = "passive";
  1477. linux,phandle = <0x39>;
  1478. phandle = <0x39>;
  1479. };
  1480.  
  1481. trip-point@2 {
  1482. temperature = <0x186a0>;
  1483. hysteresis = <0x3e8>;
  1484. type = "passive";
  1485. linux,phandle = <0x3b>;
  1486. phandle = <0x3b>;
  1487. };
  1488.  
  1489. trip-point@3 {
  1490. temperature = <0x19a28>;
  1491. hysteresis = <0x3e8>;
  1492. type = "critical";
  1493. };
  1494. };
  1495.  
  1496. cooling-maps {
  1497.  
  1498. cpufreq_cooling_map0 {
  1499. trip = <0x39>;
  1500. cooling-device = <0x3a 0x0 0x2>;
  1501. contribution = <0x64>;
  1502. };
  1503.  
  1504. cpufreq_cooling_map1 {
  1505. trip = <0x3b>;
  1506. cooling-device = <0x3a 0x3 0x4>;
  1507. contribution = <0x64>;
  1508. };
  1509.  
  1510. cpucore_cooling_map {
  1511. trip = <0x39>;
  1512. cooling-device = <0x3c 0x0 0x2>;
  1513. contribution = <0x400>;
  1514. };
  1515.  
  1516. gpufreq_cooling_map0 {
  1517. trip = <0x39>;
  1518. cooling-device = <0x3d 0x0 0x2>;
  1519. contribution = <0x64>;
  1520. };
  1521.  
  1522. gpufreq_cooling_map1 {
  1523. trip = <0x3b>;
  1524. cooling-device = <0x3d 0x3 0x4>;
  1525. contribution = <0x64>;
  1526. };
  1527.  
  1528. gpucore_cooling_map {
  1529. trip = <0x39>;
  1530. cooling-device = <0x3e 0x0 0x2>;
  1531. contribution = <0x400>;
  1532. };
  1533. };
  1534. };
  1535. };
  1536.  
  1537. gpio_leds {
  1538. compatible = "gpio-leds";
  1539. pinctrl-names = "led_pins";
  1540. pinctrl-0 = <0x3f>;
  1541.  
  1542. heartbeat {
  1543. label = "blue:heartbeat";
  1544. gpios = <0x25 0xd 0x1>;
  1545. linux,default-trigger = "heartbeat";
  1546. };
  1547. };
  1548.  
  1549. onewire {
  1550. compatible = "w1-gpio";
  1551. gpios = <0x13 0x71 0x0>;
  1552. };
  1553.  
  1554. pwm {
  1555. compatible = "amlogic, odroid-pwm";
  1556. dev_name = "meson_pwm";
  1557. status = "ok";
  1558. pinctrl-names = "odroid_pwm0", "odroid_pwm1";
  1559. pinctrl-0 = <0x40>;
  1560. pinctrl-1 = <0x41>;
  1561. };
  1562.  
  1563. pwm-ctrl {
  1564. compatible = "amlogic, pwm-ctrl";
  1565. dev_name = "pwm-ctrl";
  1566. status = "ok";
  1567. };
  1568.  
  1569. spi-gpio {
  1570. compatible = "spi-gpio";
  1571. #address-cells = <0x1>;
  1572. #size-cells = <0x0>;
  1573. status = "ok";
  1574. id = <0x0>;
  1575. gpio-sck = <0x13 0x5e 0x0>;
  1576. gpio-miso = <0x13 0x60 0x0>;
  1577. gpio-mosi = <0x13 0x63 0x0>;
  1578. cs-gpios = <0x13 0x5d 0x0 0x13 0x59 0x0>;
  1579. num-chipselects = <0x2>;
  1580.  
  1581. spi-gpio@0 {
  1582. compatible = "spidev";
  1583. reg = <0x0>;
  1584. spi-max-frequency = <0x7a120>;
  1585. };
  1586. };
  1587.  
  1588. meson-ir {
  1589. compatible = "amlogic, meson6-ir";
  1590. reg = <0x0 0xc8100580 0x0 0x20>;
  1591. interrupts = <0x0 0xc4 0x1>;
  1592. pinctrl-names = "default";
  1593. pinctrl-0 = <0x42>;
  1594. pulse-inverted;
  1595. status = "ok";
  1596. };
  1597.  
  1598. gpio_keypad {
  1599. compatible = "amlogic, gpio_keypad";
  1600. status = "okay";
  1601. scan_period = <0x14>;
  1602. key_num = <0x1>;
  1603. key_name = "power";
  1604. key_code = <0x74>;
  1605. irq_keyup = <0x6>;
  1606. irq_keydown = <0x7>;
  1607. reg = <0x0 0xc8100000 0x0 0x200>;
  1608. };
  1609. };
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