API tools faq
paste
Advertisement
Guest User

Untitled

a guest
Mar 23rd, 2019
637
0
Never
Add comment
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 6.66 KB | None | 0 0
raw download clone embed print report
  1. [*] running module: chipsec.modules.common.spi_lock
  2. [x][ =======================================================================
  3. [x][ Module: SPI Flash Controller Configuration Locks
  4. [x][ =======================================================================
  5. [*] HSFS = 0x2008 << Hardware Sequencing Flash Status Register (SPIBAR + 0x4)
  6. [00] FDONE = 0 << Flash Cycle Done
  7. [01] FCERR = 0 << Flash Cycle Error
  8. [02] AEL = 0 << Access Error Log
  9. [03] BERASE = 1 << Block/Sector Erase Size
  10. [05] SCIP = 0 << SPI cycle in progress
  11. [13] FDOPSS = 1 << Flash Descriptor Override Pin-Strap Status
  12. [14] FDV = 0 << Flash Descriptor Valid
  13. [15] FLOCKDN = 0 << Flash Configuration Lock-Down
  14. [-] SPI Flash Controller configuration is not locked
  15. [-] FAILED: SPI Flash Controller not locked correctly.
  16.  
  17. [*] running module: chipsec.modules.common.spi_fdopss
  18. [x][ =======================================================================
  19. [x][ Module: SPI Flash Descriptor Security Override Pin-Strap
  20. [x][ =======================================================================
  21. [*] HSFS = 0x2008 << Hardware Sequencing Flash Status Register (SPIBAR + 0x4)
  22. [00] FDONE = 0 << Flash Cycle Done
  23. [01] FCERR = 0 << Flash Cycle Error
  24. [02] AEL = 0 << Access Error Log
  25. [03] BERASE = 1 << Block/Sector Erase Size
  26. [05] SCIP = 0 << SPI cycle in progress
  27. [13] FDOPSS = 1 << Flash Descriptor Override Pin-Strap Status
  28. [14] FDV = 0 << Flash Descriptor Valid
  29. [15] FLOCKDN = 0 << Flash Configuration Lock-Down
  30. [+] PASSED: SPI Flash Descriptor Security Override is disabled
  31.  
  32. [*] running module: chipsec.modules.common.spi_desc
  33. [x][ =======================================================================
  34. [x][ Module: SPI Flash Region Access Control
  35. [x][ =======================================================================
  36. [*] FRAP = 0x00000202 << SPI Flash Regions Access Permissions Register (SPIBAR + 0x50)
  37. [00] BRRA = 2 << BIOS Region Read Access
  38. [08] BRWA = 2 << BIOS Region Write Access
  39. [16] BMRAG = 0 << BIOS Master Read Access Grant
  40. [24] BMWAG = 0 << BIOS Master Write Access Grant
  41. [*] Software access to SPI flash regions: read = 0x02, write = 0x02
  42.  
  43. [+] PASSED: SPI flash permissions prevent SW from writing to flash descriptor
  44.  
  45. [*] running module: chipsec.modules.common.spi_access
  46. [x][ =======================================================================
  47. [x][ Module: SPI Flash Region Access Control
  48. [x][ =======================================================================
  49. SPI Flash Region Access Permissions
  50. ------------------------------------------------------------
  51. [*] FRAP = 0x00000202 << SPI Flash Regions Access Permissions Register (SPIBAR + 0x50)
  52. [00] BRRA = 2 << BIOS Region Read Access
  53. [08] BRWA = 2 << BIOS Region Write Access
  54. [16] BMRAG = 0 << BIOS Master Read Access Grant
  55. [24] BMWAG = 0 << BIOS Master Write Access Grant
  56.  
  57. BIOS Region Write Access Grant (00):
  58. FREG0_FLASHD: 0
  59. FREG1_BIOS : 0
  60. FREG2_ME : 0
  61. FREG3_GBE : 0
  62. FREG4_PD : 0
  63. FREG5 : 0
  64. FREG6 : 0
  65. BIOS Region Read Access Grant (00):
  66. FREG0_FLASHD: 0
  67. FREG1_BIOS : 0
  68. FREG2_ME : 0
  69. FREG3_GBE : 0
  70. FREG4_PD : 0
  71. FREG5 : 0
  72. FREG6 : 0
  73. BIOS Region Write Access (02):
  74. FREG0_FLASHD: 0
  75. FREG1_BIOS : 1
  76. FREG2_ME : 0
  77. FREG3_GBE : 0
  78. FREG4_PD : 0
  79. FREG5 : 0
  80. FREG6 : 0
  81. BIOS Region Read Access (02):
  82. FREG0_FLASHD: 0
  83. FREG1_BIOS : 1
  84. FREG2_ME : 0
  85. FREG3_GBE : 0
  86. FREG4_PD : 0
  87. FREG5 : 0
  88. FREG6 : 0
  89. [+] PASSED: SPI Flash Region Access Permissions in flash descriptor look ok
  90.  
  91. [*] running module: chipsec.modules.common.smrr
  92. [x][ =======================================================================
  93. [x][ Module: CPU SMM Cache Poisoning / System Management Range Registers
  94. [x][ =======================================================================
  95. [+] OK. SMRR range protection is supported
  96.  
  97. [*] Checking SMRR range base programming..
  98. Segmentation fault (core dumped)
  99.  
  100.  
  101.  
  102. mint@mint:~/Downloads/chipsec$ sudo python chipsec_main.py -i -m common.bios_wp
  103. [*] Ignoring unsupported platform warning and continue execution
  104. ################################################################
  105. ## ##
  106. ## CHIPSEC: Platform Hardware Security Assessment Framework ##
  107. ## ##
  108. ################################################################
  109. [CHIPSEC] Version 1.3.7
  110. [CHIPSEC] Arguments: -i -m common.bios_wp
  111. ****** Chipsec Linux Kernel module is licensed under GPL 2.0
  112. [CHIPSEC] API mode: using CHIPSEC kernel module API
  113. ERROR: Unsupported Platform: VID = 0x8086, DID = 0x2E20
  114. ERROR: Platform is not supported (Unsupported Platform: VID = 0x8086, DID = 0x2E20).
  115. WARNING: Platform dependent functionality is likely to be incorrect
  116. [CHIPSEC] OS : Linux 4.15.0-20-generic #21-Ubuntu SMP Tue Apr 24 06:16:15 UTC 2018 x86_64
  117. [CHIPSEC] Platform: UnknownPlatform
  118. [CHIPSEC] VID: 8086
  119. [CHIPSEC] DID: 2E20
  120. [CHIPSEC] PCH : Default PCH
  121. [CHIPSEC] VID: 8086
  122. [CHIPSEC] DID: 3A16
  123.  
  124. [+] loaded chipsec.modules.common.bios_wp
  125. [*] running loaded modules ..
  126.  
  127. [*] running module: chipsec.modules.common.bios_wp
  128. [x][ =======================================================================
  129. [x][ Module: BIOS Region Write Protection
  130. [x][ =======================================================================
  131. [*] BC = 0x00 << BIOS Control (b:d.f 00:31.0 + 0xDC)
  132. [00] BIOSWE = 0 << BIOS Write Enable
  133. [01] BLE = 0 << BIOS Lock Enable
  134. [02] SRC = 0 << SPI Read Configuration
  135. [04] TSS = 0 << Top Swap Status
  136. [05] SMM_BWP = 0 << SMM BIOS Write Protection
  137. [-] BIOS region write protection is disabled!
  138.  
  139. [*] BIOS Region: Base = 0x00FFF000, Limit = 0x00000FFF
  140. SPI Protected Ranges
  141. ------------------------------------------------------------
  142. PRx (offset) | Value | Base | Limit | WP? | RP?
  143. ------------------------------------------------------------
  144. PR0 (74) | 00000000 | 00000000 | 00000000 | 0 | 0
  145. PR1 (78) | 00000000 | 00000000 | 00000000 | 0 | 0
  146. PR2 (7C) | 00000000 | 00000000 | 00000000 | 0 | 0
  147. PR3 (80) | 00000000 | 00000000 | 00000000 | 0 | 0
  148. PR4 (84) | 00000000 | 00000000 | 00000000 | 0 | 0
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement
Public Pastes
Advertisement
We use cookies for various purposes including analytics. By continuing to use Pastebin, you agree to our use of cookies as described in the Cookies Policy.  OK, I Understand
Not a member of Pastebin yet?
Sign Up, it unlocks many cool features!