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- # Truncate R1 to a byte, save param 4 (interrupt priority)
- FFFC48D2 5B11 _R_SCI_CreateAll MOVU.B R1,R1
- FFFC48D4 5B4F MOVU.B R4,R15
- # ((char *)0x0037)[channel] = prio;
- FFFC48D6 FB5237000000 MOV.L #00000037H,R5
- FFFC48DC 6604 MOV.L #0H,R4
- FFFC48DE FE0154 MOV.B R4,[R1,R5]
- # ((char *)0x003E)[channel] = prio
- FFFC48E1 FB523E000000 MOV.L #0000003EH,R5
- FFFC48E7 FE0154 MOV.B R4,[R1,R5]
- FFFC48EA EF25 MOV.L R2,R5
- FFFC48EC 64F5 AND #0FH,R5
- FFFC48EE 6115 CMP #1H,R5 # PDL_SCI_ASYNC
- FFFC48F0 201B BEQ.B 0FFFC490BH # Hit
- # Additional comparisons, all skipped
- FFFC48F2 6185 CMP #8H,R5
- FFFC48F4 2017 BEQ.B 0FFFC490BH
- FFFC48F6 6125 CMP #2H,R5
- FFFC48F8 16 BEQ.S 0FFFC48FEH
- FFFC48F9 6145 CMP #4H,R5
- FFFC48FB 10 BEQ.S 0FFFC4903H
- FFFC48FC 2E0C BRA.B 0FFFC4908H
- FFFC48FE EFF4 MOV.L R15,R4
- FFFC4900 381B01 BRA.W R_SCI_CreateSyncAll
- FFFC4903 EFF4 MOV.L R15,R4
- FFFC4905 386D01 BRA.W R_SCI_CreateSmartAll
- FFFC4908 6601 MOV.L #0H,R1
- FFFC490A 02 RTS # Return 0
- # Tail call into _R_SCI_CreateAllAsync
- FFFC490B EFF4 MOV.L R15,R4
- # bool _R_SCI_CreateAllAsync() - same arguments as _R_SCI_CreateAll
- FFFC490D 6E69 _R_SCI_CreateAllAsy PUSHM R6-R9
- # Parameter dance
- FFFC490F EF26 MOV.L R2,R6
- FFFC4911 EF38 MOV.L R3,R8
- FFFC4913 5B17 MOVU.B R1,R7
- FFFC4915 EF49 MOV.L R4,R9
- FFFC4917 6602 MOV.L #0H,R2
- FFFC4919 6603 MOV.L #0H,R3
- FFFC491B 6601 MOV.L #0H,R1
- FFFC491D 660F MOV.L #0H,R15
- # PDL_SCI_ASYNC_MP - omit parity flags if MP mode
- FFFC491F 7C36 BTST #3,R6
- FFFC4921 2019 BEQ.B 0FFFC493AH
- # PDL_SCI_PARITY_* sanity check
- FFFC4923 FD78C60006 TST #0600H,R6
- FFFC4928 3BEE00 BNE.W 0FFFC4A16H # Fail out
- # ((char *)0x0037)[chan] = prio;
- FFFC492B FB5237000000 MOV.L #00000037H,R5
- FFFC4931 6614 MOV.L #1H,R4
- FFFC4933 FE0754 MOV.B R4,[R7,R5]
- # Setting bit length
- FFFC4936 6642 MOV.L #4H,R2
- FFFC4938 6683 MOV.L #8H,R3
- FFFC493A EF65 MOV.L R6,R5 # R5 = param2
- FFFC493C 7725008001 AND #018000H,R5
- FFFC4941 2013 BEQ.B 0FFFC4954H
- # Set R2.6 if PDL_SCI_7_BIT_LENGTH
- FFFC4943 7705008000 CMP #008000H,R5
- FFFC4948 200C BEQ.B 0FFFC4954H
- FFFC494A 7705000001 CMP #010000H,R5
- FFFC494F 3BC700 BNE.W 0FFFC4A16H
- FFFC4952 7862 BSET #6,R2
- # Setting parity - set R2.5 if EVEN, R2 |= 0x30 if ODD, else fail out
- FFFC4954 EF65 MOV.L R6,R5 # param2
- FFFC4956 7725000602 AND #020600H,R5
- FFFC495B 201C BEQ.B 0FFFC4977H
- FFFC495D 7705000002 CMP #020000H,R5
- FFFC4962 2015 BEQ.B 0FFFC4977H
- FFFC4964 76050002 CMP #0200H,R5
- FFFC4968 11 BEQ.S 0FFFC4971H
- FFFC4969 76050004 CMP #0400H,R5
- FFFC496D 17 BEQ.S 0FFFC4974H
- FFFC496E 38A800 BRA.W 0FFFC4A16H
- FFFC4971 7852 BSET #5,R2
- FFFC4973 0C BRA.S 0FFFC4977H
- FFFC4974 753230 OR #30H,R2
- # PDL_SCI_STOP_* - set R2.3 if STOP_2
- FFFC4977 EF65 MOV.L R6,R5 # ..more param2
- FFFC4979 772500000C AND #0C0000H,R5
- FFFC497E 2013 BEQ.B 0FFFC4991H
- FFFC4980 7705000004 CMP #040000H,R5
- FFFC4985 200C BEQ.B 0FFFC4991H
- FFFC4987 7705000008 CMP #080000H,R5
- FFFC498C 3B8A00 BNE.W 0FFFC4A16H
- FFFC498F 7832 BSET #3,R2
- # PDL_SCI_CLK_* - setting clock source
- #
- FFFC4991 EF65 MOV.L R6,R5 # still examining options
- FFFC4993 76250079 AND #7900H,R5
- FFFC4997 203C BEQ.B 0FFFC49D3H
- # INT_IO default
- FFFC4999 76050008 CMP #0800H,R5
- FFFC499D 2036 BEQ.B 0FFFC49D3H
- # INT_OUT set R3.0
- FFFC499F 76050001 CMP #0100H,R5
- FFFC49A3 2016 BEQ.B 0FFFC49B9H
- # EXT_DIV_8 set R3.1, R1 = 0x10
- FFFC49A5 76050010 CMP #1000H,R5
- FFFC49A9 2014 BEQ.B 0FFFC49BDH
- # EXT_DIV_16 set R3.1 only
- FFFC49AB 76050020 CMP #2000H,R5
- FFFC49AF 2015 BEQ.B 0FFFC49C4H
- # TMR set R3.1, R1 = 0x10 but only legal on channels 5 and 6
- FFFC49B1 76050040 CMP #4000H,R5
- FFFC49B5 2013 BEQ.B 0FFFC49C8H
- # else fail out
- FFFC49B7 2E5F BRA.B 0FFFC4A16H
- FFFC49B9 7803 BSET #0,R3
- FFFC49BB 2E18 BRA.B 0FFFC49D3H
- FFFC49BD 7813 BSET #1,R3
- FFFC49BF 754110 MOV.L #10H,R1
- FFFC49C2 2E11 BRA.B 0FFFC49D3H
- FFFC49C4 7813 BSET #1,R3
- FFFC49C6 2E0D BRA.B 0FFFC49D3H
- # Channel check for TMR
- FFFC49C8 6157 CMP #5H,R7
- FFFC49CA 15 BEQ.S 0FFFC49CFH
- FFFC49CB 6167 CMP #6H,R7
- FFFC49CD 2149 BNE.B 0FFFC4A16H
- FFFC49CF 7813 BSET #1,R3
- FFFC49D1 6611 MOV.L #1H,R1
- # if R3.1 set, omit this, bitrate calculation
- FFFC49D3 7C13 BTST #1,R3
- FFFC49D5 2124 BNE.B 0FFFC49F9H
- # Skip if top 8 bits illegally set
- FFFC49D7 7408FFFFFF00 CMP #00FFFFFFH,R8
- FFFC49DD 241C BGTU.B 0FFFC49F9H
- FFFC49DF FB42FC070000 MOV.L #000007FCH,R4
- FFFC49E5 EC45 MOV.L [R4],R5
- FFFC49E7 7841 BSET #4,R1
- FFFC49E9 FC2785 DIVU R8,R5
- FFFC49EC FD845F SHLR #4,R5,R15
- FFFC49EF 760F0040 CMP #4000H,R15
- FFFC49F3 2506 BLEU.B 0FFFC49F9H
- FFFC49F5 7A41 BCLR #4,R1
- FFFC49F7 681F SHLR #1,R15
- # Call out to _R_SCI_CreateCommon, analysis TODO
- FFFC49F9 7EAF PUSH.L R15
- FFFC49FB 6040 SUB #4H,R0
- FFFC49FD 3C0372 MOV.B #72H,03H[R0]
- FFFC4A00 8083 MOV.B R3,02H[R0]
- FFFC4A02 8009 MOV.B R1,01H[R0]
- FFFC4A04 C302 MOV.B R2,[R0]
- FFFC4A06 EF62 MOV.L R6,R2
- FFFC4A08 EF83 MOV.L R8,R3
- FFFC4A0A EF71 MOV.L R7,R1
- FFFC4A0C 5B94 MOVU.B R9,R4
- FFFC4A0E 39F901 BSR.W _R_SCI_CreateCommon
- FFFC4A11 6280 ADD #8H,R0
- FFFC4A13 3F6904 RTSD #10H,R6-R9
- FFFC4A16 6601 MOV.L #0H,R1
- FFFC4A18 3F6904 RTSD #10H,R6-R9
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