hawxgamer

alarmanlage

Nov 12th, 2013
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  1. /*
  2.  * Uebung3.asm
  3.  *
  4.  *  Created: 31.10.2013 15:25:47
  5.  *   Author: mt
  6.  */
  7.  
  8.  .include "ATXmega128A1def.inc"
  9.  
  10.  .org 0x0000
  11.  rjmp RESET
  12.  
  13.  .def Temp2=r16;
  14.  .def buzzervar=r17
  15.  .def clocktemp=r19
  16.  
  17.  RESET:
  18.     //Init IO
  19.     ldi Temp2, PORT_INVEN_bm    ; PINnCTRL Bit6 (0100 0000) -> inverted I/O enable, da ansonsten LEDS low-active
  20.     sts PORTB_PIN1CTRL, Temp2
  21.     sts PORTA_PIN7CTRL, Temp2
  22.     sts PORTA_PIN5CTRL, Temp2
  23.     sts PORTA_PIN3CTRL, Temp2
  24.  
  25.     ldi Temp2,(1<<7)|(1<<5)|(1<<3)  ;Port A 1010 1000
  26.     sts PORTA_DIR, Temp2    ;setze Port A als output
  27.  
  28.     ldi Temp2, (1<<1)
  29.     sts PORTB_DIR, Temp2    ;setze Port B als output
  30.  
  31.     ldi Temp2, PORT_OPC_PULLUP_gc | PORT_INVEN_bm
  32.     sts PORTB_PIN2CTRL, Temp2   ;für SW1
  33.     sts PORTB_PIN0CTRL, Temp2   ;für SW2
  34.     sts PORTA_PIN6CTRL, Temp2   ;für SW3
  35.     sts PORTA_PIN4CTRL, Temp2   ;für SW4
  36.  
  37.     ;Buzzer initialisieren
  38.     ldi buzzervar,0x01
  39.     ldi Temp2, 0x03 ;0000 0011
  40.     sts PORTE_DIR, Temp2
  41.     ldi Temp2, 0x01 ;Wert zum toggeln benutzen
  42.     sts PORTE_OUT, Temp2
  43.  
  44. LOOP:
  45.  ;überprüfe SW1, SW2, SW3 und SW4 mit IN Register
  46.  lds Temp2, PORTB_IN
  47.  sbrc Temp2, 2  ;überspringe wenn Bit in 2 null ist
  48.  call ALARM1_ON
  49.  
  50.  lds Temp2, PORTB_IN
  51.  sbrc Temp2, 0  ;für SW2
  52.  call ALARM2_ON
  53.  
  54.  lds Temp2, PORTA_IN
  55.  sbrc Temp2, 6  ;für SW3
  56.  call SWITCH_TO_EXT_32MHZ
  57.  
  58.  lds Temp2, PORTA_IN
  59.  sbrc Temp2, 4  ;für SW4
  60.  call ALARMS_OFF
  61.  
  62.  
  63.   sbrc buzzervar, 0x01  //schauen ob der Alarm schon aktiv ist
  64.   call BEEP
  65.  
  66.   rjmp LOOP
  67.  
  68.  ALARM1_ON:
  69.   ldi buzzervar,0x03
  70.  
  71.   lds  Temp2, PORTB_OUT
  72.   ori  Temp2, 0x02                      ; or mask 0000 0010
  73.   sts  PORTB_OUT, Temp2        ; turns on LED 1
  74.    
  75.   lds  Temp2, PORTA_OUT
  76.   ori  Temp2, 0x08                      ; or mask 0000 1000
  77.   sts  PORTA_OUT, Temp2         ; turns on LED 4
  78.   ret
  79.  
  80.  ALARM2_ON:
  81.  call BEEP
  82.  lds  Temp2, PORTA_OUT
  83.  ori Temp2, (1<<7)|(1<<3)
  84.  sts PORTA_OUT, Temp2
  85.  ret
  86.  
  87.  ALARMS_OFF:
  88.   ldi buzzervar,0x01
  89.  
  90.   lds  Temp2, PORTB_OUT
  91.   clr Temp2                      ; or mask 0000 0010
  92.   sts  PORTB_OUT, Temp2        ; turns on LED 1
  93.    
  94.   lds  Temp2, PORTA_OUT
  95.   clr  Temp2                      ; or mask 0000 1000
  96.   sts  PORTA_OUT, Temp2         ; turns on LED 4
  97.  
  98.   ldi Temp2, 0x01   ;Wert zum toggeln benutzen
  99.   sts PORTE_OUT, Temp2
  100.   ret
  101.  
  102. BEEP:
  103.  ldi buzzervar, 0x03
  104.  //TODO: PIN toggeln + Delay
  105.  ldi  temp2, 0x03
  106.  sts  PORTE_OUTTGL, temp2  
  107.  call DELAY
  108.  ret
  109.  
  110.  
  111. DELAY: //Verzögerungsschleife, 255*255
  112.  ldi r20, 0xAA
  113. DELAY_1:
  114.  ldi r21, 0x01
  115. DELAY_2:
  116.  dec r21
  117.  brne DELAY_2
  118.  dec r20
  119.  brne DELAY_1
  120.  ret
  121.  
  122.  
  123.  SWITCH_TO_EXT_32MHZ:
  124.  
  125.  //configure XTAL 2-9MHz, 1 KCLK startup
  126.  ldi clocktemp, OSC_XOSCSEL_XTAL_1KCLK_gc | OSC_FRQRANGE_2TO9_gc ;0100 0111
  127.  sts OSC_XOSCCTRL,clocktemp ;external oscillator enable
  128.  //configure PLL (external clock, multiplication factor 4)
  129.  ldi clocktemp, OSC_PLLSRC_XOSC_gc |0x04
  130.  sts OSC_PLLCTRL, clocktemp
  131.  //enable PLL and XTAL
  132.  ldi clocktemp, OSC_PLLEN_bm | OSC_XOSCEN_bm
  133.  sts OSC_CTRL, clocktemp
  134.  
  135.  SWITCH_TO_EXT_32MHz_1:
  136.  lds r16, OSC_STATUS
  137.  sbrs r16, OSC_PLLRDY_bp
  138.  rjmp SWITCH_TO_EXT_32MHz_1
  139.  
  140.  //disable change protection
  141.  ldi clocktemp, 0xD8
  142.  sts CPU_CCP, clocktemp
  143.  
  144.  //seet clock to PLL (with 32MHz)
  145.  ldi clocktemp, CLK_SCLKSEL_XOSC_gc
  146.  sts CLK_CTRL, clocktemp
  147.  
  148.  ret
  149.  
  150.  //wait for PLL to be stable
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