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  1. /*
  2. RSD PTR: OEM=PTLTD, ACPI_Rev=2.0x (2)
  3. XSDT=0x000000007f5b83d0, length=36, cksum=175
  4. */
  5. /*
  6. XSDT: Length=124, Revision=1, Checksum=224,
  7. OEMID=SECCSD, OEM Table ID=LH43STAR, OEM Revision=0x6040000,
  8. Creator ID= LTP, Creator Revision=0x0
  9. Entries={ 0x000000007f5bfc92, 0x000000007f5bfd86, 0x000000007f5bfdc2, 0x000000007f5bfdfa, 0x000000007f5bfe62, 0x000000007f5bfe8a, 0x000000007f5b900a, 0x000000007f5b8f64, 0x000000007f5b8ebe, 0x000000007f5b8e18, 0x000000007f5b844c }
  10. */
  11. /*
  12. FACP: Length=244, Revision=3, Checksum=164,
  13. OEMID=INTEL, OEM Table ID=, OEM Revision=0x6040000,
  14. Creator ID=PTL, Creator Revision=0x2
  15. FACS=0x7f5c2fc0, DSDT=0x7f5b9f1c
  16. INT_MODEL=PIC
  17. Preferred_PM_Profile=Unspecified (0)
  18. SCI_INT=9
  19. SMI_CMD=0xb2, ACPI_ENABLE=0xf0, ACPI_DISABLE=0xf1, S4BIOS_REQ=0x0
  20. PSTATE_CNT=0x80
  21. PM1a_EVT_BLK=0x1000-0x1003
  22. PM1a_CNT_BLK=0x1004-0x1005
  23. PM2_CNT_BLK=0x1020-0x1020
  24. PM_TMR_BLK=0x1008-0x100b
  25. GPE0_BLK=0x1028-0x102f
  26. CST_CNT=0x85
  27. P_LVL2_LAT=1 us, P_LVL3_LAT=35 us
  28. FLUSH_SIZE=0, FLUSH_STRIDE=0
  29. DUTY_OFFSET=1, DUTY_WIDTH=3
  30. DAY_ALRM=13, MON_ALRM=0, CENTURY=50
  31. IAPC_BOOT_ARCH={8042}
  32. Flags={WBINVD,C1_SUPPORTED,SLEEP_BUTTON,RESET_REGISTER}
  33. RESET_REG=0xb2:0[8] (IO), RESET_VALUE=0xef
  34. X_FACS=0x000000007f5c2fc0, X_DSDT=0x000000007f5b9f1c
  35. X_PM1a_EVT_BLK=0x1000:0[32] (IO)
  36. X_PM1a_CNT_BLK=0x1004:0[16] (IO)
  37. X_PM2_CNT_BLK=0x1020:0[8] (IO)
  38. X_PM_TMR_BLK=0x1008:0[32] (IO)
  39. X_GPE0_BLK=0x1028:0[64] (IO)
  40. */
  41. /*
  42. FACS: Length=64, HwSig=0x00000000, Firm_Wake_Vec=0x00000000
  43. Global_Lock=
  44. Flags=
  45. Version=1
  46. */
  47. /*
  48. DSDT: Length=23682, Revision=1, Checksum=90,
  49. OEMID=INTEL, OEM Table ID=BEARG31A, OEM Revision=0x6040000,
  50. Creator ID=MSFT, Creator Revision=0x3000001
  51. */
  52. /*
  53. MCFG: Length=60, Revision=1, Checksum=87,
  54. OEMID=PTLTD, OEM Table ID= MCFG, OEM Revision=0x6040000,
  55. Creator ID= LTP, Creator Revision=0x0
  56.  
  57. Base Address=0x00000000e0000000
  58. Segment Group=0x0000
  59. Start Bus=0
  60. End Bus=16
  61. */
  62. /*
  63. HPET: Length=56, Revision=1, Checksum=214,
  64. OEMID=PTLTD, OEM Table ID=HPETTBL, OEM Revision=0x6040000,
  65. Creator ID= LTP, Creator Revision=0x1
  66. HPET Number=0
  67. ADDR=0x00000000fed00000:0[0] (Memory)
  68. HW Rev=0xff
  69. Comparators=31
  70. Counter Size=1
  71. Legacy IRQ routing capable={TRUE}
  72. PCI Vendor ID=0xffff
  73. Minimal Tick=0
  74. Flags=0x00
  75. */
  76. /*
  77. APIC: Length=104, Revision=1, Checksum=19,
  78. OEMID=PTLTD, OEM Table ID= APIC, OEM Revision=0x6040000,
  79. Creator ID= LTP, Creator Revision=0x0
  80. Local APIC ADDR=0xfee00000
  81. Flags={PC-AT}
  82.  
  83. Type=Local APIC
  84. ACPI CPU=0
  85. Flags={ENABLED}
  86. APIC ID=0
  87.  
  88. Type=Local APIC
  89. ACPI CPU=1
  90. Flags={ENABLED}
  91. APIC ID=1
  92.  
  93. Type=IO APIC
  94. APIC ID=2
  95. INT BASE=0
  96. ADDR=0x00000000fec00000
  97.  
  98. Type=Local APIC NMI
  99. ACPI CPU=0
  100. LINT Pin=1
  101. Flags={Polarity=active-hi, Trigger=edge}
  102.  
  103. Type=Local APIC NMI
  104. ACPI CPU=1
  105. LINT Pin=1
  106. Flags={Polarity=active-hi, Trigger=edge}
  107.  
  108. Type=INT Override
  109. BUS=0
  110. IRQ=0
  111. INTR=2
  112. Flags={Polarity=active-hi, Trigger=edge}
  113.  
  114. Type=INT Override
  115. BUS=0
  116. IRQ=9
  117. INTR=9
  118. Flags={Polarity=active-hi, Trigger=level}
  119. */
  120. /*
  121. BOOT: Length=40, Revision=1, Checksum=165,
  122. OEMID=PTLTD, OEM Table ID=$SBFTBL$, OEM Revision=0x6040000,
  123. Creator ID= LTP, Creator Revision=0x1
  124. */
  125. /*
  126. SLIC: Length=374, Revision=1, Checksum=29,
  127. OEMID=SECCSD, OEM Table ID=LH43STAR, OEM Revision=0x6040000,
  128. Creator ID= LTP, Creator Revision=0x0
  129. */
  130. /*
  131. SSDT: Length=607, Revision=1, Checksum=200,
  132. OEMID=PmRef, OEM Table ID=Cpu0Tst, OEM Revision=0x3000,
  133. Creator ID=INTL, Creator Revision=0x20050624
  134. */
  135. /*
  136. SSDT: Length=166, Revision=1, Checksum=103,
  137. OEMID=PmRef, OEM Table ID=Cpu3Tst, OEM Revision=0x3000,
  138. Creator ID=INTL, Creator Revision=0x20050624
  139. */
  140. /*
  141. SSDT: Length=166, Revision=1, Checksum=106,
  142. OEMID=PmRef, OEM Table ID=Cpu2Tst, OEM Revision=0x3000,
  143. Creator ID=INTL, Creator Revision=0x20050624
  144. */
  145. /*
  146. SSDT: Length=166, Revision=1, Checksum=109,
  147. OEMID=PmRef, OEM Table ID=Cpu1Tst, OEM Revision=0x3000,
  148. Creator ID=INTL, Creator Revision=0x20050624
  149. */
  150. /*
  151. SSDT: Length=2508, Revision=2, Checksum=163,
  152. OEMID=PmRef, OEM Table ID=CpuPm, OEM Revision=0x3000,
  153. Creator ID=INTL, Creator Revision=0x20050624
  154. */
  155. /*
  156. * Intel ACPI Component Architecture
  157. * AML/ASL+ Disassembler version 20200430 (64-bit version)
  158. * Copyright (c) 2000 - 2020 Intel Corporation
  159. *
  160. * Disassembling to symbolic ASL+ operators
  161. *
  162. * Disassembly of /tmp/acpidump.HXjkxT/acpdump.din, Thu Jan 14 19:53:56 2021
  163. *
  164. * Original Table Header:
  165. * Signature "DSDT"
  166. * Length 0x000069EB (27115)
  167. * Revision 0x01 **** 32-bit table (V1), no 64-bit math support
  168. * Checksum 0xF8
  169. * OEM ID "INTEL"
  170. * OEM Table ID "BEARG31A"
  171. * OEM Revision 0x06040000 (100925440)
  172. * Compiler ID "MSFT"
  173. * Compiler Version 0x03000001 (50331649)
  174. */
  175. DefinitionBlock ("", "DSDT", 1, "INTEL", "BEARG31A", 0x06040000)
  176. {
  177. External (_PR_.CPU0._PPC, UnknownObj)
  178. External (_PSS, IntObj)
  179. External (_SB_.VDRV, UnknownObj)
  180. External (LNKA, UnknownObj)
  181. External (LNKB, UnknownObj)
  182. External (LNKC, UnknownObj)
  183. External (LNKD, UnknownObj)
  184. External (LNKE, UnknownObj)
  185. External (LNKF, UnknownObj)
  186. External (LNKG, UnknownObj)
  187. External (LNKH, UnknownObj)
  188.  
  189. OperationRegion (PRT0, SystemIO, 0x80, 0x04)
  190. Field (PRT0, DWordAcc, Lock, Preserve)
  191. {
  192. P80H, 32
  193. }
  194.  
  195. OperationRegion (IO_T, SystemIO, 0x0800, 0x10)
  196. Field (IO_T, ByteAcc, NoLock, Preserve)
  197. {
  198. Offset (0x08),
  199. TRP0, 8
  200. }
  201.  
  202. OperationRegion (GNVS, SystemMemory, 0x7F5C0D7C, 0x0100)
  203. Field (GNVS, AnyAcc, Lock, Preserve)
  204. {
  205. OSYS, 16,
  206. SMIF, 8,
  207. PRM0, 8,
  208. PRM1, 8,
  209. SCIF, 8,
  210. PRM2, 8,
  211. PRM3, 8,
  212. LCKF, 8,
  213. PRM4, 8,
  214. PRM5, 8,
  215. P80D, 32,
  216. LIDS, 8,
  217. PWRS, 8,
  218. DBGS, 8,
  219. LINX, 8,
  220. Offset (0x14),
  221. ACTT, 8,
  222. PSVT, 8,
  223. TC1V, 8,
  224. TC2V, 8,
  225. TSPV, 8,
  226. CRTT, 8,
  227. DTSE, 8,
  228. DTS1, 8,
  229. DTS2, 8,
  230. Offset (0x1E),
  231. BNUM, 8,
  232. B0SC, 8,
  233. B1SC, 8,
  234. B2SC, 8,
  235. B0SS, 8,
  236. B1SS, 8,
  237. B2SS, 8,
  238. Offset (0x28),
  239. APIC, 8,
  240. MPEN, 8,
  241. Offset (0x2B),
  242. PPCM, 8,
  243. PCP0, 8,
  244. PCP1, 8,
  245. Offset (0x32),
  246. NATP, 8,
  247. CMAP, 8,
  248. CMBP, 8,
  249. LPTP, 8,
  250. FDCP, 8,
  251. CMCP, 8,
  252. CIRP, 8,
  253. Offset (0x3C),
  254. IGDS, 8,
  255. TLST, 8,
  256. CADL, 8,
  257. PADL, 8,
  258. CSTE, 16,
  259. NSTE, 16,
  260. SSTE, 16,
  261. NDID, 8,
  262. DID1, 32,
  263. DID2, 32,
  264. DID3, 32,
  265. DID4, 32,
  266. DID5, 32,
  267. Offset (0x67),
  268. BLCS, 8,
  269. BRTL, 8,
  270. ALSE, 8,
  271. ALAF, 8,
  272. LLOW, 8,
  273. LHIH, 8,
  274. Offset (0x6E),
  275. EMAE, 8,
  276. EMAP, 16,
  277. EMAL, 16,
  278. Offset (0x74),
  279. MEFE, 8,
  280. Offset (0x78),
  281. TPMP, 8,
  282. TPME, 8,
  283. Offset (0x82),
  284. GTF0, 56,
  285. GTF2, 56,
  286. IDEM, 8,
  287. VDRV, 8
  288. }
  289.  
  290. OperationRegion (RCRB, SystemMemory, 0xFED1C000, 0x00004000)
  291. Field (RCRB, DWordAcc, Lock, Preserve)
  292. {
  293. Offset (0x1000),
  294. Offset (0x3000),
  295. Offset (0x3404),
  296. HPAS, 2,
  297. , 5,
  298. HPAE, 1,
  299. Offset (0x3418),
  300. , 1,
  301. PATD, 1,
  302. SATD, 1,
  303. SMBD, 1
  304. }
  305.  
  306. OperationRegion (PMIO, SystemIO, 0x1000, 0x80)
  307. Field (PMIO, ByteAcc, NoLock, Preserve)
  308. {
  309. Offset (0x42),
  310. , 1,
  311. GPEC, 1
  312. }
  313.  
  314. Scope (_GPE)
  315. {
  316. Method (_L02, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF
  317. {
  318. GPEC = 0x00
  319. }
  320.  
  321. Method (_L03, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF
  322. {
  323. Notify (\_SB.PCI0.USB1, 0x02) // Device Wake
  324. Notify (\_SB.PWRB, 0x02) // Device Wake
  325. }
  326.  
  327. Method (_L04, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF
  328. {
  329. Notify (\_SB.PCI0.USB2, 0x02) // Device Wake
  330. Notify (\_SB.PWRB, 0x02) // Device Wake
  331. }
  332.  
  333. Method (_L06, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF
  334. {
  335. If (\_SB.PCI0.IGD0.GSSE)
  336. {
  337. \_SB.PCI0.IGD0.OPRN ()
  338. }
  339. Else
  340. {
  341. \_SB.PCI0.LPC0.SCIS = 0x01
  342. }
  343. }
  344.  
  345. Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF
  346. {
  347. If (\_SB.PCI0.EXP1.PSP1)
  348. {
  349. \_SB.PCI0.EXP1.PSP1 = 0x01
  350. \_SB.PCI0.EXP1.PMCS = 0x01
  351. Notify (\_SB.PCI0.EXP1, 0x02) // Device Wake
  352. }
  353.  
  354. If (\_SB.PCI0.EXP2.PSP2)
  355. {
  356. \_SB.PCI0.EXP2.PSP2 = 0x01
  357. \_SB.PCI0.EXP2.PMCS = 0x01
  358. Notify (\_SB.PCI0.EXP2, 0x02) // Device Wake
  359. }
  360.  
  361. If (\_SB.PCI0.EXP3.PSP3)
  362. {
  363. \_SB.PCI0.EXP3.PSP3 = 0x01
  364. \_SB.PCI0.EXP3.PMCS = 0x01
  365. Notify (\_SB.PCI0.EXP3, 0x02) // Device Wake
  366. }
  367.  
  368. If (\_SB.PCI0.EXP4.PSP4)
  369. {
  370. \_SB.PCI0.EXP4.PSP4 = 0x01
  371. \_SB.PCI0.EXP4.PMCS = 0x01
  372. Notify (\_SB.PCI0.EXP4, 0x02) // Device Wake
  373. }
  374. }
  375.  
  376. Method (_L0B, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF
  377. {
  378. Notify (\_SB.PCI0.PCIB, 0x02) // Device Wake
  379. }
  380.  
  381. Method (_L0C, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF
  382. {
  383. Notify (\_SB.PCI0.USB3, 0x02) // Device Wake
  384. }
  385.  
  386. Method (_L0D, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF
  387. {
  388. Notify (\_SB.PCI0.EUSB, 0x02) // Device Wake
  389. Notify (\_SB.PWRB, 0x02) // Device Wake
  390. }
  391.  
  392. Method (_L0E, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF
  393. {
  394. Notify (\_SB.PCI0.USB4, 0x02) // Device Wake
  395. Notify (\_SB.PWRB, 0x02) // Device Wake
  396. }
  397.  
  398. Method (_L1D, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF
  399. {
  400. TRAP (0x2B)
  401. PNOT ()
  402. Notify (\_SB.PWRB, 0x02) // Device Wake
  403. }
  404. }
  405.  
  406. Scope (_PR)
  407. {
  408. Processor (CPU0, 0x00, 0x00001010, 0x06){}
  409. Processor (CPU1, 0x01, 0x00001010, 0x06){}
  410. Processor (CPU2, 0x02, 0x00001010, 0x06){}
  411. Processor (CPU3, 0x03, 0x00001010, 0x06){}
  412. Processor (CPU4, 0x04, 0x00001010, 0x06){}
  413. Processor (CPU5, 0x05, 0x00001010, 0x06){}
  414. Processor (CPU6, 0x06, 0x00001010, 0x06){}
  415. Processor (CPU7, 0x07, 0x00001010, 0x06){}
  416. }
  417.  
  418. Name (\DSEN, 0x01)
  419. Name (\ECON, 0x00)
  420. Name (\GPIC, 0x00)
  421. Name (\CTYP, 0x00)
  422. Name (\L01C, 0x00)
  423. Name (\VFN0, 0x00)
  424. Scope (\_SB)
  425. {
  426. OperationRegion (TCG1, SystemMemory, 0x7F5C0C76, 0x00000007)
  427. Field (TCG1, AnyAcc, NoLock, Preserve)
  428. {
  429. PPRQ, 8,
  430. PPLO, 8,
  431. PPRP, 8,
  432. PPOR, 8,
  433. TPRS, 8,
  434. TPMV, 8,
  435. MOR, 8
  436. }
  437.  
  438. Method (PHSR, 1, Serialized)
  439. {
  440. BCMD = Arg0
  441. DID = Zero
  442. SMIC = Zero
  443. If ((BCMD == Arg0)){}
  444. BCMD = Zero
  445. DID = Zero
  446. Return (0x00)
  447. }
  448.  
  449. OperationRegion (SMI0, SystemIO, 0x0000FE00, 0x00000002)
  450. Field (SMI0, AnyAcc, NoLock, Preserve)
  451. {
  452. SMIC, 8
  453. }
  454.  
  455. OperationRegion (SMI1, SystemMemory, 0x7F5C2EBD, 0x00000090)
  456. Field (SMI1, AnyAcc, NoLock, Preserve)
  457. {
  458. BCMD, 8,
  459. DID, 32,
  460. INFO, 1024
  461. }
  462.  
  463. Field (SMI1, AnyAcc, NoLock, Preserve)
  464. {
  465. AccessAs (ByteAcc, 0x00),
  466. Offset (0x05),
  467. INF, 8
  468. }
  469.  
  470. Name (PR00, Package (0x0B)
  471. {
  472. Package (0x04)
  473. {
  474. 0x001FFFFF,
  475. 0x01,
  476. LNKD,
  477. 0x00
  478. },
  479.  
  480. Package (0x04)
  481. {
  482. 0x001DFFFF,
  483. 0x00,
  484. LNKH,
  485. 0x00
  486. },
  487.  
  488. Package (0x04)
  489. {
  490. 0x001DFFFF,
  491. 0x01,
  492. LNKD,
  493. 0x00
  494. },
  495.  
  496. Package (0x04)
  497. {
  498. 0x001DFFFF,
  499. 0x02,
  500. LNKC,
  501. 0x00
  502. },
  503.  
  504. Package (0x04)
  505. {
  506. 0x001DFFFF,
  507. 0x03,
  508. LNKA,
  509. 0x00
  510. },
  511.  
  512. Package (0x04)
  513. {
  514. 0x001BFFFF,
  515. 0x00,
  516. LNKG,
  517. 0x00
  518. },
  519.  
  520. Package (0x04)
  521. {
  522. 0x001CFFFF,
  523. 0x00,
  524. LNKA,
  525. 0x00
  526. },
  527.  
  528. Package (0x04)
  529. {
  530. 0x001CFFFF,
  531. 0x01,
  532. LNKB,
  533. 0x00
  534. },
  535.  
  536. Package (0x04)
  537. {
  538. 0x001CFFFF,
  539. 0x02,
  540. LNKC,
  541. 0x00
  542. },
  543.  
  544. Package (0x04)
  545. {
  546. 0x001CFFFF,
  547. 0x03,
  548. LNKD,
  549. 0x00
  550. },
  551.  
  552. Package (0x04)
  553. {
  554. 0x0002FFFF,
  555. 0x00,
  556. LNKA,
  557. 0x00
  558. }
  559. })
  560. Name (AR00, Package (0x0B)
  561. {
  562. Package (0x04)
  563. {
  564. 0x001FFFFF,
  565. 0x01,
  566. 0x00,
  567. 0x13
  568. },
  569.  
  570. Package (0x04)
  571. {
  572. 0x001DFFFF,
  573. 0x00,
  574. 0x00,
  575. 0x17
  576. },
  577.  
  578. Package (0x04)
  579. {
  580. 0x001DFFFF,
  581. 0x01,
  582. 0x00,
  583. 0x13
  584. },
  585.  
  586. Package (0x04)
  587. {
  588. 0x001DFFFF,
  589. 0x02,
  590. 0x00,
  591. 0x12
  592. },
  593.  
  594. Package (0x04)
  595. {
  596. 0x001DFFFF,
  597. 0x03,
  598. 0x00,
  599. 0x10
  600. },
  601.  
  602. Package (0x04)
  603. {
  604. 0x001BFFFF,
  605. 0x00,
  606. 0x00,
  607. 0x16
  608. },
  609.  
  610. Package (0x04)
  611. {
  612. 0x001CFFFF,
  613. 0x00,
  614. 0x00,
  615. 0x10
  616. },
  617.  
  618. Package (0x04)
  619. {
  620. 0x001CFFFF,
  621. 0x01,
  622. 0x00,
  623. 0x11
  624. },
  625.  
  626. Package (0x04)
  627. {
  628. 0x001CFFFF,
  629. 0x02,
  630. 0x00,
  631. 0x12
  632. },
  633.  
  634. Package (0x04)
  635. {
  636. 0x001CFFFF,
  637. 0x03,
  638. 0x00,
  639. 0x13
  640. },
  641.  
  642. Package (0x04)
  643. {
  644. 0x0002FFFF,
  645. 0x00,
  646. 0x00,
  647. 0x10
  648. }
  649. })
  650. Name (PR04, Package (0x04)
  651. {
  652. Package (0x04)
  653. {
  654. 0xFFFF,
  655. 0x00,
  656. LNKA,
  657. 0x00
  658. },
  659.  
  660. Package (0x04)
  661. {
  662. 0xFFFF,
  663. 0x01,
  664. LNKB,
  665. 0x00
  666. },
  667.  
  668. Package (0x04)
  669. {
  670. 0xFFFF,
  671. 0x02,
  672. LNKC,
  673. 0x00
  674. },
  675.  
  676. Package (0x04)
  677. {
  678. 0xFFFF,
  679. 0x03,
  680. LNKD,
  681. 0x00
  682. }
  683. })
  684. Name (AR04, Package (0x04)
  685. {
  686. Package (0x04)
  687. {
  688. 0xFFFF,
  689. 0x00,
  690. 0x00,
  691. 0x10
  692. },
  693.  
  694. Package (0x04)
  695. {
  696. 0xFFFF,
  697. 0x01,
  698. 0x00,
  699. 0x11
  700. },
  701.  
  702. Package (0x04)
  703. {
  704. 0xFFFF,
  705. 0x02,
  706. 0x00,
  707. 0x12
  708. },
  709.  
  710. Package (0x04)
  711. {
  712. 0xFFFF,
  713. 0x03,
  714. 0x00,
  715. 0x13
  716. }
  717. })
  718. Name (PR05, Package (0x04)
  719. {
  720. Package (0x04)
  721. {
  722. 0xFFFF,
  723. 0x00,
  724. LNKB,
  725. 0x00
  726. },
  727.  
  728. Package (0x04)
  729. {
  730. 0xFFFF,
  731. 0x01,
  732. LNKC,
  733. 0x00
  734. },
  735.  
  736. Package (0x04)
  737. {
  738. 0xFFFF,
  739. 0x02,
  740. LNKD,
  741. 0x00
  742. },
  743.  
  744. Package (0x04)
  745. {
  746. 0xFFFF,
  747. 0x03,
  748. LNKA,
  749. 0x00
  750. }
  751. })
  752. Name (AR05, Package (0x04)
  753. {
  754. Package (0x04)
  755. {
  756. 0xFFFF,
  757. 0x00,
  758. 0x00,
  759. 0x11
  760. },
  761.  
  762. Package (0x04)
  763. {
  764. 0xFFFF,
  765. 0x01,
  766. 0x00,
  767. 0x12
  768. },
  769.  
  770. Package (0x04)
  771. {
  772. 0xFFFF,
  773. 0x02,
  774. 0x00,
  775. 0x13
  776. },
  777.  
  778. Package (0x04)
  779. {
  780. 0xFFFF,
  781. 0x03,
  782. 0x00,
  783. 0x10
  784. }
  785. })
  786. Name (PR06, Package (0x04)
  787. {
  788. Package (0x04)
  789. {
  790. 0xFFFF,
  791. 0x00,
  792. LNKC,
  793. 0x00
  794. },
  795.  
  796. Package (0x04)
  797. {
  798. 0xFFFF,
  799. 0x01,
  800. LNKD,
  801. 0x00
  802. },
  803.  
  804. Package (0x04)
  805. {
  806. 0xFFFF,
  807. 0x02,
  808. LNKA,
  809. 0x00
  810. },
  811.  
  812. Package (0x04)
  813. {
  814. 0xFFFF,
  815. 0x03,
  816. LNKB,
  817. 0x00
  818. }
  819. })
  820. Name (AR06, Package (0x04)
  821. {
  822. Package (0x04)
  823. {
  824. 0xFFFF,
  825. 0x00,
  826. 0x00,
  827. 0x12
  828. },
  829.  
  830. Package (0x04)
  831. {
  832. 0xFFFF,
  833. 0x01,
  834. 0x00,
  835. 0x13
  836. },
  837.  
  838. Package (0x04)
  839. {
  840. 0xFFFF,
  841. 0x02,
  842. 0x00,
  843. 0x10
  844. },
  845.  
  846. Package (0x04)
  847. {
  848. 0xFFFF,
  849. 0x03,
  850. 0x00,
  851. 0x11
  852. }
  853. })
  854. Name (PR07, Package (0x04)
  855. {
  856. Package (0x04)
  857. {
  858. 0xFFFF,
  859. 0x00,
  860. LNKD,
  861. 0x00
  862. },
  863.  
  864. Package (0x04)
  865. {
  866. 0xFFFF,
  867. 0x01,
  868. LNKA,
  869. 0x00
  870. },
  871.  
  872. Package (0x04)
  873. {
  874. 0xFFFF,
  875. 0x02,
  876. LNKB,
  877. 0x00
  878. },
  879.  
  880. Package (0x04)
  881. {
  882. 0xFFFF,
  883. 0x03,
  884. LNKC,
  885. 0x00
  886. }
  887. })
  888. Name (AR07, Package (0x04)
  889. {
  890. Package (0x04)
  891. {
  892. 0xFFFF,
  893. 0x00,
  894. 0x00,
  895. 0x13
  896. },
  897.  
  898. Package (0x04)
  899. {
  900. 0xFFFF,
  901. 0x01,
  902. 0x00,
  903. 0x10
  904. },
  905.  
  906. Package (0x04)
  907. {
  908. 0xFFFF,
  909. 0x02,
  910. 0x00,
  911. 0x11
  912. },
  913.  
  914. Package (0x04)
  915. {
  916. 0xFFFF,
  917. 0x03,
  918. 0x00,
  919. 0x12
  920. }
  921. })
  922. Name (PR01, Package (0x05)
  923. {
  924. Package (0x04)
  925. {
  926. 0xFFFF,
  927. 0x00,
  928. LNKF,
  929. 0x00
  930. },
  931.  
  932. Package (0x04)
  933. {
  934. 0xFFFF,
  935. 0x01,
  936. LNKG,
  937. 0x00
  938. },
  939.  
  940. Package (0x04)
  941. {
  942. 0xFFFF,
  943. 0x02,
  944. LNKH,
  945. 0x00
  946. },
  947.  
  948. Package (0x04)
  949. {
  950. 0xFFFF,
  951. 0x03,
  952. LNKE,
  953. 0x00
  954. },
  955.  
  956. Package (0x04)
  957. {
  958. 0x0008FFFF,
  959. 0x00,
  960. LNKE,
  961. 0x00
  962. }
  963. })
  964. Name (AR01, Package (0x05)
  965. {
  966. Package (0x04)
  967. {
  968. 0xFFFF,
  969. 0x00,
  970. 0x00,
  971. 0x15
  972. },
  973.  
  974. Package (0x04)
  975. {
  976. 0xFFFF,
  977. 0x01,
  978. 0x00,
  979. 0x16
  980. },
  981.  
  982. Package (0x04)
  983. {
  984. 0xFFFF,
  985. 0x02,
  986. 0x00,
  987. 0x17
  988. },
  989.  
  990. Package (0x04)
  991. {
  992. 0xFFFF,
  993. 0x03,
  994. 0x00,
  995. 0x14
  996. },
  997.  
  998. Package (0x04)
  999. {
  1000. 0x0008FFFF,
  1001. 0x00,
  1002. 0x00,
  1003. 0x14
  1004. }
  1005. })
  1006. Device (PCI0)
  1007. {
  1008. OperationRegion (MPCE, PCI_Config, 0x48, 0x04)
  1009. Field (MPCE, DWordAcc, NoLock, Preserve)
  1010. {
  1011. PEXE, 1,
  1012. LENG, 2,
  1013. , 25,
  1014. EXBA, 4
  1015. }
  1016.  
  1017. Method (_INI, 0, NotSerialized) // _INI: Initialize
  1018. {
  1019. If (DTSE)
  1020. {
  1021. TRAP (0x47)
  1022. }
  1023.  
  1024. PEXE = 0x00
  1025. \_SB.OSHT ()
  1026. \_SB.SOST ()
  1027. \_SB.SECS (0xA8)
  1028. \_SB.SECS (0xAA)
  1029. \_SB.SECB (0xB9, 0x00)
  1030. P8XH (0x00, 0x0806)
  1031. }
  1032.  
  1033. Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID
  1034. Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID
  1035. Name (_ADR, 0x00) // _ADR: Address
  1036. Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
  1037. {
  1038. Local0 = Arg2
  1039. Local1 = (Local0 * 0x04)
  1040. Name (BUF1, Buffer (Local1){})
  1041. BUF1 = Arg3
  1042. Local1 = 0x00
  1043. Local2 = 0x00
  1044. While (Local0)
  1045. {
  1046. Local2 = (Local1 * 0x04)
  1047. CreateDWordField (BUF1, Local2, CAPB)
  1048. If (Arg2)
  1049. {
  1050. (CAPB & 0xFFFFFFFC)
  1051. (CAPB | 0x00)
  1052. }
  1053. Else
  1054. {
  1055. }
  1056.  
  1057. Local1++
  1058. Local0--
  1059. }
  1060.  
  1061. Return (BUF1) /* \_SB_.PCI0._OSC.BUF1 */
  1062. }
  1063.  
  1064. OperationRegion (REGS, PCI_Config, 0x40, 0xC0)
  1065. Field (REGS, ByteAcc, NoLock, Preserve)
  1066. {
  1067. Offset (0x50),
  1068. PAM0, 8,
  1069. PAM1, 8,
  1070. PAM2, 8,
  1071. PAM3, 8,
  1072. PAM4, 8,
  1073. PAM5, 8,
  1074. PAM6, 8,
  1075. , 7,
  1076. HEN, 1,
  1077. Offset (0x60),
  1078. TASM, 10,
  1079. Offset (0x62),
  1080. Offset (0x70),
  1081. Z000, 16
  1082. }
  1083.  
  1084. Name (RSRC, ResourceTemplate ()
  1085. {
  1086. WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
  1087. 0x0000, // Granularity
  1088. 0x0000, // Range Minimum
  1089. 0x003F, // Range Maximum
  1090. 0x0000, // Translation Offset
  1091. 0x0040, // Length
  1092. 0x00,, )
  1093. IO (Decode16,
  1094. 0x0CF8, // Range Minimum
  1095. 0x0CF8, // Range Maximum
  1096. 0x01, // Alignment
  1097. 0x08, // Length
  1098. )
  1099. DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
  1100. 0x00000000, // Granularity
  1101. 0x00000000, // Range Minimum
  1102. 0x00000CF7, // Range Maximum
  1103. 0x00000000, // Translation Offset
  1104. 0x00000CF8, // Length
  1105. 0x00,, , TypeStatic, DenseTranslation)
  1106. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  1107. 0x00000000, // Granularity
  1108. 0x000A0000, // Range Minimum
  1109. 0x000BFFFF, // Range Maximum
  1110. 0x00000000, // Translation Offset
  1111. 0x00020000, // Length
  1112. 0x00,, , AddressRangeMemory, TypeStatic)
  1113. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  1114. 0x00000000, // Granularity
  1115. 0x000C0000, // Range Minimum
  1116. 0x000C3FFF, // Range Maximum
  1117. 0x00000000, // Translation Offset
  1118. 0x00004000, // Length
  1119. 0x00,, _Y01, AddressRangeMemory, TypeStatic)
  1120. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  1121. 0x00000000, // Granularity
  1122. 0x000C4000, // Range Minimum
  1123. 0x000C7FFF, // Range Maximum
  1124. 0x00000000, // Translation Offset
  1125. 0x00004000, // Length
  1126. 0x00,, _Y02, AddressRangeMemory, TypeStatic)
  1127. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  1128. 0x00000000, // Granularity
  1129. 0x000C8000, // Range Minimum
  1130. 0x000CBFFF, // Range Maximum
  1131. 0x00000000, // Translation Offset
  1132. 0x00004000, // Length
  1133. 0x00,, _Y03, AddressRangeMemory, TypeStatic)
  1134. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  1135. 0x00000000, // Granularity
  1136. 0x000CC000, // Range Minimum
  1137. 0x000CFFFF, // Range Maximum
  1138. 0x00000000, // Translation Offset
  1139. 0x00004000, // Length
  1140. 0x00,, _Y04, AddressRangeMemory, TypeStatic)
  1141. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  1142. 0x00000000, // Granularity
  1143. 0x000D0000, // Range Minimum
  1144. 0x000D3FFF, // Range Maximum
  1145. 0x00000000, // Translation Offset
  1146. 0x00004000, // Length
  1147. 0x00,, _Y05, AddressRangeMemory, TypeStatic)
  1148. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  1149. 0x00000000, // Granularity
  1150. 0x000D4000, // Range Minimum
  1151. 0x000D7FFF, // Range Maximum
  1152. 0x00000000, // Translation Offset
  1153. 0x00004000, // Length
  1154. 0x00,, _Y06, AddressRangeMemory, TypeStatic)
  1155. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  1156. 0x00000000, // Granularity
  1157. 0x000D8000, // Range Minimum
  1158. 0x000DBFFF, // Range Maximum
  1159. 0x00000000, // Translation Offset
  1160. 0x00004000, // Length
  1161. 0x00,, _Y07, AddressRangeMemory, TypeStatic)
  1162. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  1163. 0x00000000, // Granularity
  1164. 0x000DC000, // Range Minimum
  1165. 0x000DFFFF, // Range Maximum
  1166. 0x00000000, // Translation Offset
  1167. 0x00004000, // Length
  1168. 0x00,, _Y08, AddressRangeMemory, TypeStatic)
  1169. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  1170. 0x00000000, // Granularity
  1171. 0x000E0000, // Range Minimum
  1172. 0x000E3FFF, // Range Maximum
  1173. 0x00000000, // Translation Offset
  1174. 0x00004000, // Length
  1175. 0x00,, _Y09, AddressRangeMemory, TypeStatic)
  1176. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  1177. 0x00000000, // Granularity
  1178. 0x000E4000, // Range Minimum
  1179. 0x000E7FFF, // Range Maximum
  1180. 0x00000000, // Translation Offset
  1181. 0x00004000, // Length
  1182. 0x00,, _Y0A, AddressRangeMemory, TypeStatic)
  1183. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  1184. 0x00000000, // Granularity
  1185. 0x000E8000, // Range Minimum
  1186. 0x000EBFFF, // Range Maximum
  1187. 0x00000000, // Translation Offset
  1188. 0x00004000, // Length
  1189. 0x00,, _Y0B, AddressRangeMemory, TypeStatic)
  1190. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  1191. 0x00000000, // Granularity
  1192. 0x000EC000, // Range Minimum
  1193. 0x000EFFFF, // Range Maximum
  1194. 0x00000000, // Translation Offset
  1195. 0x00004000, // Length
  1196. 0x00,, _Y0C, AddressRangeMemory, TypeStatic)
  1197. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  1198. 0x00000000, // Granularity
  1199. 0x000F0000, // Range Minimum
  1200. 0x000FFFFF, // Range Maximum
  1201. 0x00000000, // Translation Offset
  1202. 0x00010000, // Length
  1203. 0x00,, _Y0D, AddressRangeMemory, TypeStatic)
  1204. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  1205. 0x00000000, // Granularity
  1206. 0x00000000, // Range Minimum
  1207. 0x00000000, // Range Maximum
  1208. 0x00000000, // Translation Offset
  1209. 0x00000000, // Length
  1210. 0x00,, _Y00, AddressRangeMemory, TypeStatic)
  1211. DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
  1212. 0x00000000, // Granularity
  1213. 0x00000D00, // Range Minimum
  1214. 0x0000FDFF, // Range Maximum
  1215. 0x00000000, // Translation Offset
  1216. 0x0000F100, // Length
  1217. 0x00,, , TypeStatic, DenseTranslation)
  1218. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  1219. 0x00000000, // Granularity
  1220. 0x00000000, // Range Minimum
  1221. 0x00000000, // Range Maximum
  1222. 0x00000000, // Translation Offset
  1223. 0x00000000, // Length
  1224. 0x00,, , AddressRangeMemory, TypeStatic)
  1225. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  1226. 0x00000000, // Granularity
  1227. 0xFED40000, // Range Minimum
  1228. 0xFED44FFF, // Range Maximum
  1229. 0x00000000, // Translation Offset
  1230. 0x00000000, // Length
  1231. ,, _Y0E, AddressRangeMemory, TypeStatic)
  1232. })
  1233. Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
  1234. {
  1235. Local1 = Zero
  1236. CreateDWordField (RSRC, \_SB.PCI0._Y00._MIN, BTMN) // _MIN: Minimum Base Address
  1237. CreateDWordField (RSRC, \_SB.PCI0._Y00._MAX, BTMX) // _MAX: Maximum Base Address
  1238. CreateDWordField (RSRC, \_SB.PCI0._Y00._LEN, BTLN) // _LEN: Length
  1239. BTMN = ((Z000 & 0xFFF0) << 0x10)
  1240. BTLN = (0xF8000000 - BTMN) /* \_SB_.PCI0._CRS.BTMN */
  1241. BTMX = ((BTMN + BTLN) - 0x01)
  1242. CreateBitField (RSRC, \_SB.PCI0._Y01._RW, C0RW) // _RW_: Read-Write Status
  1243. CreateDWordField (RSRC, \_SB.PCI0._Y01._MIN, C0MN) // _MIN: Minimum Base Address
  1244. CreateDWordField (RSRC, \_SB.PCI0._Y01._MAX, C0MX) // _MAX: Maximum Base Address
  1245. CreateDWordField (RSRC, \_SB.PCI0._Y01._LEN, C0LN) // _LEN: Length
  1246. C0RW = One
  1247. If (((PAM1 & 0x03) == 0x01))
  1248. {
  1249. C0RW = Zero
  1250. }
  1251.  
  1252. C0LN = Zero
  1253. If (!(PAM1 & 0x03))
  1254. {
  1255. C0LN = 0x4000
  1256. }
  1257.  
  1258. CreateBitField (RSRC, \_SB.PCI0._Y02._RW, C4RW) // _RW_: Read-Write Status
  1259. CreateDWordField (RSRC, \_SB.PCI0._Y02._MIN, C4MN) // _MIN: Minimum Base Address
  1260. CreateDWordField (RSRC, \_SB.PCI0._Y02._MAX, C4MX) // _MAX: Maximum Base Address
  1261. CreateDWordField (RSRC, \_SB.PCI0._Y02._LEN, C4LN) // _LEN: Length
  1262. C4RW = One
  1263. If (((PAM1 & 0x30) == 0x10))
  1264. {
  1265. C4RW = Zero
  1266. }
  1267.  
  1268. C4LN = Zero
  1269. If (!(PAM1 & 0x30))
  1270. {
  1271. C4LN = 0x4000
  1272. }
  1273.  
  1274. CreateBitField (RSRC, \_SB.PCI0._Y03._RW, C8RW) // _RW_: Read-Write Status
  1275. CreateDWordField (RSRC, \_SB.PCI0._Y03._MIN, C8MN) // _MIN: Minimum Base Address
  1276. CreateDWordField (RSRC, \_SB.PCI0._Y03._MAX, C8MX) // _MAX: Maximum Base Address
  1277. CreateDWordField (RSRC, \_SB.PCI0._Y03._LEN, C8LN) // _LEN: Length
  1278. C8RW = One
  1279. If (((PAM2 & 0x03) == 0x01))
  1280. {
  1281. C8RW = Zero
  1282. }
  1283.  
  1284. C8LN = Zero
  1285. If (!(PAM2 & 0x03))
  1286. {
  1287. C8LN = 0x4000
  1288. }
  1289.  
  1290. CreateBitField (RSRC, \_SB.PCI0._Y04._RW, CCRW) // _RW_: Read-Write Status
  1291. CreateDWordField (RSRC, \_SB.PCI0._Y04._MIN, CCMN) // _MIN: Minimum Base Address
  1292. CreateDWordField (RSRC, \_SB.PCI0._Y04._MAX, CCMX) // _MAX: Maximum Base Address
  1293. CreateDWordField (RSRC, \_SB.PCI0._Y04._LEN, CCLN) // _LEN: Length
  1294. CCRW = One
  1295. If (((PAM2 & 0x30) == 0x10))
  1296. {
  1297. CCRW = Zero
  1298. }
  1299.  
  1300. CCLN = Zero
  1301. If (!(PAM2 & 0x30))
  1302. {
  1303. CCLN = 0x4000
  1304. }
  1305.  
  1306. CreateBitField (RSRC, \_SB.PCI0._Y05._RW, D0RW) // _RW_: Read-Write Status
  1307. CreateDWordField (RSRC, \_SB.PCI0._Y05._MIN, D0MN) // _MIN: Minimum Base Address
  1308. CreateDWordField (RSRC, \_SB.PCI0._Y05._MAX, D0MX) // _MAX: Maximum Base Address
  1309. CreateDWordField (RSRC, \_SB.PCI0._Y05._LEN, D0LN) // _LEN: Length
  1310. D0RW = One
  1311. If (((PAM3 & 0x03) == 0x01))
  1312. {
  1313. D0RW = Zero
  1314. }
  1315.  
  1316. D0LN = Zero
  1317. If (!(PAM3 & 0x03))
  1318. {
  1319. D0LN = 0x4000
  1320. }
  1321.  
  1322. CreateBitField (RSRC, \_SB.PCI0._Y06._RW, D4RW) // _RW_: Read-Write Status
  1323. CreateDWordField (RSRC, \_SB.PCI0._Y06._MIN, D4MN) // _MIN: Minimum Base Address
  1324. CreateDWordField (RSRC, \_SB.PCI0._Y06._MAX, D4MX) // _MAX: Maximum Base Address
  1325. CreateDWordField (RSRC, \_SB.PCI0._Y06._LEN, D4LN) // _LEN: Length
  1326. D4RW = One
  1327. If (((PAM3 & 0x30) == 0x10))
  1328. {
  1329. D4RW = Zero
  1330. }
  1331.  
  1332. D4LN = Zero
  1333. If (!(PAM3 & 0x30))
  1334. {
  1335. D4LN = 0x4000
  1336. }
  1337.  
  1338. CreateBitField (RSRC, \_SB.PCI0._Y07._RW, D8RW) // _RW_: Read-Write Status
  1339. CreateDWordField (RSRC, \_SB.PCI0._Y07._MIN, D8MN) // _MIN: Minimum Base Address
  1340. CreateDWordField (RSRC, \_SB.PCI0._Y07._MAX, D8MX) // _MAX: Maximum Base Address
  1341. CreateDWordField (RSRC, \_SB.PCI0._Y07._LEN, D8LN) // _LEN: Length
  1342. D8RW = One
  1343. If (((PAM4 & 0x03) == 0x01))
  1344. {
  1345. D8RW = Zero
  1346. }
  1347.  
  1348. D8LN = Zero
  1349. If (!(PAM4 & 0x03))
  1350. {
  1351. D8LN = 0x4000
  1352. }
  1353.  
  1354. CreateBitField (RSRC, \_SB.PCI0._Y08._RW, DCRW) // _RW_: Read-Write Status
  1355. CreateDWordField (RSRC, \_SB.PCI0._Y08._MIN, DCMN) // _MIN: Minimum Base Address
  1356. CreateDWordField (RSRC, \_SB.PCI0._Y08._MAX, DCMX) // _MAX: Maximum Base Address
  1357. CreateDWordField (RSRC, \_SB.PCI0._Y08._LEN, DCLN) // _LEN: Length
  1358. DCRW = One
  1359. If (((PAM4 & 0x30) == 0x10))
  1360. {
  1361. DCRW = Zero
  1362. }
  1363.  
  1364. DCLN = Zero
  1365. If (!(PAM4 & 0x30))
  1366. {
  1367. DCLN = 0x4000
  1368. }
  1369.  
  1370. CreateBitField (RSRC, \_SB.PCI0._Y09._RW, E0RW) // _RW_: Read-Write Status
  1371. CreateDWordField (RSRC, \_SB.PCI0._Y09._MIN, E0MN) // _MIN: Minimum Base Address
  1372. CreateDWordField (RSRC, \_SB.PCI0._Y09._MAX, E0MX) // _MAX: Maximum Base Address
  1373. CreateDWordField (RSRC, \_SB.PCI0._Y09._LEN, E0LN) // _LEN: Length
  1374. E0RW = One
  1375. If (((PAM5 & 0x03) == 0x01))
  1376. {
  1377. E0RW = Zero
  1378. }
  1379.  
  1380. E0LN = Zero
  1381. If (!(PAM5 & 0x03))
  1382. {
  1383. E0LN = 0x4000
  1384. }
  1385.  
  1386. CreateBitField (RSRC, \_SB.PCI0._Y0A._RW, E4RW) // _RW_: Read-Write Status
  1387. CreateDWordField (RSRC, \_SB.PCI0._Y0A._MIN, E4MN) // _MIN: Minimum Base Address
  1388. CreateDWordField (RSRC, \_SB.PCI0._Y0A._MAX, E4MX) // _MAX: Maximum Base Address
  1389. CreateDWordField (RSRC, \_SB.PCI0._Y0A._LEN, E4LN) // _LEN: Length
  1390. E4RW = One
  1391. If (((PAM5 & 0x30) == 0x10))
  1392. {
  1393. E4RW = Zero
  1394. }
  1395.  
  1396. E4LN = Zero
  1397. If (!(PAM5 & 0x30))
  1398. {
  1399. E4LN = 0x4000
  1400. }
  1401.  
  1402. CreateBitField (RSRC, \_SB.PCI0._Y0B._RW, E8RW) // _RW_: Read-Write Status
  1403. CreateDWordField (RSRC, \_SB.PCI0._Y0B._MIN, E8MN) // _MIN: Minimum Base Address
  1404. CreateDWordField (RSRC, \_SB.PCI0._Y0B._MAX, E8MX) // _MAX: Maximum Base Address
  1405. CreateDWordField (RSRC, \_SB.PCI0._Y0B._LEN, E8LN) // _LEN: Length
  1406. E8RW = One
  1407. If (((PAM6 & 0x03) == 0x01))
  1408. {
  1409. E8RW = Zero
  1410. }
  1411.  
  1412. E8LN = Zero
  1413. If (!(PAM6 & 0x03))
  1414. {
  1415. E8LN = 0x4000
  1416. }
  1417.  
  1418. CreateBitField (RSRC, \_SB.PCI0._Y0C._RW, ECRW) // _RW_: Read-Write Status
  1419. CreateDWordField (RSRC, \_SB.PCI0._Y0C._MIN, ECMN) // _MIN: Minimum Base Address
  1420. CreateDWordField (RSRC, \_SB.PCI0._Y0C._MAX, ECMX) // _MAX: Maximum Base Address
  1421. CreateDWordField (RSRC, \_SB.PCI0._Y0C._LEN, ECLN) // _LEN: Length
  1422. ECRW = One
  1423. If (((PAM6 & 0x30) == 0x10))
  1424. {
  1425. ECRW = Zero
  1426. }
  1427.  
  1428. ECLN = Zero
  1429. If (!(PAM6 & 0x30))
  1430. {
  1431. ECLN = 0x4000
  1432. }
  1433.  
  1434. CreateBitField (RSRC, \_SB.PCI0._Y0D._RW, F0RW) // _RW_: Read-Write Status
  1435. CreateDWordField (RSRC, \_SB.PCI0._Y0D._MIN, F0MN) // _MIN: Minimum Base Address
  1436. CreateDWordField (RSRC, \_SB.PCI0._Y0D._MAX, F0MX) // _MAX: Maximum Base Address
  1437. CreateDWordField (RSRC, \_SB.PCI0._Y0D._LEN, F0LN) // _LEN: Length
  1438. F0RW = One
  1439. If (((PAM0 & 0x30) == 0x10))
  1440. {
  1441. F0RW = Zero
  1442. }
  1443.  
  1444. F0LN = Zero
  1445. If (!(PAM0 & 0x30))
  1446. {
  1447. F0LN = 0x00010000
  1448. }
  1449.  
  1450. If (TPMP)
  1451. {
  1452. CreateDWordField (RSRC, \_SB.PCI0._Y0E._LEN, TPML) // _LEN: Length
  1453. TPML = 0x5000
  1454. }
  1455.  
  1456. Return (RSRC) /* \_SB_.PCI0.RSRC */
  1457. }
  1458.  
  1459. Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
  1460. {
  1461. Return (0x02)
  1462. }
  1463.  
  1464. Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
  1465. {
  1466. Return (0x02)
  1467. }
  1468.  
  1469. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  1470. {
  1471. If (PICF)
  1472. {
  1473. Return (AR00) /* \_SB_.AR00 */
  1474. }
  1475.  
  1476. Return (PR00) /* \_SB_.PR00 */
  1477. }
  1478.  
  1479. Device (IGD0)
  1480. {
  1481. Name (_ADR, 0x00020000) // _ADR: Address
  1482. OperationRegion (IGDP, PCI_Config, 0x40, 0xC0)
  1483. Field (IGDP, AnyAcc, NoLock, Preserve)
  1484. {
  1485. Offset (0x12),
  1486. , 1,
  1487. GIVD, 1,
  1488. , 2,
  1489. GUMA, 3,
  1490. Offset (0x14),
  1491. , 4,
  1492. GMFN, 1,
  1493. Offset (0x18),
  1494. SSRW, 32,
  1495. Offset (0xA4),
  1496. ASLE, 8,
  1497. Offset (0xA8),
  1498. GSSE, 1,
  1499. GSSB, 14,
  1500. GSES, 1,
  1501. Offset (0xB0),
  1502. Offset (0xB1),
  1503. CDVL, 5,
  1504. Offset (0xB2),
  1505. Offset (0xBC),
  1506. ASLS, 32
  1507. }
  1508.  
  1509. Method (_STA, 0, NotSerialized) // _STA: Status
  1510. {
  1511. If ((ASLS == 0xFEF00000))
  1512. {
  1513. Return (0x00)
  1514. }
  1515. Else
  1516. {
  1517. Return (0x0F)
  1518. }
  1519. }
  1520.  
  1521. OperationRegion (IGDM, SystemMemory, 0x7F5C0E7C, 0x00002040)
  1522. Field (IGDM, AnyAcc, NoLock, Preserve)
  1523. {
  1524. SIGN, 128,
  1525. SIZE, 32,
  1526. OVER, 32,
  1527. SVER, 256,
  1528. VVER, 128,
  1529. GVER, 128,
  1530. MBOX, 32,
  1531. Offset (0x100),
  1532. DRDY, 32,
  1533. CSTS, 32,
  1534. CEVT, 32,
  1535. Offset (0x120),
  1536. DIDL, 256,
  1537. CPDL, 256,
  1538. CADL, 256,
  1539. NADL, 256,
  1540. ASLP, 32,
  1541. TIDX, 32,
  1542. CHPD, 32,
  1543. CLID, 32,
  1544. CDCK, 32,
  1545. SXSW, 32,
  1546. EVTS, 32,
  1547. CNOT, 32,
  1548. NRDY, 32,
  1549. Offset (0x200),
  1550. SCIE, 1,
  1551. GEFC, 4,
  1552. GXFC, 3,
  1553. GESF, 8,
  1554. Offset (0x204),
  1555. PARM, 32,
  1556. DSLP, 32,
  1557. Offset (0x300),
  1558. ARDY, 32,
  1559. ASLC, 32,
  1560. TCHE, 32,
  1561. ALSI, 32,
  1562. BCLP, 32,
  1563. PFIT, 32,
  1564. Offset (0x400),
  1565. GVD1, 57344,
  1566. IBTT, 8,
  1567. IPAT, 8,
  1568. ITVF, 8,
  1569. ITVM, 8,
  1570. IPSC, 8,
  1571. IBLC, 8,
  1572. IBIA, 8,
  1573. ISSC, 8,
  1574. I409, 8,
  1575. I509, 8,
  1576. I609, 8,
  1577. I709, 8,
  1578. IDMM, 8,
  1579. IDMS, 8,
  1580. IF1E, 8,
  1581. GSMI, 8,
  1582. HVCO, 8,
  1583. LIDS, 8,
  1584. CGCS, 16
  1585. }
  1586.  
  1587. Name (DBTB, Package (0x11)
  1588. {
  1589. 0x00,
  1590. 0x01,
  1591. 0x02,
  1592. 0x03,
  1593. 0x04,
  1594. 0x05,
  1595. 0x06,
  1596. 0x07,
  1597. 0x08,
  1598. 0x09,
  1599. 0x0A,
  1600. 0x10,
  1601. 0x11,
  1602. 0x12,
  1603. 0x13,
  1604. 0x14,
  1605. 0xFF
  1606. })
  1607. Name (SUCC, 0x01)
  1608. Name (NVLD, 0x02)
  1609. Name (CRIT, 0x04)
  1610. Name (NCRT, 0x06)
  1611. Method (GBDA, 0, Serialized)
  1612. {
  1613. If ((GESF == 0x00))
  1614. {
  1615. PARM = 0x00
  1616. PARM |= (0x01 << 0x00)
  1617. PARM |= (0x01 << 0x03)
  1618. PARM |= (0x01 << 0x06)
  1619. GESF = Zero
  1620. Return (SUCC) /* \_SB_.PCI0.IGD0.SUCC */
  1621. }
  1622.  
  1623. If ((GESF == 0x01))
  1624. {
  1625. PARM = 0x00
  1626. GESF = Zero
  1627. Return (SUCC) /* \_SB_.PCI0.IGD0.SUCC */
  1628. }
  1629.  
  1630. If ((GESF == 0x04))
  1631. {
  1632. Name (LOOP, 0x00)
  1633. PARM &= 0xFFFFFF00
  1634. PARM |= DerefOf (DBTB [IBTT]) /* \_SB_.PCI0.IGD0.PARM */
  1635. GESF = Zero
  1636. Return (SUCC) /* \_SB_.PCI0.IGD0.SUCC */
  1637. }
  1638.  
  1639. If ((GESF == 0x05)){}
  1640. If ((GESF == 0x07))
  1641. {
  1642. PARM = GIVD /* \_SB_.PCI0.IGD0.GIVD */
  1643. PARM ^= 0x01
  1644. PARM |= (GMFN << 0x01)
  1645. PARM |= (0x02 << 0x0B)
  1646. If ((IDMM == 0x00))
  1647. {
  1648. PARM |= (IDMS << 0x0D)
  1649. }
  1650.  
  1651. If (((IDMM == 0x01) || (IDMM == 0x03)))
  1652. {
  1653. PARM |= (IDMS << 0x11)
  1654. }
  1655.  
  1656. PARM |= (CGCS << 0x15)
  1657. GESF = 0x01
  1658. Return (SUCC) /* \_SB_.PCI0.IGD0.SUCC */
  1659. }
  1660.  
  1661. If ((GESF == 0x0A)){}
  1662. GESF = Zero
  1663. Return (CRIT) /* \_SB_.PCI0.IGD0.CRIT */
  1664. }
  1665.  
  1666. Method (SBCB, 0, Serialized)
  1667. {
  1668. If ((GESF == 0x00))
  1669. {
  1670. PARM = 0x00
  1671. GESF = Zero
  1672. Return (SUCC) /* \_SB_.PCI0.IGD0.SUCC */
  1673. }
  1674.  
  1675. GESF = Zero
  1676. Return (SUCC) /* \_SB_.PCI0.IGD0.SUCC */
  1677. }
  1678.  
  1679. Method (OPRN, 0, Serialized)
  1680. {
  1681. If ((GEFC == 0x04))
  1682. {
  1683. GXFC = GBDA ()
  1684. }
  1685.  
  1686. If ((GEFC == 0x06))
  1687. {
  1688. GXFC = SBCB ()
  1689. }
  1690.  
  1691. SSRW = PARM /* \_SB_.PCI0.IGD0.PARM */
  1692. GEFC = 0x00
  1693. \_SB.PCI0.LPC0.SCIS = 0x01
  1694. GSSE = 0x00
  1695. SCIE = 0x00
  1696. Return (Zero)
  1697. }
  1698.  
  1699. Method (_DOS, 1, NotSerialized) // _DOS: Disable Output Switching
  1700. {
  1701. DSEN = (Arg0 & 0x03)
  1702. }
  1703.  
  1704. Method (_DOD, 0, NotSerialized) // _DOD: Display Output Devices
  1705. {
  1706. If ((NDID == 0x01))
  1707. {
  1708. Name (TMP1, Package (0x01)
  1709. {
  1710. 0xFFFFFFFF
  1711. })
  1712. TMP1 [0x00] = (0x00010000 | DID1)
  1713. Return (TMP1) /* \_SB_.PCI0.IGD0._DOD.TMP1 */
  1714. }
  1715.  
  1716. If ((NDID == 0x02))
  1717. {
  1718. Name (TMP2, Package (0x02)
  1719. {
  1720. 0xFFFFFFFF,
  1721. 0xFFFFFFFF
  1722. })
  1723. TMP2 [0x00] = (0x00010000 | DID1)
  1724. TMP2 [0x01] = (0x00010000 | DID2)
  1725. Return (TMP2) /* \_SB_.PCI0.IGD0._DOD.TMP2 */
  1726. }
  1727.  
  1728. If ((NDID == 0x03))
  1729. {
  1730. Name (TMP3, Package (0x03)
  1731. {
  1732. 0xFFFFFFFF,
  1733. 0xFFFFFFFF,
  1734. 0xFFFFFFFF
  1735. })
  1736. TMP3 [0x00] = (0x00010000 | DID1)
  1737. TMP3 [0x01] = (0x00010000 | DID2)
  1738. TMP3 [0x02] = (0x00010000 | DID3)
  1739. Return (TMP3) /* \_SB_.PCI0.IGD0._DOD.TMP3 */
  1740. }
  1741.  
  1742. If ((NDID == 0x04))
  1743. {
  1744. Name (TMP4, Package (0x04)
  1745. {
  1746. 0xFFFFFFFF,
  1747. 0xFFFFFFFF,
  1748. 0xFFFFFFFF,
  1749. 0xFFFFFFFF
  1750. })
  1751. TMP4 [0x00] = (0x00010000 | DID1)
  1752. TMP4 [0x01] = (0x00010000 | DID2)
  1753. TMP4 [0x02] = (0x00010000 | DID3)
  1754. TMP4 [0x03] = (0x00010000 | DID4)
  1755. Return (TMP4) /* \_SB_.PCI0.IGD0._DOD.TMP4 */
  1756. }
  1757.  
  1758. Name (TMP5, Package (0x05)
  1759. {
  1760. 0xFFFFFFFF,
  1761. 0xFFFFFFFF,
  1762. 0xFFFFFFFF,
  1763. 0xFFFFFFFF,
  1764. 0xFFFFFFFF
  1765. })
  1766. TMP5 [0x00] = (0x00010000 | DID1)
  1767. TMP5 [0x01] = (0x00010000 | DID2)
  1768. TMP5 [0x02] = (0x00010000 | DID3)
  1769. TMP5 [0x03] = (0x00010000 | DID4)
  1770. TMP5 [0x04] = (0x00010000 | DID5)
  1771. Return (TMP5) /* \_SB_.PCI0.IGD0._DOD.TMP5 */
  1772. }
  1773.  
  1774. Device (DD01)
  1775. {
  1776. Method (_ADR, 0, Serialized) // _ADR: Address
  1777. {
  1778. Return ((0xFFFF & DID1))
  1779. }
  1780.  
  1781. Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
  1782. {
  1783. TRAP (0x01)
  1784. If ((CSTE & 0x01))
  1785. {
  1786. Return (0x1F)
  1787. }
  1788.  
  1789. Return (0x1D)
  1790. }
  1791.  
  1792. Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
  1793. {
  1794. If ((NSTE & 0x01))
  1795. {
  1796. Return (0x01)
  1797. }
  1798.  
  1799. Return (0x00)
  1800. }
  1801.  
  1802. Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
  1803. {
  1804. If (((Arg0 & 0xC0000000) == 0xC0000000))
  1805. {
  1806. CSTE = NSTE /* \_SB_.NSTE */
  1807. }
  1808. }
  1809. }
  1810.  
  1811. Device (DD02)
  1812. {
  1813. Method (_ADR, 0, Serialized) // _ADR: Address
  1814. {
  1815. Return ((0xFFFF & DID2))
  1816. }
  1817.  
  1818. Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
  1819. {
  1820. TRAP (0x01)
  1821. If ((CSTE & 0x02))
  1822. {
  1823. Return (0x1F)
  1824. }
  1825.  
  1826. Return (0x1D)
  1827. }
  1828.  
  1829. Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
  1830. {
  1831. If ((NSTE & 0x02))
  1832. {
  1833. Return (0x01)
  1834. }
  1835.  
  1836. Return (0x00)
  1837. }
  1838.  
  1839. Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
  1840. {
  1841. If (((Arg0 & 0xC0000000) == 0xC0000000))
  1842. {
  1843. CSTE = NSTE /* \_SB_.NSTE */
  1844. }
  1845. }
  1846. }
  1847.  
  1848. Device (DD03)
  1849. {
  1850. Method (_ADR, 0, Serialized) // _ADR: Address
  1851. {
  1852. Return ((0xFFFF & DID3))
  1853. }
  1854.  
  1855. Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
  1856. {
  1857. TRAP (0x01)
  1858. If ((CSTE & 0x04))
  1859. {
  1860. Return (0x1F)
  1861. }
  1862.  
  1863. Return (0x1D)
  1864. }
  1865.  
  1866. Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
  1867. {
  1868. If ((NSTE & 0x04))
  1869. {
  1870. Return (0x01)
  1871. }
  1872.  
  1873. Return (0x00)
  1874. }
  1875.  
  1876. Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
  1877. {
  1878. If (((Arg0 & 0xC0000000) == 0xC0000000))
  1879. {
  1880. CSTE = NSTE /* \_SB_.NSTE */
  1881. }
  1882. }
  1883. }
  1884.  
  1885. Device (DD04)
  1886. {
  1887. Method (_ADR, 0, Serialized) // _ADR: Address
  1888. {
  1889. Return ((0xFFFF & DID4))
  1890. }
  1891.  
  1892. Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
  1893. {
  1894. TRAP (0x01)
  1895. If ((CSTE & 0x08))
  1896. {
  1897. Return (0x1F)
  1898. }
  1899.  
  1900. Return (0x1D)
  1901. }
  1902.  
  1903. Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
  1904. {
  1905. If ((NSTE & 0x08))
  1906. {
  1907. Return (0x01)
  1908. }
  1909.  
  1910. Return (0x00)
  1911. }
  1912.  
  1913. Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
  1914. {
  1915. If (((Arg0 & 0xC0000000) == 0xC0000000))
  1916. {
  1917. CSTE = NSTE /* \_SB_.NSTE */
  1918. }
  1919. }
  1920.  
  1921. Method (_BCL, 0, NotSerialized) // _BCL: Brightness Control Levels
  1922. {
  1923. VDRV |= 0x01
  1924. Return (Package (0x08)
  1925. {
  1926. 0x64,
  1927. 0x05,
  1928. 0x0F,
  1929. 0x18,
  1930. 0x1E,
  1931. 0x2D,
  1932. 0x3C,
  1933. 0x50
  1934. })
  1935. }
  1936.  
  1937. Method (_BCM, 1, NotSerialized) // _BCM: Brightness Control Method
  1938. {
  1939. Divide (Arg0, 0x0A, Local0, Local1)
  1940. If ((Local0 == 0x00))
  1941. {
  1942. BRTW (Arg0)
  1943. }
  1944. }
  1945.  
  1946. Method (_BQC, 0, NotSerialized) // _BQC: Brightness Query Current
  1947. {
  1948. Divide (BRTL, 0x0A, Local0, Local1)
  1949. If ((Local0 == 0x00))
  1950. {
  1951. Return (BRTL) /* \_SB_.BRTL */
  1952. }
  1953. }
  1954. }
  1955.  
  1956. Device (DD05)
  1957. {
  1958. Method (_ADR, 0, Serialized) // _ADR: Address
  1959. {
  1960. Return ((0xFFFF & DID5))
  1961. }
  1962.  
  1963. Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
  1964. {
  1965. TRAP (0x01)
  1966. If ((CSTE & 0x10))
  1967. {
  1968. Return (0x1F)
  1969. }
  1970.  
  1971. Return (0x1D)
  1972. }
  1973.  
  1974. Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
  1975. {
  1976. If ((NSTE & 0x10))
  1977. {
  1978. Return (0x01)
  1979. }
  1980.  
  1981. Return (0x00)
  1982. }
  1983.  
  1984. Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
  1985. {
  1986. If (((Arg0 & 0xC0000000) == 0xC0000000))
  1987. {
  1988. CSTE = NSTE /* \_SB_.NSTE */
  1989. }
  1990. }
  1991. }
  1992.  
  1993. Method (BRTN, 1, Serialized)
  1994. {
  1995. If (((DID1 & 0x0F00) == 0x0400))
  1996. {
  1997. Notify (\_SB.PCI0.IGD0.DD01, Arg0)
  1998. }
  1999.  
  2000. If (((DID2 & 0x0F00) == 0x0400))
  2001. {
  2002. Notify (\_SB.PCI0.IGD0.DD02, Arg0)
  2003. }
  2004.  
  2005. If (((DID3 & 0x0F00) == 0x0400))
  2006. {
  2007. Notify (\_SB.PCI0.IGD0.DD03, Arg0)
  2008. }
  2009.  
  2010. If (((DID4 & 0x0F00) == 0x0400))
  2011. {
  2012. Notify (\_SB.PCI0.IGD0.DD04, Arg0)
  2013. }
  2014.  
  2015. If (((DID5 & 0x0F00) == 0x0400))
  2016. {
  2017. Notify (\_SB.PCI0.IGD0.DD05, Arg0)
  2018. }
  2019. }
  2020. }
  2021.  
  2022. Device (EXP1)
  2023. {
  2024. Name (_ADR, 0x001C0000) // _ADR: Address
  2025. OperationRegion (P1CS, PCI_Config, 0x40, 0x0100)
  2026. Field (P1CS, AnyAcc, NoLock, WriteAsZeros)
  2027. {
  2028. Offset (0x1A),
  2029. ABP1, 1,
  2030. , 2,
  2031. PDC1, 1,
  2032. , 2,
  2033. PDS1, 1,
  2034. Offset (0x20),
  2035. Offset (0x22),
  2036. PSP1, 1,
  2037. Offset (0x9C),
  2038. , 30,
  2039. HPCS, 1,
  2040. PMCS, 1
  2041. }
  2042.  
  2043. Device (PXS1)
  2044. {
  2045. Name (_ADR, 0x00) // _ADR: Address
  2046. OperationRegion (X1CS, PCI_Config, 0x00, 0x0100)
  2047. Field (X1CS, AnyAcc, NoLock, WriteAsZeros)
  2048. {
  2049. X1DV, 32
  2050. }
  2051.  
  2052. Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
  2053. {
  2054. Return (0x00)
  2055. }
  2056. }
  2057.  
  2058. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  2059. {
  2060. 0x09,
  2061. 0x04
  2062. })
  2063. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  2064. {
  2065. If (PICF)
  2066. {
  2067. Return (AR04) /* \_SB_.AR04 */
  2068. }
  2069.  
  2070. Return (PR04) /* \_SB_.PR04 */
  2071. }
  2072. }
  2073.  
  2074. Device (EXP2)
  2075. {
  2076. Name (_ADR, 0x001C0001) // _ADR: Address
  2077. OperationRegion (P2CS, PCI_Config, 0x40, 0x0100)
  2078. Field (P2CS, AnyAcc, NoLock, WriteAsZeros)
  2079. {
  2080. Offset (0x1A),
  2081. ABP2, 1,
  2082. , 2,
  2083. PDC2, 1,
  2084. , 2,
  2085. PDS2, 1,
  2086. Offset (0x20),
  2087. Offset (0x22),
  2088. PSP2, 1,
  2089. Offset (0x9C),
  2090. , 30,
  2091. HPCS, 1,
  2092. PMCS, 1
  2093. }
  2094.  
  2095. Device (PXS2)
  2096. {
  2097. Name (_ADR, 0x00) // _ADR: Address
  2098. OperationRegion (X2CS, PCI_Config, 0x00, 0x0100)
  2099. Field (X2CS, AnyAcc, NoLock, WriteAsZeros)
  2100. {
  2101. X2DV, 32
  2102. }
  2103.  
  2104. Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
  2105. {
  2106. Return (0x00)
  2107. }
  2108. }
  2109.  
  2110. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  2111. {
  2112. 0x09,
  2113. 0x04
  2114. })
  2115. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  2116. {
  2117. If (PICF)
  2118. {
  2119. Return (AR05) /* \_SB_.AR05 */
  2120. }
  2121.  
  2122. Return (PR05) /* \_SB_.PR05 */
  2123. }
  2124. }
  2125.  
  2126. Device (EXP3)
  2127. {
  2128. Name (_ADR, 0x001C0002) // _ADR: Address
  2129. OperationRegion (P3CS, PCI_Config, 0x40, 0x0100)
  2130. Field (P3CS, AnyAcc, NoLock, WriteAsZeros)
  2131. {
  2132. Offset (0x1A),
  2133. ABP3, 1,
  2134. , 2,
  2135. PDC3, 1,
  2136. , 2,
  2137. PDS3, 1,
  2138. Offset (0x20),
  2139. Offset (0x22),
  2140. PSP3, 1,
  2141. Offset (0x9C),
  2142. , 30,
  2143. HPCS, 1,
  2144. PMCS, 1
  2145. }
  2146.  
  2147. Device (PXS3)
  2148. {
  2149. Name (_ADR, 0x00) // _ADR: Address
  2150. OperationRegion (X3CS, PCI_Config, 0x00, 0x0100)
  2151. Field (X3CS, AnyAcc, NoLock, WriteAsZeros)
  2152. {
  2153. X3DV, 32
  2154. }
  2155.  
  2156. Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
  2157. {
  2158. Return (0x00)
  2159. }
  2160. }
  2161.  
  2162. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  2163. {
  2164. 0x09,
  2165. 0x04
  2166. })
  2167. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  2168. {
  2169. If (PICF)
  2170. {
  2171. Return (AR06) /* \_SB_.AR06 */
  2172. }
  2173.  
  2174. Return (PR06) /* \_SB_.PR06 */
  2175. }
  2176. }
  2177.  
  2178. Device (EXP4)
  2179. {
  2180. Name (_ADR, 0x001C0003) // _ADR: Address
  2181. OperationRegion (P4CS, PCI_Config, 0x40, 0x0100)
  2182. Field (P4CS, AnyAcc, NoLock, WriteAsZeros)
  2183. {
  2184. Offset (0x1A),
  2185. ABP4, 1,
  2186. , 2,
  2187. PDC4, 1,
  2188. , 2,
  2189. PDS4, 1,
  2190. Offset (0x20),
  2191. Offset (0x22),
  2192. PSP4, 1,
  2193. Offset (0x9C),
  2194. , 30,
  2195. HPCS, 1,
  2196. PMCS, 1
  2197. }
  2198.  
  2199. Device (PXS4)
  2200. {
  2201. Name (_ADR, 0x00) // _ADR: Address
  2202. OperationRegion (X4CS, PCI_Config, 0x00, 0x0100)
  2203. Field (X4CS, AnyAcc, NoLock, WriteAsZeros)
  2204. {
  2205. X4DV, 32
  2206. }
  2207.  
  2208. Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
  2209. {
  2210. Return (0x00)
  2211. }
  2212. }
  2213.  
  2214. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  2215. {
  2216. 0x09,
  2217. 0x04
  2218. })
  2219. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  2220. {
  2221. If (PICF)
  2222. {
  2223. Return (AR07) /* \_SB_.AR07 */
  2224. }
  2225.  
  2226. Return (PR07) /* \_SB_.PR07 */
  2227. }
  2228. }
  2229.  
  2230. Device (PCIB)
  2231. {
  2232. Name (_ADR, 0x001E0000) // _ADR: Address
  2233. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  2234. {
  2235. 0x0B,
  2236. 0x03
  2237. })
  2238. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  2239. {
  2240. If (PICF)
  2241. {
  2242. Return (AR01) /* \_SB_.AR01 */
  2243. }
  2244.  
  2245. Return (PR01) /* \_SB_.PR01 */
  2246. }
  2247. }
  2248.  
  2249. Device (LPC0)
  2250. {
  2251. Name (_ADR, 0x001F0000) // _ADR: Address
  2252. Name (DVEN, 0x00)
  2253. OperationRegion (TCOI, SystemIO, 0x1060, 0x08)
  2254. Field (TCOI, WordAcc, NoLock, Preserve)
  2255. {
  2256. Offset (0x04),
  2257. , 9,
  2258. SCIS, 1,
  2259. Offset (0x06)
  2260. }
  2261.  
  2262. Device (H_EC)
  2263. {
  2264. Name (_HID, EisaId ("PNP0C09") /* Embedded Controller Device */) // _HID: Hardware ID
  2265. Name (_UID, 0x01) // _UID: Unique ID
  2266. Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
  2267. {
  2268. Name (BFFR, ResourceTemplate ()
  2269. {
  2270. IO (Decode16,
  2271. 0x0062, // Range Minimum
  2272. 0x0062, // Range Maximum
  2273. 0x00, // Alignment
  2274. 0x01, // Length
  2275. )
  2276. IO (Decode16,
  2277. 0x0066, // Range Minimum
  2278. 0x0066, // Range Maximum
  2279. 0x00, // Alignment
  2280. 0x01, // Length
  2281. )
  2282. })
  2283. Return (BFFR) /* \_SB_.PCI0.LPC0.H_EC._CRS.BFFR */
  2284. }
  2285.  
  2286. OperationRegion (ECR, EmbeddedControl, 0x00, 0xFF)
  2287. Field (ECR, ByteAcc, Lock, Preserve)
  2288. {
  2289. Offset (0x18),
  2290. SPTR, 8,
  2291. SSTS, 8,
  2292. SADR, 8,
  2293. SCMD, 8,
  2294. SBFR, 256,
  2295. SCNT, 8,
  2296. Offset (0x80),
  2297. B1EX, 1,
  2298. , 1,
  2299. ACEX, 1,
  2300. Offset (0x81),
  2301. SWBE, 1,
  2302. DCBE, 1,
  2303. Offset (0x82),
  2304. WLST, 1,
  2305. Offset (0x83),
  2306. LIDS, 1,
  2307. Offset (0x84),
  2308. B1ST, 8,
  2309. Offset (0x86),
  2310. BRIT, 8,
  2311. Offset (0xA0),
  2312. B1RP, 16,
  2313. B1RA, 16,
  2314. B1PR, 16,
  2315. B1VO, 16,
  2316. Offset (0xB0),
  2317. B1DA, 16,
  2318. B1DF, 16,
  2319. B1DV, 16,
  2320. B1DL, 16,
  2321. Offset (0xC0),
  2322. CTMP, 8,
  2323. Offset (0xC7),
  2324. TIST, 8,
  2325. Offset (0xD0),
  2326. B1TI, 16,
  2327. B1SE, 16,
  2328. B1CR, 16,
  2329. B1TM, 16
  2330. }
  2331.  
  2332. Device (BAT1)
  2333. {
  2334. Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */) // _HID: Hardware ID
  2335. Name (_UID, 0x01) // _UID: Unique ID
  2336. Name (BATI, Package (0x0D)
  2337. {
  2338. 0x01,
  2339. 0xFFFFFFFF,
  2340. 0xFFFFFFFF,
  2341. 0x01,
  2342. 0xFFFFFFFF,
  2343. 0x03,
  2344. 0x0A,
  2345. 0x01,
  2346. 0x01,
  2347. "Unknown",
  2348. "Unknown",
  2349. "Unknown",
  2350. "Unknown"
  2351. })
  2352. Method (_BIF, 0, NotSerialized) // _BIF: Battery Information
  2353. {
  2354. If ((\ECON == 0x00))
  2355. {
  2356. Local0 = \_SB.SECW (0x82, 0xB0, 0x00)
  2357. If ((Local0 == 0xFFFF))
  2358. {
  2359. BATI [0x01] = 0xFFFFFFFF
  2360. }
  2361. Else
  2362. {
  2363. BATI [0x01] = Local0
  2364. }
  2365.  
  2366. Local0 = \_SB.SECW (0x82, 0xB2, 0x00)
  2367. If ((Local0 == 0xFFFF))
  2368. {
  2369. BATI [0x02] = 0xFFFFFFFF
  2370. }
  2371. Else
  2372. {
  2373. BATI [0x02] = Local0
  2374. }
  2375.  
  2376. Local0 = \_SB.SECW (0x82, 0xB4, 0x00)
  2377. If ((Local0 == 0xFFFF))
  2378. {
  2379. BATI [0x04] = 0xFFFFFFFF
  2380. }
  2381. Else
  2382. {
  2383. BATI [0x04] = Local0
  2384. }
  2385.  
  2386. BATI [0x05] = 0x00
  2387. Local0 = \_SB.SECW (0x82, 0xB6, 0x00)
  2388. If ((Local0 == 0xFFFF))
  2389. {
  2390. BATI [0x06] = Zero
  2391. }
  2392. Else
  2393. {
  2394. BATI [0x06] = Local0
  2395. }
  2396. }
  2397. Else
  2398. {
  2399. Local0 = \_SB.PCI0.LPC0.H_EC.B1DA
  2400. Local1 = (Local0 << 0x08)
  2401. Local1 &= 0xFF00
  2402. Local0 >>= 0x08
  2403. Local0 |= Local1
  2404. If ((Local0 == 0xFFFF))
  2405. {
  2406. BATI [0x01] = 0xFFFFFFFF
  2407. }
  2408. Else
  2409. {
  2410. BATI [0x01] = Local0
  2411. }
  2412.  
  2413. Local0 = \_SB.PCI0.LPC0.H_EC.B1DF
  2414. Local1 = (Local0 << 0x08)
  2415. Local1 &= 0xFF00
  2416. Local0 >>= 0x08
  2417. Local0 |= Local1
  2418. If ((Local0 == 0xFFFF))
  2419. {
  2420. BATI [0x02] = 0xFFFFFFFF
  2421. }
  2422. Else
  2423. {
  2424. BATI [0x02] = Local0
  2425. }
  2426.  
  2427. Local0 = \_SB.PCI0.LPC0.H_EC.B1DV
  2428. Local1 = (Local0 << 0x08)
  2429. Local1 &= 0xFF00
  2430. Local0 >>= 0x08
  2431. Local0 |= Local1
  2432. If ((Local0 == 0xFFFF))
  2433. {
  2434. BATI [0x04] = 0xFFFFFFFF
  2435. }
  2436. Else
  2437. {
  2438. BATI [0x04] = Local0
  2439. }
  2440.  
  2441. BATI [0x05] = 0x00
  2442. Local0 = \_SB.PCI0.LPC0.H_EC.B1DL
  2443. Local1 = (Local0 << 0x08)
  2444. Local1 &= 0xFF00
  2445. Local0 >>= 0x08
  2446. Local0 |= Local1
  2447. If ((Local0 == 0xFFFF))
  2448. {
  2449. BATI [0x06] = 0xFFFFFFFF
  2450. }
  2451. Else
  2452. {
  2453. BATI [0x06] = Local0
  2454. }
  2455. }
  2456.  
  2457. BATI [0x09] = ""
  2458. BATI [0x0A] = ""
  2459. BATI [0x0B] = "LION"
  2460. BATI [0x0C] = "SAMSUNG Electronics"
  2461. Return (BATI) /* \_SB_.PCI0.LPC0.H_EC.BAT1.BATI */
  2462. }
  2463.  
  2464. Name (STAT, Package (0x04)
  2465. {
  2466. 0x00,
  2467. 0x00,
  2468. 0x00,
  2469. 0x00
  2470. })
  2471. Method (_BST, 0, NotSerialized) // _BST: Battery Status
  2472. {
  2473. If ((\ECON == 0x00))
  2474. {
  2475. Local0 = \_SB.SECB (0x81, 0x84)
  2476. If (((Local0 != 0x00) && (Local0 != 0x05)))
  2477. {
  2478. If ((\PWRS == 0x01))
  2479. {
  2480. Local0 = 0x02
  2481. }
  2482. Else
  2483. {
  2484. Local0 = 0x01
  2485. }
  2486. }
  2487.  
  2488. STAT [0x00] = Local0
  2489. Local0 = \_SB.SECW (0x82, 0xA4, 0x00)
  2490. If ((Local0 == 0xFFFF))
  2491. {
  2492. STAT [0x01] = 0xFFFFFFFF
  2493. }
  2494. Else
  2495. {
  2496. If ((Local0 >= 0x8000))
  2497. {
  2498. Local0 ^= 0xFFFF
  2499. Local0++
  2500. }
  2501.  
  2502. STAT [0x01] = Local0
  2503. }
  2504.  
  2505. Local0 = \_SB.SECW (0x82, 0xA2, 0x00)
  2506. If ((Local0 == 0xFFFF))
  2507. {
  2508. STAT [0x02] = 0xFFFFFFFF
  2509. }
  2510. Else
  2511. {
  2512. STAT [0x02] = Local0
  2513. }
  2514.  
  2515. Local0 = \_SB.SECW (0x82, 0xA6, 0x00)
  2516. If ((Local0 == 0xFFFF))
  2517. {
  2518. STAT [0x03] = 0xFFFFFFFF
  2519. }
  2520. Else
  2521. {
  2522. STAT [0x03] = Local0
  2523. }
  2524. }
  2525. Else
  2526. {
  2527. Local0 = \_SB.PCI0.LPC0.H_EC.B1ST
  2528. If (((Local0 != 0x00) && (Local0 != 0x05)))
  2529. {
  2530. If ((\PWRS == 0x01))
  2531. {
  2532. Local0 = 0x02
  2533. }
  2534. Else
  2535. {
  2536. Local0 = 0x01
  2537. }
  2538. }
  2539.  
  2540. STAT [0x00] = Local0
  2541. Local0 = \_SB.PCI0.LPC0.H_EC.B1PR
  2542. Local1 = (Local0 << 0x08)
  2543. Local1 &= 0xFF00
  2544. Local0 >>= 0x08
  2545. Local0 |= Local1
  2546. If ((Local0 == 0xFFFF))
  2547. {
  2548. STAT [0x01] = 0xFFFFFFFF
  2549. }
  2550. Else
  2551. {
  2552. If ((Local0 >= 0x8000))
  2553. {
  2554. Local0 ^= 0xFFFF
  2555. Local0++
  2556. }
  2557.  
  2558. STAT [0x01] = Local0
  2559. }
  2560.  
  2561. Local0 = \_SB.PCI0.LPC0.H_EC.B1RA
  2562. Local1 = (Local0 << 0x08)
  2563. Local1 &= 0xFF00
  2564. Local0 >>= 0x08
  2565. Local0 |= Local1
  2566. If ((Local0 == 0xFFFF))
  2567. {
  2568. STAT [0x02] = 0xFFFFFFFF
  2569. }
  2570. Else
  2571. {
  2572. STAT [0x02] = Local0
  2573. }
  2574.  
  2575. Local0 = \_SB.PCI0.LPC0.H_EC.B1VO
  2576. Local1 = (Local0 << 0x08)
  2577. Local1 &= 0xFF00
  2578. Local0 >>= 0x08
  2579. Local0 |= Local1
  2580. If ((Local0 == 0xFFFF))
  2581. {
  2582. STAT [0x03] = 0xFFFFFFFF
  2583. }
  2584. Else
  2585. {
  2586. STAT [0x03] = Local0
  2587. }
  2588. }
  2589.  
  2590. Return (STAT) /* \_SB_.PCI0.LPC0.H_EC.BAT1.STAT */
  2591. }
  2592.  
  2593. Method (_STA, 0, NotSerialized) // _STA: Status
  2594. {
  2595. If ((\ECON == 0x00))
  2596. {
  2597. If ((\_SB.SECB (0x85, 0x00) == 0x01))
  2598. {
  2599. Local0 = 0x1F
  2600. }
  2601. Else
  2602. {
  2603. Local0 = 0x0F
  2604. }
  2605. }
  2606. ElseIf ((\_SB.PCI0.LPC0.H_EC.B1EX == 0x01))
  2607. {
  2608. Local0 = 0x1F
  2609. }
  2610. Else
  2611. {
  2612. Local0 = 0x0F
  2613. }
  2614.  
  2615. Return (Local0)
  2616. }
  2617.  
  2618. Method (_PCL, 0, NotSerialized) // _PCL: Power Consumer List
  2619. {
  2620. Return (\_SB)
  2621. }
  2622. }
  2623.  
  2624. Method (_REG, 2, NotSerialized) // _REG: Region Availability
  2625. {
  2626. If (((Arg0 == 0x03) && (Arg1 == 0x01)))
  2627. {
  2628. ECON = 0x01
  2629. \PWRS = \_SB.PCI0.LPC0.H_EC.ACEX
  2630. If ((LIDS != \LIDS))
  2631. {
  2632. \LIDS = 0x01
  2633. LSDS (LIDS)
  2634. Notify (\_SB.LID0, 0x80) // Status Change
  2635. }
  2636. }
  2637. }
  2638.  
  2639. Name (_GPE, 0x11) // _GPE: General Purpose Events
  2640. Method (_Q51, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2641. {
  2642. P8XH (0x00, 0x30)
  2643. Notify (\_SB.ADP1, 0x80) // Status Change
  2644. PWRS = 0x01
  2645. TRAP (0x2B)
  2646. PNOT ()
  2647. If ((\_SB.BMLF != 0x01))
  2648. {
  2649. If (((\_SB.OSYS < 0x07D6) || (\_SB.VDRV == 0x00)))
  2650. {
  2651. \_SB.SECS (0xA7)
  2652. }
  2653. }
  2654. }
  2655.  
  2656. Method (_Q52, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2657. {
  2658. P8XH (0x00, 0x31)
  2659. Notify (\_SB.ADP1, 0x80) // Status Change
  2660. PWRS = 0x00
  2661. TRAP (0x2B)
  2662. PNOT ()
  2663. If ((\_SB.BMLF != 0x01))
  2664. {
  2665. If (((\_SB.OSYS < 0x07D6) || (\_SB.VDRV == 0x00)))
  2666. {
  2667. \_SB.SECS (0xA7)
  2668. }
  2669. }
  2670. }
  2671.  
  2672. Method (_Q53, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2673. {
  2674. P8XH (0x00, 0x33)
  2675. Notify (\_SB.PCI0.LPC0.H_EC.BAT1, 0x80) // Status Change
  2676. Notify (\_SB.PCI0.LPC0.H_EC.BAT1, 0x81) // Information Change
  2677. PNOT ()
  2678. }
  2679.  
  2680. Method (_Q54, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2681. {
  2682. P8XH (0x00, 0x33)
  2683. Notify (\_SB.PCI0.LPC0.H_EC.BAT1, 0x80) // Status Change
  2684. Notify (\_SB.PCI0.LPC0.H_EC.BAT1, 0x81) // Information Change
  2685. PNOT ()
  2686. }
  2687.  
  2688. Method (_Q5B, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2689. {
  2690. Notify (\_SB.SLPB, 0x80) // Status Change
  2691. }
  2692.  
  2693. Method (_Q5D, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2694. {
  2695. If (\IGDS)
  2696. {
  2697. TLST = 0x02
  2698. }
  2699.  
  2700. HKDS (0x0A)
  2701. }
  2702.  
  2703. Method (_Q5E, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2704. {
  2705. \LIDS = LIDS /* \_SB_.PCI0.LPC0.H_EC.LIDS */
  2706. Notify (\_SB.LID0, 0x80) // Status Change
  2707. }
  2708.  
  2709. Method (_Q5F, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2710. {
  2711. \LIDS = LIDS /* \_SB_.PCI0.LPC0.H_EC.LIDS */
  2712. Notify (\_SB.LID0, 0x80) // Status Change
  2713. }
  2714.  
  2715. Method (_Q60, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2716. {
  2717. If ((B1EX == 0x01))
  2718. {
  2719. Notify (\_SB.PCI0.LPC0.H_EC.BAT1, 0x80) // Status Change
  2720. }
  2721. }
  2722.  
  2723. Method (_Q61, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2724. {
  2725. If ((B1EX == 0x01))
  2726. {
  2727. Notify (\_SB.PCI0.LPC0.H_EC.BAT1, 0x80) // Status Change
  2728. }
  2729. }
  2730.  
  2731. Method (_Q63, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2732. {
  2733. \_SB.SECS (0x88)
  2734. If ((OSYS >= 0x07D6))
  2735. {
  2736. \_SB.PCI0.IGD0.BRTN (0x87)
  2737. }
  2738. }
  2739.  
  2740. Method (_Q64, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2741. {
  2742. \_SB.SECS (0x89)
  2743. If ((OSYS >= 0x07D6))
  2744. {
  2745. \_SB.PCI0.IGD0.BRTN (0x86)
  2746. }
  2747. }
  2748.  
  2749. Method (_Q65, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2750. {
  2751. Notify (\_TZ.TZ00, 0x80) // Thermal Status Change
  2752. \_SB.SECS (0xA9)
  2753. }
  2754.  
  2755. Method (_Q66, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2756. {
  2757. If ((B1EX == 0x01))
  2758. {
  2759. Notify (\_SB.PCI0.LPC0.H_EC.BAT1, 0x80) // Status Change
  2760. }
  2761. }
  2762.  
  2763. Method (_Q68, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2764. {
  2765. \_SB.SECS (0x8A)
  2766. }
  2767.  
  2768. Method (_Q69, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2769. {
  2770. \_SB.SECS (0x8B)
  2771. }
  2772.  
  2773. Method (_Q70, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2774. {
  2775. \_SB.SECS (0xAB)
  2776. PNOT ()
  2777. }
  2778.  
  2779. Method (_Q73, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2780. {
  2781. \_SB.GSSR = 0x01
  2782. If ((TIST <= 0x02))
  2783. {
  2784. Local0 = TIST /* \_SB_.PCI0.LPC0.H_EC.TIST */
  2785. \_SB.TZON = Local0
  2786. Local1 = \_SB.DIAG
  2787. If (Local1)
  2788. {
  2789. Sleep (0x64)
  2790. }
  2791. Else
  2792. {
  2793. CPRN ()
  2794. }
  2795. }
  2796. Else
  2797. {
  2798. \_SB.TZON = 0x00
  2799. CPRN ()
  2800. }
  2801.  
  2802. \_SB.SECS (0xA9)
  2803. }
  2804.  
  2805. Method (_Q76, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2806. {
  2807. \_SB.SECS (0x94)
  2808. }
  2809.  
  2810. Method (_Q77, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2811. {
  2812. \_SB.SECS (0x95)
  2813. }
  2814.  
  2815. Method (_Q79, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2816. {
  2817. \_SB.SECS (0x8E)
  2818. }
  2819.  
  2820. Method (_Q7A, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2821. {
  2822. \_SB.SECS (0x8F)
  2823. }
  2824.  
  2825. Method (_Q7D, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2826. {
  2827. \_SB.SECS (0x92)
  2828. }
  2829.  
  2830. Method (_Q7E, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2831. {
  2832. \_SB.SECS (0x93)
  2833. }
  2834.  
  2835. Method (_Q7F, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2836. {
  2837. \_SB.SECS (0xB8)
  2838. }
  2839.  
  2840. Method (_Q80, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
  2841. {
  2842. BreakPoint
  2843. }
  2844. }
  2845.  
  2846. Scope (\_SB)
  2847. {
  2848. Device (ADP1)
  2849. {
  2850. Name (_HID, "ACPI0003" /* Power Source Device */) // _HID: Hardware ID
  2851. Method (_PSR, 0, NotSerialized) // _PSR: Power Source
  2852. {
  2853. If ((\ECON == 0x00))
  2854. {
  2855. Local0 = \_SB.SECB (0x85, 0x02)
  2856. }
  2857. Else
  2858. {
  2859. Local0 = \_SB.PCI0.LPC0.H_EC.ACEX
  2860. }
  2861.  
  2862. Return (Local0)
  2863. }
  2864.  
  2865. Method (_PCL, 0, NotSerialized) // _PCL: Power Consumer List
  2866. {
  2867. Return (\_SB)
  2868. }
  2869.  
  2870. Method (_STA, 0, NotSerialized) // _STA: Status
  2871. {
  2872. If ((\ECON == 0x00))
  2873. {
  2874. Local0 = 0x0F
  2875. }
  2876. ElseIf ((\_SB.PCI0.LPC0.H_EC.ACEX == 0x00))
  2877. {
  2878. Local0 = 0x1F
  2879. }
  2880. Else
  2881. {
  2882. Local0 = 0x0F
  2883. }
  2884.  
  2885. Local0 = 0x0F
  2886. Return (Local0)
  2887. }
  2888. }
  2889.  
  2890. Device (LID0)
  2891. {
  2892. Name (_HID, EisaId ("PNP0C0D") /* Lid Device */) // _HID: Hardware ID
  2893. Method (_LID, 0, NotSerialized) // _LID: Lid Status
  2894. {
  2895. Return (LIDS) /* \LIDS */
  2896. }
  2897. }
  2898.  
  2899. Device (PWRB)
  2900. {
  2901. Name (_HID, EisaId ("PNP0C0C") /* Power Button Device */) // _HID: Hardware ID
  2902. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  2903. {
  2904. 0x1D,
  2905. 0x04
  2906. })
  2907. }
  2908.  
  2909. Device (SLPB)
  2910. {
  2911. Name (_HID, EisaId ("PNP0C0E") /* Sleep Button Device */) // _HID: Hardware ID
  2912. }
  2913. }
  2914.  
  2915. Method (DECD, 4, Serialized)
  2916. {
  2917. Debug = Arg0
  2918. }
  2919.  
  2920. Device (MBRD)
  2921. {
  2922. Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID
  2923. Name (_UID, 0x1F) // _UID: Unique ID
  2924. Name (RSRC, ResourceTemplate ()
  2925. {
  2926. IO (Decode16,
  2927. 0x0010, // Range Minimum
  2928. 0x0010, // Range Maximum
  2929. 0x01, // Alignment
  2930. 0x10, // Length
  2931. )
  2932. IO (Decode16,
  2933. 0x0024, // Range Minimum
  2934. 0x0024, // Range Maximum
  2935. 0x01, // Alignment
  2936. 0x02, // Length
  2937. )
  2938. IO (Decode16,
  2939. 0x0028, // Range Minimum
  2940. 0x0028, // Range Maximum
  2941. 0x01, // Alignment
  2942. 0x02, // Length
  2943. )
  2944. IO (Decode16,
  2945. 0x002C, // Range Minimum
  2946. 0x002C, // Range Maximum
  2947. 0x01, // Alignment
  2948. 0x02, // Length
  2949. )
  2950. IO (Decode16,
  2951. 0x0030, // Range Minimum
  2952. 0x0030, // Range Maximum
  2953. 0x01, // Alignment
  2954. 0x02, // Length
  2955. )
  2956. IO (Decode16,
  2957. 0x0034, // Range Minimum
  2958. 0x0034, // Range Maximum
  2959. 0x01, // Alignment
  2960. 0x02, // Length
  2961. )
  2962. IO (Decode16,
  2963. 0x0038, // Range Minimum
  2964. 0x0038, // Range Maximum
  2965. 0x01, // Alignment
  2966. 0x02, // Length
  2967. )
  2968. IO (Decode16,
  2969. 0x003C, // Range Minimum
  2970. 0x003C, // Range Maximum
  2971. 0x01, // Alignment
  2972. 0x02, // Length
  2973. )
  2974. IO (Decode16,
  2975. 0x0072, // Range Minimum
  2976. 0x0072, // Range Maximum
  2977. 0x01, // Alignment
  2978. 0x06, // Length
  2979. )
  2980. IO (Decode16,
  2981. 0x0080, // Range Minimum
  2982. 0x0080, // Range Maximum
  2983. 0x01, // Alignment
  2984. 0x01, // Length
  2985. )
  2986. IO (Decode16,
  2987. 0x0090, // Range Minimum
  2988. 0x0090, // Range Maximum
  2989. 0x01, // Alignment
  2990. 0x10, // Length
  2991. )
  2992. IO (Decode16,
  2993. 0x00A4, // Range Minimum
  2994. 0x00A4, // Range Maximum
  2995. 0x01, // Alignment
  2996. 0x02, // Length
  2997. )
  2998. IO (Decode16,
  2999. 0x00A8, // Range Minimum
  3000. 0x00A8, // Range Maximum
  3001. 0x01, // Alignment
  3002. 0x02, // Length
  3003. )
  3004. IO (Decode16,
  3005. 0x00AC, // Range Minimum
  3006. 0x00AC, // Range Maximum
  3007. 0x01, // Alignment
  3008. 0x02, // Length
  3009. )
  3010. IO (Decode16,
  3011. 0x00B0, // Range Minimum
  3012. 0x00B0, // Range Maximum
  3013. 0x01, // Alignment
  3014. 0x06, // Length
  3015. )
  3016. IO (Decode16,
  3017. 0x00B8, // Range Minimum
  3018. 0x00B8, // Range Maximum
  3019. 0x01, // Alignment
  3020. 0x02, // Length
  3021. )
  3022. IO (Decode16,
  3023. 0x00BC, // Range Minimum
  3024. 0x00BC, // Range Maximum
  3025. 0x01, // Alignment
  3026. 0x02, // Length
  3027. )
  3028. IO (Decode16,
  3029. 0x0800, // Range Minimum
  3030. 0x0800, // Range Maximum
  3031. 0x01, // Alignment
  3032. 0x10, // Length
  3033. )
  3034. IO (Decode16,
  3035. 0x1000, // Range Minimum
  3036. 0x1000, // Range Maximum
  3037. 0x01, // Alignment
  3038. 0x80, // Length
  3039. _Y0F)
  3040. IO (Decode16,
  3041. 0x1180, // Range Minimum
  3042. 0x1180, // Range Maximum
  3043. 0x01, // Alignment
  3044. 0x40, // Length
  3045. _Y10)
  3046. IO (Decode16,
  3047. 0x002E, // Range Minimum
  3048. 0x002E, // Range Maximum
  3049. 0x01, // Alignment
  3050. 0x02, // Length
  3051. )
  3052. IO (Decode16,
  3053. 0x04D0, // Range Minimum
  3054. 0x04D0, // Range Maximum
  3055. 0x01, // Alignment
  3056. 0x02, // Length
  3057. )
  3058. IO (Decode16,
  3059. 0xFE00, // Range Minimum
  3060. 0xFE00, // Range Maximum
  3061. 0x01, // Alignment
  3062. 0x01, // Length
  3063. )
  3064. IO (Decode16,
  3065. 0x164E, // Range Minimum
  3066. 0x164E, // Range Maximum
  3067. 0x01, // Alignment
  3068. 0xFF, // Length
  3069. )
  3070. Memory32Fixed (ReadWrite,
  3071. 0xE0000000, // Address Base
  3072. 0x10000000, // Address Length
  3073. )
  3074. Memory32Fixed (ReadWrite,
  3075. 0xFED14000, // Address Base
  3076. 0x00004000, // Address Length
  3077. )
  3078. Memory32Fixed (ReadWrite,
  3079. 0xF8000000, // Address Base
  3080. 0x04000000, // Address Length
  3081. )
  3082. Memory32Fixed (ReadWrite,
  3083. 0xFEF00000, // Address Base
  3084. 0x00100000, // Address Length
  3085. )
  3086. })
  3087. Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
  3088. {
  3089. CreateWordField (RSRC, \_SB.PCI0.LPC0.MBRD._Y0F._MIN, PMMN) // _MIN: Minimum Base Address
  3090. CreateWordField (RSRC, \_SB.PCI0.LPC0.MBRD._Y0F._MAX, PMMX) // _MAX: Maximum Base Address
  3091. PMMN = (^^PMBA & 0xFF80)
  3092. PMMX = PMMN /* \_SB_.PCI0.LPC0.MBRD._CRS.PMMN */
  3093. CreateWordField (RSRC, \_SB.PCI0.LPC0.MBRD._Y10._MIN, GPMN) // _MIN: Minimum Base Address
  3094. CreateWordField (RSRC, \_SB.PCI0.LPC0.MBRD._Y10._MAX, GPMX) // _MAX: Maximum Base Address
  3095. GPMN = (^^GPBA & 0xFF80)
  3096. GPMX = GPMN /* \_SB_.PCI0.LPC0.MBRD._CRS.GPMN */
  3097. Return (RSRC) /* \_SB_.PCI0.LPC0.MBRD.RSRC */
  3098. }
  3099. }
  3100.  
  3101. Device (DMAC)
  3102. {
  3103. Name (_HID, EisaId ("PNP0200") /* PC-class DMA Controller */) // _HID: Hardware ID
  3104. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  3105. {
  3106. IO (Decode16,
  3107. 0x0000, // Range Minimum
  3108. 0x0000, // Range Maximum
  3109. 0x01, // Alignment
  3110. 0x10, // Length
  3111. )
  3112. IO (Decode16,
  3113. 0x0081, // Range Minimum
  3114. 0x0081, // Range Maximum
  3115. 0x01, // Alignment
  3116. 0x0F, // Length
  3117. )
  3118. IO (Decode16,
  3119. 0x00C0, // Range Minimum
  3120. 0x00C0, // Range Maximum
  3121. 0x01, // Alignment
  3122. 0x20, // Length
  3123. )
  3124. DMA (Compatibility, NotBusMaster, Transfer16, )
  3125. {4}
  3126. })
  3127. }
  3128.  
  3129. Device (MATH)
  3130. {
  3131. Name (_HID, EisaId ("PNP0C04") /* x87-compatible Floating Point Processing Unit */) // _HID: Hardware ID
  3132. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  3133. {
  3134. IO (Decode16,
  3135. 0x00F0, // Range Minimum
  3136. 0x00F0, // Range Maximum
  3137. 0x01, // Alignment
  3138. 0x0F, // Length
  3139. )
  3140. IRQ (Edge, ActiveHigh, Exclusive, )
  3141. {13}
  3142. })
  3143. }
  3144.  
  3145. Device (PIC)
  3146. {
  3147. Name (_HID, EisaId ("PNP0000") /* 8259-compatible Programmable Interrupt Controller */) // _HID: Hardware ID
  3148. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  3149. {
  3150. IO (Decode16,
  3151. 0x0020, // Range Minimum
  3152. 0x0020, // Range Maximum
  3153. 0x01, // Alignment
  3154. 0x02, // Length
  3155. )
  3156. IO (Decode16,
  3157. 0x00A0, // Range Minimum
  3158. 0x00A0, // Range Maximum
  3159. 0x01, // Alignment
  3160. 0x02, // Length
  3161. )
  3162. IRQ (Edge, ActiveHigh, Exclusive, )
  3163. {2}
  3164. })
  3165. }
  3166.  
  3167. Device (RTC)
  3168. {
  3169. Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID
  3170. Name (BUF0, ResourceTemplate ()
  3171. {
  3172. IO (Decode16,
  3173. 0x0070, // Range Minimum
  3174. 0x0070, // Range Maximum
  3175. 0x01, // Alignment
  3176. 0x02, // Length
  3177. )
  3178. })
  3179. Name (BUF1, ResourceTemplate ()
  3180. {
  3181. IO (Decode16,
  3182. 0x0070, // Range Minimum
  3183. 0x0070, // Range Maximum
  3184. 0x01, // Alignment
  3185. 0x02, // Length
  3186. )
  3187. IRQNoFlags ()
  3188. {8}
  3189. })
  3190. Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
  3191. {
  3192. If ((MTSE & 0x00020000))
  3193. {
  3194. Return (BUF0) /* \_SB_.PCI0.LPC0.RTC_.BUF0 */
  3195. }
  3196.  
  3197. Return (BUF1) /* \_SB_.PCI0.LPC0.RTC_.BUF1 */
  3198. }
  3199. }
  3200.  
  3201. Device (SPKR)
  3202. {
  3203. Name (_HID, EisaId ("PNP0800") /* Microsoft Sound System Compatible Device */) // _HID: Hardware ID
  3204. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  3205. {
  3206. IO (Decode16,
  3207. 0x0061, // Range Minimum
  3208. 0x0061, // Range Maximum
  3209. 0x01, // Alignment
  3210. 0x01, // Length
  3211. )
  3212. })
  3213. }
  3214.  
  3215. Device (TIMR)
  3216. {
  3217. Name (_HID, EisaId ("PNP0100") /* PC-class System Timer */) // _HID: Hardware ID
  3218. Name (BUF0, ResourceTemplate ()
  3219. {
  3220. IO (Decode16,
  3221. 0x0040, // Range Minimum
  3222. 0x0040, // Range Maximum
  3223. 0x01, // Alignment
  3224. 0x04, // Length
  3225. )
  3226. IO (Decode16,
  3227. 0x0050, // Range Minimum
  3228. 0x0050, // Range Maximum
  3229. 0x10, // Alignment
  3230. 0x04, // Length
  3231. )
  3232. })
  3233. Name (BUF1, ResourceTemplate ()
  3234. {
  3235. IO (Decode16,
  3236. 0x0040, // Range Minimum
  3237. 0x0040, // Range Maximum
  3238. 0x01, // Alignment
  3239. 0x04, // Length
  3240. )
  3241. IO (Decode16,
  3242. 0x0050, // Range Minimum
  3243. 0x0050, // Range Maximum
  3244. 0x10, // Alignment
  3245. 0x04, // Length
  3246. )
  3247. IRQNoFlags ()
  3248. {0}
  3249. })
  3250. Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
  3251. {
  3252. If ((MTSE & 0x00020000))
  3253. {
  3254. Return (BUF0) /* \_SB_.PCI0.LPC0.TIMR.BUF0 */
  3255. }
  3256.  
  3257. Return (BUF1) /* \_SB_.PCI0.LPC0.TIMR.BUF1 */
  3258. }
  3259. }
  3260.  
  3261. OperationRegion (MMTO, PCI_Config, 0xD0, 0x04)
  3262. Field (MMTO, DWordAcc, NoLock, Preserve)
  3263. {
  3264. MTSE, 32
  3265. }
  3266.  
  3267. Device (TPM)
  3268. {
  3269. Method (_HID, 0, NotSerialized) // _HID: Hardware ID
  3270. {
  3271. If ((TPMV == 0x01))
  3272. {
  3273. Return (0x0201D824)
  3274. }
  3275.  
  3276. If ((TPMV == 0x02))
  3277. {
  3278. Return (0x0435CF4D)
  3279. }
  3280.  
  3281. If ((TPMV == 0x03))
  3282. {
  3283. Return (0x02016D08)
  3284. }
  3285.  
  3286. If ((TPMV == 0x04))
  3287. {
  3288. Return (0x01016D08)
  3289. }
  3290.  
  3291. If (((TPMV == 0x05) || (TPMV == 0x06)))
  3292. {
  3293. Return (0x0010A35C)
  3294. }
  3295.  
  3296. If ((TPMV == 0x08))
  3297. {
  3298. Return (0x00128D06)
  3299. }
  3300.  
  3301. Return (0x310CD041)
  3302. }
  3303.  
  3304. Name (_CID, EisaId ("PNP0C31")) // _CID: Compatible ID
  3305. Name (_UID, 0x01) // _UID: Unique ID
  3306. Method (_STA, 0, NotSerialized) // _STA: Status
  3307. {
  3308. If (TPRS)
  3309. {
  3310. Return (0x0F)
  3311. }
  3312.  
  3313. Return (0x00)
  3314. }
  3315.  
  3316. Name (BUF0, ResourceTemplate ()
  3317. {
  3318. Memory32Fixed (ReadWrite,
  3319. 0xFED40000, // Address Base
  3320. 0x00005000, // Address Length
  3321. )
  3322. IO (Decode16,
  3323. 0x167E, // Range Minimum
  3324. 0x167E, // Range Maximum
  3325. 0x01, // Alignment
  3326. 0x02, // Length
  3327. )
  3328. IO (Decode16,
  3329. 0x1670, // Range Minimum
  3330. 0x1670, // Range Maximum
  3331. 0x01, // Alignment
  3332. 0x0C, // Length
  3333. )
  3334. })
  3335. Name (BUF1, ResourceTemplate ()
  3336. {
  3337. Memory32Fixed (ReadWrite,
  3338. 0xFED40000, // Address Base
  3339. 0x00005000, // Address Length
  3340. )
  3341. })
  3342. Name (BUF2, ResourceTemplate ()
  3343. {
  3344. Memory32Fixed (ReadWrite,
  3345. 0xFED40000, // Address Base
  3346. 0x00005000, // Address Length
  3347. )
  3348. })
  3349. Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
  3350. {
  3351. If ((TPMV == 0x01))
  3352. {
  3353. Return (BUF0) /* \_SB_.PCI0.LPC0.TPM_.BUF0 */
  3354. }
  3355.  
  3356. If (((TPMV == 0x05) || (TPMV == 0x06)))
  3357. {
  3358. Return (BUF2) /* \_SB_.PCI0.LPC0.TPM_.BUF2 */
  3359. }
  3360.  
  3361. Return (BUF1) /* \_SB_.PCI0.LPC0.TPM_.BUF1 */
  3362. }
  3363.  
  3364. Method (UCMP, 2, NotSerialized)
  3365. {
  3366. If ((0x10 != SizeOf (Arg0)))
  3367. {
  3368. Return (0x00)
  3369. }
  3370.  
  3371. If ((0x10 != SizeOf (Arg1)))
  3372. {
  3373. Return (0x00)
  3374. }
  3375.  
  3376. Local0 = 0x00
  3377. While ((Local0 < 0x10))
  3378. {
  3379. If ((DerefOf (Arg0 [Local0]) != DerefOf (Arg1 [Local0]
  3380. )))
  3381. {
  3382. Return (0x00)
  3383. }
  3384.  
  3385. Local0++
  3386. }
  3387.  
  3388. Return (0x01)
  3389. }
  3390.  
  3391. Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
  3392. {
  3393. If ((UCMP (Arg0, ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653") /* Physical Presence Interface */) == 0x01))
  3394. {
  3395. If ((Arg2 == 0x00))
  3396. {
  3397. Return (Buffer (0x01)
  3398. {
  3399. 0x7F // .
  3400. })
  3401. }
  3402.  
  3403. If ((Arg2 == 0x01))
  3404. {
  3405. Return (Buffer (0x04)
  3406. {
  3407. "1.0"
  3408. })
  3409. }
  3410.  
  3411. If ((Arg2 == 0x02))
  3412. {
  3413. If (TPRS)
  3414. {
  3415. If ((DerefOf (Arg3 [0x00]) == 0x00))
  3416. {
  3417. PPRQ = 0x00
  3418. Return (0x00)
  3419. }
  3420.  
  3421. If ((DerefOf (Arg3 [0x00]) == 0x01))
  3422. {
  3423. PPRQ = 0x01
  3424. Return (0x00)
  3425. }
  3426.  
  3427. If ((DerefOf (Arg3 [0x00]) == 0x02))
  3428. {
  3429. PPRQ = 0x02
  3430. Return (0x00)
  3431. }
  3432.  
  3433. If ((DerefOf (Arg3 [0x00]) == 0x03))
  3434. {
  3435. PPRQ = 0x03
  3436. Return (0x00)
  3437. }
  3438.  
  3439. If ((DerefOf (Arg3 [0x00]) == 0x04))
  3440. {
  3441. PPRQ = 0x04
  3442. Return (0x00)
  3443. }
  3444.  
  3445. If ((DerefOf (Arg3 [0x00]) == 0x05))
  3446. {
  3447. PPRQ = 0x05
  3448. Return (0x00)
  3449. }
  3450.  
  3451. If ((DerefOf (Arg3 [0x00]) == 0x06))
  3452. {
  3453. PPRQ = 0x06
  3454. Return (0x00)
  3455. }
  3456.  
  3457. If ((DerefOf (Arg3 [0x00]) == 0x07))
  3458. {
  3459. PPRQ = 0x07
  3460. Return (0x00)
  3461. }
  3462.  
  3463. If ((DerefOf (Arg3 [0x00]) == 0x08))
  3464. {
  3465. PPRQ = 0x08
  3466. Return (0x00)
  3467. }
  3468.  
  3469. If ((DerefOf (Arg3 [0x00]) == 0x09))
  3470. {
  3471. PPRQ = 0x09
  3472. Return (0x00)
  3473. }
  3474.  
  3475. If ((DerefOf (Arg3 [0x00]) == 0x0A))
  3476. {
  3477. PPRQ = 0x0A
  3478. Return (0x00)
  3479. }
  3480.  
  3481. If ((DerefOf (Arg3 [0x00]) == 0x0B))
  3482. {
  3483. PPRQ = 0x0B
  3484. Return (0x00)
  3485. }
  3486.  
  3487. If ((DerefOf (Arg3 [0x00]) == 0x0C))
  3488. {
  3489. PPRQ = 0x00
  3490. Return (0x01)
  3491. }
  3492.  
  3493. If ((DerefOf (Arg3 [0x00]) == 0x0D))
  3494. {
  3495. PPRQ = 0x00
  3496. Return (0x01)
  3497. }
  3498.  
  3499. If ((DerefOf (Arg3 [0x00]) == 0x0E))
  3500. {
  3501. PPRQ = 0x0E
  3502. Return (0x00)
  3503. }
  3504.  
  3505. Return (0x01)
  3506. }
  3507.  
  3508. Return (0x01)
  3509. }
  3510.  
  3511. If ((Arg2 == 0x03))
  3512. {
  3513. Name (TMP1, Package (0x02)
  3514. {
  3515. 0x00,
  3516. 0xFFFFFFFF
  3517. })
  3518. TMP1 [0x01] = \_SB.PPRQ
  3519. Return (TMP1) /* \_SB_.PCI0.LPC0.TPM_._DSM.TMP1 */
  3520. }
  3521.  
  3522. If ((Arg2 == 0x04))
  3523. {
  3524. Return (0x01)
  3525. }
  3526.  
  3527. If ((Arg2 == 0x05))
  3528. {
  3529. Name (TMP2, Package (0x03)
  3530. {
  3531. 0x00,
  3532. 0xFFFFFFFF,
  3533. 0xFFFFFFFF
  3534. })
  3535. TMP2 [0x01] = \_SB.PPLO
  3536. If ((((\_SB.PPLO > 0x0E) || (\_SB.PPLO == 0x0C)) || (\_SB.PPLO == 0x0D)))
  3537. {
  3538. TMP2 [0x02] = 0xFFFFFFF1
  3539. Return (TMP2) /* \_SB_.PCI0.LPC0.TPM_._DSM.TMP2 */
  3540. }
  3541.  
  3542. If ((PPRP == 0xFF))
  3543. {
  3544. TMP2 [0x02] = 0xFFFFFFF1
  3545. Return (TMP2) /* \_SB_.PCI0.LPC0.TPM_._DSM.TMP2 */
  3546. }
  3547.  
  3548. If (PPOR)
  3549. {
  3550. TMP2 [0x02] = 0xFFFFFFF0
  3551. Return (TMP2) /* \_SB_.PCI0.LPC0.TPM_._DSM.TMP2 */
  3552. }
  3553.  
  3554. TMP2 [0x02] = \_SB.PPRP
  3555. Return (TMP2) /* \_SB_.PCI0.LPC0.TPM_._DSM.TMP2 */
  3556. }
  3557.  
  3558. If ((Arg2 == 0x06))
  3559. {
  3560. CreateByteField (Arg3, 0x04, LAN0)
  3561. CreateByteField (Arg3, 0x05, LAN1)
  3562. P80H = ((LAN1 << 0x08) | LAN0) /* \_SB_.PCI0.LPC0.TPM_._DSM.LAN0 */
  3563. If (((LAN0 == 0x65) || (LAN0 == 0x45)))
  3564. {
  3565. If (((LAN1 == 0x6E) || (LAN1 == 0x4E)))
  3566. {
  3567. Return (0x00)
  3568. }
  3569. }
  3570.  
  3571. Return (0x01)
  3572. }
  3573.  
  3574. Return (0x01)
  3575. }
  3576.  
  3577. If ((UCMP (Arg0, ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d")) == 0x01))
  3578. {
  3579. If ((Arg2 == 0x00))
  3580. {
  3581. Return (Buffer (0x01)
  3582. {
  3583. 0x01 // .
  3584. })
  3585. }
  3586.  
  3587. If ((Arg2 == 0x01))
  3588. {
  3589. If ((DerefOf (Arg3 [0x00]) == 0x00))
  3590. {
  3591. \_SB.MOR = 0x00
  3592. Return (0x00)
  3593. }
  3594.  
  3595. If ((DerefOf (Arg3 [0x00]) == 0x01))
  3596. {
  3597. \_SB.MOR = 0x01
  3598. Return (0x00)
  3599. }
  3600. }
  3601.  
  3602. Return (0x01)
  3603. }
  3604.  
  3605. Return (Buffer (0x01)
  3606. {
  3607. 0x00 // .
  3608. })
  3609. }
  3610. }
  3611.  
  3612. Device (KBC0)
  3613. {
  3614. Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID
  3615. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  3616. {
  3617. IO (Decode16,
  3618. 0x0060, // Range Minimum
  3619. 0x0060, // Range Maximum
  3620. 0x01, // Alignment
  3621. 0x01, // Length
  3622. )
  3623. IO (Decode16,
  3624. 0x0064, // Range Minimum
  3625. 0x0064, // Range Maximum
  3626. 0x01, // Alignment
  3627. 0x01, // Length
  3628. )
  3629. IRQ (Edge, ActiveHigh, Exclusive, )
  3630. {1}
  3631. })
  3632. }
  3633.  
  3634. Device (MSE0)
  3635. {
  3636. Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID
  3637. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  3638. {
  3639. IRQ (Edge, ActiveHigh, Exclusive, )
  3640. {12}
  3641. })
  3642. }
  3643.  
  3644. Device (LNKA)
  3645. {
  3646. Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
  3647. Name (_UID, 0x01) // _UID: Unique ID
  3648. Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
  3649. {
  3650. IRQ (Level, ActiveLow, Shared, )
  3651. {3,4,5,6,7,10,11,12,14,15}
  3652. })
  3653. Name (RSRC, ResourceTemplate ()
  3654. {
  3655. IRQ (Level, ActiveLow, Shared, _Y11)
  3656. {}
  3657. })
  3658. Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
  3659. {
  3660. PIRA |= 0x80
  3661. }
  3662.  
  3663. Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
  3664. {
  3665. CreateWordField (RSRC, \_SB.PCI0.LPC0.LNKA._Y11._INT, IRQ0) // _INT: Interrupts
  3666. Local0 = (PIRA & 0x0F)
  3667. IRQ0 = (0x01 << Local0)
  3668. Debug = RSRC /* \_SB_.PCI0.LPC0.LNKA.RSRC */
  3669. Return (RSRC) /* \_SB_.PCI0.LPC0.LNKA.RSRC */
  3670. }
  3671.  
  3672. Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
  3673. {
  3674. Debug = Arg0
  3675. CreateWordField (Arg0, 0x01, IRQ0)
  3676. FindSetRightBit (IRQ0, Local0)
  3677. Local0--
  3678. PIRA = (Local0 | (PIRA & 0x70))
  3679. }
  3680.  
  3681. Method (_STA, 0, NotSerialized) // _STA: Status
  3682. {
  3683. If ((PIRA & 0x80))
  3684. {
  3685. Return (0x09)
  3686. }
  3687.  
  3688. Return (0x0B)
  3689. }
  3690. }
  3691.  
  3692. Device (LNKB)
  3693. {
  3694. Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
  3695. Name (_UID, 0x02) // _UID: Unique ID
  3696. Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
  3697. {
  3698. IRQ (Level, ActiveLow, Shared, )
  3699. {3,4,5,6,7,10,11,12,14,15}
  3700. })
  3701. Name (RSRC, ResourceTemplate ()
  3702. {
  3703. IRQ (Level, ActiveLow, Shared, _Y12)
  3704. {}
  3705. })
  3706. Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
  3707. {
  3708. PIRB |= 0x80
  3709. }
  3710.  
  3711. Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
  3712. {
  3713. CreateWordField (RSRC, \_SB.PCI0.LPC0.LNKB._Y12._INT, IRQ0) // _INT: Interrupts
  3714. Local0 = (PIRB & 0x0F)
  3715. IRQ0 = (0x01 << Local0)
  3716. Return (RSRC) /* \_SB_.PCI0.LPC0.LNKB.RSRC */
  3717. }
  3718.  
  3719. Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
  3720. {
  3721. CreateWordField (Arg0, 0x01, IRQ0)
  3722. FindSetRightBit (IRQ0, Local0)
  3723. Local0--
  3724. PIRB = (Local0 | (PIRB & 0x70))
  3725. }
  3726.  
  3727. Method (_STA, 0, NotSerialized) // _STA: Status
  3728. {
  3729. If ((PIRB & 0x80))
  3730. {
  3731. Return (0x09)
  3732. }
  3733.  
  3734. Return (0x0B)
  3735. }
  3736. }
  3737.  
  3738. Device (LNKC)
  3739. {
  3740. Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
  3741. Name (_UID, 0x03) // _UID: Unique ID
  3742. Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
  3743. {
  3744. IRQ (Level, ActiveLow, Shared, )
  3745. {3,4,5,6,7,10,11,12,14,15}
  3746. })
  3747. Name (RSRC, ResourceTemplate ()
  3748. {
  3749. IRQ (Level, ActiveLow, Shared, _Y13)
  3750. {}
  3751. })
  3752. Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
  3753. {
  3754. PIRC |= 0x80
  3755. }
  3756.  
  3757. Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
  3758. {
  3759. CreateWordField (RSRC, \_SB.PCI0.LPC0.LNKC._Y13._INT, IRQ0) // _INT: Interrupts
  3760. Local0 = (PIRC & 0x0F)
  3761. IRQ0 = (0x01 << Local0)
  3762. Return (RSRC) /* \_SB_.PCI0.LPC0.LNKC.RSRC */
  3763. }
  3764.  
  3765. Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
  3766. {
  3767. CreateWordField (Arg0, 0x01, IRQ0)
  3768. FindSetRightBit (IRQ0, Local0)
  3769. Local0--
  3770. PIRC = (Local0 | (PIRC & 0x70))
  3771. }
  3772.  
  3773. Method (_STA, 0, NotSerialized) // _STA: Status
  3774. {
  3775. If ((PIRC & 0x80))
  3776. {
  3777. Return (0x09)
  3778. }
  3779.  
  3780. Return (0x0B)
  3781. }
  3782. }
  3783.  
  3784. Device (LNKD)
  3785. {
  3786. Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
  3787. Name (_UID, 0x04) // _UID: Unique ID
  3788. Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
  3789. {
  3790. IRQ (Level, ActiveLow, Shared, )
  3791. {3,4,5,6,7,10,11,12,14,15}
  3792. })
  3793. Name (RSRC, ResourceTemplate ()
  3794. {
  3795. IRQ (Level, ActiveLow, Shared, _Y14)
  3796. {}
  3797. })
  3798. Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
  3799. {
  3800. PIRD |= 0x80
  3801. }
  3802.  
  3803. Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
  3804. {
  3805. CreateWordField (RSRC, \_SB.PCI0.LPC0.LNKD._Y14._INT, IRQ0) // _INT: Interrupts
  3806. Local0 = (PIRD & 0x0F)
  3807. IRQ0 = (0x01 << Local0)
  3808. Return (RSRC) /* \_SB_.PCI0.LPC0.LNKD.RSRC */
  3809. }
  3810.  
  3811. Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
  3812. {
  3813. CreateWordField (Arg0, 0x01, IRQ0)
  3814. FindSetRightBit (IRQ0, Local0)
  3815. Local0--
  3816. PIRD = (Local0 | (PIRD & 0x70))
  3817. }
  3818.  
  3819. Method (_STA, 0, NotSerialized) // _STA: Status
  3820. {
  3821. If ((PIRD & 0x80))
  3822. {
  3823. Return (0x09)
  3824. }
  3825.  
  3826. Return (0x0B)
  3827. }
  3828. }
  3829.  
  3830. Device (LNKE)
  3831. {
  3832. Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
  3833. Name (_UID, 0x05) // _UID: Unique ID
  3834. Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
  3835. {
  3836. IRQ (Level, ActiveLow, Shared, )
  3837. {3,4,5,6,7,10,11,12,14,15}
  3838. })
  3839. Name (RSRC, ResourceTemplate ()
  3840. {
  3841. IRQ (Level, ActiveLow, Shared, _Y15)
  3842. {}
  3843. })
  3844. Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
  3845. {
  3846. PIRE |= 0x80
  3847. }
  3848.  
  3849. Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
  3850. {
  3851. CreateWordField (RSRC, \_SB.PCI0.LPC0.LNKE._Y15._INT, IRQ0) // _INT: Interrupts
  3852. Local0 = (PIRE & 0x0F)
  3853. IRQ0 = (0x01 << Local0)
  3854. Debug = RSRC /* \_SB_.PCI0.LPC0.LNKE.RSRC */
  3855. Return (RSRC) /* \_SB_.PCI0.LPC0.LNKE.RSRC */
  3856. }
  3857.  
  3858. Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
  3859. {
  3860. Debug = Arg0
  3861. CreateWordField (Arg0, 0x01, IRQ0)
  3862. FindSetRightBit (IRQ0, Local0)
  3863. Local0--
  3864. PIRE = (Local0 | (PIRE & 0x70))
  3865. }
  3866.  
  3867. Method (_STA, 0, NotSerialized) // _STA: Status
  3868. {
  3869. If ((PIRE & 0x80))
  3870. {
  3871. Return (0x09)
  3872. }
  3873.  
  3874. Return (0x0B)
  3875. }
  3876. }
  3877.  
  3878. Device (LNKF)
  3879. {
  3880. Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
  3881. Name (_UID, 0x06) // _UID: Unique ID
  3882. Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
  3883. {
  3884. IRQ (Level, ActiveLow, Shared, )
  3885. {3,4,5,6,7,10,11,12,14,15}
  3886. })
  3887. Name (RSRC, ResourceTemplate ()
  3888. {
  3889. IRQ (Level, ActiveLow, Shared, _Y16)
  3890. {}
  3891. })
  3892. Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
  3893. {
  3894. PIRF |= 0x80
  3895. }
  3896.  
  3897. Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
  3898. {
  3899. CreateWordField (RSRC, \_SB.PCI0.LPC0.LNKF._Y16._INT, IRQ0) // _INT: Interrupts
  3900. Local0 = (PIRF & 0x0F)
  3901. IRQ0 = (0x01 << Local0)
  3902. Debug = RSRC /* \_SB_.PCI0.LPC0.LNKF.RSRC */
  3903. Return (RSRC) /* \_SB_.PCI0.LPC0.LNKF.RSRC */
  3904. }
  3905.  
  3906. Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
  3907. {
  3908. Debug = Arg0
  3909. CreateWordField (Arg0, 0x01, IRQ0)
  3910. FindSetRightBit (IRQ0, Local0)
  3911. Local0--
  3912. PIRF = (Local0 | (PIRF & 0x70))
  3913. }
  3914.  
  3915. Method (_STA, 0, NotSerialized) // _STA: Status
  3916. {
  3917. If ((PIRF & 0x80))
  3918. {
  3919. Return (0x09)
  3920. }
  3921.  
  3922. Return (0x0B)
  3923. }
  3924. }
  3925.  
  3926. Device (LNKG)
  3927. {
  3928. Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
  3929. Name (_UID, 0x07) // _UID: Unique ID
  3930. Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
  3931. {
  3932. IRQ (Level, ActiveLow, Shared, )
  3933. {3,4,5,6,7,10,11,12,14,15}
  3934. })
  3935. Name (RSRC, ResourceTemplate ()
  3936. {
  3937. IRQ (Level, ActiveLow, Shared, _Y17)
  3938. {}
  3939. })
  3940. Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
  3941. {
  3942. PIRG |= 0x80
  3943. }
  3944.  
  3945. Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
  3946. {
  3947. CreateWordField (RSRC, \_SB.PCI0.LPC0.LNKG._Y17._INT, IRQ0) // _INT: Interrupts
  3948. Local0 = (PIRG & 0x0F)
  3949. IRQ0 = (0x01 << Local0)
  3950. Debug = RSRC /* \_SB_.PCI0.LPC0.LNKG.RSRC */
  3951. Return (RSRC) /* \_SB_.PCI0.LPC0.LNKG.RSRC */
  3952. }
  3953.  
  3954. Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
  3955. {
  3956. Debug = Arg0
  3957. CreateWordField (Arg0, 0x01, IRQ0)
  3958. FindSetRightBit (IRQ0, Local0)
  3959. Local0--
  3960. PIRG = (Local0 | (PIRG & 0x70))
  3961. }
  3962.  
  3963. Method (_STA, 0, NotSerialized) // _STA: Status
  3964. {
  3965. If ((PIRG & 0x80))
  3966. {
  3967. Return (0x09)
  3968. }
  3969.  
  3970. Return (0x0B)
  3971. }
  3972. }
  3973.  
  3974. Device (LNKH)
  3975. {
  3976. Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
  3977. Name (_UID, 0x08) // _UID: Unique ID
  3978. Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
  3979. {
  3980. IRQ (Level, ActiveLow, Shared, )
  3981. {3,4,5,6,7,10,11,12,14,15}
  3982. })
  3983. Name (RSRC, ResourceTemplate ()
  3984. {
  3985. IRQ (Level, ActiveLow, Shared, _Y18)
  3986. {}
  3987. })
  3988. Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
  3989. {
  3990. PIRH |= 0x80
  3991. }
  3992.  
  3993. Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
  3994. {
  3995. CreateWordField (RSRC, \_SB.PCI0.LPC0.LNKH._Y18._INT, IRQ0) // _INT: Interrupts
  3996. Local0 = (PIRH & 0x0F)
  3997. IRQ0 = (0x01 << Local0)
  3998. Debug = RSRC /* \_SB_.PCI0.LPC0.LNKH.RSRC */
  3999. Return (RSRC) /* \_SB_.PCI0.LPC0.LNKH.RSRC */
  4000. }
  4001.  
  4002. Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
  4003. {
  4004. Debug = Arg0
  4005. CreateWordField (Arg0, 0x01, IRQ0)
  4006. FindSetRightBit (IRQ0, Local0)
  4007. Local0--
  4008. PIRH = (Local0 | (PIRH & 0x70))
  4009. }
  4010.  
  4011. Method (_STA, 0, NotSerialized) // _STA: Status
  4012. {
  4013. If ((PIRH & 0x80))
  4014. {
  4015. Return (0x09)
  4016. }
  4017.  
  4018. Return (0x0B)
  4019. }
  4020. }
  4021.  
  4022. OperationRegion (GPOX, SystemIO, 0x1180, 0x30)
  4023. Field (GPOX, DWordAcc, NoLock, Preserve)
  4024. {
  4025. Offset (0x07),
  4026. , 3,
  4027. IO27, 1,
  4028. Offset (0x0F),
  4029. , 3,
  4030. LV27, 1,
  4031. Offset (0x1B),
  4032. , 3,
  4033. BL27, 1
  4034. }
  4035.  
  4036. OperationRegion (PIRX, PCI_Config, 0x60, 0x04)
  4037. Field (PIRX, DWordAcc, Lock, Preserve)
  4038. {
  4039. AccessAs (ByteAcc, 0x00),
  4040. PIRA, 8,
  4041. PIRB, 8,
  4042. PIRC, 8,
  4043. PIRD, 8
  4044. }
  4045.  
  4046. OperationRegion (PIRY, PCI_Config, 0x68, 0x04)
  4047. Field (PIRY, DWordAcc, Lock, Preserve)
  4048. {
  4049. AccessAs (ByteAcc, 0x00),
  4050. PIRE, 8,
  4051. PIRF, 8,
  4052. PIRG, 8,
  4053. PIRH, 8
  4054. }
  4055.  
  4056. OperationRegion (ELR0, PCI_Config, 0xA0, 0x14)
  4057. Field (ELR0, DWordAcc, Lock, Preserve)
  4058. {
  4059. , 9,
  4060. PBLV, 1,
  4061. Offset (0x10),
  4062. , 1,
  4063. ELSS, 1,
  4064. , 1,
  4065. ELST, 1,
  4066. ELPB, 1,
  4067. Offset (0x11),
  4068. , 1,
  4069. ELLO, 1,
  4070. ELGN, 2,
  4071. ELYL, 2,
  4072. ELBE, 1,
  4073. ELIE, 1,
  4074. ELSN, 1,
  4075. ELOC, 1,
  4076. Offset (0x13),
  4077. ELSO, 1
  4078. }
  4079.  
  4080. OperationRegion (ROUT, SystemIO, 0xB8, 0x04)
  4081. Field (ROUT, DWordAcc, Lock, Preserve)
  4082. {
  4083. AccessAs (ByteAcc, 0x00),
  4084. GPI0, 2,
  4085. GPI1, 2,
  4086. GPI2, 2,
  4087. GPI3, 2,
  4088. GPI4, 2,
  4089. GPI5, 2,
  4090. GPI6, 2,
  4091. GPI7, 2,
  4092. GPI8, 2,
  4093. GPI9, 2,
  4094. GP10, 2,
  4095. GP11, 2,
  4096. GP12, 2,
  4097. GP13, 2,
  4098. GP14, 2,
  4099. GP15, 2
  4100. }
  4101.  
  4102. OperationRegion (PMIO, SystemIO, 0x1000, 0x30)
  4103. Field (PMIO, WordAcc, NoLock, Preserve)
  4104. {
  4105. AccessAs (DWordAcc, 0x00),
  4106. Offset (0x2D),
  4107. , 4,
  4108. GPES, 1,
  4109. Offset (0x2F),
  4110. , 4,
  4111. GPEE, 1
  4112. }
  4113.  
  4114. OperationRegion (REGS, PCI_Config, 0x40, 0x10)
  4115. Field (REGS, DWordAcc, Lock, Preserve)
  4116. {
  4117. PMBA, 16,
  4118. Offset (0x08),
  4119. GPBA, 16
  4120. }
  4121.  
  4122. Device (FWH)
  4123. {
  4124. Name (_HID, EisaId ("INT0800") /* Intel 82802 Firmware Hub Device */) // _HID: Hardware ID
  4125. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  4126. {
  4127. Memory32Fixed (ReadOnly,
  4128. 0xFF800000, // Address Base
  4129. 0x00800000, // Address Length
  4130. )
  4131. })
  4132. }
  4133. }
  4134.  
  4135. Name (NATA, Package (0x01)
  4136. {
  4137. 0x001F0002
  4138. })
  4139. Method (GETP, 1, NotSerialized)
  4140. {
  4141. Noop
  4142. If (((Arg0 & 0x09) == 0x00))
  4143. {
  4144. Return (0xFFFFFFFF)
  4145. }
  4146.  
  4147. If (((Arg0 & 0x09) == 0x08))
  4148. {
  4149. Return (0x0384)
  4150. }
  4151.  
  4152. Local0 = ((Arg0 & 0x0300) >> 0x08)
  4153. Local1 = ((Arg0 & 0x3000) >> 0x0C)
  4154. Return ((0x1E * (0x09 - (Local0 + Local1))))
  4155. }
  4156.  
  4157. Method (GETD, 4, NotSerialized)
  4158. {
  4159. Noop
  4160. If (Arg0)
  4161. {
  4162. If (Arg1)
  4163. {
  4164. Return (0x14)
  4165. }
  4166.  
  4167. If (Arg2)
  4168. {
  4169. Return (((0x04 - Arg3) * 0x0F))
  4170. }
  4171.  
  4172. Return (((0x04 - Arg3) * 0x1E))
  4173. }
  4174.  
  4175. Return (0xFFFFFFFF)
  4176. }
  4177.  
  4178. Method (GETT, 1, NotSerialized)
  4179. {
  4180. Noop
  4181. Return ((0x1E * (0x09 - (((Arg0 >> 0x02) & 0x03
  4182. ) + (Arg0 & 0x03)))))
  4183. }
  4184.  
  4185. Method (GETF, 3, NotSerialized)
  4186. {
  4187. Noop
  4188. Name (TMPF, 0x00)
  4189. If (Arg0)
  4190. {
  4191. TMPF |= 0x01
  4192. }
  4193.  
  4194. If ((Arg2 & 0x02))
  4195. {
  4196. TMPF |= 0x02
  4197. }
  4198.  
  4199. If (Arg1)
  4200. {
  4201. TMPF |= 0x04
  4202. }
  4203.  
  4204. If ((Arg2 & 0x20))
  4205. {
  4206. TMPF |= 0x08
  4207. }
  4208.  
  4209. If ((Arg2 & 0x4000))
  4210. {
  4211. TMPF |= 0x10
  4212. }
  4213.  
  4214. Return (TMPF) /* \_SB_.PCI0.GETF.TMPF */
  4215. }
  4216.  
  4217. Method (SETP, 3, NotSerialized)
  4218. {
  4219. Noop
  4220. If ((Arg0 >= 0xF0))
  4221. {
  4222. Return (0x08)
  4223. }
  4224. Else
  4225. {
  4226. If ((Arg1 & 0x02))
  4227. {
  4228. If (((Arg0 <= 0x78) && (Arg2 & 0x02)))
  4229. {
  4230. Return (0x2301)
  4231. }
  4232.  
  4233. If (((Arg0 <= 0xB4) && (Arg2 & 0x01)))
  4234. {
  4235. Return (0x2101)
  4236. }
  4237. }
  4238.  
  4239. Return (0x1001)
  4240. }
  4241. }
  4242.  
  4243. Method (SETD, 1, NotSerialized)
  4244. {
  4245. Noop
  4246. If ((Arg0 <= 0x14))
  4247. {
  4248. Return (0x01)
  4249. }
  4250.  
  4251. If ((Arg0 <= 0x1E))
  4252. {
  4253. Return (0x02)
  4254. }
  4255.  
  4256. If ((Arg0 <= 0x2D))
  4257. {
  4258. Return (0x01)
  4259. }
  4260.  
  4261. If ((Arg0 <= 0x3C))
  4262. {
  4263. Return (0x02)
  4264. }
  4265.  
  4266. If ((Arg0 <= 0x5A))
  4267. {
  4268. Return (0x01)
  4269. }
  4270.  
  4271. Return (0x00)
  4272. }
  4273.  
  4274. Method (SETT, 3, NotSerialized)
  4275. {
  4276. Noop
  4277. If ((Arg1 & 0x02))
  4278. {
  4279. If (((Arg0 <= 0x78) && (Arg2 & 0x02)))
  4280. {
  4281. Return (0x0B)
  4282. }
  4283.  
  4284. If (((Arg0 <= 0xB4) && (Arg2 & 0x01)))
  4285. {
  4286. Return (0x09)
  4287. }
  4288. }
  4289.  
  4290. Return (0x04)
  4291. }
  4292.  
  4293. Device (IDE1)
  4294. {
  4295. Name (_ADR, 0x001F0002) // _ADR: Address
  4296. OperationRegion (IDEP, PCI_Config, 0x10, 0x02)
  4297. Field (IDEP, DWordAcc, NoLock, Preserve)
  4298. {
  4299. PCMD, 16
  4300. }
  4301.  
  4302. OperationRegion (IDES, PCI_Config, 0x18, 0x02)
  4303. Field (IDES, DWordAcc, NoLock, Preserve)
  4304. {
  4305. SCMD, 16
  4306. }
  4307.  
  4308. OperationRegion (IDEC, PCI_Config, 0x40, 0x18)
  4309. Field (IDEC, DWordAcc, NoLock, Preserve)
  4310. {
  4311. PRIT, 16,
  4312. SECT, 16,
  4313. PSIT, 4,
  4314. SSIT, 4,
  4315. Offset (0x08),
  4316. SDMA, 4,
  4317. Offset (0x0A),
  4318. SDT0, 2,
  4319. , 2,
  4320. SDT1, 2,
  4321. Offset (0x0B),
  4322. SDT2, 2,
  4323. , 2,
  4324. SDT3, 2,
  4325. Offset (0x14),
  4326. ICR0, 4,
  4327. ICR1, 4,
  4328. ICR2, 4,
  4329. ICR3, 4,
  4330. ICR4, 4,
  4331. ICR5, 4
  4332. }
  4333.  
  4334. OperationRegion (IDE1, PCI_Config, 0x90, 0x03)
  4335. Field (IDE1, DWordAcc, NoLock, Preserve)
  4336. {
  4337. MAP, 8,
  4338. Offset (0x02),
  4339. PCS, 8
  4340. }
  4341.  
  4342. OperationRegion (PBIO, SystemIO, 0x000018EF, 0x00000008)
  4343. Field (PBIO, ByteAcc, NoLock, Preserve)
  4344. {
  4345. Offset (0x07),
  4346. , 7,
  4347. PBSY, 1
  4348. }
  4349.  
  4350. OperationRegion (SBIO, SystemIO, 0x000018EF, 0x00000008)
  4351. Field (SBIO, ByteAcc, NoLock, Preserve)
  4352. {
  4353. Offset (0x07),
  4354. , 7,
  4355. SBSY, 1
  4356. }
  4357.  
  4358. Method (BSSP, 1, NotSerialized)
  4359. {
  4360. If ((0x01 == \SPNF))
  4361. {
  4362. Local0 = (0x50 & PCS)
  4363. Local1 = (0xA0 & PCS)
  4364. Local2 = 0x00
  4365. Local3 = 0x00
  4366. If (Arg0)
  4367. {
  4368. If ((0x80 == Local1))
  4369. {
  4370. While ((SBSY && (0x4B > Local3)))
  4371. {
  4372. Sleep (0x64)
  4373. Local3++
  4374. }
  4375. }
  4376. }
  4377. ElseIf ((0x40 == Local0))
  4378. {
  4379. While ((PBSY && (0x4B > Local2)))
  4380. {
  4381. Sleep (0x64)
  4382. Local2++
  4383. }
  4384. }
  4385.  
  4386. \SPNF = 0x00
  4387. }
  4388. }
  4389.  
  4390. Method (CTYP, 1, NotSerialized)
  4391. {
  4392. Local0 = Zero
  4393. If (Arg0)
  4394. {
  4395. If (((MAP > 0x01) && (MAP < 0x06)))
  4396. {
  4397. Local0 = 0x01
  4398. }
  4399. Else
  4400. {
  4401. If ((MAP == Zero))
  4402. {
  4403. Local0 = 0x03
  4404. }
  4405.  
  4406. If ((MAP == One))
  4407. {
  4408. Local0 = 0x04
  4409. }
  4410. }
  4411. }
  4412. ElseIf ((MAP > 0x05))
  4413. {
  4414. Local0 = 0x02
  4415. }
  4416. Else
  4417. {
  4418. If ((MAP == Zero))
  4419. {
  4420. Local0 = 0x05
  4421. }
  4422.  
  4423. If ((MAP == One))
  4424. {
  4425. Local0 = 0x06
  4426. }
  4427. }
  4428.  
  4429. Return (Local0)
  4430. }
  4431.  
  4432. Device (PRID)
  4433. {
  4434. Name (_ADR, 0x00) // _ADR: Address
  4435. Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode
  4436. {
  4437. Noop
  4438. Name (PBUF, Buffer (0x14)
  4439. {
  4440. /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........
  4441. /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........
  4442. /* 0010 */ 0x00, 0x00, 0x00, 0x00 // ....
  4443. })
  4444. CreateDWordField (PBUF, 0x00, PIO0)
  4445. CreateDWordField (PBUF, 0x04, DMA0)
  4446. CreateDWordField (PBUF, 0x08, PIO1)
  4447. CreateDWordField (PBUF, 0x0C, DMA1)
  4448. CreateDWordField (PBUF, 0x10, FLAG)
  4449. PIO0 = GETP (PRIT)
  4450. DMA0 = GETD ((SDMA & 0x01), (ICR3 & 0x01), (
  4451. ICR0 & 0x01), SDT0)
  4452. If ((DMA0 == 0xFFFFFFFF))
  4453. {
  4454. DMA0 = PIO0 /* \_SB_.PCI0.IDE1.PRID._GTM.PIO0 */
  4455. }
  4456.  
  4457. If ((PRIT & 0x4000))
  4458. {
  4459. If (((PRIT & 0x90) == 0x80))
  4460. {
  4461. PIO1 = 0x0384
  4462. }
  4463. Else
  4464. {
  4465. PIO1 = GETT (PSIT)
  4466. }
  4467. }
  4468. Else
  4469. {
  4470. PIO1 = 0xFFFFFFFF
  4471. }
  4472.  
  4473. DMA1 = GETD ((SDMA & 0x02), (ICR3 & 0x02), (
  4474. ICR0 & 0x02), SDT1)
  4475. If ((DMA1 == 0xFFFFFFFF))
  4476. {
  4477. DMA1 = PIO1 /* \_SB_.PCI0.IDE1.PRID._GTM.PIO1 */
  4478. }
  4479.  
  4480. FLAG = GETF ((SDMA & 0x01), (SDMA & 0x02), PRIT)
  4481. Return (PBUF) /* \_SB_.PCI0.IDE1.PRID._GTM.PBUF */
  4482. }
  4483.  
  4484. Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode
  4485. {
  4486. Noop
  4487. CreateDWordField (Arg0, 0x00, PIO0)
  4488. CreateDWordField (Arg0, 0x04, DMA0)
  4489. CreateDWordField (Arg0, 0x08, PIO1)
  4490. CreateDWordField (Arg0, 0x0C, DMA1)
  4491. CreateDWordField (Arg0, 0x10, FLAG)
  4492. ICR2 = 0x04
  4493. If ((SizeOf (Arg1) == 0x0200))
  4494. {
  4495. PRIT &= 0x4CF0
  4496. SDMA &= 0x0E
  4497. SDT0 = 0x00
  4498. ICR0 &= 0x0E
  4499. ICR1 &= 0x0E
  4500. ICR3 &= 0x0E
  4501. ICR5 &= 0x0E
  4502. CreateWordField (Arg1, 0x62, W490)
  4503. CreateWordField (Arg1, 0x6A, W530)
  4504. CreateWordField (Arg1, 0x7E, W630)
  4505. CreateWordField (Arg1, 0x80, W640)
  4506. CreateWordField (Arg1, 0xB0, W880)
  4507. PRIT |= 0x8004
  4508. If (((FLAG & 0x02) && (W490 & 0x0800)))
  4509. {
  4510. PRIT |= 0x02
  4511. }
  4512.  
  4513. PRIT |= SETP (PIO0, W530, W640)
  4514. If ((FLAG & 0x01))
  4515. {
  4516. SDMA |= 0x01
  4517. SDT0 = SETD (DMA0)
  4518. If ((W880 & 0x20))
  4519. {
  4520. ICR1 |= 0x01
  4521. ICR5 |= 0x01
  4522. }
  4523.  
  4524. If ((W880 & 0x10))
  4525. {
  4526. ICR1 |= 0x01
  4527. }
  4528.  
  4529. If ((DMA0 < 0x1E))
  4530. {
  4531. ICR3 |= 0x01
  4532. }
  4533.  
  4534. If ((DMA0 < 0x3C))
  4535. {
  4536. ICR0 |= 0x01
  4537. }
  4538. }
  4539. }
  4540.  
  4541. If ((SizeOf (Arg2) == 0x0200))
  4542. {
  4543. PRIT &= 0x3F0F
  4544. PSIT = 0x00
  4545. SDMA &= 0x0D
  4546. SDT1 = 0x00
  4547. ICR0 &= 0x0D
  4548. ICR1 &= 0x0D
  4549. ICR3 &= 0x0D
  4550. ICR5 &= 0x0D
  4551. CreateWordField (Arg2, 0x62, W491)
  4552. CreateWordField (Arg2, 0x6A, W531)
  4553. CreateWordField (Arg2, 0x7E, W631)
  4554. CreateWordField (Arg2, 0x80, W641)
  4555. CreateWordField (Arg2, 0xB0, W881)
  4556. PRIT |= 0x8040
  4557. If (((FLAG & 0x08) && (W491 & 0x0800)))
  4558. {
  4559. PRIT |= 0x20
  4560. }
  4561.  
  4562. If ((FLAG & 0x10))
  4563. {
  4564. PRIT |= 0x4000
  4565. If ((PIO1 > 0xF0))
  4566. {
  4567. PRIT |= 0x80
  4568. }
  4569. Else
  4570. {
  4571. PRIT |= 0x10
  4572. PSIT = SETT (PIO1, W531, W641)
  4573. }
  4574. }
  4575.  
  4576. If ((FLAG & 0x04))
  4577. {
  4578. SDMA |= 0x02
  4579. SDT1 = SETD (DMA1)
  4580. If ((W881 & 0x20))
  4581. {
  4582. ICR1 |= 0x02
  4583. ICR5 |= 0x02
  4584. }
  4585.  
  4586. If ((W881 & 0x10))
  4587. {
  4588. ICR1 |= 0x02
  4589. }
  4590.  
  4591. If ((DMA0 < 0x1E))
  4592. {
  4593. ICR3 |= 0x02
  4594. }
  4595.  
  4596. If ((DMA0 < 0x3C))
  4597. {
  4598. ICR0 |= 0x02
  4599. }
  4600. }
  4601. }
  4602. }
  4603.  
  4604. Method (_PS0, 0, NotSerialized) // _PS0: Power State 0
  4605. {
  4606. BSSP (0x00)
  4607. }
  4608.  
  4609. Method (_PS3, 0, NotSerialized) // _PS3: Power State 3
  4610. {
  4611. }
  4612.  
  4613. Device (P_D0)
  4614. {
  4615. Name (_ADR, 0x00) // _ADR: Address
  4616. Method (_GTF, 0, NotSerialized) // _GTF: Get Task File
  4617. {
  4618. Noop
  4619. Name (PIB0, Buffer (0x15)
  4620. {
  4621. /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x03, // ........
  4622. /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x03, // ........
  4623. /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // .....
  4624. })
  4625. CreateByteField (PIB0, 0x01, PMD0)
  4626. CreateByteField (PIB0, 0x08, DMD0)
  4627. If ((PRIT & 0x02))
  4628. {
  4629. If (((PRIT & 0x09) == 0x08))
  4630. {
  4631. PMD0 = 0x08
  4632. }
  4633. Else
  4634. {
  4635. PMD0 = 0x0A
  4636. Local0 = ((PRIT & 0x0300) >> 0x08)
  4637. Local1 = ((PRIT & 0x3000) >> 0x0C)
  4638. Local2 = (Local0 + Local1)
  4639. If ((0x03 == Local2))
  4640. {
  4641. PMD0 = 0x0B
  4642. }
  4643.  
  4644. If ((0x05 == Local2))
  4645. {
  4646. PMD0 = 0x0C
  4647. }
  4648. }
  4649. }
  4650. Else
  4651. {
  4652. PMD0 = 0x01
  4653. }
  4654.  
  4655. If ((SDMA & 0x01))
  4656. {
  4657. DMD0 = (SDT0 | 0x40)
  4658. If ((ICR0 & 0x01))
  4659. {
  4660. DMD0 += 0x02
  4661. }
  4662.  
  4663. If ((ICR3 & 0x01))
  4664. {
  4665. DMD0 = 0x45
  4666. }
  4667. }
  4668. Else
  4669. {
  4670. DMD0 = (((PMD0 & 0x07) - 0x02) | 0x20)
  4671. }
  4672.  
  4673. Return (PIB0) /* \_SB_.PCI0.IDE1.PRID.P_D0._GTF.PIB0 */
  4674. }
  4675. }
  4676.  
  4677. Device (P_D1)
  4678. {
  4679. Name (_ADR, 0x01) // _ADR: Address
  4680. Method (_GTF, 0, NotSerialized) // _GTF: Get Task File
  4681. {
  4682. Noop
  4683. Name (PIB1, Buffer (0x15)
  4684. {
  4685. /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, 0x03, // ........
  4686. /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, 0x10, 0x03, // ........
  4687. /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // .....
  4688. })
  4689. CreateByteField (PIB1, 0x01, PMD1)
  4690. CreateByteField (PIB1, 0x08, DMD1)
  4691. If ((PRIT & 0x20))
  4692. {
  4693. If (((PRIT & 0x90) == 0x80))
  4694. {
  4695. PMD1 = 0x08
  4696. }
  4697. Else
  4698. {
  4699. Local0 = ((PSIT & 0x03) + ((PSIT & 0x0C) >> 0x02
  4700. ))
  4701. If ((0x05 == Local0))
  4702. {
  4703. PMD1 = 0x0C
  4704. }
  4705. ElseIf ((0x03 == Local0))
  4706. {
  4707. PMD1 = 0x0B
  4708. }
  4709. Else
  4710. {
  4711. PMD1 = 0x0A
  4712. }
  4713. }
  4714. }
  4715. Else
  4716. {
  4717. PMD1 = 0x01
  4718. }
  4719.  
  4720. If ((SDMA & 0x02))
  4721. {
  4722. DMD1 = (SDT1 | 0x40)
  4723. If ((ICR0 & 0x02))
  4724. {
  4725. DMD1 += 0x02
  4726. }
  4727.  
  4728. If ((ICR3 & 0x02))
  4729. {
  4730. DMD1 = 0x45
  4731. }
  4732. }
  4733. Else
  4734. {
  4735. DMD1 = (((PMD1 & 0x07) - 0x02) | 0x20)
  4736. }
  4737.  
  4738. Return (PIB1) /* \_SB_.PCI0.IDE1.PRID.P_D1._GTF.PIB1 */
  4739. }
  4740. }
  4741. }
  4742.  
  4743. Device (SECD)
  4744. {
  4745. Name (_ADR, 0x01) // _ADR: Address
  4746. Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode
  4747. {
  4748. Noop
  4749. Name (SBUF, Buffer (0x14)
  4750. {
  4751. /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........
  4752. /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........
  4753. /* 0010 */ 0x00, 0x00, 0x00, 0x00 // ....
  4754. })
  4755. CreateDWordField (SBUF, 0x00, PIO0)
  4756. CreateDWordField (SBUF, 0x04, DMA0)
  4757. CreateDWordField (SBUF, 0x08, PIO1)
  4758. CreateDWordField (SBUF, 0x0C, DMA1)
  4759. CreateDWordField (SBUF, 0x10, FLAG)
  4760. PIO0 = GETP (SECT)
  4761. DMA0 = GETD ((SDMA & 0x04), (ICR3 & 0x04), (
  4762. ICR0 & 0x04), SDT2)
  4763. If ((DMA0 == 0xFFFFFFFF))
  4764. {
  4765. DMA0 = PIO0 /* \_SB_.PCI0.IDE1.SECD._GTM.PIO0 */
  4766. }
  4767.  
  4768. If ((SECT & 0x4000))
  4769. {
  4770. If (((SECT & 0x90) == 0x80))
  4771. {
  4772. PIO1 = 0x0384
  4773. }
  4774. Else
  4775. {
  4776. PIO1 = GETT (SSIT)
  4777. }
  4778. }
  4779. Else
  4780. {
  4781. PIO1 = 0xFFFFFFFF
  4782. }
  4783.  
  4784. DMA1 = GETD ((SDMA & 0x08), (ICR3 & 0x08), (
  4785. ICR0 & 0x08), SDT3)
  4786. If ((DMA1 == 0xFFFFFFFF))
  4787. {
  4788. DMA1 = PIO1 /* \_SB_.PCI0.IDE1.SECD._GTM.PIO1 */
  4789. }
  4790.  
  4791. FLAG = GETF ((SDMA & 0x04), (SDMA & 0x08), SECT)
  4792. Return (SBUF) /* \_SB_.PCI0.IDE1.SECD._GTM.SBUF */
  4793. }
  4794.  
  4795. Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode
  4796. {
  4797. Noop
  4798. CreateDWordField (Arg0, 0x00, PIO0)
  4799. CreateDWordField (Arg0, 0x04, DMA0)
  4800. CreateDWordField (Arg0, 0x08, PIO1)
  4801. CreateDWordField (Arg0, 0x0C, DMA1)
  4802. CreateDWordField (Arg0, 0x10, FLAG)
  4803. ICR2 = 0x04
  4804. If ((SizeOf (Arg1) == 0x0200))
  4805. {
  4806. SECT &= 0x4CF0
  4807. SDMA &= 0x0B
  4808. SDT2 = 0x00
  4809. ICR0 &= 0x0B
  4810. ICR1 &= 0x0B
  4811. ICR3 &= 0x0B
  4812. ICR5 &= 0x0B
  4813. CreateWordField (Arg1, 0x62, W490)
  4814. CreateWordField (Arg1, 0x6A, W530)
  4815. CreateWordField (Arg1, 0x7E, W630)
  4816. CreateWordField (Arg1, 0x80, W640)
  4817. CreateWordField (Arg1, 0xB0, W880)
  4818. SECT |= 0x8004
  4819. If (((FLAG & 0x02) && (W490 & 0x0800)))
  4820. {
  4821. SECT |= 0x02
  4822. }
  4823.  
  4824. SECT |= SETP (PIO0, W530, W640)
  4825. If ((FLAG & 0x01))
  4826. {
  4827. SDMA |= 0x04
  4828. SDT2 = SETD (DMA0)
  4829. If ((W880 & 0x20))
  4830. {
  4831. ICR1 |= 0x04
  4832. ICR5 |= 0x04
  4833. }
  4834.  
  4835. If ((W880 & 0x10))
  4836. {
  4837. ICR1 |= 0x04
  4838. }
  4839.  
  4840. If ((DMA0 < 0x1E))
  4841. {
  4842. ICR3 |= 0x04
  4843. }
  4844.  
  4845. If ((DMA0 < 0x3C))
  4846. {
  4847. ICR0 |= 0x04
  4848. }
  4849. }
  4850. }
  4851.  
  4852. If ((SizeOf (Arg2) == 0x0200))
  4853. {
  4854. SECT &= 0x3F0F
  4855. SSIT = 0x00
  4856. SDMA &= 0x07
  4857. SDT3 = 0x00
  4858. ICR0 &= 0x07
  4859. ICR1 &= 0x07
  4860. ICR3 &= 0x07
  4861. ICR5 &= 0x07
  4862. CreateWordField (Arg2, 0x62, W491)
  4863. CreateWordField (Arg2, 0x6A, W531)
  4864. CreateWordField (Arg2, 0x7E, W631)
  4865. CreateWordField (Arg2, 0x80, W641)
  4866. CreateWordField (Arg2, 0xB0, W881)
  4867. SECT |= 0x8040
  4868. If (((FLAG & 0x08) && (W491 & 0x0800)))
  4869. {
  4870. SECT |= 0x20
  4871. }
  4872.  
  4873. If ((FLAG & 0x10))
  4874. {
  4875. SECT |= 0x4000
  4876. If ((PIO1 > 0xF0))
  4877. {
  4878. SECT |= 0x80
  4879. }
  4880. Else
  4881. {
  4882. SECT |= 0x10
  4883. SSIT = SETT (PIO1, W531, W641)
  4884. }
  4885. }
  4886.  
  4887. If ((FLAG & 0x04))
  4888. {
  4889. SDMA |= 0x08
  4890. SDT3 = SETD (DMA1)
  4891. If ((W881 & 0x20))
  4892. {
  4893. ICR1 |= 0x08
  4894. ICR5 |= 0x08
  4895. }
  4896.  
  4897. If ((W881 & 0x10))
  4898. {
  4899. ICR1 |= 0x08
  4900. }
  4901.  
  4902. If ((DMA0 < 0x1E))
  4903. {
  4904. ICR3 |= 0x08
  4905. }
  4906.  
  4907. If ((DMA0 < 0x3C))
  4908. {
  4909. ICR0 |= 0x08
  4910. }
  4911. }
  4912. }
  4913. }
  4914.  
  4915. Method (_PS0, 0, NotSerialized) // _PS0: Power State 0
  4916. {
  4917. BSSP (0x01)
  4918. }
  4919.  
  4920. Method (_PS3, 0, NotSerialized) // _PS3: Power State 3
  4921. {
  4922. }
  4923.  
  4924. Device (S_D0)
  4925. {
  4926. Name (_ADR, 0x00) // _ADR: Address
  4927. Method (_GTF, 0, NotSerialized) // _GTF: Get Task File
  4928. {
  4929. Noop
  4930. Name (SIB0, Buffer (0x15)
  4931. {
  4932. /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x03, // ........
  4933. /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x10, 0x03, // ........
  4934. /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // .....
  4935. })
  4936. CreateByteField (SIB0, 0x01, PMD0)
  4937. CreateByteField (SIB0, 0x08, DMD0)
  4938. If ((SECT & 0x02))
  4939. {
  4940. If (((SECT & 0x09) == 0x08))
  4941. {
  4942. PMD0 = 0x08
  4943. }
  4944. Else
  4945. {
  4946. PMD0 = 0x0A
  4947. Local0 = ((SECT & 0x0300) >> 0x08)
  4948. Local1 = ((SECT & 0x3000) >> 0x0C)
  4949. Local2 = (Local0 + Local1)
  4950. If ((0x03 == Local2))
  4951. {
  4952. PMD0 = 0x0B
  4953. }
  4954.  
  4955. If ((0x05 == Local2))
  4956. {
  4957. PMD0 = 0x0C
  4958. }
  4959. }
  4960. }
  4961. Else
  4962. {
  4963. PMD0 = 0x01
  4964. }
  4965.  
  4966. If ((SDMA & 0x04))
  4967. {
  4968. DMD0 = (SDT2 | 0x40)
  4969. If ((ICR0 & 0x04))
  4970. {
  4971. DMD0 += 0x02
  4972. }
  4973.  
  4974. If ((ICR3 & 0x04))
  4975. {
  4976. DMD0 = 0x45
  4977. }
  4978. }
  4979. Else
  4980. {
  4981. DMD0 = (((PMD0 & 0x07) - 0x02) | 0x20)
  4982. }
  4983.  
  4984. Return (SIB0) /* \_SB_.PCI0.IDE1.SECD.S_D0._GTF.SIB0 */
  4985. }
  4986. }
  4987.  
  4988. Device (S_D1)
  4989. {
  4990. Name (_ADR, 0x01) // _ADR: Address
  4991. Method (_GTF, 0, NotSerialized) // _GTF: Get Task File
  4992. {
  4993. Noop
  4994. Name (SIB1, Buffer (0x15)
  4995. {
  4996. /* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, 0x03, // ........
  4997. /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, 0x10, 0x03, // ........
  4998. /* 0010 */ 0x00, 0x00, 0x00, 0xA0, 0xEF // .....
  4999. })
  5000. CreateByteField (SIB1, 0x01, PMD1)
  5001. CreateByteField (SIB1, 0x08, DMD1)
  5002. If ((SECT & 0x20))
  5003. {
  5004. If (((SECT & 0x90) == 0x80))
  5005. {
  5006. PMD1 = 0x08
  5007. }
  5008. Else
  5009. {
  5010. Local0 = ((SSIT & 0x03) + ((SSIT & 0x0C) >> 0x02
  5011. ))
  5012. If ((0x05 == Local0))
  5013. {
  5014. PMD1 = 0x0C
  5015. }
  5016. ElseIf ((0x03 == Local0))
  5017. {
  5018. PMD1 = 0x0B
  5019. }
  5020. Else
  5021. {
  5022. PMD1 = 0x0A
  5023. }
  5024. }
  5025. }
  5026. Else
  5027. {
  5028. PMD1 = 0x01
  5029. }
  5030.  
  5031. If ((SDMA & 0x02))
  5032. {
  5033. DMD1 = (SDT3 | 0x40)
  5034. If ((ICR0 & 0x08))
  5035. {
  5036. DMD1 += 0x02
  5037. }
  5038.  
  5039. If ((ICR3 & 0x08))
  5040. {
  5041. DMD1 = 0x45
  5042. }
  5043. }
  5044. Else
  5045. {
  5046. DMD1 = (((PMD1 & 0x07) - 0x02) | 0x20)
  5047. }
  5048.  
  5049. Return (SIB1) /* \_SB_.PCI0.IDE1.SECD.S_D1._GTF.SIB1 */
  5050. }
  5051. }
  5052. }
  5053. }
  5054.  
  5055. Device (SMBS)
  5056. {
  5057. Name (_ADR, 0x001F0003) // _ADR: Address
  5058. }
  5059.  
  5060. Device (USB1)
  5061. {
  5062. Name (_ADR, 0x001D0000) // _ADR: Address
  5063. OperationRegion (USBO, PCI_Config, 0xC4, 0x04)
  5064. Field (USBO, DWordAcc, Lock, Preserve)
  5065. {
  5066. RSEN, 2
  5067. }
  5068.  
  5069. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  5070. {
  5071. 0x03,
  5072. 0x03
  5073. })
  5074. Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
  5075. {
  5076. If (Arg0)
  5077. {
  5078. RSEN = 0x01
  5079. }
  5080. Else
  5081. {
  5082. RSEN = 0x00
  5083. }
  5084. }
  5085.  
  5086. Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
  5087. {
  5088. Return (0x02)
  5089. }
  5090.  
  5091. Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
  5092. {
  5093. Return (0x02)
  5094. }
  5095.  
  5096. Device (RHUB)
  5097. {
  5098. Name (_ADR, 0x00) // _ADR: Address
  5099. Device (PRT2)
  5100. {
  5101. Name (_ADR, 0x02) // _ADR: Address
  5102. Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
  5103. {
  5104. 0x00,
  5105. 0x00,
  5106. 0x00,
  5107. 0x00
  5108. })
  5109. }
  5110. }
  5111. }
  5112.  
  5113. Device (USB2)
  5114. {
  5115. Name (_ADR, 0x001D0001) // _ADR: Address
  5116. OperationRegion (USBO, PCI_Config, 0xC4, 0x04)
  5117. Field (USBO, DWordAcc, Lock, Preserve)
  5118. {
  5119. RSEN, 2
  5120. }
  5121.  
  5122. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  5123. {
  5124. 0x04,
  5125. 0x03
  5126. })
  5127. Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
  5128. {
  5129. If (Arg0)
  5130. {
  5131. RSEN = 0x01
  5132. }
  5133. Else
  5134. {
  5135. RSEN = 0x00
  5136. }
  5137. }
  5138.  
  5139. Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
  5140. {
  5141. Return (0x02)
  5142. }
  5143.  
  5144. Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
  5145. {
  5146. Return (0x02)
  5147. }
  5148.  
  5149. Device (RHUB)
  5150. {
  5151. Name (_ADR, 0x00) // _ADR: Address
  5152. Device (PRT2)
  5153. {
  5154. Name (_ADR, 0x02) // _ADR: Address
  5155. Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
  5156. {
  5157. 0x00,
  5158. 0x00,
  5159. 0x00,
  5160. 0x00
  5161. })
  5162. }
  5163. }
  5164. }
  5165.  
  5166. Device (USB3)
  5167. {
  5168. Name (_ADR, 0x001D0002) // _ADR: Address
  5169. OperationRegion (USBO, PCI_Config, 0xC4, 0x04)
  5170. Field (USBO, DWordAcc, Lock, Preserve)
  5171. {
  5172. RSEN, 2
  5173. }
  5174.  
  5175. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  5176. {
  5177. 0x0C,
  5178. 0x03
  5179. })
  5180. Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
  5181. {
  5182. If (Arg0)
  5183. {
  5184. RSEN = 0x03
  5185. }
  5186. Else
  5187. {
  5188. RSEN = 0x00
  5189. }
  5190. }
  5191.  
  5192. Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
  5193. {
  5194. Return (0x02)
  5195. }
  5196.  
  5197. Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
  5198. {
  5199. Return (0x02)
  5200. }
  5201.  
  5202. Device (RHUB)
  5203. {
  5204. Name (_ADR, 0x00) // _ADR: Address
  5205. Device (PRT2)
  5206. {
  5207. Name (_ADR, 0x02) // _ADR: Address
  5208. Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
  5209. {
  5210. 0x00,
  5211. 0x00,
  5212. 0x00,
  5213. 0x00
  5214. })
  5215. }
  5216. }
  5217. }
  5218.  
  5219. Device (USB4)
  5220. {
  5221. Name (_ADR, 0x001D0003) // _ADR: Address
  5222. OperationRegion (USBO, PCI_Config, 0xC4, 0x04)
  5223. Field (USBO, DWordAcc, Lock, Preserve)
  5224. {
  5225. RSEN, 2
  5226. }
  5227.  
  5228. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  5229. {
  5230. 0x0E,
  5231. 0x03
  5232. })
  5233. Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
  5234. {
  5235. If (Arg0)
  5236. {
  5237. RSEN = 0x03
  5238. }
  5239. Else
  5240. {
  5241. RSEN = 0x00
  5242. }
  5243. }
  5244.  
  5245. Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
  5246. {
  5247. Return (0x02)
  5248. }
  5249.  
  5250. Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
  5251. {
  5252. Return (0x02)
  5253. }
  5254.  
  5255. Device (RHUB)
  5256. {
  5257. Name (_ADR, 0x00) // _ADR: Address
  5258. Device (PRT2)
  5259. {
  5260. Name (_ADR, 0x02) // _ADR: Address
  5261. Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
  5262. {
  5263. 0x00,
  5264. 0x00,
  5265. 0x00,
  5266. 0x00
  5267. })
  5268. }
  5269. }
  5270. }
  5271.  
  5272. Device (EUSB)
  5273. {
  5274. Name (_ADR, 0x001D0007) // _ADR: Address
  5275. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  5276. {
  5277. 0x0D,
  5278. 0x03
  5279. })
  5280. Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
  5281. {
  5282. Return (0x02)
  5283. }
  5284.  
  5285. Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
  5286. {
  5287. Return (0x02)
  5288. }
  5289.  
  5290. Device (RHUB)
  5291. {
  5292. Name (_ADR, 0x00) // _ADR: Address
  5293. Device (PRT2)
  5294. {
  5295. Name (_ADR, 0x02) // _ADR: Address
  5296. Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
  5297. {
  5298. 0x00,
  5299. 0x00,
  5300. 0x00,
  5301. 0x00
  5302. })
  5303. }
  5304.  
  5305. Device (PRT4)
  5306. {
  5307. Name (_ADR, 0x04) // _ADR: Address
  5308. Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
  5309. {
  5310. 0x00,
  5311. 0x00,
  5312. 0x00,
  5313. 0x00
  5314. })
  5315. }
  5316.  
  5317. Device (PRT6)
  5318. {
  5319. Name (_ADR, 0x06) // _ADR: Address
  5320. Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
  5321. {
  5322. 0x00,
  5323. 0x00,
  5324. 0x00,
  5325. 0x00
  5326. })
  5327. }
  5328.  
  5329. Device (PRT8)
  5330. {
  5331. Name (_ADR, 0x08) // _ADR: Address
  5332. Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
  5333. {
  5334. 0x00,
  5335. 0x00,
  5336. 0x00,
  5337. 0x00
  5338. })
  5339. }
  5340. }
  5341. }
  5342. }
  5343. }
  5344.  
  5345. Scope (_SI)
  5346. {
  5347. Method (_SST, 1, NotSerialized) // _SST: System Status
  5348. {
  5349. If ((Arg0 == 0x01)){}
  5350. If ((Arg0 == 0x03))
  5351. {
  5352. If ((OSYS == 0x07CE))
  5353. {
  5354. \_SB.BCMD = (Arg0 | 0x80)
  5355. \_SB.SMIC = Zero
  5356. }
  5357.  
  5358. If ((OSYS == 0x07CF))
  5359. {
  5360. \_SB.BCMD = (Arg0 | 0x80)
  5361. \_SB.SMIC = Zero
  5362. }
  5363. Else
  5364. {
  5365. }
  5366. }
  5367. }
  5368. }
  5369.  
  5370. Method (P8XH, 2, Serialized)
  5371. {
  5372. If ((Arg0 == 0x00))
  5373. {
  5374. P80D = ((P80D & 0xFFFFFF00) | Arg1)
  5375. }
  5376.  
  5377. If ((Arg0 == 0x01))
  5378. {
  5379. P80D = ((P80D & 0xFFFF00FF) | (Arg1 << 0x08))
  5380. }
  5381.  
  5382. If ((Arg0 == 0x02))
  5383. {
  5384. P80D = ((P80D & 0xFF00FFFF) | (Arg1 << 0x10))
  5385. }
  5386.  
  5387. If ((Arg0 == 0x03))
  5388. {
  5389. P80D = ((P80D & 0x00FFFFFF) | (Arg1 << 0x18))
  5390. }
  5391.  
  5392. P80H = P80D /* \P80D */
  5393. }
  5394.  
  5395. Method (TRAP, 1, Serialized)
  5396. {
  5397. SMIF = Arg0
  5398. TRP0 = 0x00
  5399. Return (SMIF) /* \SMIF */
  5400. }
  5401.  
  5402. Method (BRTW, 1, Serialized)
  5403. {
  5404. Local1 = Arg0
  5405. If ((ALSE == 0x02))
  5406. {
  5407. Local1 = ((ALAF * Arg0) / 0x64)
  5408. If ((Local1 > 0x64))
  5409. {
  5410. Local1 = 0x64
  5411. }
  5412. }
  5413.  
  5414. Local0 = ((0xFF * Local1) / 0x64)
  5415. PRM0 = Local0
  5416. If ((TRAP (0x12) == 0x00))
  5417. {
  5418. P8XH (0x02, Local0)
  5419. BRTL = Arg0
  5420. }
  5421. }
  5422.  
  5423. Method (GETB, 3, Serialized)
  5424. {
  5425. Local0 = (Arg0 * 0x08)
  5426. Local1 = (Arg1 * 0x08)
  5427. CreateField (Arg2, Local0, Local1, TBF3)
  5428. Return (TBF3) /* \GETB.TBF3 */
  5429. }
  5430.  
  5431. Method (HKDS, 1, Serialized)
  5432. {
  5433. If ((0x00 == DSEN))
  5434. {
  5435. If ((TRAP (Arg0) == 0x00))
  5436. {
  5437. If ((CADL != PADL))
  5438. {
  5439. PADL = CADL /* \CADL */
  5440. If (((OSYS > 0x07D0) || (OSYS < 0x07D6)))
  5441. {
  5442. Notify (\_SB.PCI0, 0x00) // Bus Check
  5443. }
  5444. Else
  5445. {
  5446. Notify (\_SB.PCI0.IGD0, 0x00) // Bus Check
  5447. }
  5448.  
  5449. Sleep (0x02EE)
  5450. }
  5451.  
  5452. Notify (\_SB.PCI0.IGD0, 0x80) // Status Change
  5453. }
  5454. }
  5455.  
  5456. If ((0x01 == DSEN))
  5457. {
  5458. If ((TRAP (Arg0++) == 0x00))
  5459. {
  5460. Notify (\_SB.PCI0.IGD0, 0x81) // Information Change
  5461. }
  5462. }
  5463. }
  5464.  
  5465. Method (LSDS, 1, Serialized)
  5466. {
  5467. If (Arg0)
  5468. {
  5469. HKDS (0x0C)
  5470. }
  5471. Else
  5472. {
  5473. HKDS (0x0E)
  5474. }
  5475.  
  5476. If ((DSEN != 0x01))
  5477. {
  5478. Sleep (0x32)
  5479. While ((DSEN == 0x02))
  5480. {
  5481. Sleep (0x32)
  5482. }
  5483. }
  5484. }
  5485.  
  5486. Method (PNOT, 0, Serialized)
  5487. {
  5488. If (MPEN)
  5489. {
  5490. If ((PDC0 & 0x08))
  5491. {
  5492. Notify (\_PR.CPU0, 0x80) // Performance Capability Change
  5493. If ((PDC0 & 0x10))
  5494. {
  5495. Sleep (0x64)
  5496. Notify (\_PR.CPU0, 0x81) // C-State Change
  5497. }
  5498. }
  5499.  
  5500. If ((PDC1 & 0x08))
  5501. {
  5502. Notify (\_PR.CPU1, 0x80) // Performance Capability Change
  5503. If ((PDC1 & 0x10))
  5504. {
  5505. Sleep (0x64)
  5506. Notify (\_PR.CPU1, 0x81) // C-State Change
  5507. }
  5508. }
  5509.  
  5510. If ((PDC2 & 0x08))
  5511. {
  5512. Notify (\_PR.CPU2, 0x80) // Performance Capability Change
  5513. If ((PDC2 & 0x10))
  5514. {
  5515. Sleep (0x64)
  5516. Notify (\_PR.CPU2, 0x81) // C-State Change
  5517. }
  5518. }
  5519.  
  5520. If ((PDC3 & 0x08))
  5521. {
  5522. Notify (\_PR.CPU3, 0x80) // Performance Capability Change
  5523. If ((PDC3 & 0x10))
  5524. {
  5525. Sleep (0x64)
  5526. Notify (\_PR.CPU3, 0x81) // C-State Change
  5527. }
  5528. }
  5529. }
  5530. Else
  5531. {
  5532. Notify (\_PR.CPU0, 0x80) // Performance Capability Change
  5533. Sleep (0x64)
  5534. Notify (\_PR.CPU0, 0x81) // C-State Change
  5535. }
  5536.  
  5537. Notify (\_SB.PCI0.LPC0.H_EC.BAT1, 0x80) // Status Change
  5538. }
  5539.  
  5540. Method (CPRN, 0, Serialized)
  5541. {
  5542. SPPC ()
  5543. If (MPEN)
  5544. {
  5545. If ((PDC0 & 0x08))
  5546. {
  5547. Notify (\_PR.CPU0, 0x80) // Performance Capability Change
  5548. Sleep (0x64)
  5549. }
  5550.  
  5551. If ((PDC1 & 0x08))
  5552. {
  5553. Notify (\_PR.CPU1, 0x80) // Performance Capability Change
  5554. Sleep (0x64)
  5555. }
  5556.  
  5557. If ((PDC2 & 0x08))
  5558. {
  5559. Notify (\_PR.CPU2, 0x80) // Performance Capability Change
  5560. Sleep (0x64)
  5561. }
  5562.  
  5563. If ((PDC3 & 0x08))
  5564. {
  5565. Notify (\_PR.CPU3, 0x80) // Performance Capability Change
  5566. Sleep (0x64)
  5567. }
  5568. }
  5569. Else
  5570. {
  5571. Notify (\_PR.CPU0, 0x80) // Performance Capability Change
  5572. Sleep (0x64)
  5573. }
  5574. }
  5575.  
  5576. Method (SPPC, 0, NotSerialized)
  5577. {
  5578. \_SB.NIST = (\_SB.PPCM + 0x01)
  5579. \_SB.PPCS = 0x00
  5580. \_PR.CPU0._PPC = \_SB.PPCS
  5581. If ((\_SB.GSSR == 0x01))
  5582. {
  5583. If ((\_SB.TZON == 0x01))
  5584. {
  5585. Divide (\_SB.PPCM, 0x02, Local1, Local2)
  5586. \_SB.PPCS = Local2
  5587. \_SB.NIST = (\_SB.PPCM - \_SB.PPCS)
  5588. \_SB.NIST++
  5589. \_PR.CPU0._PPC = \_SB.PPCS
  5590. }
  5591.  
  5592. If ((\_SB.TZON == 0x02))
  5593. {
  5594. \_SB.PPCS = \_SB.PPCM
  5595. \_SB.NIST = 0x01
  5596. \_PR.CPU0._PPC = \_SB.PPCS
  5597. }
  5598. }
  5599.  
  5600. If ((\_SB.GSSR == 0x02))
  5601. {
  5602. \_SB.PPCS = (\_SB.PPCM - \_SB.RIST)
  5603. \_PR.CPU0._PPC = \_SB.PPCS
  5604. }
  5605. }
  5606.  
  5607. Method (CCRN, 0, Serialized)
  5608. {
  5609. If (MPEN)
  5610. {
  5611. If ((PDC0 & 0x10))
  5612. {
  5613. Notify (\_PR.CPU0, 0x81) // C-State Change
  5614. }
  5615.  
  5616. If ((PDC1 & 0x10))
  5617. {
  5618. Notify (\_PR.CPU1, 0x81) // C-State Change
  5619. }
  5620.  
  5621. If ((PDC2 & 0x10))
  5622. {
  5623. Notify (\_PR.CPU2, 0x81) // C-State Change
  5624. }
  5625.  
  5626. If ((PDC3 & 0x10))
  5627. {
  5628. Notify (\_PR.CPU3, 0x81) // C-State Change
  5629. }
  5630. }
  5631. Else
  5632. {
  5633. Notify (\_PR.CPU0, 0x81) // C-State Change
  5634. }
  5635. }
  5636.  
  5637. Scope (\_TZ)
  5638. {
  5639. ThermalZone (TZ00)
  5640. {
  5641. Method (_CRT, 0, Serialized) // _CRT: Critical Temperature
  5642. {
  5643. Return ((0x0AAC + (\_SB.CRTT * 0x0A)))
  5644. }
  5645.  
  5646. Method (_SCP, 1, Serialized) // _SCP: Set Cooling Policy
  5647. {
  5648. CTYP = Arg0
  5649. }
  5650.  
  5651. Method (_TMP, 0, Serialized) // _TMP: Temperature
  5652. {
  5653. If (ECON)
  5654. {
  5655. Local0 = \_SB.PCI0.LPC0.H_EC.CTMP
  5656. If ((Local0 != 0xFF))
  5657. {
  5658. Return ((0x0AAC + (Local0 * 0x0A)))
  5659. }
  5660. Else
  5661. {
  5662. Return (0x0C1C)
  5663. }
  5664. }
  5665.  
  5666. Return (0x0BB8)
  5667. }
  5668.  
  5669. Method (_PSL, 0, Serialized) // _PSL: Passive List
  5670. {
  5671. If (MPEN)
  5672. {
  5673. Return (Package (0x04)
  5674. {
  5675. \_PR.CPU0,
  5676. \_PR.CPU1,
  5677. \_PR.CPU2,
  5678. \_PR.CPU3
  5679. })
  5680. }
  5681.  
  5682. Return (Package (0x01)
  5683. {
  5684. \_PR.CPU0
  5685. })
  5686. }
  5687.  
  5688. Method (_PSV, 0, Serialized) // _PSV: Passive Temperature
  5689. {
  5690. Return ((0x0AAC + (\_SB.PSVT * 0x0A)))
  5691. }
  5692.  
  5693. Method (_TC1, 0, Serialized) // _TC1: Thermal Constant 1
  5694. {
  5695. Return (\_SB.TC1V)
  5696. }
  5697.  
  5698. Method (_TC2, 0, Serialized) // _TC2: Thermal Constant 2
  5699. {
  5700. Return (\_SB.TC2V)
  5701. }
  5702.  
  5703. Method (_TSP, 0, Serialized) // _TSP: Thermal Sampling Period
  5704. {
  5705. Return (\_SB.TSPV)
  5706. }
  5707. }
  5708. }
  5709.  
  5710. Scope (\_SB)
  5711. {
  5712. OperationRegion (SNVS, SystemMemory, 0x7F5C0C7D, 0x000000FF)
  5713. Field (SNVS, AnyAcc, NoLock, Preserve)
  5714. {
  5715. SECI, 8,
  5716. DB00, 8,
  5717. DW00, 16,
  5718. OSYS, 16,
  5719. Offset (0x20),
  5720. Offset (0x40),
  5721. BFCC, 16,
  5722. Offset (0x50),
  5723. PVFN, 8,
  5724. IGDS, 8,
  5725. TLST, 8,
  5726. CADL, 8,
  5727. PADL, 8,
  5728. CSTE, 16,
  5729. NSTE, 16,
  5730. SSTE, 16,
  5731. NDID, 8,
  5732. BRTL, 8,
  5733. Offset (0x60),
  5734. PSVT, 8,
  5735. TC1V, 8,
  5736. TC2V, 8,
  5737. TSPV, 8,
  5738. CRTT, 8,
  5739. ACTT, 8,
  5740. Offset (0x70),
  5741. MPEN, 8,
  5742. PPCS, 8,
  5743. PPCM, 8,
  5744. PCP0, 8,
  5745. PCP1, 8,
  5746. GSSR, 8,
  5747. DIAG, 8,
  5748. TZON, 8,
  5749. NIST, 8,
  5750. RIST, 8,
  5751. RCST, 8,
  5752. CCST, 8,
  5753. RCNT, 8,
  5754. C3SU, 8,
  5755. C1ON, 8,
  5756. BMLF, 8,
  5757. TEST, 8,
  5758. MDEL, 8,
  5759. BCMV, 8
  5760. }
  5761.  
  5762. Mutex (MSEC, 0x00)
  5763. OperationRegion (SECT, SystemIO, 0x5000, 0x10)
  5764. Field (SECT, ByteAcc, NoLock, Preserve)
  5765. {
  5766. TRPS, 8
  5767. }
  5768.  
  5769. Method (SECS, 1, Serialized)
  5770. {
  5771. Acquire (MSEC, 0xFFFF)
  5772. SECI = Arg0
  5773. TRPS = Zero
  5774. Release (MSEC)
  5775. }
  5776.  
  5777. Method (SECB, 2, Serialized)
  5778. {
  5779. Acquire (MSEC, 0xFFFF)
  5780. SECI = Arg0
  5781. DB00 = Arg1
  5782. TRPS = Zero
  5783. Local0 = DB00 /* \_SB_.DB00 */
  5784. Release (MSEC)
  5785. Return (Local0)
  5786. }
  5787.  
  5788. Method (SECW, 3, Serialized)
  5789. {
  5790. Acquire (MSEC, 0xFFFF)
  5791. SECI = Arg0
  5792. DB00 = Arg1
  5793. DW00 = Arg2
  5794. TRPS = Zero
  5795. Local1 = DW00 /* \_SB_.DW00 */
  5796. Release (MSEC)
  5797. Return (Local1)
  5798. }
  5799.  
  5800. Method (STRP, 2, Serialized)
  5801. {
  5802. Acquire (MSEC, 0xFFFF)
  5803. SECI = Arg0
  5804. PVFN = Arg1
  5805. TRPS = Zero
  5806. Release (MSEC)
  5807. Return (SECI) /* \_SB_.SECI */
  5808. }
  5809.  
  5810. Method (SOST, 0, Serialized)
  5811. {
  5812. If (CondRefOf (_OSI, Local0))
  5813. {
  5814. \_SB.OSYS = 0x07D1
  5815. If (\_OSI ("Windows 2009"))
  5816. {
  5817. \_SB.OSYS = 0x07D9
  5818. }
  5819. ElseIf (\_OSI ("Windows 2006"))
  5820. {
  5821. \_SB.OSYS = 0x07D6
  5822. }
  5823. ElseIf (\_OSI ("Windows 2001 SP3"))
  5824. {
  5825. \_SB.OSYS = 0x07D2
  5826. }
  5827. ElseIf (\_OSI ("Windows 2001 SP2"))
  5828. {
  5829. \_SB.OSYS = 0x07D2
  5830. }
  5831. ElseIf (\_OSI ("Windows 2001 SP1"))
  5832. {
  5833. \_SB.OSYS = 0x07D2
  5834. }
  5835. ElseIf (\_OSI ("Windows 2009"))
  5836. {
  5837. \_SB.OSYS = 0x07D9
  5838. }
  5839.  
  5840. \_SB.SECS (0x00)
  5841. }
  5842. ElseIf (((SizeOf (_OS) == 0x14) || (SizeOf (_OS) == 0x05)))
  5843. {
  5844. \_SB.OSYS = 0x07D0
  5845. }
  5846. ElseIf ((SizeOf (_OS) == 0x27))
  5847. {
  5848. \_SB.OSYS = 0x07CF
  5849. }
  5850. ElseIf ((SizeOf (_OS) == 0x12))
  5851. {
  5852. \_SB.OSYS = 0x07CE
  5853. }
  5854. Else
  5855. {
  5856. \_SB.OSYS = 0x07CD
  5857. }
  5858. }
  5859. }
  5860.  
  5861. Name (_S0, Package (0x02) // _S0_: S0 System State
  5862. {
  5863. 0x00,
  5864. 0x00
  5865. })
  5866. Name (_S3, Package (0x02) // _S3_: S3 System State
  5867. {
  5868. 0x05,
  5869. 0x05
  5870. })
  5871. Name (_S4, Package (0x02) // _S4_: S4 System State
  5872. {
  5873. 0x06,
  5874. 0x06
  5875. })
  5876. Name (_S5, Package (0x02) // _S5_: S5 System State
  5877. {
  5878. 0x07,
  5879. 0x07
  5880. })
  5881. Name (PICF, 0x00)
  5882. Name (SPNF, 0x00)
  5883. Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model
  5884. {
  5885. \PICF = Arg0
  5886. }
  5887.  
  5888. Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep
  5889. {
  5890. P80H = Arg0
  5891. P80D = 0x00
  5892. P8XH (0x00, Arg0)
  5893. \_SB.BFCC = \_SB.PCI0.LPC0.H_EC.B1DF
  5894. If ((Arg0 == 0x04))
  5895. {
  5896. \_SB.SECS (0xA5)
  5897. }
  5898.  
  5899. If ((Arg0 == 0x03))
  5900. {
  5901. \_SB.BCMD = 0x4C
  5902. \_SB.SMIC = Zero
  5903. \_SB.SECS (0xA4)
  5904. }
  5905.  
  5906. If ((Arg0 == 0x05))
  5907. {
  5908. \_SB.PHSR (0x4B)
  5909. }
  5910. }
  5911.  
  5912. Method (_WAK, 1, NotSerialized) // _WAK: Wake
  5913. {
  5914. \_SB.PCI0.PEXE = 0x00
  5915. If ((Arg0 == 0x03))
  5916. {
  5917. \SPNF = 0x01
  5918. TRAP (0x46)
  5919. \_SB.SECS (0xB3)
  5920. \_SB.SECB (0xB9, 0x02)
  5921. P8XH (0x00, 0x03)
  5922. }
  5923.  
  5924. \PWRS = \_SB.PCI0.LPC0.H_EC.ACEX
  5925. If ((Arg0 == 0x04))
  5926. {
  5927. \_SB.OSHT ()
  5928. If (DTSE)
  5929. {
  5930. TRAP (0x47)
  5931. }
  5932.  
  5933. \_SB.SECB (0xB9, 0x01)
  5934. P8XH (0x00, 0x04)
  5935. }
  5936.  
  5937. \_SB.SECS (0xAA)
  5938. PNOT ()
  5939. If ((OSYS == 0x07CE)){}
  5940. }
  5941.  
  5942. Scope (\_SB)
  5943. {
  5944. Name (OSTB, Ones)
  5945. OperationRegion (OSTY, SystemMemory, 0x7F5C2EBC, 0x00000001)
  5946. Field (OSTY, AnyAcc, NoLock, Preserve)
  5947. {
  5948. TPOS, 8
  5949. }
  5950.  
  5951. Method (OSTP, 0, NotSerialized)
  5952. {
  5953. If ((^OSTB == Ones))
  5954. {
  5955. If (CondRefOf (\_OSI, Local0))
  5956. {
  5957. If (\_OSI ("Windows 2001.1"))
  5958. {
  5959. ^OSTB = 0x20
  5960. ^TPOS = 0x20
  5961. }
  5962. ElseIf (\_OSI ("Windows 2001 SP1"))
  5963. {
  5964. ^OSTB = 0x10
  5965. ^TPOS = 0x10
  5966. }
  5967. ElseIf (\_OSI ("Windows 2001"))
  5968. {
  5969. ^OSTB = 0x08
  5970. ^TPOS = 0x08
  5971. }
  5972. Else
  5973. {
  5974. ^OSTB = 0x00
  5975. ^TPOS = 0x00
  5976. }
  5977. }
  5978. ElseIf (CondRefOf (\_OS, Local0))
  5979. {
  5980. If (^SEQL (\_OS, "Microsoft Windows"))
  5981. {
  5982. ^OSTB = 0x01
  5983. ^TPOS = 0x01
  5984. }
  5985. ElseIf (^SEQL (\_OS, "Microsoft WindowsME: Millennium Edition"))
  5986. {
  5987. ^OSTB = 0x02
  5988. ^TPOS = 0x02
  5989. }
  5990. ElseIf (^SEQL (\_OS, "Microsoft Windows NT"))
  5991. {
  5992. ^OSTB = 0x04
  5993. ^TPOS = 0x04
  5994. }
  5995. Else
  5996. {
  5997. ^OSTB = 0x00
  5998. ^TPOS = 0x00
  5999. }
  6000. }
  6001. Else
  6002. {
  6003. ^OSTB = 0x00
  6004. ^TPOS = 0x00
  6005. }
  6006. }
  6007.  
  6008. Return (^OSTB) /* \_SB_.OSTB */
  6009. }
  6010.  
  6011. Method (OSHT, 0, NotSerialized)
  6012. {
  6013. \_SB.OSTP ()
  6014. }
  6015.  
  6016. Method (SEQL, 2, Serialized)
  6017. {
  6018. Local0 = SizeOf (Arg0)
  6019. Local1 = SizeOf (Arg1)
  6020. If ((Local0 != Local1))
  6021. {
  6022. Return (Zero)
  6023. }
  6024.  
  6025. Name (BUF0, Buffer (Local0){})
  6026. BUF0 = Arg0
  6027. Name (BUF1, Buffer (Local0){})
  6028. BUF1 = Arg1
  6029. Local2 = Zero
  6030. While ((Local2 < Local0))
  6031. {
  6032. Local3 = DerefOf (BUF0 [Local2])
  6033. Local4 = DerefOf (BUF1 [Local2])
  6034. If ((Local3 != Local4))
  6035. {
  6036. Return (Zero)
  6037. }
  6038.  
  6039. Local2++
  6040. }
  6041.  
  6042. Return (One)
  6043. }
  6044. }
  6045.  
  6046. Name (FWSO, "FWSO")
  6047. Name (_PSC, 0x00) // _PSC: Power State Current
  6048. Method (_PS0, 0, NotSerialized) // _PS0: Power State 0
  6049. {
  6050. Local0 = _PSC /* \_PSC */
  6051. _PSC = 0x00
  6052. If ((Local0 == 0x03))
  6053. {
  6054. \_SB.INF = 0x01
  6055. While (\_SB.INF)
  6056. {
  6057. If (((\_SB.INF == 0x01) && (\_SB.OSTB >= 0x04)))
  6058. {
  6059. Sleep (0x01F4)
  6060. }
  6061. }
  6062. }
  6063. }
  6064.  
  6065. Method (_PS3, 0, NotSerialized) // _PS3: Power State 3
  6066. {
  6067. _PSC = 0x03
  6068. }
  6069.  
  6070. Scope (\_PR.CPU0)
  6071. {
  6072. Name (_TPC, 0x00) // _TPC: Throttling Present Capabilities
  6073. Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control
  6074. {
  6075. If ((PDC0 & 0x04))
  6076. {
  6077. Return (Package (0x02)
  6078. {
  6079. ResourceTemplate ()
  6080. {
  6081. Register (FFixedHW,
  6082. 0x00, // Bit Width
  6083. 0x00, // Bit Offset
  6084. 0x0000000000000000, // Address
  6085. ,)
  6086. },
  6087.  
  6088. ResourceTemplate ()
  6089. {
  6090. Register (FFixedHW,
  6091. 0x00, // Bit Width
  6092. 0x00, // Bit Offset
  6093. 0x0000000000000000, // Address
  6094. ,)
  6095. }
  6096. })
  6097. }
  6098.  
  6099. Return (Package (0x02)
  6100. {
  6101. ResourceTemplate ()
  6102. {
  6103. Register (SystemIO,
  6104. 0x04, // Bit Width
  6105. 0x01, // Bit Offset
  6106. 0x0000000000001010, // Address
  6107. ,)
  6108. },
  6109.  
  6110. ResourceTemplate ()
  6111. {
  6112. Register (SystemIO,
  6113. 0x04, // Bit Width
  6114. 0x01, // Bit Offset
  6115. 0x0000000000001010, // Address
  6116. ,)
  6117. }
  6118. })
  6119. }
  6120.  
  6121. Name (TSSI, Package (0x08)
  6122. {
  6123. Package (0x05)
  6124. {
  6125. 0x64,
  6126. 0x03E8,
  6127. 0x00,
  6128. 0x00,
  6129. 0x00
  6130. },
  6131.  
  6132. Package (0x05)
  6133. {
  6134. 0x58,
  6135. 0x036B,
  6136. 0x00,
  6137. 0x0F,
  6138. 0x00
  6139. },
  6140.  
  6141. Package (0x05)
  6142. {
  6143. 0x4B,
  6144. 0x02EE,
  6145. 0x00,
  6146. 0x0E,
  6147. 0x00
  6148. },
  6149.  
  6150. Package (0x05)
  6151. {
  6152. 0x3F,
  6153. 0x0271,
  6154. 0x00,
  6155. 0x0D,
  6156. 0x00
  6157. },
  6158.  
  6159. Package (0x05)
  6160. {
  6161. 0x32,
  6162. 0x01F4,
  6163. 0x00,
  6164. 0x0C,
  6165. 0x00
  6166. },
  6167.  
  6168. Package (0x05)
  6169. {
  6170. 0x26,
  6171. 0x0177,
  6172. 0x00,
  6173. 0x0B,
  6174. 0x00
  6175. },
  6176.  
  6177. Package (0x05)
  6178. {
  6179. 0x19,
  6180. 0xFA,
  6181. 0x00,
  6182. 0x0A,
  6183. 0x00
  6184. },
  6185.  
  6186. Package (0x05)
  6187. {
  6188. 0x0D,
  6189. 0x7D,
  6190. 0x00,
  6191. 0x09,
  6192. 0x00
  6193. }
  6194. })
  6195. Name (TSSM, Package (0x08)
  6196. {
  6197. Package (0x05)
  6198. {
  6199. 0x64,
  6200. 0x03E8,
  6201. 0x00,
  6202. 0x00,
  6203. 0x00
  6204. },
  6205.  
  6206. Package (0x05)
  6207. {
  6208. 0x58,
  6209. 0x036B,
  6210. 0x00,
  6211. 0x1E,
  6212. 0x00
  6213. },
  6214.  
  6215. Package (0x05)
  6216. {
  6217. 0x4B,
  6218. 0x02EE,
  6219. 0x00,
  6220. 0x1C,
  6221. 0x00
  6222. },
  6223.  
  6224. Package (0x05)
  6225. {
  6226. 0x3F,
  6227. 0x0271,
  6228. 0x00,
  6229. 0x1A,
  6230. 0x00
  6231. },
  6232.  
  6233. Package (0x05)
  6234. {
  6235. 0x32,
  6236. 0x01F4,
  6237. 0x00,
  6238. 0x18,
  6239. 0x00
  6240. },
  6241.  
  6242. Package (0x05)
  6243. {
  6244. 0x26,
  6245. 0x0177,
  6246. 0x00,
  6247. 0x16,
  6248. 0x00
  6249. },
  6250.  
  6251. Package (0x05)
  6252. {
  6253. 0x19,
  6254. 0xFA,
  6255. 0x00,
  6256. 0x14,
  6257. 0x00
  6258. },
  6259.  
  6260. Package (0x05)
  6261. {
  6262. 0x0D,
  6263. 0x7D,
  6264. 0x00,
  6265. 0x12,
  6266. 0x00
  6267. }
  6268. })
  6269. Name (TSSF, 0x00)
  6270. Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States
  6271. {
  6272. If ((!TSSF && CondRefOf (_PSS)))
  6273. {
  6274. Local0 = _PSS /* External reference */
  6275. Local1 = SizeOf (Local0)
  6276. Local1--
  6277. Local2 = DerefOf (DerefOf (Local0 [Local1]) [0x01])
  6278. Local3 = 0x00
  6279. While ((Local3 < SizeOf (TSSI)))
  6280. {
  6281. Local4 = ((Local2 * (0x08 - Local3)) / 0x08)
  6282. DerefOf (TSSI [Local3]) [0x01] = Local4
  6283. DerefOf (TSSM [Local3]) [0x01] = Local4
  6284. Local3++
  6285. }
  6286.  
  6287. TSSF = Ones
  6288. }
  6289.  
  6290. If ((PDC0 & 0x04))
  6291. {
  6292. Return (TSSM) /* \_PR_.CPU0.TSSM */
  6293. }
  6294.  
  6295. Return (TSSI) /* \_PR_.CPU0.TSSI */
  6296. }
  6297.  
  6298. Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies
  6299. {
  6300. If (((CFGD & 0x01000000) && !(PDC0 & 0x04)))
  6301. {
  6302. Return (Package (0x01)
  6303. {
  6304. Package (0x05)
  6305. {
  6306. 0x05,
  6307. 0x00,
  6308. 0x00,
  6309. 0xFD,
  6310. 0x02
  6311. }
  6312. })
  6313. }
  6314.  
  6315. Return (Package (0x01)
  6316. {
  6317. Package (0x05)
  6318. {
  6319. 0x05,
  6320. 0x00,
  6321. 0x00,
  6322. 0xFC,
  6323. 0x01
  6324. }
  6325. })
  6326. }
  6327. }
  6328.  
  6329. Scope (\_PR.CPU3)
  6330. {
  6331. Name (_TPC, 0x00) // _TPC: Throttling Present Capabilities
  6332. Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control
  6333. {
  6334. Return (\_PR.CPU0._PTC ())
  6335. }
  6336.  
  6337. Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States
  6338. {
  6339. Return (\_PR.CPU0._TSS ())
  6340. }
  6341.  
  6342. Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies
  6343. {
  6344. If (((CFGD & 0x01000000) && !(PDC3 & 0x04)))
  6345. {
  6346. Return (Package (0x01)
  6347. {
  6348. Package (0x05)
  6349. {
  6350. 0x05,
  6351. 0x00,
  6352. 0x00,
  6353. 0xFD,
  6354. 0x02
  6355. }
  6356. })
  6357. }
  6358.  
  6359. Return (Package (0x01)
  6360. {
  6361. Package (0x05)
  6362. {
  6363. 0x05,
  6364. 0x00,
  6365. 0x01,
  6366. 0xFC,
  6367. 0x01
  6368. }
  6369. })
  6370. }
  6371. }
  6372.  
  6373. Scope (\_PR.CPU2)
  6374. {
  6375. Name (_TPC, 0x00) // _TPC: Throttling Present Capabilities
  6376. Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control
  6377. {
  6378. Return (\_PR.CPU0._PTC ())
  6379. }
  6380.  
  6381. Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States
  6382. {
  6383. Return (\_PR.CPU0._TSS ())
  6384. }
  6385.  
  6386. Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies
  6387. {
  6388. If (((CFGD & 0x01000000) && !(PDC2 & 0x04)))
  6389. {
  6390. Return (Package (0x01)
  6391. {
  6392. Package (0x05)
  6393. {
  6394. 0x05,
  6395. 0x00,
  6396. 0x00,
  6397. 0xFD,
  6398. 0x02
  6399. }
  6400. })
  6401. }
  6402.  
  6403. Return (Package (0x01)
  6404. {
  6405. Package (0x05)
  6406. {
  6407. 0x05,
  6408. 0x00,
  6409. 0x01,
  6410. 0xFC,
  6411. 0x01
  6412. }
  6413. })
  6414. }
  6415. }
  6416.  
  6417. Scope (\_PR.CPU1)
  6418. {
  6419. Name (_TPC, 0x00) // _TPC: Throttling Present Capabilities
  6420. Method (_PTC, 0, NotSerialized) // _PTC: Processor Throttling Control
  6421. {
  6422. Return (\_PR.CPU0._PTC ())
  6423. }
  6424.  
  6425. Method (_TSS, 0, NotSerialized) // _TSS: Throttling Supported States
  6426. {
  6427. Return (\_PR.CPU0._TSS ())
  6428. }
  6429.  
  6430. Method (_TSD, 0, NotSerialized) // _TSD: Throttling State Dependencies
  6431. {
  6432. If (((CFGD & 0x01000000) && !(PDC1 & 0x04)))
  6433. {
  6434. Return (Package (0x01)
  6435. {
  6436. Package (0x05)
  6437. {
  6438. 0x05,
  6439. 0x00,
  6440. 0x00,
  6441. 0xFD,
  6442. 0x02
  6443. }
  6444. })
  6445. }
  6446.  
  6447. Return (Package (0x01)
  6448. {
  6449. Package (0x05)
  6450. {
  6451. 0x05,
  6452. 0x00,
  6453. 0x01,
  6454. 0xFC,
  6455. 0x01
  6456. }
  6457. })
  6458. }
  6459. }
  6460.  
  6461. Scope (\)
  6462. {
  6463. Name (SSDT, Package (0x18)
  6464. {
  6465. "CPU0IST ",
  6466. 0x7F5B9A9D,
  6467. 0x00000203,
  6468. "CPU1IST ",
  6469. 0x7F5B9CA0,
  6470. 0x000000D4,
  6471. "CPU0CST ",
  6472. 0x7F5B9269,
  6473. 0x000006A5,
  6474. "CPU1CST ",
  6475. 0x7F5B990E,
  6476. 0x00000085,
  6477. "CPU2IST ",
  6478. 0x7F5B9D74,
  6479. 0x000000D4,
  6480. "CPU3IST ",
  6481. 0x7F5B9E48,
  6482. 0x000000D4,
  6483. "CPU2CST ",
  6484. 0x7F5B9993,
  6485. 0x00000085,
  6486. "CPU3CST ",
  6487. 0x7F5B9A18,
  6488. 0x00000085
  6489. })
  6490. Name (CFGD, 0x13306CB1)
  6491. Name (\PDC0, 0x80000000)
  6492. Name (\PDC1, 0x80000000)
  6493. Name (\PDC2, 0x80000000)
  6494. Name (\PDC3, 0x80000000)
  6495. Name (\SDTL, 0x00)
  6496. }
  6497.  
  6498. Scope (\_PR.CPU0)
  6499. {
  6500. Name (HI0, 0x00)
  6501. Name (HC0, 0x00)
  6502. Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities
  6503. {
  6504. CreateDWordField (Arg0, 0x00, REVS)
  6505. CreateDWordField (Arg0, 0x04, SIZE)
  6506. Local0 = SizeOf (Arg0)
  6507. Local1 = (Local0 - 0x08)
  6508. CreateField (Arg0, 0x40, (Local1 * 0x08), TEMP)
  6509. Name (STS0, Buffer (0x04)
  6510. {
  6511. 0x00, 0x00, 0x00, 0x00 // ....
  6512. })
  6513. Concatenate (STS0, TEMP, Local2)
  6514. _OSC (ToUUID ("4077a616-290c-47be-9ebd-d87058713953"), REVS, SIZE, Local2)
  6515. }
  6516.  
  6517. Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
  6518. {
  6519. CreateDWordField (Arg3, 0x00, STS0)
  6520. CreateDWordField (Arg3, 0x04, CAP0)
  6521. CreateDWordField (Arg0, 0x00, IID0)
  6522. CreateDWordField (Arg0, 0x04, IID1)
  6523. CreateDWordField (Arg0, 0x08, IID2)
  6524. CreateDWordField (Arg0, 0x0C, IID3)
  6525. Name (UID0, ToUUID ("4077a616-290c-47be-9ebd-d87058713953"))
  6526. CreateDWordField (UID0, 0x00, EID0)
  6527. CreateDWordField (UID0, 0x04, EID1)
  6528. CreateDWordField (UID0, 0x08, EID2)
  6529. CreateDWordField (UID0, 0x0C, EID3)
  6530. If (!(((IID0 == EID0) && (IID1 == EID1)) && ((
  6531. IID2 == EID2) && (IID3 == EID3))))
  6532. {
  6533. STS0 [0x00] = 0x06
  6534. Return (Arg3)
  6535. }
  6536.  
  6537. If ((Arg1 != 0x01))
  6538. {
  6539. STS0 [0x00] = 0x0A
  6540. Return (Arg3)
  6541. }
  6542.  
  6543. PDC0 = ((PDC0 & 0x7FFFFFFF) | CAP0) /* \_PR_.CPU0._OSC.CAP0 */
  6544. PCP0 = (PDC0 & 0xFF)
  6545. If ((CFGD & 0x01))
  6546. {
  6547. If ((((CFGD & 0x01000000) && ((PDC0 & 0x09) ==
  6548. 0x09)) && !(SDTL & 0x01)))
  6549. {
  6550. SDTL |= 0x01
  6551. OperationRegion (IST0, SystemMemory, DerefOf (SSDT [0x01]), DerefOf (SSDT [0x02]))
  6552. Load (IST0, HI0) /* \_PR_.CPU0.HI0_ */
  6553. }
  6554. }
  6555.  
  6556. If ((CFGD & 0xF0))
  6557. {
  6558. If ((((CFGD & 0x01000000) && (PDC0 & 0x18)) && !
  6559. (SDTL & 0x02)))
  6560. {
  6561. SDTL |= 0x02
  6562. OperationRegion (CST0, SystemMemory, DerefOf (SSDT [0x07]), DerefOf (SSDT [0x08]))
  6563. Load (CST0, HC0) /* \_PR_.CPU0.HC0_ */
  6564. }
  6565. }
  6566.  
  6567. Return (Arg3)
  6568. }
  6569. }
  6570.  
  6571. Scope (\_PR.CPU1)
  6572. {
  6573. Name (HI1, 0x00)
  6574. Name (HC1, 0x00)
  6575. Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities
  6576. {
  6577. CreateDWordField (Arg0, 0x00, REVS)
  6578. CreateDWordField (Arg0, 0x04, SIZE)
  6579. Local0 = SizeOf (Arg0)
  6580. Local1 = (Local0 - 0x08)
  6581. CreateField (Arg0, 0x40, (Local1 * 0x08), TEMP)
  6582. Name (STS1, Buffer (0x04)
  6583. {
  6584. 0x00, 0x00, 0x00, 0x00 // ....
  6585. })
  6586. Concatenate (STS1, TEMP, Local2)
  6587. _OSC (ToUUID ("4077a616-290c-47be-9ebd-d87058713953"), REVS, SIZE, Local2)
  6588. }
  6589.  
  6590. Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
  6591. {
  6592. CreateDWordField (Arg3, 0x00, STS1)
  6593. CreateDWordField (Arg3, 0x04, CAP1)
  6594. CreateDWordField (Arg0, 0x00, IID0)
  6595. CreateDWordField (Arg0, 0x04, IID1)
  6596. CreateDWordField (Arg0, 0x08, IID2)
  6597. CreateDWordField (Arg0, 0x0C, IID3)
  6598. Name (UID1, ToUUID ("4077a616-290c-47be-9ebd-d87058713953"))
  6599. CreateDWordField (UID1, 0x00, EID0)
  6600. CreateDWordField (UID1, 0x04, EID1)
  6601. CreateDWordField (UID1, 0x08, EID2)
  6602. CreateDWordField (UID1, 0x0C, EID3)
  6603. If (!(((IID0 == EID0) && (IID1 == EID1)) && ((
  6604. IID2 == EID2) && (IID3 == EID3))))
  6605. {
  6606. STS1 [0x00] = 0x06
  6607. Return (Arg3)
  6608. }
  6609.  
  6610. If ((Arg1 != 0x01))
  6611. {
  6612. STS1 [0x00] = 0x0A
  6613. Return (Arg3)
  6614. }
  6615.  
  6616. PDC1 = ((PDC1 & 0x7FFFFFFF) | CAP1) /* \_PR_.CPU1._OSC.CAP1 */
  6617. PCP1 = (PDC1 & 0xFF)
  6618. If ((CFGD & 0x01))
  6619. {
  6620. If ((((CFGD & 0x01000000) && ((PDC1 & 0x09) ==
  6621. 0x09)) && !(SDTL & 0x10)))
  6622. {
  6623. SDTL |= 0x10
  6624. OperationRegion (IST1, SystemMemory, DerefOf (SSDT [0x04]), DerefOf (SSDT [0x05]))
  6625. Load (IST1, HI1) /* \_PR_.CPU1.HI1_ */
  6626. }
  6627. }
  6628.  
  6629. If ((CFGD & 0xF0))
  6630. {
  6631. If ((((CFGD & 0x01000000) && (PDC1 & 0x18)) && !
  6632. (SDTL & 0x20)))
  6633. {
  6634. SDTL |= 0x20
  6635. OperationRegion (CST1, SystemMemory, DerefOf (SSDT [0x0A]), DerefOf (SSDT [0x0B]))
  6636. Load (CST1, HC1) /* \_PR_.CPU1.HC1_ */
  6637. }
  6638. }
  6639.  
  6640. Return (Arg3)
  6641. }
  6642. }
  6643.  
  6644. Scope (\_PR.CPU2)
  6645. {
  6646. Name (HI2, 0x00)
  6647. Name (HC2, 0x00)
  6648. Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities
  6649. {
  6650. CreateDWordField (Arg0, 0x00, REVS)
  6651. CreateDWordField (Arg0, 0x04, SIZE)
  6652. Local0 = SizeOf (Arg0)
  6653. Local1 = (Local0 - 0x08)
  6654. CreateField (Arg0, 0x40, (Local1 * 0x08), TEMP)
  6655. Name (STS2, Buffer (0x04)
  6656. {
  6657. 0x00, 0x00, 0x00, 0x00 // ....
  6658. })
  6659. Concatenate (STS2, TEMP, Local2)
  6660. _OSC (ToUUID ("4077a616-290c-47be-9ebd-d87058713953"), REVS, SIZE, Local2)
  6661. }
  6662.  
  6663. Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
  6664. {
  6665. CreateDWordField (Arg3, 0x00, STS2)
  6666. CreateDWordField (Arg3, 0x04, CAP2)
  6667. CreateDWordField (Arg0, 0x00, IID0)
  6668. CreateDWordField (Arg0, 0x04, IID1)
  6669. CreateDWordField (Arg0, 0x08, IID2)
  6670. CreateDWordField (Arg0, 0x0C, IID3)
  6671. Name (UID1, ToUUID ("4077a616-290c-47be-9ebd-d87058713953"))
  6672. CreateDWordField (UID1, 0x00, EID0)
  6673. CreateDWordField (UID1, 0x04, EID1)
  6674. CreateDWordField (UID1, 0x08, EID2)
  6675. CreateDWordField (UID1, 0x0C, EID3)
  6676. If (!(((IID0 == EID0) && (IID1 == EID1)) && ((
  6677. IID2 == EID2) && (IID3 == EID3))))
  6678. {
  6679. STS2 = 0x06
  6680. Return (Arg3)
  6681. }
  6682.  
  6683. If ((Arg1 != 0x01))
  6684. {
  6685. STS2 = 0x0A
  6686. Return (Arg3)
  6687. }
  6688.  
  6689. PDC2 = ((PDC2 & 0x7FFFFFFF) | CAP2) /* \_PR_.CPU2._OSC.CAP2 */
  6690. If ((CFGD & 0x01))
  6691. {
  6692. If ((((((CFGD & 0x08000000) | (CFGD & 0x04000000
  6693. )) | ((CFGD & 0x01000000) | (CFGD & 0x02000000))) &&
  6694. ((PDC2 & 0x09) == 0x09)) && !(SDTL & 0x04)))
  6695. {
  6696. SDTL |= 0x04
  6697. OperationRegion (IST2, SystemMemory, DerefOf (SSDT [0x0D]), DerefOf (SSDT [0x0E]))
  6698. Load (IST2, HI2) /* \_PR_.CPU2.HI2_ */
  6699. }
  6700. }
  6701.  
  6702. If ((CFGD & 0xF0))
  6703. {
  6704. If ((((CFGD & 0x01000000) && (PDC2 & 0x18)) && !
  6705. (SDTL & 0x08)))
  6706. {
  6707. SDTL |= 0x08
  6708. OperationRegion (CST2, SystemMemory, DerefOf (SSDT [0x13]), DerefOf (SSDT [0x14]))
  6709. Load (CST2, HC2) /* \_PR_.CPU2.HC2_ */
  6710. }
  6711. }
  6712.  
  6713. Return (Arg3)
  6714. }
  6715. }
  6716.  
  6717. Scope (\_PR.CPU3)
  6718. {
  6719. Name (HI3, 0x00)
  6720. Name (HC3, 0x00)
  6721. Method (_PDC, 1, NotSerialized) // _PDC: Processor Driver Capabilities
  6722. {
  6723. CreateDWordField (Arg0, 0x00, REVS)
  6724. CreateDWordField (Arg0, 0x04, SIZE)
  6725. Local0 = SizeOf (Arg0)
  6726. Local1 = (Local0 - 0x08)
  6727. CreateField (Arg0, 0x40, (Local1 * 0x08), TEMP)
  6728. Name (STS3, Buffer (0x04)
  6729. {
  6730. 0x00, 0x00, 0x00, 0x00 // ....
  6731. })
  6732. Concatenate (STS3, TEMP, Local2)
  6733. _OSC (ToUUID ("4077a616-290c-47be-9ebd-d87058713953"), REVS, SIZE, Local2)
  6734. }
  6735.  
  6736. Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
  6737. {
  6738. CreateDWordField (Arg3, 0x00, STS3)
  6739. CreateDWordField (Arg3, 0x04, CAP3)
  6740. CreateDWordField (Arg0, 0x00, IID0)
  6741. CreateDWordField (Arg0, 0x04, IID1)
  6742. CreateDWordField (Arg0, 0x08, IID2)
  6743. CreateDWordField (Arg0, 0x0C, IID3)
  6744. Name (UID1, ToUUID ("4077a616-290c-47be-9ebd-d87058713953"))
  6745. CreateDWordField (UID1, 0x00, EID0)
  6746. CreateDWordField (UID1, 0x04, EID1)
  6747. CreateDWordField (UID1, 0x08, EID2)
  6748. CreateDWordField (UID1, 0x0C, EID3)
  6749. If (!(((IID0 == EID0) && (IID1 == EID1)) && ((
  6750. IID2 == EID2) && (IID3 == EID3))))
  6751. {
  6752. STS3 = 0x06
  6753. Return (Arg3)
  6754. }
  6755.  
  6756. If ((Arg1 != 0x01))
  6757. {
  6758. STS3 = 0x0A
  6759. Return (Arg3)
  6760. }
  6761.  
  6762. PDC3 = ((PDC3 & 0x7FFFFFFF) | CAP3) /* \_PR_.CPU3._OSC.CAP3 */
  6763. If ((CFGD & 0x01))
  6764. {
  6765. If ((((((CFGD & 0x08000000) | (CFGD & 0x04000000
  6766. )) | ((CFGD & 0x01000000) | (CFGD & 0x02000000))) &&
  6767. ((PDC3 & 0x09) == 0x09)) && !(SDTL & 0x40)))
  6768. {
  6769. SDTL |= 0x40
  6770. OperationRegion (IST3, SystemMemory, DerefOf (SSDT [0x10]), DerefOf (SSDT [0x11]))
  6771. Load (IST3, HI3) /* \_PR_.CPU3.HI3_ */
  6772. }
  6773. }
  6774.  
  6775. If ((CFGD & 0xF0))
  6776. {
  6777. If ((((CFGD & 0x01000000) && (PDC3 & 0x18)) && !
  6778. (SDTL & 0x80)))
  6779. {
  6780. SDTL |= 0x80
  6781. OperationRegion (CST3, SystemMemory, DerefOf (SSDT [0x16]), DerefOf (SSDT [0x17]))
  6782. Load (CST3, HC3) /* \_PR_.CPU3.HC3_ */
  6783. }
  6784. }
  6785.  
  6786. Return (Arg3)
  6787. }
  6788. }
  6789. }
  6790.  
  6791.  
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