And_Gate

/* basic logic gate */
/* and gate */
/* 07 / 01 / 2020 */

module and_gate( x, y , z );
    input x;
    input y;
    output z;
    and( z , x, y );
endmodule

module Test;
    reg x_t , y_t;
    wire z_t;

and_gate and_1( x_t , y_t, z_t );
    initial
        begin
            x_t <=0 ; y_t <= 0;
            #1 $display("A = %b , B = %b , Y = %b " , x_t , y_t , z_t );

            x_t <=0 ; y_t <= 1;
            #1 $display("A = %b , B = %b , Y = %b " , x_t , y_t , z_t );

            x_t <= 1 ; y_t <= 0;
            #1 $display("A = %b , B = %b , Y = %b " , x_t , y_t , z_t );

            x_t <=1 ; y_t <= 1;
            #1 $display("A = %b , B = %b , Y = %b " , x_t , y_t , z_t );

        end
endmodule