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- //FCPU = 2mhz and baudrate =9600, so 0x0C on BRR2 and BRR1
- void uart_init(void)
- {
- /*clock enable for UART and GPIO peripheral is set by default */
- //PD5-Tx, PD6-RX
- // Set Tx pin as output pushpull
- GPIOD-> DDR |= (1<<5);
- GPIOD-> CR1 |= ((1<<5));
- //Set Rx pin as Input floating
- /*by default all pins are input floating only*/
- // Clear the Idle Line Detected bit in the status register by a read
- // to the UART1_SR register followed by a write to the UART1_DR register.
- uint8_t tmp;
- tmp = UART1->SR;
- UART1->DR = tmp;
- //Reset the UART registers
- UART1_SR_RESET_VALUE;
- UART1_CR1_RESET_VALUE;
- UART1_CR2_RESET_VALUE;
- UART1_CR3_RESET_VALUE;
- UART1_BRR2_RESET_VALUE;
- UART1_BRR1_RESET_VALUE;
- //disable TE and RE
- UART1-> CR2 &= (~((1<<3)|(1<<2)));
- //Set word legth :8 bit,1 startbit
- UART1-> CR1 &= (~(1<<4));
- //Parity disable
- UART1-> CR1 &= (~(1<<2));
- //UART stop bit: 1
- UART1-> CR3 &= (~(1<<5)|(1<<4));
- //UART_baudrate
- UART1 ->BRR2 = 0x0C;
- UART1 ->BRR1 = 0x0C;
- //Word length : by default it is 8 data bits
- //enable UART1 , Bit 5 of CR1
- UART1-> CR1 |= (1<<5);
- //Transmitter enable, TE bit is at 3 of CR2
- UART1-> CR2 |= ((1<<3)|(1<<2));
- //Receiver enable, RE bit is at 2 of CR2
- //UART1-> CR2 |= (1<<2);
- }
- void uart_transmit_byte(uint8_t byte)
- {
- //write single byte to DATA register as TDR register is empty now
- //UART1->DR = byte;
- //UART1->DR = byte;
- while(!(UART1->SR & UART1_SR_TXE));
- UART1->DR = byte;
- while(!(UART1->SR & UART1_SR_TC));
- // wait till TDR register move byte to shift regster
- //while(!(USART2->SR & USART_SR_TXE));
- //wait for transmission to complete
- //while(!(USART2->SR & USART_SR_TXE));
- //USART2->SR &= ~USART_SR_TXE;
- }
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