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Apr 18th, 2020
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  1. EXTERN(vector_table)
  2. ENTRY(reset_handler)
  3. MEMORY
  4. {
  5. ram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
  6. rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
  7. ccm (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
  8. }
  9. SECTIONS
  10. {
  11. .text : {
  12. *(.vectors)
  13. *(.text*)
  14. . = ALIGN(4);
  15. *(.rodata*)
  16. . = ALIGN(4);
  17. } >rom
  18. .preinit_array : {
  19. . = ALIGN(4);
  20. __preinit_array_start = .;
  21. KEEP (*(.preinit_array))
  22. __preinit_array_end = .;
  23. } >rom
  24. .init_array : {
  25. . = ALIGN(4);
  26. __init_array_start = .;
  27. KEEP (*(SORT(.init_array.*)))
  28. KEEP (*(.init_array))
  29. __init_array_end = .;
  30. } >rom
  31. .fini_array : {
  32. . = ALIGN(4);
  33. __fini_array_start = .;
  34. KEEP (*(.fini_array))
  35. KEEP (*(SORT(.fini_array.*)))
  36. __fini_array_end = .;
  37. } >rom
  38. .ARM.extab : {
  39. *(.ARM.extab*)
  40. } >rom
  41. .ARM.exidx : {
  42. __exidx_start = .;
  43. *(.ARM.exidx*)
  44. __exidx_end = .;
  45. } >rom
  46. . = ALIGN(4);
  47. _etext = .;
  48. .data : {
  49. _data = .;
  50. *(.data*)
  51. . = ALIGN(4);
  52. _edata = .;
  53. } >ram AT >rom
  54. _data_loadaddr = LOADADDR(.data);
  55. .bss : {
  56. *(.bss*)
  57. *(COMMON)
  58. . = ALIGN(4);
  59. _ebss = .;
  60. } >ram
  61. .ccm : {
  62. *(.ccmram*)
  63. . = ALIGN(4);
  64. } >ccm
  65. /DISCARD/ : { *(.eh_frame) }
  66. . = ALIGN(4);
  67. end = .;
  68. }
  69. PROVIDE(_stack = ORIGIN(ram) + LENGTH(ram));
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