G12B:BL:6e7c85:7898ac;FEAT:E0F83180:402000;POC:F;RCY:0;EMMC:0;READ:0;0.
bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0x01
bl2_stage_init 0xc1
bl2_stage_init 0x02

L0:00000000
L1:00000703
L2:0000c067
L3:14000020
B2:00402000
B1:e0f83180

TE: 159548

BL2 Built : 06:17:13, Jun 28 2019. g12b gf0505d7-dirty - qi.duan@droid13

Board ID = 4
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
A53 clk: 1200 MHz
A73 clk: 1200 MHz
CLK81: 166.6M
smccc: 0002b76f
eMMC boot @ 0
sw8 s
DDR driver_vesion: LPDDR4_PHY_V_0_1_14 build time: Jun 28 2019 06:17:09
board id: 4
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
fw parse done
Load ddrfw from eMMC, src: 0x00030200, des: 0xfffd0000, size: 0x0000c000, part: 0
Load ddrfw from eMMC, src: 0x0002c200, des: 0xfffd0000, size: 0x00004000, part: 0
PIEI prepare done
fastboot data load
00000000
emmc switch 1 ok
00000000
emmc switch 2 ok
fastboot data verify
verify result: 255
Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
DDR4 probe
ddr clk to 1320MHz
Load ddrfw from eMMC, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0
00000000
emmc switch 0 ok
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of Write leveling coarse delay
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Load ddrfw from eMMC, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!

R0_RxClkDly_Margin==106 ps 9
R0_TxDqDly_Margi==106 ps 9


R1_RxClkDly_Margin==0 ps 0
R1_TxDqDly_Margi==0 ps 0

 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001
2D training succeed
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 2048MB
DMC_DDR_CTRL: 00600024DDR size: 3928MB
cs0 DataBus test pass
cs1 DataBus test pass
cs0 AddrBus test pass
cs1 AddrBus test pass
 pre test  bdlr_100_average==445 bdlr_100_min==445 bdlr_100_max==445 bdlr_100_cur==445
 aft test  bdlr_100_average==445 bdlr_100_min==445 bdlr_100_max==445 bdlr_100_cur==445
non-sec scramble use zero key
ddr scramble enabled

100bdlr_step_size ps== 435
result report
boot times 0Enable ddr reg access
00000000
emmc switch 3 ok
Authentication key not yet programmed
get rpmb counter error 0x00000007
00000000
emmc switch 0 ok
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0
Load BL3X from eMMC, src: 0x0003c200, des: 0x0172c000, size: 0x00096600, part: 0
0.0;M3 CHK:0;cm4_sp_mode 0
E30HDR
MVN_1=0x00000000
MVN_2=0x00000000
[Image: g12b_v1.1.3375-8f9c8a7 2019-01-24 10:44:46 guotai.shen@droid11-sz]
OPS=0x40
ring efuse init
chipver efuse init
29 0a 40 00 01 23 13 00 00 02 31 32 54 52 4d 50
[0.019858 Inits done]
secure task start!
high task start!
low task start!
run into bl31
NOTICE:  BL31: v1.3(release):ab8811b
NOTICE:  BL31: Built : 15:03:31, Feb 12 2019
NOTICE:  BL31: G12A normal boot!
NOTICE:  BL31: BL33 decompress pass
ERROR:   Error initializing runtime service opteed_fast


U-Boot 2015.01-g430749a (Mar 29 2021 - 02:02:06)

DRAM:  3.5 GiB
Relocation Offset is: d6ef0000
spi_post_bind(spifc): req_seq = 0
register usb cfg[0][1] = 00000000d7f849a8
MMC:   aml_priv->desc_buf = 0x00000000d3ee07c0
aml_priv->desc_buf = 0x00000000d3ee2b00
SDIO Port C: 0, SDIO Port B: 1
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
emmc/sd response timeout, cmd8, status=0x1ff2800
emmc/sd response timeout, cmd55, status=0x1ff2800
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x1, tx-dly 0, clock 40000000
aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x12000
[mmc_startup] mmc refix success
[mmc_init] mmc init success
*** Warning - bad CRC, using default environment

Saving Environment to MMC...
Writing to MMC(0)... done
In:    serial
Out:   serial
Err:   serial
vpu: error: vpu: check dts: FDT_ERR_BADMAGIC, load default parameters
vpu: driver version: v20190313
vpu: detect chip type: 9
vpu: clk_level default: 7(666667000Hz), max: 7(666667000Hz)
vpu: clk_level = 7
vpu: vpu_power_on
vpu: set_vpu_clk
vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
vpu: set_vpu_clk finish
vpu: vpu_module_init_config
vpp: vpp_init
vpp: vpp osd2 matrix rgb2yuv..............
cvbs: cpuid:0x29
cvbs_config_hdmipll_g12a
cvbs_set_vid2_clk
reading boot-logo.bmp.gz
** Unable to read file boot-logo.bmp.gz **
reading boot-logo.bmp
** Unable to read file boot-logo.bmp **
movi: not registered partition name, logo
movi - Read/write command from/to SD/MMC for ODROID board

Usage:
movi <read|write> <partition|sector> <offset> <address> [<length>]
    - <read|write>  the command to access the storage
    - <offset>  the offset from the start of given partiton in lba
    - <address>  the memory address to load/store from/to the storage device
    - [<length>]  the size of the block to read/write in bytes
    - all parameters must be hexa-decimal only

[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]set initrd_high: 0x3d800000
[OSD]fb_addr for logo: 0x3d800000
[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]fb_addr for logo: 0x3d800000
[OSD]VPP_OFIFO_SIZE:0xfff01fff
[CANVAS]canvas init
[CANVAS]addr=0x3d800000 width=5760, height=2160
cvbs: outputmode[1080p60hz] is invalid
vpp: vpp_matrix_update: 2
set hdmitx VIC = 16
config HPLL = 5940000 frac_rate = 1
HPLL: 0x3b3a04f7
HPLL: 0x1b3a04f7
HPLLv1: 0xdb3a04f7
config HPLL done
j = 6  vid_clk_div = 1
hdmitx phy setting done
hdmitx: set enc for VIC: 16
enc_vpu_bridge_reset[1319]
rx version is 1.4 or below  div=10
Net:   dwmac.ff3f0000
syntax error
Hit Enter or space or Ctrl+C key to stop autoboot -- :  0
## Attempting fetch boot.ini in mmc:0...
reading boot.ini
722 bytes read in 2 ms (352.5 KiB/s)
## Executing script at 04000000
reading /Image
30835200 bytes read in 850 ms (34.6 MiB/s)
reading /dtbs/amlogic/meson-g12b-odroid-n2.dtb
76434 bytes read in 7 ms (10.4 MiB/s)
reading /initramfs-linux.uimg
8484051 bytes read in 239 ms (33.9 MiB/s)
[rsvmem] get fdtaddr NULL!
rsvmem - reserve memory

Usage:
rsvmem check                   - check reserved memory
rsvmem dump                    - dump reserved memory

rsvmem check failed
## Loading init Ramdisk from Legacy Image at 04080000 ...
   Image Name:   Ramdisk Image
   Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
   Data Size:    8483987 Bytes = 8.1 MiB
   Load Address: 00000000
   Entry Point:  00000000
   Verifying Checksum ... OK
active_slot is <NULL>
Unknown command 'store' - try 'help'
No dtbo patitions found
load dtb from 0x1000000 ......
## Flattened Device Tree blob at 20000000
   Booting using the fdt blob at 0x20000000
No valid dtbo image found
libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND
[rsvmem] fdt get prop fail.
   Loading Ramdisk to 3cfe8000, end 3d7ff493 ... OK
   Loading Device Tree to 000000001ffea000, end 000000001ffffa91 ... OK

Starting kernel ...

uboot time: 7576404 us
Starting version 250.4-2-arch
[    0.970170] meson-drm ff900000.vpu: Couldn't bind all components
[    3.526323] panfrost ffe40000.gpu: dev_pm_opp_set_regulators: no regulator (mali) found: -19