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  1. /dts-v1/;
  2.  
  3. / {
  4. model = "Seabright";
  5. compatible = "qcom,kona-mtp\0qcom,kona\0qcom,mtp";
  6. qcom,board-id = <0x08 0x80>;
  7.  
  8. fragment@0 {
  9. target = <0xffffffff>;
  10.  
  11. __overlay__ {
  12. #address-cells = <0x02>;
  13. #size-cells = <0x00>;
  14. interrupt-controller;
  15. #interrupt-cells = <0x04>;
  16.  
  17. qcom,pm8150@0 {
  18. compatible = "qcom,spmi-pmic";
  19. reg = <0x00 0x00>;
  20. #address-cells = <0x02>;
  21. #size-cells = <0x00>;
  22.  
  23. qcom,power-on@800 {
  24. compatible = "qcom,qpnp-power-on";
  25. reg = <0x800 0x100>;
  26. interrupts = <0x00 0x08 0x00 0x03 0x00 0x08 0x01 0x03>;
  27. interrupt-names = "kpdpwr\0resin";
  28. qcom,pon-dbc-delay = <0x3d09>;
  29. qcom,kpdpwr-sw-debounce;
  30. qcom,system-reset;
  31. qcom,store-hard-reset-reason;
  32.  
  33. qcom,pon_1 {
  34. qcom,pon-type = <0x00>;
  35. linux,code = <0x74>;
  36. qcom,pull-up;
  37. };
  38.  
  39. qcom,pon_2 {
  40. qcom,pon-type = <0x01>;
  41. linux,code = <0x72>;
  42. qcom,pull-up;
  43. };
  44. };
  45.  
  46. qcom,temp-alarm@2400 {
  47. compatible = "qcom,spmi-temp-alarm";
  48. reg = <0x2400 0x100>;
  49. interrupts = <0x00 0x24 0x00 0x03>;
  50. io-channels = <0x01 0x06>;
  51. io-channel-names = "thermal";
  52. #thermal-sensor-cells = <0x00>;
  53. qcom,temperature-threshold-set = <0x01>;
  54. phandle = <0x03>;
  55. };
  56.  
  57. clock-controller@5b00 {
  58. compatible = "qcom,spmi-clkdiv";
  59. reg = <0x5b00 0x200>;
  60. #clock-cells = <0x01>;
  61. qcom,num-clkdivs = <0x02>;
  62. clock-output-names = "pm8150_div_clk1\0pm8150_div_clk2";
  63. clocks = <0xffffffff 0x00>;
  64. clock-names = "xo";
  65. phandle = <0x6c>;
  66. };
  67.  
  68. sdam@b100 {
  69. compatible = "qcom,spmi-sdam";
  70. reg = <0xb100 0x100>;
  71. phandle = <0x0c>;
  72. };
  73.  
  74. pinctrl@c000 {
  75. compatible = "qcom,spmi-gpio";
  76. reg = <0xc000 0xa00>;
  77. interrupts = <0x00 0xc0 0x00 0x00 0x00 0xc2 0x00 0x00 0x00 0xc5 0x00 0x00 0x00 0xc6 0x00 0x00 0x00 0xc8 0x00 0x00 0x00 0xc9 0x00 0x00>;
  78. interrupt-names = "pm8150_gpio1\0pm8150_gpio3\0pm8150_gpio6\0pm8150_gpio7\0pm8150_gpio9\0pm8150_gpio10";
  79. gpio-controller;
  80. #gpio-cells = <0x02>;
  81. qcom,gpios-disallowed = <0x02 0x04 0x05 0x08>;
  82. phandle = <0x2f>;
  83.  
  84. key_home {
  85.  
  86. key_home_default {
  87. pins = "gpio1";
  88. function = "normal";
  89. input-enable;
  90. bias-pull-up;
  91. power-source = <0x00>;
  92. phandle = <0x6d>;
  93. };
  94. };
  95.  
  96. imu_clkin {
  97.  
  98. imu_clkin_default {
  99. pins = "gpio3";
  100. function = "func1";
  101. output-low;
  102. power-source = <0x00>;
  103. bias-disable;
  104. qcom,dtest-buffer = <0x01>;
  105. qcom,drive-strength = <0x01>;
  106. phandle = <0x6e>;
  107. };
  108.  
  109. imu_clkin_sleep {
  110. pins = "gpio3";
  111. function = "func1";
  112. input-enable;
  113. bias-pull-down;
  114. power-source = <0x00>;
  115. qcom,dtest-buffer = <0x01>;
  116. qcom,drive-strength = <0x01>;
  117. phandle = <0x6f>;
  118. };
  119. };
  120.  
  121. key_vol_up {
  122.  
  123. key_vol_up_default {
  124. pins = "gpio6";
  125. function = "normal";
  126. input-enable;
  127. bias-pull-up;
  128. power-source = <0x01>;
  129. phandle = <0x2e>;
  130. };
  131. };
  132.  
  133. key_confirm {
  134.  
  135. key_confirm_default {
  136. pins = "gpio7";
  137. function = "normal";
  138. input-enable;
  139. bias-pull-up;
  140. power-source = <0x00>;
  141. phandle = <0x70>;
  142. };
  143. };
  144.  
  145. usb2_vbus_boost {
  146.  
  147. usb2_vbus_boost_default {
  148. pins = "gpio9";
  149. function = "normal";
  150. output-low;
  151. power-source = <0x01>;
  152. phandle = <0x71>;
  153. };
  154. };
  155.  
  156. usb2_vbus_det {
  157.  
  158. usb2_vbus_det_default {
  159. pins = "gpio10";
  160. function = "normal";
  161. input-enable;
  162. bias-pull-down;
  163. power-source = <0x01>;
  164. phandle = <0x72>;
  165. };
  166. };
  167.  
  168. pm8150_adc_therm {
  169.  
  170. pm_gpio_adc_default {
  171. pins = "gpio3";
  172. function = "normal";
  173. bias-high-impedance;
  174. phandle = <0x02>;
  175. };
  176. };
  177. };
  178.  
  179. qcom,pm8150_rtc {
  180. compatible = "qcom,pm8941-rtc";
  181. interrupts = <0x00 0x61 0x01 0x00>;
  182. phandle = <0x73>;
  183. };
  184.  
  185. vadc@3100 {
  186. compatible = "qcom,spmi-adc5";
  187. reg = <0x3100 0x100>;
  188. #address-cells = <0x01>;
  189. #size-cells = <0x00>;
  190. interrupts = <0x00 0x31 0x00 0x01>;
  191. interrupt-names = "eoc-int-en-set";
  192. qcom,adc-vdd-reference = <0x753>;
  193. #io-channel-cells = <0x01>;
  194. io-channel-ranges;
  195. phandle = <0x01>;
  196.  
  197. ref_gnd@0 {
  198. reg = <0x00>;
  199. label = "ref_gnd";
  200. qcom,pre-scaling = <0x01 0x01>;
  201. };
  202.  
  203. vref_1p25@1 {
  204. reg = <0x01>;
  205. label = "vref_1p25";
  206. qcom,pre-scaling = <0x01 0x01>;
  207. };
  208.  
  209. die_temp@2 {
  210. reg = <0x06>;
  211. label = "die_temp";
  212. qcom,pre-scaling = <0x01 0x01>;
  213. };
  214.  
  215. vph_pwr@83 {
  216. reg = <0x83>;
  217. label = "vph_pwr";
  218. qcom,pre-scaling = <0x01 0x03>;
  219. };
  220.  
  221. vcoin@85 {
  222. reg = <0x85>;
  223. label = "vcoin";
  224. qcom,pre-scaling = <0x01 0x03>;
  225. };
  226.  
  227. xo_therm@4c {
  228. reg = <0x4c>;
  229. label = "xo_therm";
  230. qcom,ratiometric;
  231. qcom,hw-settle-time = <0xc8>;
  232. qcom,pre-scaling = <0x01 0x01>;
  233. };
  234.  
  235. rfpa_therm1@4e {
  236. reg = <0x4e>;
  237. label = "rfpa_therm";
  238. qcom,ratiometric;
  239. qcom,hw-settle-time = <0xc8>;
  240. qcom,pre-scaling = <0x01 0x01>;
  241. };
  242.  
  243. cam4_therm@52 {
  244. reg = <0x52>;
  245. label = "cam4_therm";
  246. qcom,ratiometric;
  247. qcom,hw-settle-time = <0xc8>;
  248. qcom,pre-scaling = <0x01 0x01>;
  249. };
  250. };
  251.  
  252. adc_tm@3500 {
  253. compatible = "qcom,adc-tm5";
  254. reg = <0x3500 0x100>;
  255. interrupts = <0x00 0x35 0x00 0x01>;
  256. interrupt-names = "thr-int-en";
  257. #address-cells = <0x01>;
  258. #size-cells = <0x00>;
  259. #thermal-sensor-cells = <0x01>;
  260. io-channels = <0x01 0x4c 0x01 0x4d 0x01 0x4e 0x01 0x52>;
  261. pinctrl-names = "default";
  262. pinctrl-0 = <0x02>;
  263. phandle = <0x32>;
  264.  
  265. xo_therm@4c {
  266. reg = <0x4c>;
  267. qcom,ratiometric;
  268. qcom,hw-settle-time = <0xc8>;
  269. };
  270.  
  271. rfpa_therm1@4e {
  272. reg = <0x4e>;
  273. qcom,ratiometric;
  274. qcom,hw-settle-time = <0xc8>;
  275. };
  276.  
  277. cam4_therm@52 {
  278. reg = <0x52>;
  279. qcom,ratiometric;
  280. qcom,hw-settle-time = <0xc8>;
  281. };
  282. };
  283. };
  284.  
  285. qcom,pm8150@1 {
  286. compatible = "qcom,spmi-pmic";
  287. reg = <0x01 0x00>;
  288. #address-cells = <0x02>;
  289. #size-cells = <0x00>;
  290. };
  291. };
  292. };
  293.  
  294. fragment@1 {
  295. target = <0xffffffff>;
  296.  
  297. __overlay__ {
  298.  
  299. pm8150_tz {
  300. polling-delay-passive = <0x64>;
  301. polling-delay = <0x00>;
  302. thermal-governor = "step_wise";
  303. thermal-sensors = <0x03>;
  304. wake-capable-sensor;
  305. phandle = <0x74>;
  306.  
  307. trips {
  308.  
  309. trip0 {
  310. temperature = <0x17318>;
  311. hysteresis = <0x00>;
  312. type = "passive";
  313. phandle = <0x75>;
  314. };
  315.  
  316. trip1 {
  317. temperature = <0x1c138>;
  318. hysteresis = <0x00>;
  319. type = "passive";
  320. phandle = <0x76>;
  321. };
  322.  
  323. trip2 {
  324. temperature = <0x23668>;
  325. hysteresis = <0x00>;
  326. type = "passive";
  327. };
  328. };
  329. };
  330. };
  331. };
  332.  
  333. fragment@2 {
  334. target = <0xffffffff>;
  335.  
  336. __overlay__ {
  337. #address-cells = <0x02>;
  338. #size-cells = <0x00>;
  339. interrupt-controller;
  340. #interrupt-cells = <0x04>;
  341.  
  342. qcom,pm8150b@2 {
  343. compatible = "qcom,spmi-pmic";
  344. reg = <0x02 0x00>;
  345. #address-cells = <0x02>;
  346. #size-cells = <0x00>;
  347.  
  348. qcom,revid@100 {
  349. compatible = "qcom,qpnp-revid";
  350. reg = <0x100 0x100>;
  351. phandle = <0x07>;
  352. };
  353.  
  354. qcom,power-on@800 {
  355. compatible = "qcom,qpnp-power-on";
  356. reg = <0x800 0x100>;
  357. };
  358.  
  359. qcom,temp-alarm@2400 {
  360. compatible = "qcom,spmi-temp-alarm";
  361. reg = <0x2400 0x100>;
  362. interrupts = <0x02 0x24 0x00 0x03>;
  363. io-channels = <0x04 0x06>;
  364. io-channel-names = "thermal";
  365. #thermal-sensor-cells = <0x00>;
  366. qcom,temperature-threshold-set = <0x01>;
  367. phandle = <0x0f>;
  368. };
  369.  
  370. clock-controller@6000 {
  371. compatible = "qcom,spmi-clkdiv";
  372. reg = <0x6000 0x100>;
  373. #clock-cells = <0x01>;
  374. qcom,num-clkdivs = <0x01>;
  375. clock-output-names = "pm8150b_div_clk1";
  376. clocks = <0xffffffff 0x00>;
  377. clock-names = "xo";
  378. phandle = <0x77>;
  379. };
  380.  
  381. qcom,pbs@7200 {
  382. compatible = "qcom,qpnp-pbs";
  383. reg = <0x7200 0x100>;
  384. phandle = <0x0b>;
  385. };
  386.  
  387. qcom,sdam-qnovo@b000 {
  388. compatible = "qcom,qpnp-qnovo5";
  389. reg = <0xb000 0x100>;
  390. interrupts = <0x02 0xb0 0x01 0x01>;
  391. interrupt-names = "ptrain-done";
  392. pinctrl-names = "q_state1\0q_state2";
  393. pinctrl-0 = <0x05>;
  394. pinctrl-1 = <0x06>;
  395. phandle = <0x78>;
  396. };
  397.  
  398. pinctrl@c000 {
  399. compatible = "qcom,spmi-gpio";
  400. reg = <0xc000 0xc00>;
  401. interrupts = <0x02 0xc0 0x00 0x00 0x02 0xc1 0x00 0x00 0x02 0xc4 0x00 0x00 0x02 0xc5 0x00 0x00 0x02 0xc6 0x00 0x00 0x02 0xc7 0x00 0x00 0x02 0xc8 0x00 0x00 0x02 0xc9 0x00 0x00 0x02 0xcb 0x00 0x00>;
  402. interrupt-names = "pm8150b_gpio1\0pm8150b_gpio2\0pm8150b_gpio5\0pm8150b_gpio6\0pm8150b_gpio7\0pm8150b_gpio8\0pm8150b_gpio9\0pm8150b_gpio10\0pm8150b_gpio12";
  403. gpio-controller;
  404. #gpio-cells = <0x02>;
  405. qcom,gpios-disallowed = <0x03 0x04 0x0b>;
  406. phandle = <0x19>;
  407.  
  408. qnovo_fet_ctrl {
  409.  
  410. qnovo_fet_ctrl_state1 {
  411. pins = "gpio8";
  412. function = "normal";
  413. input-enable;
  414. output-disable;
  415. bias-disable;
  416. power-source = <0x00>;
  417. phandle = <0x05>;
  418. };
  419.  
  420. qnovo_fet_ctrl_state2 {
  421. pins = "gpio8";
  422. function = "normal";
  423. input-enable;
  424. output-disable;
  425. bias-pull-down;
  426. power-source = <0x00>;
  427. phandle = <0x06>;
  428. };
  429. };
  430.  
  431. smb_stat {
  432.  
  433. smb_stat_default {
  434. pins = "gpio6";
  435. function = "normal";
  436. input-enable;
  437. bias-pull-up;
  438. qcom,pull-up-strength = <0x00>;
  439. power-source = <0x00>;
  440. phandle = <0x79>;
  441. };
  442. };
  443.  
  444. haptics_boost {
  445.  
  446. haptics_boost_default {
  447. pins = "gpio5";
  448. function = "normal";
  449. output-enable;
  450. input-disable;
  451. bias-disable;
  452. qcom,drive-strength = <0x03>;
  453. power-source = <0x01>;
  454. phandle = <0x1a>;
  455. };
  456. };
  457.  
  458. pm8150b_adc_therm {
  459.  
  460. pmb_gpio_adc_default {
  461. pins = "gpio1\0gpio7\0gpio12";
  462. function = "normal";
  463. bias-high-impedance;
  464. phandle = <0x0d>;
  465. };
  466. };
  467. };
  468.  
  469. qcom,qpnp-smb5 {
  470. compatible = "qcom,qpnp-smb5";
  471. #address-cells = <0x01>;
  472. #size-cells = <0x01>;
  473. #cooling-cells = <0x02>;
  474. qcom,pmic-revid = <0x07>;
  475. qcom,thermal-mitigation = <0x2dc6c0 0x16e360 0xf4240 0x7a120>;
  476. qcom,chg-term-src = <0x01>;
  477. qcom,charger-temp-max = <0x320>;
  478. qcom,smb-temp-max = <0x320>;
  479. status = "ok";
  480. dpdm-supply = <0xffffffff>;
  481. qcom,sec-charger-config = <0x02>;
  482. qcom,auto-recharge-soc = <0x5f>;
  483. io-channels = <0x04 0x08 0x04 0x1e 0x04 0x07 0x04 0x99 0x04 0x83 0x04 0x09 0x04 0x4f>;
  484. io-channel-names = "usb_in_voltage\0mid_voltage\0usb_in_current\0sbux_res\0vph_voltage\0chg_temp\0rblt_res";
  485. qcom,battery-data = <0x08>;
  486. qcom,step-charging-enable;
  487. qcom,sw-jeita-enable;
  488. qcom,wd-bark-time-secs = <0x10>;
  489. qcom,suspend-input-on-debug-batt;
  490. qcom,fcc-max-ua = <0x4970c8>;
  491. qcom,usb-icl-ua = <0x2dc6c0>;
  492. qcom,dc-icl-ua = <0x2dc6c0>;
  493. qcom,chg-term-current-ma = <0xfffffed4>;
  494. qcom,typec-dam-enable;
  495. phandle = <0x7a>;
  496.  
  497. qcom,chgr@1000 {
  498. reg = <0x1000 0x100>;
  499. interrupts = <0x02 0x10 0x00 0x01 0x02 0x10 0x01 0x01 0x02 0x10 0x02 0x01 0x02 0x10 0x03 0x01 0x02 0x10 0x04 0x01 0x02 0x10 0x06 0x03 0x02 0x10 0x07 0x03>;
  500. interrupt-names = "chgr-error\0chg-state-change\0step-chg-state-change\0step-chg-soc-update-fail\0step-chg-soc-update-req\0vph-alarm\0vph-drop-prechg";
  501. };
  502.  
  503. qcom,dcdc@1100 {
  504. reg = <0x1100 0x100>;
  505. interrupts = <0x02 0x11 0x00 0x03 0x02 0x11 0x01 0x03 0x02 0x11 0x02 0x03 0x02 0x11 0x04 0x03 0x02 0x11 0x05 0x03 0x02 0x11 0x06 0x03 0x02 0x11 0x07 0x03>;
  506. interrupt-names = "otg-fail\0otg-oc-disable-sw\0otg-oc-hiccup\0high-duty-cycle\0input-current-limiting\0concurrent-mode-disable\0switcher-power-ok";
  507. };
  508.  
  509. qcom,batif@1200 {
  510. reg = <0x1200 0x100>;
  511. interrupts = <0x02 0x12 0x00 0x01 0x02 0x12 0x02 0x03 0x02 0x12 0x03 0x03 0x02 0x12 0x04 0x03 0x02 0x12 0x05 0x03 0x02 0x12 0x06 0x03 0x02 0x12 0x07 0x03>;
  512. interrupt-names = "bat-temp\0bat-ov\0bat-low\0bat-therm-or-id-missing\0bat-terminal-missing\0buck-oc\0vph-ov";
  513. };
  514.  
  515. qcom,usb@1300 {
  516. reg = <0x1300 0x100>;
  517. interrupts = <0x02 0x13 0x00 0x03 0x02 0x13 0x01 0x03 0x02 0x13 0x02 0x03 0x02 0x13 0x03 0x03 0x02 0x13 0x04 0x03 0x02 0x13 0x05 0x03 0x02 0x13 0x06 0x01 0x02 0x13 0x07 0x01>;
  518. interrupt-names = "usbin-collapse\0usbin-vashdn\0usbin-uv\0usbin-ov\0usbin-plugin\0usbin-revi-change\0usbin-src-change\0usbin-icl-change";
  519. };
  520.  
  521. qcom,dc@1400 {
  522. reg = <0x1400 0x100>;
  523. interrupts = <0x02 0x14 0x01 0x03 0x02 0x14 0x02 0x03 0x02 0x14 0x03 0x03 0x02 0x14 0x04 0x03 0x02 0x14 0x05 0x03 0x02 0x14 0x06 0x03 0x02 0x14 0x07 0x03>;
  524. interrupt-names = "dcin-vashdn\0dcin-uv\0dcin-ov\0dcin-plugin\0dcin-revi\0dcin-pon\0dcin-en";
  525. };
  526.  
  527. qcom,typec@1500 {
  528. reg = <0x1500 0x100>;
  529. interrupts = <0x02 0x15 0x00 0x01 0x02 0x15 0x01 0x03 0x02 0x15 0x02 0x01 0x02 0x15 0x03 0x03 0x02 0x15 0x04 0x01 0x02 0x15 0x05 0x01 0x02 0x15 0x06 0x03 0x02 0x15 0x07 0x01>;
  530. interrupt-names = "typec-or-rid-detect-change\0typec-vpd-detect\0typec-cc-state-change\0typec-vconn-oc\0typec-vbus-change\0typec-attach-detach\0typec-legacy-cable-detect\0typec-try-snk-src-detect";
  531. };
  532.  
  533. qcom,misc@1600 {
  534. reg = <0x1600 0x100>;
  535. interrupts = <0x02 0x16 0x00 0x01 0x02 0x16 0x01 0x01 0x02 0x16 0x02 0x03 0x02 0x16 0x03 0x03 0x02 0x16 0x04 0x03 0x02 0x16 0x06 0x03 0x02 0x16 0x07 0x03>;
  536. interrupt-names = "wdog-snarl\0wdog-bark\0aicl-fail\0aicl-done\0smb-en\0temp-change\0temp-change-smb";
  537. };
  538.  
  539. qcom,smb5-vconn {
  540. regulator-name = "smb5-vconn";
  541. phandle = <0x0a>;
  542. };
  543.  
  544. qcom,smb5-vbus {
  545. regulator-name = "smb5-vbus";
  546. phandle = <0x09>;
  547. };
  548. };
  549.  
  550. qcom,usb-pdphy@1700 {
  551. compatible = "qcom,qpnp-pdphy";
  552. reg = <0x1700 0x100>;
  553. interrupts = <0x02 0x17 0x00 0x01 0x02 0x17 0x01 0x01 0x02 0x17 0x02 0x01 0x02 0x17 0x03 0x01 0x02 0x17 0x04 0x01 0x02 0x17 0x05 0x01 0x02 0x17 0x06 0x01 0x02 0x17 0x07 0x01>;
  554. interrupt-names = "sig-tx\0sig-rx\0msg-tx\0msg-rx\0msg-tx-failed\0msg-tx-discarded\0msg-rx-discarded\0fr-swap";
  555. qcom,default-sink-caps = <0x1388 0xbb8 0x2328 0xbb8>;
  556. vdd-pdphy-supply = <0xffffffff>;
  557. vbus-supply = <0x09>;
  558. vconn-supply = <0x0a>;
  559. phandle = <0x1b>;
  560. };
  561.  
  562. bcl@1d00 {
  563. compatible = "qcom,bcl-v5";
  564. reg = <0x1d00 0x100>;
  565. interrupts = <0x02 0x1d 0x00 0x00 0x02 0x1d 0x01 0x00 0x02 0x1d 0x02 0x00>;
  566. interrupt-names = "bcl-lvl0\0bcl-lvl1\0bcl-lvl2";
  567. #thermal-sensor-cells = <0x01>;
  568. phandle = <0x10>;
  569. };
  570.  
  571. bcl-soc {
  572. compatible = "qcom,msm-bcl-soc";
  573. #thermal-sensor-cells = <0x00>;
  574. phandle = <0x11>;
  575. };
  576.  
  577. qpnp,fg {
  578. compatible = "qcom,fg-gen4";
  579. #address-cells = <0x01>;
  580. #size-cells = <0x01>;
  581. qcom,pmic-revid = <0x07>;
  582. qcom,pmic-pbs = <0x0b>;
  583. status = "ok";
  584. nvmem-names = "fg_sdam";
  585. nvmem = <0x0c>;
  586. qcom,battery-data = <0x08>;
  587. qcom,hold-soc-while-full;
  588. qcom,linearize-soc;
  589. qcom,five-pin-battery;
  590. qcom,cl-wt-enable;
  591. qcom,fg-esr-timer-chg-fast = <0x00 0x07>;
  592. qcom,fg-esr-timer-dischg-fast = <0x00 0x07>;
  593. qcom,fg-esr-timer-chg-slow = <0x00 0x60>;
  594. qcom,fg-esr-timer-dischg-slow = <0x00 0x60>;
  595. qcom,fg-esr-cal-soc-thresh = <0x1a 0xe6>;
  596. qcom,fg-esr-cal-temp-thresh = <0x0a 0x28>;
  597. qcom,fg-sys-term-current = <0xffffff9c>;
  598. qcom,fg-cutoff-current = <0xb4>;
  599. qcom,fg-cutoff-voltage = <0xd48>;
  600. qcom,fg-empty-voltage = <0xb54>;
  601. phandle = <0x7b>;
  602.  
  603. qcom,fg-batt-soc@4000 {
  604. status = "okay";
  605. reg = <0x4000 0x100>;
  606. interrupts = <0x02 0x40 0x00 0x03 0x02 0x40 0x01 0x03 0x02 0x40 0x02 0x01 0x02 0x40 0x03 0x01 0x02 0x40 0x04 0x03 0x02 0x40 0x05 0x01 0x02 0x40 0x06 0x03 0x02 0x40 0x07 0x03>;
  607. interrupt-names = "soc-update\0soc-ready\0bsoc-delta\0msoc-delta\0msoc-low\0msoc-empty\0msoc-high\0msoc-full";
  608. };
  609.  
  610. qcom,fg-batt-info@4100 {
  611. status = "okay";
  612. reg = <0x4100 0x100>;
  613. interrupts = <0x02 0x41 0x00 0x03 0x02 0x41 0x01 0x03 0x02 0x41 0x03 0x01>;
  614. interrupt-names = "vbatt-low\0vbatt-pred-delta\0esr-delta";
  615. };
  616.  
  617. qcom,fg-rradc@4200 {
  618. status = "okay";
  619. reg = <0x4200 0x100>;
  620. interrupts = <0x02 0x42 0x00 0x03 0x02 0x42 0x01 0x03 0x02 0x42 0x02 0x03 0x02 0x42 0x03 0x03 0x02 0x42 0x04 0x03>;
  621. interrupt-names = "batt-missing\0batt-id\0batt-temp-delta\0batt-temp-hot\0batt-temp-cold";
  622. };
  623.  
  624. qcom,fg-memif@4300 {
  625. status = "okay";
  626. reg = <0x4300 0x100>;
  627. interrupts = <0x02 0x43 0x00 0x03 0x02 0x43 0x01 0x03 0x02 0x43 0x02 0x03 0x02 0x43 0x03 0x01 0x02 0x43 0x04 0x02>;
  628. interrupt-names = "ima-rdy\0ima-xcp\0dma-xcp\0dma-grant\0mem-attn";
  629. };
  630. };
  631.  
  632. vadc@3100 {
  633. compatible = "qcom,spmi-adc-rev2";
  634. reg = <0x3100 0x100 0x3700 0x100>;
  635. reg-names = "adc5-usr-base\0adc5-cal-base";
  636. #address-cells = <0x01>;
  637. #size-cells = <0x00>;
  638. interrupts = <0x02 0x31 0x00 0x01>;
  639. interrupt-names = "eoc-int-en-set";
  640. qcom,adc-vdd-reference = <0x753>;
  641. #io-channel-cells = <0x01>;
  642. io-channel-ranges;
  643. phandle = <0x04>;
  644.  
  645. ref_gnd@0 {
  646. reg = <0x00>;
  647. label = "ref_gnd";
  648. qcom,pre-scaling = <0x01 0x01>;
  649. };
  650.  
  651. vref_1p25@1 {
  652. reg = <0x01>;
  653. label = "vref_1p25";
  654. qcom,pre-scaling = <0x01 0x01>;
  655. };
  656.  
  657. die_temp@2 {
  658. reg = <0x06>;
  659. label = "die_temp";
  660. qcom,pre-scaling = <0x01 0x01>;
  661. };
  662.  
  663. chg_temp@9 {
  664. reg = <0x09>;
  665. label = "chg_temp";
  666. qcom,pre-scaling = <0x01 0x01>;
  667. };
  668.  
  669. bat_id@4b {
  670. reg = <0x4b>;
  671. label = "bat_id";
  672. qcom,ratiometric;
  673. qcom,hw-settle-time = <0xc8>;
  674. qcom,pre-scaling = <0x01 0x01>;
  675. };
  676.  
  677. smb1390_therm@e {
  678. reg = <0x0e>;
  679. label = "smb1390_therm";
  680. qcom,hw-settle-time = <0xc8>;
  681. qcom,pre-scaling = <0x01 0x01>;
  682. };
  683.  
  684. smb1355_therm@4e {
  685. reg = <0x4e>;
  686. label = "smb1355_therm";
  687. qcom,ratiometric;
  688. qcom,hw-settle-time = <0xc8>;
  689. qcom,pre-scaling = <0x01 0x01>;
  690. };
  691.  
  692. vph_pwr@83 {
  693. reg = <0x83>;
  694. label = "vph_pwr";
  695. qcom,pre-scaling = <0x01 0x03>;
  696. };
  697.  
  698. bat_therm@4a {
  699. reg = <0x4a>;
  700. label = "bat_therm";
  701. qcom,ratiometric;
  702. qcom,hw-settle-time = <0xc8>;
  703. qcom,pre-scaling = <0x01 0x01>;
  704. };
  705.  
  706. smb_therm@4e {
  707. reg = <0x4e>;
  708. label = "smb_therm";
  709. qcom,ratiometric;
  710. qcom,hw-settle-time = <0xc8>;
  711. qcom,pre-scaling = <0x01 0x01>;
  712. };
  713.  
  714. rblt@4f {
  715. reg = <0x4f>;
  716. label = "rblt";
  717. qcom,ratiometric;
  718. qcom,hw-settle-time = <0xc8>;
  719. qcom,pre-scaling = <0x01 0x01>;
  720. };
  721.  
  722. pcb1_therm@50 {
  723. reg = <0x50>;
  724. label = "pcb1_therm";
  725. qcom,ratiometric;
  726. qcom,hw-settle-time = <0xc8>;
  727. qcom,pre-scaling = <0x01 0x01>;
  728. };
  729.  
  730. cam3_therm@54 {
  731. reg = <0x54>;
  732. label = "cam3_therm";
  733. qcom,ratiometric;
  734. qcom,hw-settle-time = <0xc8>;
  735. qcom,pre-scaling = <0x01 0x01>;
  736. };
  737.  
  738. chg_sbux@99 {
  739. reg = <0x99>;
  740. label = "chg_sbux";
  741. qcom,pre-scaling = <0x01 0x03>;
  742. };
  743.  
  744. mid_chg_div6@1e {
  745. reg = <0x1e>;
  746. label = "chg_mid";
  747. qcom,pre-scaling = <0x01 0x06>;
  748. };
  749.  
  750. usb_in_i_uv@7 {
  751. reg = <0x07>;
  752. label = "usb_in_i_uv";
  753. qcom,pre-scaling = <0x01 0x01>;
  754. };
  755.  
  756. usb_in_v_div_16@8 {
  757. reg = <0x08>;
  758. label = "usb_in_v_div_16";
  759. qcom,pre-scaling = <0x01 0x10>;
  760. };
  761.  
  762. ipd_sensor@d {
  763. reg = <0x0d>;
  764. label = "ipd_sensor";
  765. qcom,hw-settle-time = <0xc8>;
  766. qcom,pre-scaling = <0x01 0x01>;
  767. qcom,decimation = <0x400>;
  768. };
  769. };
  770.  
  771. adc_tm@3500 {
  772. compatible = "qcom,adc-tm5";
  773. reg = <0x3500 0x100>;
  774. interrupts = <0x02 0x35 0x00 0x01>;
  775. interrupt-names = "thr-int-en";
  776. #address-cells = <0x01>;
  777. #size-cells = <0x00>;
  778. #thermal-sensor-cells = <0x01>;
  779. qcom,pmic-revid = <0x07>;
  780. io-channels = <0x04 0x4e 0x04 0x50 0x04 0x53 0x04 0x54>;
  781. pinctrl-names = "default";
  782. pinctrl-0 = <0x0d>;
  783. phandle = <0x34>;
  784.  
  785. smb_therm@4e {
  786. reg = <0x4e>;
  787. qcom,ratiometric;
  788. qcom,hw-settle-time = <0xc8>;
  789. };
  790.  
  791. pcb1_therm@50 {
  792. reg = <0x50>;
  793. qcom,ratiometric;
  794. qcom,hw-settle-time = <0xc8>;
  795. };
  796.  
  797. cam3_therm@54 {
  798. reg = <0x54>;
  799. qcom,ratiometric;
  800. qcom,hw-settle-time = <0xc8>;
  801. };
  802. };
  803. };
  804.  
  805. qcom,pm8150b@3 {
  806. compatible = "qcom,spmi-pmic";
  807. reg = <0x03 0x00>;
  808. #address-cells = <0x02>;
  809. #size-cells = <0x00>;
  810.  
  811. qcom,pwms@b100 {
  812. compatible = "qcom,pwm-lpg";
  813. reg = <0xb100 0x200>;
  814. reg-names = "lpg-base";
  815. #pwm-cells = <0x02>;
  816. qcom,num-lpg-channels = <0x02>;
  817. phandle = <0x0e>;
  818. };
  819.  
  820. qcom,leds@d000 {
  821. compatible = "qcom,tri-led";
  822. reg = <0xd000 0x100>;
  823. nvmem-names = "pbs_sdam";
  824. nvmem = <0x0c>;
  825. phandle = <0x7c>;
  826.  
  827. hr_led1 {
  828. label = "hr_led1";
  829. pwms = <0x0e 0x00 0xf4240>;
  830. led-sources = <0x00>;
  831. };
  832.  
  833. hr_led2 {
  834. label = "hr_led2";
  835. pwms = <0x0e 0x01 0xf4240>;
  836. led-sources = <0x01>;
  837. };
  838. };
  839.  
  840. qcom,haptics@c000 {
  841. compatible = "qcom,haptics";
  842. reg = <0xc000 0x100>;
  843. interrupts = <0x03 0xc0 0x00 0x03 0x03 0xc0 0x01 0x03>;
  844. interrupt-names = "hap-sc-irq\0hap-play-irq";
  845. qcom,actuator-type = "lra";
  846. qcom,vmax-mv = <0xe10>;
  847. qcom,play-rate-us = <0x1a0b>;
  848. qcom,lra-resonance-sig-shape = "sine";
  849. qcom,lra-auto-resonance-mode = "qwd";
  850. qcom,lra-allow-variable-play-rate;
  851. status = "disabled";
  852. phandle = <0x7d>;
  853.  
  854. wf_0 {
  855. qcom,effect-id = <0x00>;
  856. qcom,wf-vmax-mv = <0xe10>;
  857. qcom,wf-pattern = <0x3e3e3e3e 0x3e3e3e3e>;
  858. qcom,wf-play-rate-us = <0x1a0b>;
  859. qcom,wf-brake-pattern = <0x00>;
  860. qcom,wf-repeat-count = <0x01>;
  861. qcom,wf-s-repeat-count = <0x01>;
  862. qcom,lra-auto-resonance-disable;
  863. };
  864.  
  865. wf_1 {
  866. qcom,effect-id = <0x01>;
  867. qcom,wf-vmax-mv = <0xe10>;
  868. qcom,wf-pattern = <0x3e3e3e3e 0x3e3e3e3e>;
  869. qcom,wf-play-rate-us = <0x1a0b>;
  870. qcom,wf-brake-pattern = <0x00>;
  871. qcom,wf-repeat-count = <0x01>;
  872. qcom,wf-s-repeat-count = <0x01>;
  873. qcom,lra-auto-resonance-disable;
  874. };
  875.  
  876. wf_2 {
  877. qcom,effect-id = <0x02>;
  878. qcom,wf-vmax-mv = <0xe10>;
  879. qcom,wf-pattern = <0x3e3e3e3e 0x3e3e3e3e>;
  880. qcom,wf-play-rate-us = <0x1a0b>;
  881. qcom,wf-brake-pattern = <0x00>;
  882. qcom,wf-repeat-count = <0x01>;
  883. qcom,wf-s-repeat-count = <0x01>;
  884. qcom,lra-auto-resonance-disable;
  885. };
  886.  
  887. wf_3 {
  888. qcom,effect-id = <0x03>;
  889. qcom,wf-vmax-mv = <0xe10>;
  890. qcom,wf-pattern = <0x3e3e3e3e 0x3e3e3e3e>;
  891. qcom,wf-play-rate-us = <0x1a0b>;
  892. qcom,wf-brake-pattern = <0x00>;
  893. qcom,wf-repeat-count = <0x01>;
  894. qcom,wf-s-repeat-count = <0x01>;
  895. qcom,lra-auto-resonance-disable;
  896. };
  897.  
  898. wf_4 {
  899. qcom,effect-id = <0x04>;
  900. qcom,wf-vmax-mv = <0xe10>;
  901. qcom,wf-pattern = <0x3e3e3e3e 0x3e3e3e3e>;
  902. qcom,wf-play-rate-us = <0x1a0b>;
  903. qcom,wf-brake-pattern = <0x00>;
  904. qcom,wf-repeat-count = <0x01>;
  905. qcom,wf-s-repeat-count = <0x01>;
  906. qcom,lra-auto-resonance-disable;
  907. };
  908.  
  909. wf_5 {
  910. qcom,effect-id = <0x05>;
  911. qcom,wf-vmax-mv = <0xe10>;
  912. qcom,wf-pattern = <0x3e3e3e3e 0x3e3e3e3e>;
  913. qcom,wf-play-rate-us = <0x1a0b>;
  914. qcom,wf-brake-pattern = <0x00>;
  915. qcom,wf-repeat-count = <0x01>;
  916. qcom,wf-s-repeat-count = <0x01>;
  917. qcom,lra-auto-resonance-disable;
  918. };
  919. };
  920. };
  921. };
  922. };
  923.  
  924. fragment@3 {
  925. target = <0xffffffff>;
  926.  
  927. __overlay__ {
  928.  
  929. pm8150b_tz {
  930. polling-delay-passive = <0x64>;
  931. polling-delay = <0x00>;
  932. thermal-governor = "step_wise";
  933. thermal-sensors = <0x0f>;
  934. wake-capable-sensor;
  935. phandle = <0x7e>;
  936.  
  937. trips {
  938.  
  939. trip0 {
  940. temperature = <0x17318>;
  941. hysteresis = <0x00>;
  942. type = "passive";
  943. phandle = <0x7f>;
  944. };
  945.  
  946. trip1 {
  947. temperature = <0x1c138>;
  948. hysteresis = <0x00>;
  949. type = "passive";
  950. phandle = <0x80>;
  951. };
  952.  
  953. trip2 {
  954. temperature = <0x23668>;
  955. hysteresis = <0x00>;
  956. type = "passive";
  957. };
  958. };
  959. };
  960.  
  961. pm8150b-ibat-lvl0 {
  962. polling-delay-passive = <0x00>;
  963. polling-delay = <0x00>;
  964. thermal-governor = "step_wise";
  965. thermal-sensors = <0x10 0x00>;
  966. wake-capable-sensor;
  967.  
  968. trips {
  969.  
  970. ibat-lvl0 {
  971. temperature = <0x1194>;
  972. hysteresis = <0xc8>;
  973. type = "passive";
  974. phandle = <0x81>;
  975. };
  976. };
  977. };
  978.  
  979. pm8150b-ibat-lvl1 {
  980. polling-delay-passive = <0x00>;
  981. polling-delay = <0x00>;
  982. thermal-governor = "step_wise";
  983. thermal-sensors = <0x10 0x01>;
  984. wake-capable-sensor;
  985.  
  986. trips {
  987.  
  988. ibat-lvl1 {
  989. temperature = <0x1388>;
  990. hysteresis = <0xc8>;
  991. type = "passive";
  992. phandle = <0x82>;
  993. };
  994. };
  995. };
  996.  
  997. pm8150b-vbat-lvl0 {
  998. polling-delay-passive = <0x00>;
  999. polling-delay = <0x00>;
  1000. thermal-governor = "low_limits_cap";
  1001. thermal-sensors = <0x10 0x02>;
  1002. tracks-low;
  1003. wake-capable-sensor;
  1004.  
  1005. trips {
  1006.  
  1007. vbat-lvl0 {
  1008. temperature = <0xbb8>;
  1009. hysteresis = <0xc8>;
  1010. type = "passive";
  1011. phandle = <0x83>;
  1012. };
  1013. };
  1014. };
  1015.  
  1016. pm8150b-vbat-lvl1 {
  1017. polling-delay-passive = <0x00>;
  1018. polling-delay = <0x00>;
  1019. thermal-governor = "low_limits_cap";
  1020. thermal-sensors = <0x10 0x03>;
  1021. tracks-low;
  1022. wake-capable-sensor;
  1023.  
  1024. trips {
  1025.  
  1026. vbat-lvl1 {
  1027. temperature = <0xaf0>;
  1028. hysteresis = <0xc8>;
  1029. type = "passive";
  1030. phandle = <0x84>;
  1031. };
  1032. };
  1033. };
  1034.  
  1035. pm8150b-vbat-lvl2 {
  1036. polling-delay-passive = <0x00>;
  1037. polling-delay = <0x00>;
  1038. thermal-governor = "low_limits_cap";
  1039. thermal-sensors = <0x10 0x04>;
  1040. tracks-low;
  1041. wake-capable-sensor;
  1042.  
  1043. trips {
  1044.  
  1045. vbat-lvl2 {
  1046. temperature = <0xa28>;
  1047. hysteresis = <0xc8>;
  1048. type = "passive";
  1049. phandle = <0x85>;
  1050. };
  1051. };
  1052. };
  1053.  
  1054. pm8150b-bcl-lvl0 {
  1055. polling-delay-passive = <0x64>;
  1056. polling-delay = <0x00>;
  1057. thermal-governor = "step_wise";
  1058. thermal-sensors = <0x10 0x05>;
  1059. wake-capable-sensor;
  1060.  
  1061. trips {
  1062.  
  1063. b-bcl-lvl0 {
  1064. temperature = <0x01>;
  1065. hysteresis = <0x01>;
  1066. type = "passive";
  1067. phandle = <0x28>;
  1068. };
  1069. };
  1070. };
  1071.  
  1072. pm8150b-bcl-lvl1 {
  1073. polling-delay-passive = <0x64>;
  1074. polling-delay = <0x00>;
  1075. thermal-governor = "step_wise";
  1076. thermal-sensors = <0x10 0x06>;
  1077. wake-capable-sensor;
  1078.  
  1079. trips {
  1080.  
  1081. b-bcl-lvl1 {
  1082. temperature = <0x01>;
  1083. hysteresis = <0x01>;
  1084. type = "passive";
  1085. phandle = <0x29>;
  1086. };
  1087. };
  1088. };
  1089.  
  1090. pm8150b-bcl-lvl2 {
  1091. polling-delay-passive = <0x64>;
  1092. polling-delay = <0x00>;
  1093. thermal-governor = "step_wise";
  1094. thermal-sensors = <0x10 0x07>;
  1095. wake-capable-sensor;
  1096.  
  1097. trips {
  1098.  
  1099. b-bcl-lvl2 {
  1100. temperature = <0x01>;
  1101. hysteresis = <0x01>;
  1102. type = "passive";
  1103. phandle = <0x2a>;
  1104. };
  1105. };
  1106. };
  1107.  
  1108. soc {
  1109. polling-delay-passive = <0x64>;
  1110. polling-delay = <0x00>;
  1111. thermal-governor = "low_limits_cap";
  1112. thermal-sensors = <0x11>;
  1113. tracks-low;
  1114. wake-capable-sensor;
  1115.  
  1116. trips {
  1117.  
  1118. soc-trip {
  1119. temperature = <0x0a>;
  1120. hysteresis = <0x00>;
  1121. type = "passive";
  1122. phandle = <0x27>;
  1123. };
  1124. };
  1125. };
  1126. };
  1127. };
  1128.  
  1129. fragment@4 {
  1130. target = <0xffffffff>;
  1131.  
  1132. __overlay__ {
  1133. #address-cells = <0x02>;
  1134. #size-cells = <0x00>;
  1135. interrupt-controller;
  1136. #interrupt-cells = <0x04>;
  1137.  
  1138. qcom,pm8150l@4 {
  1139. compatible = "qcom,spmi-pmic";
  1140. reg = <0x04 0x00>;
  1141. #address-cells = <0x02>;
  1142. #size-cells = <0x00>;
  1143.  
  1144. qcom,revid@100 {
  1145. compatible = "qcom,qpnp-revid";
  1146. reg = <0x100 0x100>;
  1147. phandle = <0x14>;
  1148. };
  1149.  
  1150. qcom,power-on@800 {
  1151. compatible = "qcom,qpnp-power-on";
  1152. reg = <0x800 0x100>;
  1153. };
  1154.  
  1155. qcom,temp-alarm@2400 {
  1156. compatible = "qcom,spmi-temp-alarm";
  1157. reg = <0x2400 0x100>;
  1158. interrupts = <0x04 0x24 0x00 0x03>;
  1159. io-channels = <0x12 0x06>;
  1160. io-channel-names = "thermal";
  1161. #thermal-sensor-cells = <0x00>;
  1162. qcom,temperature-threshold-set = <0x01>;
  1163. phandle = <0x16>;
  1164. };
  1165.  
  1166. clock-controller@5b00 {
  1167. compatible = "qcom,spmi-clkdiv";
  1168. reg = <0x5b00 0x100>;
  1169. #clock-cells = <0x01>;
  1170. qcom,num-clkdivs = <0x01>;
  1171. clock-output-names = "pm8150l_div_clk1";
  1172. clocks = <0xffffffff 0x00>;
  1173. clock-names = "xo";
  1174. phandle = <0x86>;
  1175. };
  1176.  
  1177. pinctrl@c000 {
  1178. compatible = "qcom,spmi-gpio";
  1179. reg = <0xc000 0xc00>;
  1180. interrupts = <0x04 0xc0 0x00 0x00 0x04 0xc2 0x00 0x00 0x04 0xc3 0x00 0x00 0x04 0xc4 0x00 0x00 0x04 0xc5 0x00 0x00 0x04 0xc6 0x00 0x00 0x04 0xc7 0x00 0x00 0x04 0xc9 0x00 0x00 0x04 0xca 0x00 0x00>;
  1181. interrupt-names = "pm8150l_gpio1\0pm8150l_gpio3\0pm8150l_gpio4\0pm8150l_gpio5\0pm8150l_gpio6\0pm8150l_gpio7\0pm8150l_gpio8\0pm8150l_gpio10\0pm8150l_gpio11";
  1182. gpio-controller;
  1183. #gpio-cells = <0x02>;
  1184. qcom,gpios-disallowed = <0x02 0x09 0x0c>;
  1185. phandle = <0x87>;
  1186.  
  1187. pm8150l_adc_therm {
  1188.  
  1189. pml_gpio_adc_default {
  1190. pins = "gpio5\0gpio7";
  1191. function = "normal";
  1192. bias-high-impedance;
  1193. phandle = <0x13>;
  1194. };
  1195. };
  1196.  
  1197. fan_pwm@0 {
  1198.  
  1199. fan_pwm_default_0 {
  1200. pins = "gpio6";
  1201. function = "func1";
  1202. bias-disable;
  1203. power-source = <0x00>;
  1204. output-low;
  1205. qcom,drive-strength = <0x03>;
  1206. drive-push-pull;
  1207. status = "okay";
  1208. phandle = <0x3e>;
  1209. };
  1210. };
  1211.  
  1212. fan_pwm@1 {
  1213.  
  1214. fan_pwm_default_1 {
  1215. pins = "gpio10";
  1216. function = "func1";
  1217. bias-disable;
  1218. power-source = <0x01>;
  1219. output-low;
  1220. qcom,drive-strength = <0x03>;
  1221. drive-push-pull;
  1222. status = "okay";
  1223. phandle = <0x40>;
  1224. };
  1225. };
  1226. };
  1227.  
  1228. vadc@3100 {
  1229. compatible = "qcom,spmi-adc5";
  1230. reg = <0x3100 0x100>;
  1231. #address-cells = <0x01>;
  1232. #size-cells = <0x00>;
  1233. interrupts = <0x04 0x31 0x00 0x01>;
  1234. interrupt-names = "eoc-int-en-set";
  1235. qcom,adc-vdd-reference = <0x753>;
  1236. #io-channel-cells = <0x01>;
  1237. io-channel-ranges;
  1238. phandle = <0x12>;
  1239.  
  1240. ref_gnd@0 {
  1241. reg = <0x00>;
  1242. label = "ref_gnd";
  1243. qcom,pre-scaling = <0x01 0x01>;
  1244. };
  1245.  
  1246. vref_1p25@1 {
  1247. reg = <0x01>;
  1248. label = "vref_1p25";
  1249. qcom,pre-scaling = <0x01 0x01>;
  1250. };
  1251.  
  1252. die_temp@2 {
  1253. reg = <0x06>;
  1254. label = "die_temp";
  1255. qcom,pre-scaling = <0x01 0x01>;
  1256. };
  1257.  
  1258. vph_pwr@83 {
  1259. reg = <0x83>;
  1260. label = "vph_pwr";
  1261. qcom,pre-scaling = <0x01 0x03>;
  1262. };
  1263.  
  1264. cam0_therm@4d {
  1265. reg = <0x4d>;
  1266. label = "cam0_therm";
  1267. qcom,ratiometric;
  1268. qcom,hw-settle-time = <0xc8>;
  1269. qcom,pre-scaling = <0x01 0x01>;
  1270. };
  1271.  
  1272. cam1_therm@4f {
  1273. reg = <0x4f>;
  1274. label = "cam1_therm";
  1275. qcom,ratiometric;
  1276. qcom,hw-settle-time = <0xc8>;
  1277. qcom,pre-scaling = <0x01 0x01>;
  1278. };
  1279.  
  1280. cam2_therm@52 {
  1281. reg = <0x52>;
  1282. label = "cam2_therm";
  1283. qcom,ratiometric;
  1284. qcom,hw-settle-time = <0xc8>;
  1285. qcom,pre-scaling = <0x01 0x01>;
  1286. };
  1287. };
  1288.  
  1289. bcl@3d00 {
  1290. compatible = "qcom,bcl-v5";
  1291. reg = <0x3d00 0x100>;
  1292. interrupts = <0x04 0x3d 0x00 0x00 0x04 0x3d 0x01 0x00 0x04 0x3d 0x02 0x00>;
  1293. interrupt-names = "bcl-lvl0\0bcl-lvl1\0bcl-lvl2";
  1294. #thermal-sensor-cells = <0x01>;
  1295. phandle = <0x17>;
  1296. };
  1297.  
  1298. adc_tm@3500 {
  1299. compatible = "qcom,adc-tm5";
  1300. reg = <0x3500 0x100>;
  1301. interrupts = <0x04 0x35 0x00 0x01>;
  1302. interrupt-names = "thr-int-en";
  1303. #address-cells = <0x01>;
  1304. #size-cells = <0x00>;
  1305. #thermal-sensor-cells = <0x01>;
  1306. io-channels = <0x12 0x4d 0x12 0x4e 0x12 0x4f 0x12 0x52>;
  1307. pinctrl-names = "default";
  1308. pinctrl-0 = <0x13>;
  1309. phandle = <0x33>;
  1310.  
  1311. cam0_therm@4d {
  1312. reg = <0x4d>;
  1313. qcom,ratiometric;
  1314. qcom,hw-settle-time = <0xc8>;
  1315. };
  1316.  
  1317. cam1_therm@4f {
  1318. reg = <0x4f>;
  1319. qcom,ratiometric;
  1320. qcom,hw-settle-time = <0xc8>;
  1321. };
  1322.  
  1323. cam2_therm@52 {
  1324. reg = <0x52>;
  1325. qcom,ratiometric;
  1326. qcom,hw-settle-time = <0xc8>;
  1327. };
  1328. };
  1329. };
  1330.  
  1331. qcom,pm8150l@5 {
  1332. compatible = "qcom,spmi-pmic";
  1333. reg = <0x05 0x00>;
  1334. #address-cells = <0x02>;
  1335. #size-cells = <0x00>;
  1336.  
  1337. qcom,lcdb@ec00 {
  1338. compatible = "qcom,qpnp-lcdb-regulator";
  1339. reg = <0xec00 0x100>;
  1340. interrupts = <0x05 0xec 0x01 0x01>;
  1341. interrupt-names = "sc-irq";
  1342. qcom,pmic-revid = <0x14>;
  1343. qcom,voltage-step-ramp;
  1344. status = "ok";
  1345. qcom,pwrdn-delay-ms = <0x08>;
  1346. qcom,pwrup-delay-ms = <0x04>;
  1347. qcom,pfm-peak-auto-adj-disabled;
  1348. phandle = <0x88>;
  1349.  
  1350. ldo {
  1351. label = "ldo";
  1352. regulator-name = "lcdb_ldo";
  1353. regulator-min-microvolt = <0x5b8d80>;
  1354. regulator-max-microvolt = <0x5b8d80>;
  1355. qcom,ldo-ilim-ma = <0x1cc>;
  1356. phandle = <0x1f>;
  1357. };
  1358.  
  1359. ncp {
  1360. label = "ncp";
  1361. regulator-name = "lcdb_ncp";
  1362. regulator-min-microvolt = <0x5b8d80>;
  1363. regulator-max-microvolt = <0x5b8d80>;
  1364. qcom,ncp-ilim-ma = <0x32a>;
  1365. phandle = <0x20>;
  1366. };
  1367.  
  1368. bst {
  1369. label = "bst";
  1370. regulator-name = "lcdb_bst";
  1371. regulator-min-microvolt = <0x47b760>;
  1372. regulator-max-microvolt = <0x5fbfb8>;
  1373. qcom,bst-ilim-ma = <0x258>;
  1374. phandle = <0x89>;
  1375. };
  1376. };
  1377.  
  1378. qcom,leds@d300 {
  1379. compatible = "qcom,qpnp-flash-led-v2";
  1380. status = "disabled";
  1381. reg = <0xd300 0x100>;
  1382. label = "flash";
  1383. interrupts = <0x05 0xd3 0x00 0x01 0x05 0xd3 0x03 0x01 0x05 0xd3 0x04 0x01>;
  1384. interrupt-names = "led-fault-irq\0all-ramp-down-done-irq\0all-ramp-up-done-irq";
  1385. qcom,hdrm-auto-mode;
  1386. qcom,short-circuit-det;
  1387. qcom,open-circuit-det;
  1388. qcom,vph-droop-det;
  1389. qcom,thermal-derate-en;
  1390. qcom,thermal-derate-current = <0xc8 0x1f4 0x3e8>;
  1391. qcom,isc-delay = <0xc0>;
  1392. qcom,pmic-revid = <0x14>;
  1393. phandle = <0x8a>;
  1394.  
  1395. qcom,flash_0 {
  1396. label = "flash";
  1397. qcom,led-name = "led:flash_0";
  1398. qcom,max-current = <0x5dc>;
  1399. qcom,default-led-trigger = "flash0_trigger";
  1400. qcom,id = <0x00>;
  1401. qcom,current-ma = <0x3e8>;
  1402. qcom,duration-ms = <0x500>;
  1403. qcom,ires-ua = <0x30d4>;
  1404. qcom,hdrm-voltage-mv = <0x145>;
  1405. qcom,hdrm-vol-hi-lo-win-mv = <0x64>;
  1406. phandle = <0x8b>;
  1407. };
  1408.  
  1409. qcom,flash_1 {
  1410. label = "flash";
  1411. qcom,led-name = "led:flash_1";
  1412. qcom,max-current = <0x5dc>;
  1413. qcom,default-led-trigger = "flash1_trigger";
  1414. qcom,id = <0x01>;
  1415. qcom,current-ma = <0x3e8>;
  1416. qcom,duration-ms = <0x500>;
  1417. qcom,ires-ua = <0x30d4>;
  1418. qcom,hdrm-voltage-mv = <0x145>;
  1419. qcom,hdrm-vol-hi-lo-win-mv = <0x64>;
  1420. phandle = <0x8c>;
  1421. };
  1422.  
  1423. qcom,flash_2 {
  1424. label = "flash";
  1425. qcom,led-name = "led:flash_2";
  1426. qcom,max-current = <0x2ee>;
  1427. qcom,default-led-trigger = "flash2_trigger";
  1428. qcom,id = <0x02>;
  1429. qcom,current-ma = <0x1f4>;
  1430. qcom,duration-ms = <0x500>;
  1431. qcom,ires-ua = <0x30d4>;
  1432. qcom,hdrm-voltage-mv = <0x145>;
  1433. qcom,hdrm-vol-hi-lo-win-mv = <0x64>;
  1434. status = "disabled";
  1435. phandle = <0x8d>;
  1436. };
  1437.  
  1438. qcom,torch_0 {
  1439. label = "torch";
  1440. qcom,led-name = "led:torch_0";
  1441. qcom,max-current = <0x1f4>;
  1442. qcom,default-led-trigger = "torch0_trigger";
  1443. qcom,id = <0x00>;
  1444. qcom,current-ma = <0x12c>;
  1445. qcom,ires-ua = <0x30d4>;
  1446. qcom,hdrm-voltage-mv = <0x145>;
  1447. qcom,hdrm-vol-hi-lo-win-mv = <0x64>;
  1448. phandle = <0x8e>;
  1449. };
  1450.  
  1451. qcom,torch_1 {
  1452. label = "torch";
  1453. qcom,led-name = "led:torch_1";
  1454. qcom,max-current = <0x1f4>;
  1455. qcom,default-led-trigger = "torch1_trigger";
  1456. qcom,id = <0x01>;
  1457. qcom,current-ma = <0x12c>;
  1458. qcom,ires-ua = <0x30d4>;
  1459. qcom,hdrm-voltage-mv = <0x145>;
  1460. qcom,hdrm-vol-hi-lo-win-mv = <0x64>;
  1461. phandle = <0x8f>;
  1462. };
  1463.  
  1464. qcom,torch_2 {
  1465. label = "torch";
  1466. qcom,led-name = "led:torch_2";
  1467. qcom,max-current = <0x1f4>;
  1468. qcom,default-led-trigger = "torch2_trigger";
  1469. qcom,id = <0x02>;
  1470. qcom,current-ma = <0x12c>;
  1471. qcom,ires-ua = <0x30d4>;
  1472. qcom,hdrm-voltage-mv = <0x145>;
  1473. qcom,hdrm-vol-hi-lo-win-mv = <0x64>;
  1474. status = "disabled";
  1475. phandle = <0x90>;
  1476. };
  1477.  
  1478. qcom,led_switch_0 {
  1479. label = "switch";
  1480. qcom,led-name = "led:switch_0";
  1481. qcom,led-mask = <0x01>;
  1482. qcom,default-led-trigger = "switch0_trigger";
  1483. phandle = <0x91>;
  1484. };
  1485.  
  1486. qcom,led_switch_1 {
  1487. label = "switch";
  1488. qcom,led-name = "led:switch_1";
  1489. qcom,led-mask = <0x02>;
  1490. qcom,default-led-trigger = "switch1_trigger";
  1491. phandle = <0x92>;
  1492. };
  1493.  
  1494. qcom,led_switch_2 {
  1495. label = "switch";
  1496. qcom,led-name = "led:switch_2";
  1497. qcom,led-mask = <0x03>;
  1498. qcom,default-led-trigger = "switch2_trigger";
  1499. phandle = <0x93>;
  1500. };
  1501.  
  1502. qcom,led_switch_3 {
  1503. label = "switch";
  1504. qcom,led-name = "led:switch_3";
  1505. qcom,led-mask = <0x04>;
  1506. qcom,default-led-trigger = "switch3_trigger";
  1507. phandle = <0x94>;
  1508. };
  1509. };
  1510.  
  1511. qcom,wled@d800 {
  1512. compatible = "qcom,pm8150l-spmi-wled";
  1513. reg = <0xd800 0x100 0xd900 0x100>;
  1514. reg-names = "wled-ctrl-base\0wled-sink-base";
  1515. label = "backlight";
  1516. interrupts = <0x05 0xd8 0x01 0x01 0x05 0xd8 0x04 0x03 0x05 0xd8 0x05 0x03>;
  1517. interrupt-names = "ovp-irq\0pre-flash-irq\0flash-irq";
  1518. qcom,pmic-revid = <0x14>;
  1519. qcom,auto-calibration;
  1520. status = "disabled";
  1521. phandle = <0x95>;
  1522.  
  1523. qcom,wled-flash {
  1524. label = "flash";
  1525. qcom,default-led-trigger = "wled_flash";
  1526. phandle = <0x96>;
  1527. };
  1528.  
  1529. qcom,wled-torch {
  1530. label = "torch";
  1531. qcom,default-led-trigger = "wled_torch";
  1532. qcom,wled-torch-timer = <0x4b0>;
  1533. phandle = <0x97>;
  1534. };
  1535.  
  1536. qcom,wled-switch {
  1537. label = "switch";
  1538. qcom,default-led-trigger = "wled_switch";
  1539. phandle = <0x98>;
  1540. };
  1541. };
  1542.  
  1543. qcom,pwms@b100 {
  1544. compatible = "qcom,pwm-lpg";
  1545. reg = <0xb100 0x300 0xb000 0x100>;
  1546. reg-names = "lpg-base\0lut-base";
  1547. #pwm-cells = <0x02>;
  1548. qcom,num-lpg-channels = <0x03>;
  1549. qcom,lut-patterns = <0x00 0x0a 0x14 0x1e 0x28 0x32 0x3c 0x46 0x50 0x5a 0x64 0x5a 0x50 0x46 0x3c 0x32 0x28 0x1e 0x14 0x0a 0x00>;
  1550. phandle = <0x15>;
  1551.  
  1552. lpg1 {
  1553. qcom,lpg-chan-id = <0x01>;
  1554. qcom,ramp-step-ms = <0x64>;
  1555. qcom,ramp-pause-hi-count = <0x02>;
  1556. qcom,ramp-pause-lo-count = <0x02>;
  1557. qcom,ramp-low-index = <0x00>;
  1558. qcom,ramp-high-index = <0x14>;
  1559. qcom,ramp-from-low-to-high;
  1560. qcom,ramp-pattern-repeat;
  1561. };
  1562.  
  1563. lpg2 {
  1564. qcom,lpg-chan-id = <0x02>;
  1565. qcom,ramp-step-ms = <0x64>;
  1566. qcom,ramp-pause-hi-count = <0x02>;
  1567. qcom,ramp-pause-lo-count = <0x02>;
  1568. qcom,ramp-low-index = <0x00>;
  1569. qcom,ramp-high-index = <0x14>;
  1570. qcom,ramp-from-low-to-high;
  1571. qcom,ramp-pattern-repeat;
  1572. };
  1573.  
  1574. lpg3 {
  1575. qcom,lpg-chan-id = <0x03>;
  1576. qcom,ramp-step-ms = <0x64>;
  1577. qcom,ramp-pause-hi-count = <0x02>;
  1578. qcom,ramp-pause-lo-count = <0x02>;
  1579. qcom,ramp-low-index = <0x00>;
  1580. qcom,ramp-high-index = <0x14>;
  1581. qcom,ramp-from-low-to-high;
  1582. qcom,ramp-pattern-repeat;
  1583. };
  1584. };
  1585.  
  1586. qcom,pwms@bc00 {
  1587. compatible = "qcom,pwm-lpg";
  1588. reg = <0xbc00 0x200>;
  1589. reg-names = "lpg-base";
  1590. #pwm-cells = <0x02>;
  1591. qcom,num-lpg-channels = <0x02>;
  1592. status = "okay";
  1593. phandle = <0x3d>;
  1594. };
  1595.  
  1596. qcom,leds@d000 {
  1597. compatible = "qcom,tri-led";
  1598. reg = <0xd000 0x100>;
  1599. phandle = <0x99>;
  1600.  
  1601. red {
  1602. label = "red";
  1603. pwms = <0x15 0x00 0xf4240>;
  1604. led-sources = <0x00>;
  1605. linux,default-trigger = "timer";
  1606. qcom,continuous-mode;
  1607. qcom,default-brightness = <0x0a>;
  1608. };
  1609.  
  1610. green {
  1611. label = "green";
  1612. pwms = <0x15 0x02 0xf4240>;
  1613. led-sources = <0x02>;
  1614. linux,default-trigger = "timer";
  1615. qcom,continuous-mode;
  1616. qcom,default-brightness = <0x0a>;
  1617. };
  1618.  
  1619. blue {
  1620. label = "blue";
  1621. pwms = <0x15 0x01 0xf4240>;
  1622. led-sources = <0x01>;
  1623. linux,default-trigger = "timer";
  1624. qcom,continuous-mode;
  1625. qcom,default-brightness = <0x0a>;
  1626. };
  1627. };
  1628.  
  1629. qcom,amoled {
  1630. compatible = "qcom,qpnp-amoled-regulator";
  1631. #address-cells = <0x01>;
  1632. #size-cells = <0x01>;
  1633. status = "disabled";
  1634. phandle = <0x9a>;
  1635.  
  1636. oledb@e000 {
  1637. reg = <0xe000 0x100>;
  1638. reg-names = "oledb_base";
  1639. regulator-name = "oledb";
  1640. regulator-min-microvolt = <0x4b2648>;
  1641. regulator-max-microvolt = <0x7b98a0>;
  1642. qcom,swire-control;
  1643. phandle = <0x9b>;
  1644. };
  1645.  
  1646. ab@de00 {
  1647. reg = <0xde00 0x100>;
  1648. reg-names = "ab_base";
  1649. regulator-name = "ab";
  1650. regulator-min-microvolt = <0x4630c0>;
  1651. regulator-max-microvolt = <0x5d1420>;
  1652. qcom,swire-control;
  1653. phandle = <0x9c>;
  1654. };
  1655.  
  1656. ibb@dc00 {
  1657. reg = <0xdc00 0x100>;
  1658. reg-names = "ibb_base";
  1659. regulator-name = "ibb";
  1660. regulator-min-microvolt = <0xc3500>;
  1661. regulator-max-microvolt = <0x5265c0>;
  1662. qcom,swire-control;
  1663. phandle = <0x9d>;
  1664. };
  1665. };
  1666. };
  1667. };
  1668. };
  1669.  
  1670. fragment@5 {
  1671. target = <0xffffffff>;
  1672.  
  1673. __overlay__ {
  1674.  
  1675. pm8150l_tz {
  1676. polling-delay-passive = <0x64>;
  1677. polling-delay = <0x00>;
  1678. thermal-governor = "step_wise";
  1679. thermal-sensors = <0x16>;
  1680. wake-capable-sensor;
  1681. phandle = <0x9e>;
  1682.  
  1683. trips {
  1684.  
  1685. trip0 {
  1686. temperature = <0x17318>;
  1687. hysteresis = <0x00>;
  1688. type = "passive";
  1689. };
  1690.  
  1691. trip1 {
  1692. temperature = <0x1c138>;
  1693. hysteresis = <0x00>;
  1694. type = "passive";
  1695. };
  1696.  
  1697. trip2 {
  1698. temperature = <0x23668>;
  1699. hysteresis = <0x00>;
  1700. type = "passive";
  1701. };
  1702. };
  1703. };
  1704.  
  1705. pm8150l-vph-lvl0 {
  1706. polling-delay-passive = <0x00>;
  1707. polling-delay = <0x00>;
  1708. thermal-governor = "low_limits_cap";
  1709. thermal-sensors = <0x17 0x02>;
  1710. tracks-low;
  1711. wake-capable-sensor;
  1712.  
  1713. trips {
  1714.  
  1715. vph-lvl0 {
  1716. temperature = <0xbb8>;
  1717. hysteresis = <0xc8>;
  1718. type = "passive";
  1719. phandle = <0x9f>;
  1720. };
  1721. };
  1722. };
  1723.  
  1724. pm8150l-vph-lvl1 {
  1725. polling-delay-passive = <0x00>;
  1726. polling-delay = <0x00>;
  1727. thermal-governor = "low_limits_cap";
  1728. thermal-sensors = <0x17 0x03>;
  1729. tracks-low;
  1730. wake-capable-sensor;
  1731.  
  1732. trips {
  1733.  
  1734. vph-lvl1 {
  1735. temperature = <0xabe>;
  1736. hysteresis = <0xc8>;
  1737. type = "passive";
  1738. phandle = <0xa0>;
  1739. };
  1740. };
  1741. };
  1742.  
  1743. pm8150l-vph-lvl2 {
  1744. polling-delay-passive = <0x00>;
  1745. polling-delay = <0x00>;
  1746. thermal-governor = "low_limits_cap";
  1747. thermal-sensors = <0x17 0x04>;
  1748. tracks-low;
  1749. wake-capable-sensor;
  1750.  
  1751. trips {
  1752.  
  1753. vph-lvl2 {
  1754. temperature = <0x9c4>;
  1755. hysteresis = <0xc8>;
  1756. type = "passive";
  1757. phandle = <0xa1>;
  1758. };
  1759. };
  1760. };
  1761.  
  1762. pm8150l-bcl-lvl0 {
  1763. polling-delay-passive = <0x64>;
  1764. polling-delay = <0x00>;
  1765. thermal-governor = "step_wise";
  1766. thermal-sensors = <0x17 0x05>;
  1767. wake-capable-sensor;
  1768.  
  1769. trips {
  1770.  
  1771. l-bcl-lvl0 {
  1772. temperature = <0x01>;
  1773. hysteresis = <0x01>;
  1774. type = "passive";
  1775. phandle = <0x2b>;
  1776. };
  1777. };
  1778. };
  1779.  
  1780. pm8150l-bcl-lvl1 {
  1781. polling-delay-passive = <0x64>;
  1782. polling-delay = <0x00>;
  1783. thermal-governor = "step_wise";
  1784. thermal-sensors = <0x17 0x06>;
  1785. wake-capable-sensor;
  1786.  
  1787. trips {
  1788.  
  1789. l-bcl-lvl1 {
  1790. temperature = <0x01>;
  1791. hysteresis = <0x01>;
  1792. type = "passive";
  1793. phandle = <0x2c>;
  1794. };
  1795. };
  1796. };
  1797.  
  1798. pm8150l-bcl-lvl2 {
  1799. polling-delay-passive = <0x64>;
  1800. polling-delay = <0x00>;
  1801. thermal-governor = "step_wise";
  1802. thermal-sensors = <0x17 0x07>;
  1803. wake-capable-sensor;
  1804.  
  1805. trips {
  1806.  
  1807. l-bcl-lvl2 {
  1808. temperature = <0x01>;
  1809. hysteresis = <0x01>;
  1810. type = "passive";
  1811. phandle = <0x2d>;
  1812. };
  1813. };
  1814. };
  1815. };
  1816. };
  1817.  
  1818. fragment@6 {
  1819. target = <0xffffffff>;
  1820.  
  1821. __overlay__ {
  1822. #address-cells = <0x02>;
  1823. #size-cells = <0x00>;
  1824. interrupt-controller;
  1825. #interrupt-cells = <0x04>;
  1826.  
  1827. qcom,pm8009@a {
  1828. compatible = "qcom,spmi-pmic";
  1829. reg = <0x0a 0x00>;
  1830. #address-cells = <0x02>;
  1831. #size-cells = <0x00>;
  1832.  
  1833. qcom,revid@100 {
  1834. compatible = "qcom,qpnp-revid";
  1835. reg = <0x100 0x100>;
  1836. };
  1837.  
  1838. qcom,power-on@800 {
  1839. compatible = "qcom,qpnp-power-on";
  1840. reg = <0x800 0x100>;
  1841. };
  1842.  
  1843. pinctrl@c000 {
  1844. compatible = "qcom,spmi-gpio";
  1845. reg = <0xc000 0x400>;
  1846. interrupts = <0x0a 0xc0 0x00 0x00 0x0a 0xc1 0x00 0x00 0x0a 0xc2 0x00 0x00 0x0a 0xc3 0x00 0x00>;
  1847. interrupt-names = "pm8009_gpio1\0pm8009_gpio2\0pm8009_gpio3\0pm8009_gpio4";
  1848. gpio-controller;
  1849. #gpio-cells = <0x02>;
  1850. phandle = <0x18>;
  1851. };
  1852. };
  1853.  
  1854. qcom,pm8009@b {
  1855. compatible = "qcom,spmi-pmic";
  1856. reg = <0x0b 0x00>;
  1857. #address-cells = <0x02>;
  1858. #size-cells = <0x00>;
  1859. };
  1860. };
  1861. };
  1862.  
  1863. fragment@7 {
  1864. target = <0xffffffff>;
  1865.  
  1866. __overlay__ {
  1867. #address-cells = <0x02>;
  1868. #size-cells = <0x00>;
  1869. interrupt-controller;
  1870. #interrupt-cells = <0x04>;
  1871.  
  1872. qcom,pmxprairie@8 {
  1873. compatible = "qcom,spmi-pmic";
  1874. reg = <0x08 0x00>;
  1875. #address-cells = <0x02>;
  1876. #size-cells = <0x00>;
  1877.  
  1878. qcom,power-on@800 {
  1879. compatible = "qcom,qpnp-power-on";
  1880. reg = <0x800 0x100>;
  1881. qcom,modem-reset;
  1882. };
  1883. };
  1884.  
  1885. qcom,pmxprairie@9 {
  1886. compatible = "qcom,spmi-pmic";
  1887. reg = <0x09 0x00>;
  1888. #address-cells = <0x02>;
  1889. #size-cells = <0x00>;
  1890. };
  1891. };
  1892. };
  1893.  
  1894. fragment@8 {
  1895. target = <0xffffffff>;
  1896.  
  1897. __overlay__ {
  1898.  
  1899. regulator-dbb1 {
  1900. compatible = "regulator-fixed";
  1901. regulator-name = "vdd_tof";
  1902. regulator-min-microvolt = <0x36ee80>;
  1903. regulator-max-microvolt = <0x36ee80>;
  1904. gpio = <0x18 0x01 0x00>;
  1905. startup-delay-us = <0x3e8>;
  1906. enable-active-high;
  1907. phandle = <0xa2>;
  1908. };
  1909.  
  1910. regulator-haptics-boost {
  1911. compatible = "regulator-fixed";
  1912. regulator-name = "vdd_hap_boost";
  1913. gpio = <0x19 0x05 0x00>;
  1914. pinctrl-names = "default";
  1915. pinctrl-0 = <0x1a>;
  1916. startup-delay-us = <0x3e8>;
  1917. enable-active-high;
  1918. status = "disabled";
  1919. phandle = <0xa3>;
  1920. };
  1921. };
  1922. };
  1923.  
  1924. fragment@9 {
  1925. target = <0xffffffff>;
  1926.  
  1927. __overlay__ {
  1928. extcon = <0x1b 0xffffffff>;
  1929. };
  1930. };
  1931.  
  1932. fragment@10 {
  1933. target = <0xffffffff>;
  1934.  
  1935. __overlay__ {
  1936. extcon = <0x1b>;
  1937. };
  1938. };
  1939.  
  1940. fragment@11 {
  1941. target = <0xffffffff>;
  1942.  
  1943. __overlay__ {
  1944.  
  1945. display_panel_avdd_default {
  1946. phandle = <0x1c>;
  1947.  
  1948. mux {
  1949. pins = "gpio61";
  1950. function = "gpio";
  1951. };
  1952.  
  1953. config {
  1954. pins = "gpio61";
  1955. drive-strength = <0x08>;
  1956. bias-disable = <0x00>;
  1957. output-high;
  1958. };
  1959. };
  1960. };
  1961. };
  1962.  
  1963. fragment@12 {
  1964. target = <0xffffffff>;
  1965.  
  1966. __overlay__ {
  1967.  
  1968. qcom,msm-ext-disp {
  1969. compatible = "qcom,msm-ext-disp";
  1970. phandle = <0x23>;
  1971.  
  1972. qcom,msm-ext-disp-audio-codec-rx {
  1973. compatible = "qcom,msm-ext-disp-audio-codec-rx";
  1974. phandle = <0xa4>;
  1975. };
  1976. };
  1977.  
  1978. dsi_panel_pwr_supply {
  1979. #address-cells = <0x01>;
  1980. #size-cells = <0x00>;
  1981. phandle = <0xa5>;
  1982.  
  1983. qcom,panel-supply-entry@0 {
  1984. reg = <0x00>;
  1985. qcom,supply-name = "vddio";
  1986. qcom,supply-min-voltage = <0x1b7740>;
  1987. qcom,supply-max-voltage = <0x1b7740>;
  1988. qcom,supply-enable-load = <0xf230>;
  1989. qcom,supply-disable-load = <0x50>;
  1990. qcom,supply-post-on-sleep = <0x14>;
  1991. };
  1992.  
  1993. qcom,panel-supply-entry@1 {
  1994. reg = <0x01>;
  1995. qcom,supply-name = "vdd";
  1996. qcom,supply-min-voltage = <0x325aa0>;
  1997. qcom,supply-max-voltage = <0x325aa0>;
  1998. qcom,supply-enable-load = <0xd13a8>;
  1999. qcom,supply-disable-load = <0x00>;
  2000. qcom,supply-post-on-sleep = <0x00>;
  2001. };
  2002.  
  2003. qcom,panel-supply-entry@2 {
  2004. reg = <0x02>;
  2005. qcom,supply-name = "lab";
  2006. qcom,supply-min-voltage = <0x4630c0>;
  2007. qcom,supply-max-voltage = <0x5b8d80>;
  2008. qcom,supply-enable-load = <0x186a0>;
  2009. qcom,supply-disable-load = <0x64>;
  2010. };
  2011.  
  2012. qcom,panel-supply-entry@3 {
  2013. reg = <0x03>;
  2014. qcom,supply-name = "ibb";
  2015. qcom,supply-min-voltage = <0x4630c0>;
  2016. qcom,supply-max-voltage = <0x5b8d80>;
  2017. qcom,supply-enable-load = <0x186a0>;
  2018. qcom,supply-disable-load = <0x64>;
  2019. qcom,supply-post-on-sleep = <0x14>;
  2020. };
  2021. };
  2022.  
  2023. dsi_panel_pwr_supply_lab_ibb {
  2024. #address-cells = <0x01>;
  2025. #size-cells = <0x00>;
  2026. phandle = <0x30>;
  2027.  
  2028. qcom,panel-supply-entry@0 {
  2029. reg = <0x00>;
  2030. qcom,supply-name = "vddio";
  2031. qcom,supply-min-voltage = <0x1cfde0>;
  2032. qcom,supply-max-voltage = <0x1cfde0>;
  2033. qcom,supply-enable-load = <0xf230>;
  2034. qcom,supply-disable-load = <0x50>;
  2035. qcom,supply-post-on-sleep = <0x14>;
  2036. qcom,supply-pre-off-sleep = <0x0f>;
  2037. };
  2038.  
  2039. qcom,panel-supply-entry@1 {
  2040. reg = <0x01>;
  2041. qcom,supply-name = "lab";
  2042. qcom,supply-min-voltage = <0x557300>;
  2043. qcom,supply-max-voltage = <0x5b8d80>;
  2044. qcom,supply-enable-load = <0x186a0>;
  2045. qcom,supply-disable-load = <0x64>;
  2046. };
  2047.  
  2048. qcom,panel-supply-entry@2 {
  2049. reg = <0x02>;
  2050. qcom,supply-name = "ibb";
  2051. qcom,supply-min-voltage = <0x557300>;
  2052. qcom,supply-max-voltage = <0x5b8d80>;
  2053. qcom,supply-enable-load = <0x186a0>;
  2054. qcom,supply-disable-load = <0x64>;
  2055. qcom,supply-post-on-sleep = <0x14>;
  2056. };
  2057.  
  2058. qcom,panel-supply-entry@3 {
  2059. reg = <0x03>;
  2060. qcom,supply-name = "blu-mcu";
  2061. qcom,supply-min-voltage = <0x325aa0>;
  2062. qcom,supply-max-voltage = <0x325aa0>;
  2063. qcom,supply-enable-load = <0xd13a8>;
  2064. qcom,supply-disable-load = <0x00>;
  2065. qcom,supply-post-on-sleep = <0x00>;
  2066. };
  2067.  
  2068. qcom,panel-supply-entry@4 {
  2069. reg = <0x04>;
  2070. qcom,supply-name = "blu-en";
  2071. qcom,supply-min-voltage = <0x1b7740>;
  2072. qcom,supply-max-voltage = <0x1b7740>;
  2073. qcom,supply-enable-load = <0xf230>;
  2074. qcom,supply-disable-load = <0x00>;
  2075. qcom,supply-pre-on-sleep = <0x0a>;
  2076. };
  2077. };
  2078.  
  2079. dsi_panel_pwr_supply_avdd {
  2080. #address-cells = <0x01>;
  2081. #size-cells = <0x00>;
  2082. phandle = <0xa6>;
  2083.  
  2084. qcom,panel-supply-entry@0 {
  2085. reg = <0x00>;
  2086. qcom,supply-name = "vddio";
  2087. qcom,supply-min-voltage = <0x1b7740>;
  2088. qcom,supply-max-voltage = <0x1b7740>;
  2089. qcom,supply-enable-load = <0xf230>;
  2090. qcom,supply-disable-load = <0x50>;
  2091. qcom,supply-post-on-sleep = <0x14>;
  2092. };
  2093.  
  2094. qcom,panel-supply-entry@1 {
  2095. reg = <0x01>;
  2096. qcom,supply-name = "avdd";
  2097. qcom,supply-min-voltage = <0x4630c0>;
  2098. qcom,supply-max-voltage = <0x5b8d80>;
  2099. qcom,supply-enable-load = <0x186a0>;
  2100. qcom,supply-disable-load = <0x64>;
  2101. };
  2102. };
  2103.  
  2104. display_gpio_regulator@1 {
  2105. compatible = "regulator-fixed";
  2106. regulator-name = "display_panel_avdd";
  2107. regulator-min-microvolt = <0x53ec60>;
  2108. regulator-max-microvolt = <0x53ec60>;
  2109. regulator-enable-ramp-delay = <0xe9>;
  2110. gpio = <0xffffffff 0x3d 0x00>;
  2111. enable-active-high;
  2112. regulator-boot-on;
  2113. pinctrl-names = "default";
  2114. pinctrl-0 = <0x1c>;
  2115. phandle = <0xa7>;
  2116. };
  2117.  
  2118. qcom,dsi-display-primary {
  2119. compatible = "qcom,dsi-display";
  2120. label = "primary";
  2121. qcom,dsi-ctrl = <0xffffffff 0xffffffff>;
  2122. qcom,dsi-phy = <0xffffffff 0xffffffff>;
  2123. clocks = <0xffffffff 0x06 0xffffffff 0x09 0xffffffff 0x03 0xffffffff 0x08 0xffffffff 0x12 0xffffffff 0x15 0xffffffff 0x0d 0xffffffff 0x11 0xffffffff 0x20 0xffffffff 0x23 0xffffffff 0x1d 0xffffffff 0x22 0xffffffff 0x2c 0xffffffff 0x2f 0xffffffff 0x27 0xffffffff 0x2b>;
  2124. clock-names = "mux_byte_clk0\0mux_pixel_clk0\0src_byte_clk0\0src_pixel_clk0\0cphy_byte_clk0\0cphy_pixel_clk0\0shadow_byte_clk0\0shadow_pixel_clk0\0mux_byte_clk1\0mux_pixel_clk1\0src_byte_clk1\0src_pixel_clk1\0cphy_byte_clk1\0cphy_pixel_clk1\0shadow_byte_clk1\0shadow_pixel_clk1";
  2125. pinctrl-names = "panel_active\0panel_suspend";
  2126. pinctrl-0 = <0x1d>;
  2127. pinctrl-1 = <0x1e>;
  2128. qcom,platform-te-gpio;
  2129. qcom,panel-te-source = <0x00>;
  2130. vddio-supply = <0xffffffff>;
  2131. vdd-supply = <0xffffffff>;
  2132. avdd-supply;
  2133. lab-supply = <0x1f>;
  2134. ibb-supply = <0x20>;
  2135. qcom,mdp = <0xffffffff>;
  2136. blu-mcu-supply = <0xffffffff>;
  2137. qcom,dsi-default-panel = <0x21>;
  2138. blu-en-supply = <0x22>;
  2139. phandle = <0x25>;
  2140. };
  2141.  
  2142. qcom,dsi-display-secondary {
  2143. compatible = "qcom,dsi-display";
  2144. label = "secondary";
  2145. qcom,dsi-ctrl = <0xffffffff 0xffffffff>;
  2146. qcom,dsi-phy = <0xffffffff 0xffffffff>;
  2147. clocks = <0xffffffff 0x06 0xffffffff 0x09 0xffffffff 0x12 0xffffffff 0x15 0xffffffff 0x20 0xffffffff 0x23 0xffffffff 0x2c 0xffffffff 0x2f>;
  2148. clock-names = "mux_byte_clk0\0mux_pixel_clk0\0cphy_byte_clk0\0cphy_pixel_clk0\0mux_byte_clk1\0mux_pixel_clk1\0cphy_byte_clk1\0cphy_pixel_clk1";
  2149. pinctrl-names = "panel_active\0panel_suspend";
  2150. pinctrl-0;
  2151. pinctrl-1;
  2152. qcom,platform-te-gpio;
  2153. qcom,panel-te-source = <0x01>;
  2154. vddio-supply = <0xffffffff>;
  2155. vdd-supply = <0xffffffff>;
  2156. avdd-supply;
  2157. qcom,mdp = <0xffffffff>;
  2158. phandle = <0x26>;
  2159. };
  2160.  
  2161. qcom,wb-display@0 {
  2162. compatible = "qcom,wb-display";
  2163. cell-index = <0x00>;
  2164. label = "wb_display";
  2165. phandle = <0x24>;
  2166. };
  2167.  
  2168. qcom,msm_notifier@0 {
  2169. compatible = "qcom,msm-notifier";
  2170. status = "disabled";
  2171. phandle = <0xa8>;
  2172. };
  2173. };
  2174. };
  2175.  
  2176. fragment@13 {
  2177. target = <0xffffffff>;
  2178.  
  2179. __overlay__ {
  2180. qcom,dp-usbpd-detection = <0x1b>;
  2181. qcom,ext-disp = <0x23>;
  2182. qcom,dp-aux-switch = <0xffffffff>;
  2183. qcom,usbplug-cc-gpio = <0xffffffff 0x41 0x00>;
  2184. pinctrl-names = "mdss_dp_active\0mdss_dp_sleep";
  2185. pinctrl-0 = <0xffffffff>;
  2186. pinctrl-1 = <0xffffffff>;
  2187. };
  2188. };
  2189.  
  2190. fragment@14 {
  2191. target = <0xffffffff>;
  2192.  
  2193. __overlay__ {
  2194. connectors = <0xffffffff 0x24 0x25 0x26 0xffffffff>;
  2195. };
  2196. };
  2197.  
  2198. fragment@15 {
  2199. target = <0xffffffff>;
  2200.  
  2201. __overlay__ {
  2202. #cooling-cells = <0x02>;
  2203. };
  2204. };
  2205.  
  2206. fragment@16 {
  2207. target = <0xffffffff>;
  2208.  
  2209. __overlay__ {
  2210.  
  2211. soc {
  2212.  
  2213. cooling-maps {
  2214.  
  2215. soc_cpu4 {
  2216. trip = <0x27>;
  2217. cooling-device = <0xffffffff 0x01 0x01>;
  2218. };
  2219.  
  2220. soc_cpu5 {
  2221. trip = <0x27>;
  2222. cooling-device = <0xffffffff 0x01 0x01>;
  2223. };
  2224.  
  2225. soc_cpu6 {
  2226. trip = <0x27>;
  2227. cooling-device = <0xffffffff 0x01 0x01>;
  2228. };
  2229.  
  2230. soc_cpu7 {
  2231. trip = <0x27>;
  2232. cooling-device = <0xffffffff 0x01 0x01>;
  2233. };
  2234. };
  2235. };
  2236.  
  2237. pm8150b-bcl-lvl0 {
  2238.  
  2239. cooling-maps {
  2240.  
  2241. vbat_cpu4 {
  2242. trip = <0x28>;
  2243. cooling-device = <0xffffffff 0x01 0x01>;
  2244. };
  2245.  
  2246. vbat_cpu5 {
  2247. trip = <0x28>;
  2248. cooling-device = <0xffffffff 0x01 0x01>;
  2249. };
  2250.  
  2251. vbat_gpu0 {
  2252. trip = <0x28>;
  2253. cooling-device = <0xffffffff 0x02 0x02>;
  2254. };
  2255. };
  2256. };
  2257.  
  2258. pm8150b-bcl-lvl1 {
  2259.  
  2260. cooling-maps {
  2261.  
  2262. vbat_cpu6 {
  2263. trip = <0x29>;
  2264. cooling-device = <0xffffffff 0x01 0x01>;
  2265. };
  2266.  
  2267. vbat_cpu7 {
  2268. trip = <0x29>;
  2269. cooling-device = <0xffffffff 0x01 0x01>;
  2270. };
  2271.  
  2272. vbat_gpu1 {
  2273. trip = <0x29>;
  2274. cooling-device = <0xffffffff 0x04 0x04>;
  2275. };
  2276. };
  2277. };
  2278.  
  2279. pm8150b-bcl-lvl2 {
  2280.  
  2281. cooling-maps {
  2282.  
  2283. vbat_gpu2 {
  2284. trip = <0x2a>;
  2285. cooling-device = <0xffffffff 0xfffffffe 0xfffffffe>;
  2286. };
  2287. };
  2288. };
  2289.  
  2290. pm8150l-bcl-lvl0 {
  2291. disable-thermal-zone;
  2292.  
  2293. cooling-maps {
  2294.  
  2295. vph_cpu4 {
  2296. trip = <0x2b>;
  2297. cooling-device = <0xffffffff 0x01 0x01>;
  2298. };
  2299.  
  2300. vph_cpu5 {
  2301. trip = <0x2b>;
  2302. cooling-device = <0xffffffff 0x01 0x01>;
  2303. };
  2304.  
  2305. vph_gpu0 {
  2306. trip = <0x2b>;
  2307. cooling-device = <0xffffffff 0x02 0x02>;
  2308. };
  2309. };
  2310. };
  2311.  
  2312. pm8150l-bcl-lvl1 {
  2313. disable-thermal-zone;
  2314.  
  2315. cooling-maps {
  2316.  
  2317. vph_cpu6 {
  2318. trip = <0x2c>;
  2319. cooling-device = <0xffffffff 0x01 0x01>;
  2320. };
  2321.  
  2322. vph_cpu7 {
  2323. trip = <0x2c>;
  2324. cooling-device = <0xffffffff 0x01 0x01>;
  2325. };
  2326.  
  2327. vph_gpu1 {
  2328. trip = <0x2c>;
  2329. cooling-device = <0xffffffff 0x04 0x04>;
  2330. };
  2331. };
  2332. };
  2333.  
  2334. pm8150l-bcl-lvl2 {
  2335. disable-thermal-zone;
  2336.  
  2337. cooling-maps {
  2338.  
  2339. vph_gpu2 {
  2340. trip = <0x2d>;
  2341. cooling-device = <0xffffffff 0xfffffffe 0xfffffffe>;
  2342. };
  2343. };
  2344. };
  2345. };
  2346. };
  2347.  
  2348. fragment@17 {
  2349. target = <0xffffffff>;
  2350.  
  2351. __overlay__ {
  2352. reg = <0x82400000 0x1c00000>;
  2353. };
  2354. };
  2355.  
  2356. fragment@18 {
  2357. target = <0xffffffff>;
  2358.  
  2359. __overlay__ {
  2360. reg = <0x00 0x80b00000 0x00 0x3500000>;
  2361. };
  2362. };
  2363.  
  2364. fragment@19 {
  2365. target = <0xffffffff>;
  2366.  
  2367. __overlay__ {
  2368.  
  2369. ramoops {
  2370. compatible = "ramoops";
  2371. reg = <0x00 0x9ba00000 0x00 0x90000>;
  2372. record-size = <0x20000>;
  2373. console-size = <0x20000>;
  2374. pmsg-size = <0x20000>;
  2375. phandle = <0xa9>;
  2376. };
  2377. };
  2378. };
  2379.  
  2380. fragment@20 {
  2381. target = <0xffffffff>;
  2382.  
  2383. __overlay__ {
  2384.  
  2385. gpio_keys {
  2386. compatible = "gpio-keys";
  2387. label = "gpio-keys";
  2388. pinctrl-names = "default";
  2389. pinctrl-0 = <0x2e>;
  2390.  
  2391. vol_up {
  2392. label = "volume_up";
  2393. gpios = <0x2f 0x06 0x01>;
  2394. linux,input-type = <0x01>;
  2395. linux,code = <0x73>;
  2396. gpio-key,wakeup;
  2397. debounce-interval = <0x0f>;
  2398. linux,can-disable;
  2399. };
  2400. };
  2401. };
  2402. };
  2403.  
  2404. fragment@21 {
  2405. target = <0xffffffff>;
  2406.  
  2407. __overlay__ {
  2408. reg = <0xb0000000 0x00>;
  2409. reg-names = [00];
  2410. };
  2411. };
  2412.  
  2413. fragment@22 {
  2414. target = <0xffffffff>;
  2415.  
  2416. __overlay__ {
  2417.  
  2418. qcom,mdss_dsi_dual_boe_lcd_dsc_video {
  2419. qcom,mdss-dsi-panel-name = "BOE dual video mode dsi panel with dsc";
  2420. qcom,mdss-dsi-panel-type = "dsi_video_mode";
  2421. qcom,dsi-ctrl-num = <0x00 0x01>;
  2422. qcom,dsi-phy-num = <0x00 0x01>;
  2423. qcom,mdss-dsi-bpp = <0x18>;
  2424. com,mdss-dsi-virtual-channel-id = <0x00>;
  2425. qcom,mdss-dsi-stream = <0x00>;
  2426. qcom,mdss-dsi-border-color = <0x00>;
  2427. qcom,mdss-dsi-traffic-mode = "burst_mode";
  2428. qcom,mdss-dsi-bllp-eof-power-mode;
  2429. qcom,mdss-dsi-bllp-power-mode;
  2430. qcom,mdss-dsi-lane-0-state;
  2431. qcom,mdss-dsi-lane-1-state;
  2432. qcom,mdss-dsi-lane-2-state;
  2433. qcom,mdss-dsi-dma-trigger = "trigger_sw";
  2434. qcom,mdss-dsi-mdp-trigger = "none";
  2435. qcom,mdss-dsi-reset-sequence = <0x01 0x14 0x00 0x14 0x01 0x14>;
  2436. qcom,adjust-timer-wakeup-ms = <0x01>;
  2437. qcom,mdss-dsi-lp11-init;
  2438. qcom,mdss-dsi-tx-eot-append;
  2439. qcom,cmd-sync-wait-broadcast;
  2440. qcom,panel-cphy-mode;
  2441. qcom,dsi-supported-dfps-list = <0x5a 0x59 0x58 0x57 0x56 0x55 0x54 0x53 0x52 0x51 0x50 0x4f 0x4e 0x4d 0x4c 0x4b 0x4a 0x49 0x48 0x47 0x46 0x45 0x44 0x43 0x42 0x41 0x40 0x3f 0x3e 0x3d 0x3c>;
  2442. qcom,mdss-dsi-pan-enable-dynamic-fps;
  2443. qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
  2444. qcom,mdss-dsi-min-refresh-rate = <0x3c>;
  2445. qcom,mdss-dsi-max-refresh-rate = <0x5a>;
  2446. qcom,panel-supply-entries = <0x30>;
  2447. qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_jdi";
  2448. qcom,mdss-dsi-bl-min-level = <0x320>;
  2449. qcom,mdss-dsi-bl-max-level = <0x4b0>;
  2450. qcom,platform-en-gpio = <0xffffffff 0x87 0x00>;
  2451. qcom,platform-reset-gpio = <0xffffffff 0x06 0x00>;
  2452. qcom,panel-sec-reset-gpio = <0xffffffff 0x07 0x00>;
  2453. qcom,mdss-dsi-reset-off-delay = <0x1e>;
  2454. qcom,mdss-dsi-sec-reset-off-delay = <0x1e>;
  2455. qcom,dsi-select-clocks = "mux_byte_clk0\0mux_pixel_clk0\0cphy_byte_clk0\0cphy_pixel_clk0";
  2456. phandle = <0x3b>;
  2457.  
  2458. qcom,mdss-dsi-display-timings {
  2459.  
  2460. timing@0 {
  2461. qcom,mdss-dsi-panel-width = <0x720>;
  2462. qcom,mdss-dsi-panel-height = <0x780>;
  2463. qcom,mdss-dsi-h-front-porch = <0x20>;
  2464. qcom,mdss-dsi-h-back-porch = <0x14>;
  2465. qcom,mdss-dsi-h-pulse-width = <0x14>;
  2466. qcom,mdss-dsi-h-sync-skew = <0x00>;
  2467. qcom,mdss-dsi-v-front-porch = <0x6c4>;
  2468. qcom,mdss-dsi-v-back-porch = <0x0e>;
  2469. qcom,mdss-dsi-v-pulse-width = <0x01>;
  2470. qcom,mdss-dsi-h-sync-pulse = <0x00>;
  2471. qcom,mdss-dsi-panel-framerate = <0x5a>;
  2472. qcom,mdss-dsi-bpp = <0x18>;
  2473. qcom,mdss-dsi-on-command = [29 01 00 00 00 00 02 b0 04 29 01 00 00 00 00 02 b1 00 29 01 00 00 00 00 08 b2 00 00 00 00 00 01 00 29 01 00 00 00 00 02 b3 00 29 01 00 00 00 00 04 b4 00 00 0a 29 01 00 00 00 00 17 b5 00 00 00 00 00 00 00 03 02 26 66 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0a b6 20 6b 80 06 33 92 00 1a 7a 29 01 00 00 00 00 05 b7 54 00 00 00 29 01 00 00 00 00 94 b8 18 58 22 00 01 29 01 18 20 3e ff 8f f0 20 00 5c 1b 07 3a 38 f8 08 20 00 40 00 1b 1b 0a 0a 1b 1b 0a 2c 0a 00 28 18 08 30 08 00 20 20 00 11 21 31 41 51 61 71 81 91 a1 b1 c1 d1 e1 f1 ff 00 00 00 00 03 00 0b 2e 16 25 2e 81 5e 75 94 a5 d6 ce fa d8 ff ed d0 18 57 ff 02 00 10 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 ff 00 00 00 00 03 71 4c 92 71 4c 92 11 41 44 11 41 44 88 28 22 dd 7d 77 88 78 77 22 d2 dd 06 00 01 05 01 00 00 03 10 00 00 00 00 29 01 00 00 00 00 06 ba 08 07 80 07 00 29 01 00 00 00 00 13 bb 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0c bc 20 00 00 00 00 00 00 00 00 ff ff 29 01 00 00 00 00 03 bd 00 00 29 01 00 00 00 00 24 be 00 00 00 00 00 00 69 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 01 01 01 01 01 01 01 01 00 00 29 01 00 00 00 00 4d bf 02 3c 34 55 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 12 c0 43 43 14 00 07 80 00 08 00 00 08 3b 00 00 14 00 08 29 01 00 00 00 00 19 c1 30 00 00 10 11 00 00 00 22 00 00 05 20 fa 00 08 00 00 00 00 00 00 00 00 29 01 00 00 00 00 6d c2 01 3d 81 01 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 3d 02 02 01 01 c1 00 05 00 01 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 3d 02 02 01 01 00 07 96 07 99 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 55 c3 00 00 01 00 10 00 0a 00 00 00 80 00 00 00 01 00 01 00 02 00 00 00 80 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 7b c4 00 00 00 a3 a3 a3 8e a1 a2 8d 9f 93 92 9c 9a 9b 9a 9b 00 00 00 00 00 00 00 00 9b 9a 9b 9a 9c 92 93 9f 8d a2 a1 8e a3 a3 a3 00 00 00 ff ff ff ff ff 0f df ff ff ff bf 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50 00 00 00 00 00 00 00 29 01 00 00 00 00 06 c5 08 00 00 00 00 29 01 00 00 00 00 38 c6 0b 08 07 48 00 00 13 01 ff 00 02 06 16 16 00 00 00 01 40 0c 00 00 00 00 00 00 00 40 00 00 08 07 60 02 1c 7f 07 00 00 00 00 00 00 00 00 18 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 4d c7 00 00 00 71 01 22 01 9e 01 17 01 a2 02 19 01 6e 01 8f 01 b6 02 1b 01 90 01 e8 02 72 02 00 02 cd 03 5a 03 9d 03 a4 00 00 00 71 01 22 01 9e 01 17 01 a2 02 19 01 6e 01 8f 01 b6 02 1b 01 90 01 e8 02 72 02 00 02 cd 03 5a 03 9d 03 a4 29 01 00 00 00 00 32 c8 80 00 00 00 00 ff 00 00 00 00 00 ff 00 00 00 00 00 ff 00 00 00 00 00 ff 00 00 00 00 ff 00 00 00 00 ff 00 00 00 00 ff 00 00 00 00 ff 00 00 00 00 ff 29 01 00 00 00 00 13 c9 00 00 00 00 ff 00 00 00 00 00 ff 00 00 00 00 00 ff 00 29 01 00 00 00 00 09 cb 00 f0 00 00 01 00 ff 00 29 01 00 00 00 00 02 cd 00 29 01 00 00 00 00 44 ce 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 08 cf 8b 00 80 46 61 00 8b 29 01 00 00 00 00 11 d0 f1 32 03 94 c7 04 b1 32 03 00 a4 c7 0a f2 55 05 29 01 00 00 00 00 27 d1 cb cb 33 33 07 03 3b 77 37 77 37 35 33 33 f7 33 03 03 03 36 36 66 6d 0d 0a 30 13 0a 0b 00 c4 c4 28 28 28 28 00 00 29 01 00 00 00 00 02 d2 00 29 01 00 00 00 00 04 d4 00 00 00 29 01 00 00 00 00 06 e5 03 00 00 00 00 29 01 00 00 00 00 07 d5 02 bf 02 36 02 00 29 01 00 00 00 00 02 d6 00 29 01 00 00 00 00 79 d7 01 32 01 38 c0 12 12 7a 00 08 0a 00 07 50 00 0c 0c 0c 0c 10 00 02 0c 0e 02 05 04 07 02 00 02 05 03 00 00 00 04 07 05 06 06 05 05 08 0a 0c 0a 0a 0a 0c 0a 06 08 07 09 08 0a 09 0b 00 00 00 00 00 00 00 0a 0a 0a 08 08 0a 0a 0a 3c 3c 3c 0a 08 08 08 08 04 04 08 08 08 04 04 08 08 08 08 00 00 00 02 02 05 04 07 02 00 02 05 03 04 07 05 00 00 00 00 00 02 02 02 02 00 00 29 01 00 00 00 00 0f d8 ba 98 76 54 32 10 ba 98 76 54 32 10 00 00 29 01 00 00 00 00 0f d9 ba 98 76 54 32 10 ba 98 76 54 32 10 00 00 39 01 00 00 00 00 02 da 02 39 01 00 00 00 00 02 db 00 39 01 00 00 00 00 02 dc 00 29 01 00 00 00 00 05 dd 32 06 18 52 29 01 00 00 00 00 19 de 00 00 0f ff 10 20 20 10 b4 b4 03 e4 ff ff ff 7f 20 10 08 01 00 00 00 00 29 01 00 00 00 00 02 df 00 29 01 00 00 00 00 09 e0 40 00 4d 8b 4d 8b 4d 8b 29 01 00 00 00 00 09 e1 40 00 4d 8b 4d 8b 4d 8b 29 01 00 00 00 00 0d e2 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 02 e3 ff 29 01 00 00 00 00 81 e6 11 00 00 89 30 80 07 80 07 20 00 08 01 c8 01 c8 02 00 01 e4 00 20 00 ac 00 06 00 0c 0d b7 0f 0e 18 00 10 f0 03 0c 20 00 06 0b 0b 33 0e 1c 2a 38 46 54 62 69 70 77 79 7b 7d 7e 01 02 01 00 09 40 09 be 19 fc 19 fa 19 f8 1a 38 1a 78 1a b6 2a f6 2b 34 2b 74 3b 74 6b f4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0b e7 50 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 03 e8 09 28 29 01 00 00 00 00 0d e9 04 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0a ea 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 49 eb 02 03 00 01 06 07 04 05 0a 0b 08 09 0e 0f 0c 0d 12 13 10 11 16 17 14 15 1a 1b 18 19 1e 1f 1c 1d 22 23 20 21 02 03 00 01 06 07 04 05 0a 0b 08 09 0e 0f 0c 0d 12 13 10 11 16 17 14 15 1a 1b 18 19 1e 1f 1c 1d 22 23 20 21 29 01 00 00 00 00 06 ec 02 a0 00 00 00 29 01 00 00 00 00 14 ed 04 02 ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 7c ee 0c 00 00 0c 00 13 01 00 00 00 00 00 00 0c 00 33 01 00 0d 00 13 01 00 0d 00 33 01 00 0d 00 33 01 00 0c 00 03 00 00 0c 00 13 11 00 0d 00 13 01 00 0c 00 11 01 00 0c 00 11 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30 00 00 00 11 01 00 00 00 00 00 00 00 30 00 00 00 10 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0c 00 13 01 00 02 29 01 00 00 00 00 4a ef 03 21 38 00 17 17 00 00 01 1e 36 00 03 03 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 33 00 00 00 05 02 00 01 00 01 0a 0a 00 00 00 03 11 00 01 00 00 00 01 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 02 71 00 29 01 00 00 00 00 02 72 00 29 01 00 00 00 00 02 73 00 29 01 00 00 00 00 02 74 00 29 01 00 00 00 00 02 75 00 29 01 00 00 00 00 02 76 00 29 01 00 00 00 00 02 77 00 29 01 00 00 00 00 02 78 00 29 01 00 00 00 00 02 79 00 29 01 00 00 00 00 02 7a 00 29 01 00 00 00 00 02 7b 00 29 01 00 00 00 00 02 7c 00 29 01 00 00 00 00 02 7d 00 29 01 00 00 00 00 02 7e 00 29 01 00 00 00 00 12 a1 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff 29 01 00 00 00 00 04 f0 00 00 00 29 01 00 00 00 00 02 f1 00 29 01 00 00 00 00 06 f2 00 00 00 00 00 29 01 00 00 00 00 0c f3 48 08 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 1a f4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40 00 4d 8b 4d 8b 4d 8b 29 01 00 00 00 00 02 f5 00 29 01 00 00 00 00 1f fa 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0b fb 00 00 00 00 00 ff ff ff ff ff 29 01 00 00 00 00 24 fc 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 08 fd 00 00 00 00 00 00 00 29 01 00 00 00 00 0b fe 00 00 00 60 00 00 01 08 00 00 39 01 00 00 00 00 02 03 01 05 01 00 00 78 00 01 11 05 01 00 00 78 00 01 29];
  2474. qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00 05 01 00 00 78 00 02 10 00];
  2475. qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
  2476. qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
  2477. qcom,mdss-dsi-jdi-brightness-commands = <0x29010000 0x11b9 0x1386022b 0x00 0x5dc00c8 0x00>;
  2478. qcom,compression-mode = "dsc";
  2479. qcom,mdss-dsc-slice-height = <0x08>;
  2480. qcom,mdss-dsc-slice-width = <0x1c8>;
  2481. qcom,mdss-dsc-slice-per-pkt = <0x02>;
  2482. qcom,mdss-dsc-bit-per-component = <0x08>;
  2483. qcom,mdss-dsc-bit-per-pixel = <0x08>;
  2484. qcom,mdss-dsc-block-prediction-enable;
  2485. qcom,mdss-dsi-pre-post-panel-on-delay = <0x64>;
  2486. qcom,mdss-dsi-post-panel-on-command = [15 01 00 00 00 00 02 35 00];
  2487. qcom,mdss-dsi-panel-phy-timings = [00 24 0a 0a 23 1a 0a 13 05 02 04 00 1e 1a];
  2488. qcom,display-topology = <0x04 0x04 0x02>;
  2489. qcom,default-topology-index = <0x00>;
  2490. };
  2491. };
  2492. };
  2493. };
  2494. };
  2495.  
  2496. fragment@23 {
  2497. target = <0xffffffff>;
  2498.  
  2499. __overlay__ {
  2500.  
  2501. qcom,mdss_dsi_dual_boe_lcd_video {
  2502. qcom,mdss-dsi-panel-name = "BOE dual lcd video mode dsi panel";
  2503. qcom,mdss-dsi-panel-type = "dsi_video_mode";
  2504. qcom,dsi-ctrl-num = <0x00 0x01>;
  2505. qcom,dsi-phy-num = <0x00 0x01>;
  2506. qcom,mdss-dsi-virtual-channel-id = <0x00>;
  2507. qcom,mdss-dsi-stream = <0x00>;
  2508. qcom,mdss-dsi-bpp = <0x18>;
  2509. qcom,mdss-dsi-border-color = <0x00>;
  2510. qcom,mdss-dsi-traffic-mode = "burst_mode";
  2511. qcom,mdss-dsi-bllp-eof-power-mode;
  2512. qcom,mdss-dsi-bllp-power-mode;
  2513. qcom,mdss-dsi-lane-0-state;
  2514. qcom,mdss-dsi-lane-1-state;
  2515. qcom,mdss-dsi-lane-2-state;
  2516. qcom,mdss-dsi-dma-trigger = "trigger_sw";
  2517. qcom,mdss-dsi-mdp-trigger = "none";
  2518. qcom,mdss-dsi-reset-sequence = <0x01 0x14 0x00 0x14 0x01 0x14>;
  2519. qcom,adjust-timer-wakeup-ms = <0x01>;
  2520. qcom,mdss-dsi-lp11-init;
  2521. qcom,mdss-dsi-tx-eot-append;
  2522. qcom,cmd-sync-wait-broadcast;
  2523. qcom,panel-cphy-mode;
  2524. qcom,panel-supply-entries = <0x30>;
  2525. qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_jdi";
  2526. qcom,mdss-dsi-bl-min-level = <0x320>;
  2527. qcom,mdss-dsi-bl-max-level = <0x4b0>;
  2528. qcom,platform-en-gpio = <0xffffffff 0x87 0x00>;
  2529. qcom,platform-reset-gpio = <0xffffffff 0x06 0x00>;
  2530. qcom,panel-sec-reset-gpio = <0xffffffff 0x07 0x00>;
  2531. qcom,mdss-dsi-reset-off-delay = <0x1e>;
  2532. qcom,mdss-dsi-sec-reset-off-delay = <0x1e>;
  2533. qcom,dsi-select-clocks = "mux_byte_clk0\0mux_pixel_clk0\0cphy_byte_clk0\0cphy_pixel_clk0";
  2534. phandle = <0x3a>;
  2535.  
  2536. qcom,mdss-dsi-display-timings {
  2537.  
  2538. timing@0 {
  2539. qcom,mdss-dsi-panel-width = <0x4b0>;
  2540. qcom,mdss-dsi-panel-height = <0x500>;
  2541. qcom,mdss-dsi-panel-framerate = <0x48>;
  2542. qcom,mdss-dsi-h-front-porch = <0x1e>;
  2543. qcom,mdss-dsi-h-back-porch = <0x14>;
  2544. qcom,mdss-dsi-h-pulse-width = <0x01>;
  2545. qcom,mdss-dsi-h-sync-skew = <0x00>;
  2546. qcom,mdss-dsi-v-front-porch = <0x2e2>;
  2547. qcom,mdss-dsi-v-back-porch = <0x0e>;
  2548. qcom,mdss-dsi-v-pulse-width = <0x01>;
  2549. qcom,mdss-dsi-bpp = <0x18>;
  2550. qcom,mdss-dsi-h-sync-pulse = <0x01>;
  2551. qcom,mdss-dsi-on-command = [29 01 00 00 00 00 02 b0 04 29 01 00 00 00 00 02 b1 00 29 01 00 00 00 00 08 b2 00 00 00 00 00 01 00 29 01 00 00 00 00 02 b3 00 29 01 00 00 00 00 04 b4 00 00 0a 29 01 00 00 00 00 17 b5 00 00 00 00 00 00 00 03 02 26 66 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0a b6 20 6b 80 06 33 96 00 1a 7a 29 01 00 00 00 00 05 b7 54 00 00 00 29 01 00 00 00 00 94 b8 18 58 22 00 01 29 01 18 20 3e ff 8f f0 20 00 5c 1b 07 3a 38 f8 08 20 00 40 00 1b 1b 0a 0a 1b 1b 0a 2c 0a 00 28 18 08 30 08 00 20 20 00 11 21 31 41 51 61 71 81 91 a1 b1 c1 d1 e1 f1 ff 00 00 00 00 03 00 0b 2e 16 25 2e 81 5e 75 94 a5 d6 ce fa d8 ff ed d0 18 57 ff 02 00 10 20 30 40 50 60 70 80 90 a0 b0 c0 d0 e0 f0 ff 00 00 00 00 03 71 4c 92 71 4c 92 11 41 44 11 41 44 88 28 22 dd 7d 77 88 78 77 22 d2 dd 06 00 01 05 01 00 00 03 10 00 00 00 00 29 01 00 00 00 00 06 ba 08 07 80 07 00 29 01 00 00 00 00 13 bb 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0c bc 20 00 00 00 00 00 00 00 00 ff ff 29 01 00 00 00 00 03 bd 00 00 29 01 00 00 00 00 24 be 00 00 00 00 00 00 69 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 01 01 01 01 01 01 01 01 00 00 29 01 00 00 00 00 4d bf 02 3c 34 55 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 12 c0 40 40 14 00 07 80 00 08 00 00 08 41 00 00 14 00 08 29 01 00 00 00 00 19 c1 30 00 00 10 11 00 00 00 22 00 00 05 20 fa 00 08 00 00 00 00 00 00 00 00 29 01 00 00 00 00 6d c2 01 3b 81 01 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 3b 02 02 01 01 c1 00 05 00 01 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 3b 02 02 01 01 00 07 95 07 98 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 55 c3 00 00 01 00 10 00 0a 00 00 00 80 00 00 00 01 00 01 00 02 00 00 00 80 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 7b c4 00 00 00 a3 a3 a3 8e a1 a2 8d 9f 93 92 9c 9a 9b 9a 9b 00 00 00 00 00 00 00 00 9b 9a 9b 9a 9c 92 93 9f 8d a2 a1 8e a3 a3 a3 00 00 00 ff ff ff ff ff 0f df ff ff ff bf 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50 00 00 00 00 00 00 00 29 01 00 00 00 00 06 c5 08 00 00 00 00 29 01 00 00 00 00 38 c6 0b 08 07 48 00 00 13 01 ff 00 02 06 16 16 00 00 00 01 40 0c 00 00 00 00 00 00 00 40 00 00 b0 04 b0 04 38 7f 07 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 4d c7 00 00 00 ca 01 8f 02 0e 01 85 02 0f 02 81 01 d4 01 f3 02 15 02 74 01 da 02 2a 02 a3 02 28 02 d4 03 69 03 af 03 ff 00 00 00 ca 01 8f 02 0e 01 85 02 0f 02 81 01 d4 01 f3 02 15 02 74 01 da 02 2a 02 a3 02 28 02 d4 03 69 03 af 03 ff 29 01 00 00 00 00 32 c8 81 00 03 03 01 ff 00 00 01 fe 02 8d 00 00 ff fe 04 b9 00 00 03 03 01 ff 00 01 fe 02 8d 00 ff fe 04 b9 00 03 03 01 ff 00 01 fe 02 8d 00 ff fe 04 b9 29 01 00 00 00 00 13 c9 00 03 03 01 ff 00 00 01 fe 02 8d 00 00 ff fe 04 b9 00 29 01 00 00 00 00 09 cb 00 f0 00 00 01 00 ff 00 29 01 00 00 00 00 02 cd 11 29 01 00 00 00 00 44 ce 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 08 cf 00 00 80 46 61 00 00 29 01 00 00 00 00 11 d0 f1 32 03 94 c7 04 b1 32 03 00 a4 c7 0a f2 55 05 29 01 00 00 00 00 27 d1 ef ef 33 33 07 03 3b 77 37 77 37 35 33 33 f7 33 03 03 03 36 36 66 6d 0d 0a 30 13 0a 0b 00 c4 c4 28 28 28 28 00 00 29 01 00 00 00 00 02 d2 00 29 01 00 00 00 00 04 d4 00 00 00 29 01 00 00 00 00 06 e5 03 00 02 00 00 29 01 00 00 00 00 07 d5 02 a7 02 36 02 00 29 01 00 00 00 00 02 d6 00 29 01 00 00 00 00 79 d7 01 32 01 38 c0 12 12 7a 00 08 0a 00 07 50 00 0c 0c 0c 0c 10 00 02 0c 0e 02 05 04 07 02 00 02 05 03 00 00 00 04 07 05 06 06 05 05 08 0a 0c 0a 0a 0a 0c 0a 06 08 07 09 08 0a 09 0b 00 00 00 00 00 00 00 0a 0a 0a 08 08 0a 0a 0a 3c 3c 3c 0a 08 08 08 08 04 04 08 08 08 04 04 08 08 08 08 00 00 00 02 02 05 04 07 02 00 02 05 03 04 07 05 00 00 00 00 00 02 02 02 02 00 00 29 01 00 00 00 00 0f d8 ba 98 76 54 32 10 ba 98 76 54 32 10 00 00 29 01 00 00 00 00 0f d9 ba 98 76 54 32 10 ba 98 76 54 32 10 00 00 29 01 00 00 00 00 02 da 00 29 01 00 00 00 00 02 db 00 29 01 00 00 00 00 02 dc 00 29 01 00 00 00 00 05 dd 32 06 18 52 29 01 00 00 00 00 19 de 00 00 0f ff 10 20 20 10 b4 b4 03 e4 ff ff ff 7f 20 10 08 01 00 00 00 00 29 01 00 00 00 00 02 df 00 29 01 00 00 00 00 09 e0 40 00 4d 8b 4d 8b 4d 8b 29 01 00 00 00 00 09 e1 40 00 4d 8b 4d 8b 4d 8b 29 01 00 00 00 00 0d e2 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 02 e3 ff 29 01 00 00 00 00 bd e6 12 00 00 89 10 80 07 80 07 20 00 10 01 c8 01 c8 02 00 01 e4 00 20 01 63 00 06 00 0c 06 67 07 87 18 00 10 f0 03 0c 20 00 06 0b 0b 33 0e 1c 2a 38 46 54 62 69 70 77 79 7b 7d 7e 01 02 01 00 09 40 09 be 19 fc 19 fa 19 f8 1a 38 1a 78 1a b6 2a b6 2a f4 2a f4 4b 34 63 74 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 10 0c 07 10 20 00 06 0f 0f 33 0e 1c 2a 38 46 54 62 69 70 77 79 7b 7d 7e 01 c2 22 00 2a 40 2a be 3a fc 3a fa 3a f8 3b 38 3b 78 3b 76 4b b6 4b b6 4b f4 63 f4 7c 00 00 00 00 00 00 29 01 00 00 00 00 0b e7 50 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 03 e8 09 28 29 01 00 00 00 00 0d e9 04 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0a ea 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 49 eb 02 03 00 01 06 07 04 05 0a 0b 08 09 0e 0f 0c 0d 12 13 10 11 16 17 14 15 1a 1b 18 19 1e 1f 1c 1d 22 23 20 21 02 03 00 01 06 07 04 05 0a 0b 08 09 0e 0f 0c 0d 12 13 10 11 16 17 14 15 1a 1b 18 19 1e 1f 1c 1d 22 23 20 21 29 01 00 00 00 00 06 ec 03 00 00 00 00 29 01 00 00 00 00 14 ed 04 02 ff 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 7c ee 0c 00 00 0c 00 13 01 00 00 00 00 00 00 0c 00 33 01 00 0d 00 13 01 00 0d 00 33 01 00 0d 00 33 01 00 0c 00 03 00 00 0c 00 13 11 00 0d 00 13 01 00 0c 00 11 01 00 0c 00 11 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30 00 00 00 11 01 00 00 00 00 00 00 00 30 00 00 00 10 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0c 00 13 01 00 02 29 01 00 00 00 00 4a ef 03 21 38 00 17 17 00 00 01 1e 36 00 03 03 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 33 00 00 00 00 02 00 01 00 01 0a 0a 00 00 00 03 11 00 01 00 00 00 01 00 00 00 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 02 70 00 29 01 00 00 00 00 02 71 00 29 01 00 00 00 00 02 72 00 29 01 00 00 00 00 02 73 00 29 01 00 00 00 00 02 74 00 29 01 00 00 00 00 02 75 00 29 01 00 00 00 00 02 76 00 29 01 00 00 00 00 02 77 00 29 01 00 00 00 00 02 78 00 29 01 00 00 00 00 02 79 00 29 01 00 00 00 00 02 7a 00 29 01 00 00 00 00 02 7b 00 29 01 00 00 00 00 02 7c 00 29 01 00 00 00 00 02 7d 00 29 01 00 00 00 00 02 7e 00 29 01 00 00 00 00 12 a1 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff 29 01 00 00 00 00 04 f0 00 00 00 29 01 00 00 00 00 02 f1 00 29 01 00 00 00 00 06 f2 00 00 00 00 00 29 01 00 00 00 00 0c f3 48 08 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 1a f4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40 00 4d 8b 4d 8b 4d 8b 29 01 00 00 00 00 02 f5 00 29 01 00 00 00 00 1f fa 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 0b fb 00 00 00 00 00 ff ff ff ff ff 29 01 00 00 00 00 24 fc 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 08 fd 00 00 00 00 00 00 00 29 01 00 00 0a 00 0b fe 00 00 00 60 00 00 01 08 00 00 05 01 00 00 78 00 01 11 05 01 00 00 78 00 01 29];
  2552. qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00 05 01 00 00 78 00 02 10 00];
  2553. qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
  2554. qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
  2555. qcom,mdss-dsi-jdi-brightness-commands = <0x29010000 0x11b9 0x17bf02ad 0x00 0x5dc00c8 0x00>;
  2556. qcom,mdss-dsi-pre-post-panel-on-delay = <0x64>;
  2557. qcom,mdss-dsi-post-panel-on-command = [15 01 00 00 00 00 02 35 00];
  2558. qcom,mdss-dsi-panel-phy-timings = [00 24 0a 0a 22 1a 08 13 04 02 04 00 1e 1a];
  2559. qcom,display-topology = <0x02 0x00 0x02>;
  2560. qcom,default-topology-index = <0x00>;
  2561. };
  2562. };
  2563. };
  2564. };
  2565. };
  2566.  
  2567. fragment@24 {
  2568. target = <0xffffffff>;
  2569.  
  2570. __overlay__ {
  2571.  
  2572. qcom,mdss_dsi_dual_boe_spi_blu_dsc_video {
  2573. qcom,mdss-dsi-panel-name = "BOE with spi blu dual video mode dsi panel with dsc";
  2574. qcom,mdss-dsi-panel-type = "dsi_video_mode";
  2575. qcom,dsi-ctrl-num = <0x00 0x01>;
  2576. qcom,dsi-phy-num = <0x00 0x01>;
  2577. qcom,mdss-dsi-bpp = <0x18>;
  2578. com,mdss-dsi-virtual-channel-id = <0x00>;
  2579. qcom,mdss-dsi-stream = <0x00>;
  2580. qcom,mdss-dsi-border-color = <0x00>;
  2581. qcom,mdss-dsi-traffic-mode = "burst_mode";
  2582. qcom,mdss-dsi-bllp-eof-power-mode;
  2583. qcom,mdss-dsi-bllp-power-mode;
  2584. qcom,mdss-dsi-lane-0-state;
  2585. qcom,mdss-dsi-lane-1-state;
  2586. qcom,mdss-dsi-lane-2-state;
  2587. qcom,mdss-dsi-dma-trigger = "trigger_sw";
  2588. qcom,mdss-dsi-mdp-trigger = "none";
  2589. qcom,mdss-dsi-reset-sequence = <0x01 0x14 0x00 0x14 0x01 0x14>;
  2590. qcom,adjust-timer-wakeup-ms = <0x01>;
  2591. qcom,mdss-dsi-lp11-init;
  2592. qcom,mdss-dsi-tx-eot-append;
  2593. qcom,cmd-sync-wait-broadcast;
  2594. qcom,panel-cphy-mode;
  2595. qcom,dsi-supported-dfps-list = <0x5a 0x59 0x58 0x57 0x56 0x55 0x54 0x53 0x52 0x51 0x50 0x4f 0x4e 0x4d 0x4c 0x4b 0x4a 0x49 0x48 0x47 0x46 0x45 0x44 0x43 0x42 0x41 0x40 0x3f 0x3e 0x3d 0x3c>;
  2596. qcom,mdss-dsi-pan-enable-dynamic-fps;
  2597. qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
  2598. qcom,mdss-dsi-min-refresh-rate = <0x3c>;
  2599. qcom,mdss-dsi-max-refresh-rate = <0x5a>;
  2600. qcom,panel-supply-entries = <0x30>;
  2601. qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_local_dimming";
  2602. qcom,mdss-dsi-bl-min-level = <0x00>;
  2603. qcom,mdss-dsi-bl-max-level = <0xff>;
  2604. qcom,mdss-brightness-max-level = <0xff>;
  2605. qcom,platform-en-gpio = <0xffffffff 0x87 0x00>;
  2606. qcom,platform-reset-gpio = <0xffffffff 0x06 0x00>;
  2607. qcom,panel-sec-reset-gpio = <0xffffffff 0x07 0x00>;
  2608. qcom,mdss-dsi-reset-off-delay = <0x1e>;
  2609. qcom,mdss-dsi-sec-reset-off-delay = <0x1e>;
  2610. qcom,dsi-select-clocks = "mux_byte_clk0\0mux_pixel_clk0\0cphy_byte_clk0\0cphy_pixel_clk0";
  2611. phandle = <0x3c>;
  2612.  
  2613. qcom,mdss-dsi-display-timings {
  2614.  
  2615. timing@0 {
  2616. qcom,mdss-dsi-panel-width = <0x720>;
  2617. qcom,mdss-dsi-panel-height = <0x780>;
  2618. qcom,mdss-dsi-h-front-porch = <0x20>;
  2619. qcom,mdss-dsi-h-back-porch = <0x1a>;
  2620. qcom,mdss-dsi-h-pulse-width = <0x02>;
  2621. qcom,mdss-dsi-h-sync-skew = <0x00>;
  2622. qcom,mdss-dsi-v-front-porch = <0x818>;
  2623. qcom,mdss-dsi-v-back-porch = <0x0e>;
  2624. qcom,mdss-dsi-v-pulse-width = <0x01>;
  2625. qcom,mdss-dsi-h-sync-pulse = <0x00>;
  2626. qcom,mdss-dsi-panel-framerate = <0x5a>;
  2627. qcom,mdss-dsi-panel-padding = <0x18>;
  2628. qcom,mdss-dsi-bpp = <0x18>;
  2629. qcom,mdss-dsi-on-command = <0x29010000 0x2b0 0x4290100 0x02 0xb1002901 0x00 0x41b90b9a 0x640000 0x5dc 0xc80000 0x5dc 0xc80000 0x5dc 0xc80000 0x5dc 0xc80000 0x5dc 0xc80000 0x5dc 0xc80000 0x5dc 0xc80000 0x2901 0x00 0x2d60029 0x1000000 0x6ec02 0x4e000000 0x29010000 0x81e6 0x11000089 0x30800780 0x7200008 0x1c801c8 0x20001e4 0x2000ac 0x6000c 0xdb70f0e 0x180010f0 0x30c2000 0x60b0b33 0xe1c2a38 0x46546269 0x7077797b 0x7d7e0102 0x1000940 0x9be19fc 0x19fa19f8 0x1a381a78 0x1ab62af6 0x2b342b74 0x3b746bf4 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x5010000 0x78000111 0x5010000 0x78000129>;
  2630. qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00 05 01 00 00 78 00 02 10 00];
  2631. qcom,mdss-dsi-local-dimming-pwm-commands = <0x29010000 0x3b9 0xe8b2901 0x00 0x3b90fa0 0x29010000 0x3b9 0x10bc2901 0x00 0x3b912e2>;
  2632. qcom,mdss-dsi-local-dimming-fifo-commands = <0x29010000 0x3ec 0x45d2901 0x00 0x3ec04e9 0x29010000 0x3ec 0x5752901 0x00 0x3ec068c>;
  2633. qcom,mdss-dsi-local-dimming-blu-timing = <0x114e 0x14eb 0x1243 0x1654 0x1339 0x17bd 0x1647 0x1bb2>;
  2634. qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
  2635. qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
  2636. qcom,compression-mode = "dsc";
  2637. qcom,mdss-dsc-slice-height = <0x08>;
  2638. qcom,mdss-dsc-slice-width = <0x1c8>;
  2639. qcom,mdss-dsc-slice-per-pkt = <0x02>;
  2640. qcom,mdss-dsc-bit-per-component = <0x08>;
  2641. qcom,mdss-dsc-bit-per-pixel = <0x08>;
  2642. qcom,mdss-dsc-block-prediction-enable;
  2643. qcom,mdss-dsi-pre-post-panel-on-delay = <0x64>;
  2644. qcom,mdss-dsi-post-panel-on-command = [15 01 00 00 00 00 02 35 00];
  2645. qcom,mdss-dsi-panel-phy-timings = [00 24 0a 0a 25 1a 0b 13 06 02 04 00 1e 1a];
  2646. qcom,display-topology = <0x04 0x04 0x02>;
  2647. qcom,default-topology-index = <0x00>;
  2648. };
  2649. };
  2650. };
  2651. };
  2652. };
  2653.  
  2654. fragment@25 {
  2655. target = <0xffffffff>;
  2656.  
  2657. __overlay__ {
  2658. qcom,init-voltage = <0x325aa0>;
  2659. };
  2660. };
  2661.  
  2662. fragment@26 {
  2663. target = <0xffffffff>;
  2664.  
  2665. __overlay__ {
  2666. regulator-max-microvolt = <0x1cfde0>;
  2667. qcom,init-mode = <0x04>;
  2668. qcom,init-voltage = <0x1cfde0>;
  2669. };
  2670. };
  2671.  
  2672. fragment@27 {
  2673. target = <0xffffffff>;
  2674.  
  2675. __overlay__ {
  2676. clock-rate = <0x00 0x00 0x00 0x00 0x1b6b0b00 0x124f800 0x1b6b0b00 0x124f800>;
  2677. connectors = <0x24 0x25 0x26 0xffffffff>;
  2678. qcom,sde-has-dest-scaler;
  2679. qcom,sde-wb-rtprio = <0x63>;
  2680. qcom,sde-wb-cpumask = "80";
  2681. qcom,sde-lineptr-scanline-advance = <0x567>;
  2682. qcom,sde-wb-mild-tear-threshold = <0x2bc>;
  2683. qcom,sde-wb-severe-tear-threshold = <0x1f4>;
  2684. qcom,sde-wb-passes = <0x01>;
  2685. };
  2686. };
  2687.  
  2688. fragment@28 {
  2689. target = <0xffffffff>;
  2690.  
  2691. __overlay__ {
  2692. qcom,uart-mux-en-gpio = <0xffffffff 0x21 0x01>;
  2693. };
  2694. };
  2695.  
  2696. fragment@29 {
  2697. target = <0xffffffff>;
  2698.  
  2699. __overlay__ {
  2700.  
  2701. qcom,mdss_dsi_dual_nt57950_uoled_dsc_video {
  2702. qcom,mdss-dsi-panel-name = "NT57950 UOLED dual video mode dsi panel with dsc";
  2703. qcom,mdss-dsi-panel-type = "dsi_video_mode";
  2704. qcom,dsi-ctrl-num = <0x00 0x01>;
  2705. qcom,dsi-phy-num = <0x00 0x01>;
  2706. qcom,mdss-dsi-bpp = <0x18>;
  2707. com,mdss-dsi-virtual-channel-id = <0x00>;
  2708. qcom,mdss-dsi-stream = <0x00>;
  2709. qcom,mdss-dsi-border-color = <0x00>;
  2710. qcom,mdss-dsi-traffic-mode = "burst_mode";
  2711. qcom,mdss-dsi-bllp-eof-power-mode;
  2712. qcom,mdss-dsi-bllp-power-mode;
  2713. qcom,mdss-dsi-lane-0-state;
  2714. qcom,mdss-dsi-lane-1-state;
  2715. qcom,mdss-dsi-lane-2-state;
  2716. qcom,mdss-dsi-dma-trigger = "trigger_sw";
  2717. qcom,mdss-dsi-mdp-trigger = "none";
  2718. qcom,mdss-dsi-reset-sequence = <0x01 0x14 0x00 0x14 0x01 0x14>;
  2719. qcom,adjust-timer-wakeup-ms = <0x01>;
  2720. qcom,mdss-dsi-lp11-init;
  2721. qcom,mdss-dsi-tx-eot-append;
  2722. qcom,cmd-sync-wait-broadcast;
  2723. qcom,panel-cphy-mode;
  2724. qcom,panel-supply-entries = <0x30>;
  2725. qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
  2726. qcom,mdss-dsi-bl-min-level = <0x00>;
  2727. qcom,mdss-dsi-bl-max-level = <0xff>;
  2728. qcom,mdss-brightness-max-level = <0xff>;
  2729. qcom,platform-en-gpio = <0xffffffff 0x87 0x00>;
  2730. qcom,platform-reset-gpio = <0xffffffff 0x06 0x00>;
  2731. qcom,panel-sec-reset-gpio = <0xffffffff 0x07 0x00>;
  2732. qcom,mdss-dsi-reset-off-delay = <0x1e>;
  2733. qcom,mdss-dsi-sec-reset-off-delay = <0x1e>;
  2734. qcom,dsi-select-clocks = "mux_byte_clk0\0mux_pixel_clk0\0cphy_byte_clk0\0cphy_pixel_clk0";
  2735. phandle = <0x21>;
  2736.  
  2737. qcom,mdss-dsi-display-timings {
  2738.  
  2739. timing@0 {
  2740. qcom,mdss-dsi-panel-width = <0xad0>;
  2741. qcom,mdss-dsi-panel-height = <0xbb8>;
  2742. qcom,mdss-dsi-h-front-porch = <0x27>;
  2743. qcom,mdss-dsi-h-back-porch = <0x14>;
  2744. qcom,mdss-dsi-h-pulse-width = <0x02>;
  2745. qcom,mdss-dsi-h-sync-skew = <0x00>;
  2746. qcom,mdss-dsi-v-front-porch = <0x30>;
  2747. qcom,mdss-dsi-v-back-porch = <0x08>;
  2748. qcom,mdss-dsi-v-pulse-width = <0x01>;
  2749. qcom,mdss-dsi-h-sync-pulse = <0x00>;
  2750. qcom,mdss-dsi-panel-framerate = <0x5a>;
  2751. qcom,mdss-dsi-bpp = <0x18>;
  2752. qcom,mdss-dsi-on-command = [29 01 00 00 00 00 02 ff 20 29 01 00 00 00 00 02 fb 01 29 01 00 00 00 00 02 7a 80 29 01 00 00 00 00 02 ff 27 29 01 00 00 00 00 02 fb 01 29 01 00 00 00 00 02 18 29 29 01 00 00 00 00 02 19 57 29 01 00 00 00 00 02 1a 37 29 01 00 00 00 00 02 ff 10 29 01 00 00 00 00 02 ff 24 29 01 00 00 00 00 02 fb 01 29 01 00 00 00 00 02 09 25 29 01 00 00 00 00 02 1d 25 29 01 00 00 00 00 02 4d 36 29 01 00 00 00 00 02 4f 46 29 01 00 00 00 00 02 6f 04 29 01 00 00 00 00 02 70 80 29 01 00 00 00 00 02 71 8e 29 01 00 00 00 00 02 72 26 29 01 00 00 00 00 02 73 07 29 01 00 00 00 00 02 81 20 29 01 00 00 00 00 02 92 3b 29 01 00 00 00 00 02 93 30 29 01 00 00 00 00 02 94 08 29 01 00 00 00 00 02 95 40 29 01 00 00 00 00 02 96 f0 29 01 00 00 00 00 02 97 0b 29 01 00 00 00 00 02 d0 02 29 01 00 00 00 00 02 dc 40 29 01 00 00 00 00 02 e0 8e 29 01 00 00 00 00 02 e1 8b 29 01 00 00 00 00 02 e2 26 29 01 00 00 00 00 02 e3 7e 29 01 00 00 00 00 02 e5 28 29 01 00 00 00 00 02 e6 3b 29 01 00 00 00 00 02 ef 75 29 01 00 00 00 00 02 ff 10 29 01 00 00 00 00 02 ff 2a 29 01 00 00 00 00 02 fb 01 29 01 00 00 00 00 0b b3 01 32 01 32 01 32 01 32 01 32 29 01 00 00 00 00 0d b4 01 32 01 32 01 32 01 32 01 32 01 32 29 01 00 00 00 00 02 ff 10 29 01 00 00 00 00 02 ff 20 29 01 00 00 00 00 02 fb 01 29 01 00 00 00 00 02 8a 26 29 01 00 00 00 00 02 ff 10 29 01 00 00 00 00 02 ff 25 29 01 00 00 00 00 02 fb 01 29 01 00 00 00 00 02 32 41 29 01 00 00 00 00 02 ff 10 29 01 00 00 00 00 02 fb 01 29 01 00 00 00 00 02 e5 00 29 01 00 00 00 00 02 36 00 29 01 00 00 ff 00 03 51 0f ff 29 01 00 00 00 00 11 c1 89 28 00 18 c2 00 03 b8 01 9c 00 13 08 bb 03 4a 29 01 00 00 00 00 03 c2 10 f0 05 01 00 00 c8 00 01 11 29 01 00 00 ff 00 01 00 29 01 00 00 ff 00 01 00 29 01 00 00 ff 00 01 00 05 01 00 00 c8 00 01 29];
  2753. qcom,mdss-dsi-off-command = [05 01 00 00 14 00 02 28 00 05 01 00 00 78 00 02 10 00];
  2754. qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
  2755. qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
  2756. qcom,mdss-dsc-encoders = <0x02>;
  2757. qcom,compression-mode = "dsc";
  2758. qcom,mdss-dsc-version = <0x11>;
  2759. qcom,mdss-dsc-scr-version = <0x01>;
  2760. qcom,mdss-dsc-slice-height = <0x18>;
  2761. qcom,mdss-dsc-slice-width = <0x568>;
  2762. qcom,mdss-dsc-slice-per-pkt = <0x01>;
  2763. qcom,mdss-dsc-bit-per-component = <0x08>;
  2764. qcom,mdss-dsc-bit-per-pixel = <0x08>;
  2765. qcom,mdss-dsc-block-prediction-enable;
  2766. qcom,mdss-dsi-pre-post-panel-on-delay = <0x64>;
  2767. qcom,mdss-dsi-post-panel-on-command = [15 01 00 00 00 00 02 35 00];
  2768. qcom,mdss-dsi-panel-phy-timings = [00 24 0a 0a 26 1a 0d 13 06 02 04 00 1e 1a];
  2769. qcom,display-topology = <0x04 0x04 0x02>;
  2770. qcom,default-topology-index = <0x00>;
  2771. };
  2772. };
  2773. };
  2774. };
  2775. };
  2776.  
  2777. fragment@30 {
  2778. target = <0xffffffff>;
  2779.  
  2780. __overlay__ {
  2781. qcom,init-mode = <0x04>;
  2782. qcom,init-voltage = <0x325aa0>;
  2783. };
  2784. };
  2785.  
  2786. fragment@31 {
  2787. target = <0xffffffff>;
  2788.  
  2789. __overlay__ {
  2790. qcom,init-mode = <0x04>;
  2791. qcom,init-voltage = <0x1cfde0>;
  2792. };
  2793. };
  2794.  
  2795. fragment@32 {
  2796. target = <0xffffffff>;
  2797.  
  2798. __overlay__ {
  2799. qcom,init-mode = <0x04>;
  2800. qcom,init-voltage = <0x325aa0>;
  2801. };
  2802. };
  2803.  
  2804. fragment@33 {
  2805. target = <0xffffffff>;
  2806.  
  2807. __overlay__ {
  2808.  
  2809. blu_gpio_regulator@1 {
  2810. compatible = "regulator-fixed";
  2811. regulator-name = "display_panel_blu_en";
  2812. regulator-min-microvolt = <0x1b7740>;
  2813. regulator-max-microvolt = <0x1b7740>;
  2814. regulator-enable-ramp-delay = <0xe9>;
  2815. gpio = <0xffffffff 0x59 0x00>;
  2816. enable-active-high;
  2817. regulator-boot-on;
  2818. pinctrl-names = "default";
  2819. pinctrl-0 = <0x31>;
  2820. phandle = <0x22>;
  2821. };
  2822. };
  2823. };
  2824.  
  2825. fragment@34 {
  2826. target = <0xffffffff>;
  2827.  
  2828. __overlay__ {
  2829.  
  2830. display_panel_blu_en_default {
  2831. phandle = <0x31>;
  2832.  
  2833. mux {
  2834. pins = "gpio89";
  2835. function = "gpio";
  2836. };
  2837.  
  2838. config {
  2839. pins = "gpio89";
  2840. drive-strength = <0x08>;
  2841. bias-disable = <0x00>;
  2842. output-high;
  2843. };
  2844. };
  2845.  
  2846. seacliff_blu_pvdd_en_active {
  2847. phandle = <0x1d>;
  2848.  
  2849. mux {
  2850. pins = "gpio88";
  2851. function = "gpio";
  2852. };
  2853.  
  2854. config {
  2855. pins = "gpio88";
  2856. drive-strength = <0x08>;
  2857. output-high;
  2858. bias-pull-up;
  2859. };
  2860. };
  2861.  
  2862. seacliff_blu_pvdd_en_suspend {
  2863. phandle = <0x1e>;
  2864.  
  2865. mux {
  2866. pins = "gpio88";
  2867. function = "gpio";
  2868. };
  2869.  
  2870. config {
  2871. pins = "gpio88";
  2872. drive-strength = <0x08>;
  2873. output-low;
  2874. bias-pull-down;
  2875. };
  2876. };
  2877. };
  2878. };
  2879.  
  2880. fragment@35 {
  2881. target = <0xffffffff>;
  2882.  
  2883. __overlay__ {
  2884.  
  2885. xo-therm-usr {
  2886. polling-delay-passive = <0x00>;
  2887. polling-delay = <0x00>;
  2888. thermal-governor = "user_space";
  2889. thermal-sensors = <0x32 0x4c>;
  2890.  
  2891. trips {
  2892.  
  2893. active-config0 {
  2894. temperature = <0x1e848>;
  2895. hysteresis = <0x3e8>;
  2896. type = "passive";
  2897. };
  2898. };
  2899. };
  2900.  
  2901. rfpa-usr {
  2902. polling-delay-passive = <0x00>;
  2903. polling-delay = <0x00>;
  2904. thermal-governor = "user_space";
  2905. thermal-sensors = <0x32 0x4e>;
  2906.  
  2907. trips {
  2908.  
  2909. active-config0 {
  2910. temperature = <0x1e848>;
  2911. hysteresis = <0x3e8>;
  2912. type = "passive";
  2913. };
  2914. };
  2915. };
  2916.  
  2917. cam4-usr {
  2918. polling-delay-passive = <0x00>;
  2919. polling-delay = <0x00>;
  2920. thermal-governor = "user_space";
  2921. thermal-sensors = <0x32 0x52>;
  2922.  
  2923. trips {
  2924.  
  2925. active-config0 {
  2926. temperature = <0x1e848>;
  2927. hysteresis = <0x3e8>;
  2928. type = "passive";
  2929. };
  2930. };
  2931. };
  2932.  
  2933. cam0-usr {
  2934. polling-delay-passive = <0x00>;
  2935. polling-delay = <0x00>;
  2936. thermal-governor = "user_space";
  2937. thermal-sensors = <0x33 0x4d>;
  2938.  
  2939. trips {
  2940.  
  2941. active-config0 {
  2942. temperature = <0x1e848>;
  2943. hysteresis = <0x3e8>;
  2944. type = "passive";
  2945. };
  2946. };
  2947. };
  2948.  
  2949. cam1-usr {
  2950. polling-delay-passive = <0x00>;
  2951. polling-delay = <0x00>;
  2952. thermal-governor = "user_space";
  2953. thermal-sensors = <0x33 0x4f>;
  2954.  
  2955. trips {
  2956.  
  2957. active-config0 {
  2958. temperature = <0x1e848>;
  2959. hysteresis = <0x3e8>;
  2960. type = "passive";
  2961. };
  2962. };
  2963. };
  2964.  
  2965. cam2-usr {
  2966. polling-delay-passive = <0x00>;
  2967. polling-delay = <0x00>;
  2968. thermal-governor = "user_space";
  2969. thermal-sensors = <0x33 0x52>;
  2970.  
  2971. trips {
  2972.  
  2973. active-config0 {
  2974. temperature = <0x1e848>;
  2975. hysteresis = <0x3e8>;
  2976. type = "passive";
  2977. };
  2978. };
  2979. };
  2980.  
  2981. smb-usr {
  2982. polling-delay-passive = <0x00>;
  2983. polling-delay = <0x00>;
  2984. thermal-governor = "user_space";
  2985. thermal-sensors = <0x34 0x4e>;
  2986.  
  2987. trips {
  2988.  
  2989. active-config0 {
  2990. temperature = <0x1e848>;
  2991. hysteresis = <0x3e8>;
  2992. type = "passive";
  2993. };
  2994. };
  2995. };
  2996.  
  2997. pcb1-usr {
  2998. polling-delay-passive = <0x00>;
  2999. polling-delay = <0x00>;
  3000. thermal-governor = "user_space";
  3001. thermal-sensors = <0x34 0x50>;
  3002.  
  3003. trips {
  3004.  
  3005. active-config0 {
  3006. temperature = <0x1e848>;
  3007. hysteresis = <0x3e8>;
  3008. type = "passive";
  3009. };
  3010. };
  3011. };
  3012.  
  3013. cam3-usr {
  3014. polling-delay-passive = <0x00>;
  3015. polling-delay = <0x00>;
  3016. thermal-governor = "user_space";
  3017. thermal-sensors = <0x34 0x54>;
  3018.  
  3019. trips {
  3020.  
  3021. active-config0 {
  3022. temperature = <0x1e848>;
  3023. hysteresis = <0x3e8>;
  3024. type = "passive";
  3025. };
  3026. };
  3027. };
  3028. };
  3029. };
  3030.  
  3031. fragment@36 {
  3032. target = <0xffffffff>;
  3033.  
  3034. __overlay__ {
  3035.  
  3036. bcm_bt_en_default {
  3037. phandle = <0x35>;
  3038.  
  3039. mux {
  3040. pins = "gpio21";
  3041. function = "gpio";
  3042. };
  3043.  
  3044. config {
  3045. pins = "gpio21";
  3046. drive-strength = <0x02>;
  3047. bias-pull-down;
  3048. };
  3049. };
  3050.  
  3051. bcm_bt_wake_default {
  3052. phandle = <0x36>;
  3053.  
  3054. mux {
  3055. pins = "gpio30";
  3056. function = "gpio";
  3057. };
  3058.  
  3059. config {
  3060. pins = "gpio30";
  3061. drive-strength = <0x02>;
  3062. bias-pull-down;
  3063. };
  3064. };
  3065.  
  3066. bcm_bt_hostwake_default {
  3067. phandle = <0x37>;
  3068.  
  3069. mux {
  3070. pins = "gpio31";
  3071. function = "gpio";
  3072. };
  3073.  
  3074. config {
  3075. pins = "gpio31";
  3076. drive-strength = <0x02>;
  3077. bias-pull-down;
  3078. };
  3079. };
  3080.  
  3081. bcmdhd_wlan_en {
  3082. phandle = <0x38>;
  3083.  
  3084. mux {
  3085. pins = "gpio20";
  3086. function = "gpio";
  3087. };
  3088.  
  3089. config {
  3090. pins = "gpio20";
  3091. drive-strength = <0x02>;
  3092. bias-pull-down;
  3093. };
  3094. };
  3095.  
  3096. bcmdhd_wlan_hostwake_default {
  3097. phandle = <0x39>;
  3098.  
  3099. mux {
  3100. pins = "gpio124";
  3101. function = "gpio";
  3102. };
  3103.  
  3104. config {
  3105. pins = "gpio124";
  3106. drive-strength = <0x02>;
  3107. bias-pull-down;
  3108. };
  3109. };
  3110. };
  3111. };
  3112.  
  3113. fragment@37 {
  3114. target = <0xffffffff>;
  3115.  
  3116. __overlay__ {
  3117. wake-gpio;
  3118. pinctrl-0 = <0xffffffff 0xffffffff>;
  3119. pinctrl-1 = <0xffffffff 0xffffffff>;
  3120. };
  3121. };
  3122.  
  3123. fragment@38 {
  3124. target = <0xffffffff>;
  3125.  
  3126. __overlay__ {
  3127. status = "disabled";
  3128. };
  3129. };
  3130.  
  3131. fragment@39 {
  3132. target = <0xffffffff>;
  3133.  
  3134. __overlay__ {
  3135.  
  3136. qcom,cnss-qca6390@b0000000 {
  3137. status = "disabled";
  3138. };
  3139. };
  3140. };
  3141.  
  3142. fragment@40 {
  3143. target = <0xffffffff>;
  3144.  
  3145. __overlay__ {
  3146.  
  3147. bt_qca6390 {
  3148. status = "disabled";
  3149. };
  3150.  
  3151. bt_driver {
  3152. compatible = "brcm,btdriver";
  3153. pinctrl-names = "default";
  3154. pinctrl-0 = <0x35>;
  3155. brcm,bt-reset-gpio = <0xffffffff 0x15 0x00>;
  3156. status = "ok";
  3157. };
  3158.  
  3159. bt_bluesleep {
  3160. compatible = "brcm,bluesleep";
  3161. brcm,bt-wake-gpio = <0xffffffff 0x1e 0x00>;
  3162. brcm,bt-host-wake-gpio = <0xffffffff 0x1f 0x00>;
  3163. pinctrl-names = "default";
  3164. pinctrl-0 = <0x36 0x37>;
  3165. status = "ok";
  3166. phandle = <0xaa>;
  3167. };
  3168.  
  3169. bcmdhd_wlan {
  3170. compatible = "android,bcmdhd_wlan";
  3171. wlan-en-gpio = <0xffffffff 0x14 0x00>;
  3172. wlan-host-wake-gpio = <0xffffffff 0x7c 0x00>;
  3173. pinctrl-names = "default";
  3174. pinctrl-0 = <0x38 0x39>;
  3175. status = "ok";
  3176. };
  3177. };
  3178. };
  3179.  
  3180. fragment@41 {
  3181. target = <0xffffffff>;
  3182.  
  3183. __overlay__ {
  3184.  
  3185. fan_tach_default@0 {
  3186. phandle = <0x3f>;
  3187.  
  3188. mux {
  3189. pins = "gpio71";
  3190. function = "gpio";
  3191. };
  3192.  
  3193. config {
  3194. pins = "gpio71";
  3195. drive-strength = <0x04>;
  3196. input-enable;
  3197. };
  3198. };
  3199.  
  3200. fan_tach_default@1 {
  3201. phandle = <0x41>;
  3202.  
  3203. mux {
  3204. pins = "gpio72";
  3205. function = "gpio";
  3206. };
  3207.  
  3208. config {
  3209. pins = "gpio72";
  3210. drive-strength = <0x04>;
  3211. input-enable;
  3212. };
  3213. };
  3214. };
  3215. };
  3216.  
  3217. fragment@42 {
  3218. target = <0xffffffff>;
  3219.  
  3220. __overlay__ {
  3221.  
  3222. qcom,pm8150l@5 {
  3223.  
  3224. pwm-tach-fan@0 {
  3225. reg = <0x00>;
  3226. compatible = "pwm-tach-fan";
  3227. fan,tach-gpio = <0xffffffff 0x47 0x00>;
  3228. interrupt-parent = <0xffffffff>;
  3229. interrupts = <0x0d 0x01>;
  3230. interrupt-names = "fan_irq";
  3231. panel = <0x3a 0x3b 0x3c 0x21>;
  3232. pwms = <0x3d 0x00 0x9c40>;
  3233. pinctrl-names = "default";
  3234. pinctrl-0 = <0x3e 0x3f>;
  3235. status = "okay";
  3236. max-rpm = <0x960>;
  3237. #cooling-cells = <0x02>;
  3238. cooling-levels = <0x00 0x190 0x320 0x4b0 0x640 0x7d0 0x960>;
  3239. phandle = <0x43>;
  3240. };
  3241.  
  3242. pwm-tach-fan@1 {
  3243. reg = <0x01>;
  3244. compatible = "pwm-tach-fan";
  3245. fan,tach-gpio = <0xffffffff 0x48 0x00>;
  3246. interrupt-parent = <0xffffffff>;
  3247. interrupts = <0x0d 0x01>;
  3248. interrupt-names = "fan_irq";
  3249. panel = <0x3a 0x3b 0x3c 0x21>;
  3250. pwms = <0x3d 0x01 0x9c40>;
  3251. pinctrl-names = "default";
  3252. pinctrl-0 = <0x40 0x41>;
  3253. status = "okay";
  3254. max-rpm = <0x960>;
  3255. #cooling-cells = <0x02>;
  3256. cooling-levels = <0x00 0x190 0x320 0x4b0 0x640 0x7d0 0x960>;
  3257. phandle = <0x45>;
  3258. };
  3259. };
  3260. };
  3261. };
  3262.  
  3263. fragment@43 {
  3264. target = <0xffffffff>;
  3265.  
  3266. __overlay__ {
  3267.  
  3268. batt-fan {
  3269. polling-delay-passive = <0x00>;
  3270. polling-delay = <0x00>;
  3271. thermal-sensors = <0x34 0x4a>;
  3272. thermal-governor = "step_wise";
  3273. wake-capable-sensor;
  3274.  
  3275. trips {
  3276.  
  3277. batt_fan_trip0 {
  3278. temperature = <0x190>;
  3279. hysteresis = <0x14>;
  3280. type = "active";
  3281. phandle = <0x42>;
  3282. };
  3283.  
  3284. batt_fan_trip1 {
  3285. temperature = <0x1e0>;
  3286. hysteresis = <0x14>;
  3287. type = "active";
  3288. phandle = <0x44>;
  3289. };
  3290. };
  3291.  
  3292. cooling-maps {
  3293.  
  3294. batt_fan_0_map0 {
  3295. trip = <0x42>;
  3296. cooling-device = <0x43 0x00 0x03>;
  3297. phandle = <0xab>;
  3298. };
  3299.  
  3300. batt_fan_0_map1 {
  3301. trip = <0x44>;
  3302. cooling-device = <0x43 0x03 0x06>;
  3303. phandle = <0xac>;
  3304. };
  3305.  
  3306. batt_fan_1_map0 {
  3307. trip = <0x42>;
  3308. cooling-device = <0x45 0x00 0x03>;
  3309. phandle = <0xad>;
  3310. };
  3311.  
  3312. batt_fan_1_map1 {
  3313. trip = <0x44>;
  3314. cooling-device = <0x45 0x03 0x06>;
  3315. phandle = <0xae>;
  3316. };
  3317. };
  3318. };
  3319.  
  3320. cpu-0-0-fan {
  3321. polling-delay-passive = <0x00>;
  3322. polling-delay = <0x00>;
  3323. thermal-sensors = <0xffffffff 0x01>;
  3324. thermal-governor = "step_wise";
  3325. wake-capable-sensor;
  3326.  
  3327. trips {
  3328.  
  3329. cpu_0_0_fan_trip0 {
  3330. temperature = <0xafc8>;
  3331. hysteresis = <0x3e8>;
  3332. type = "active";
  3333. phandle = <0x46>;
  3334. };
  3335.  
  3336. cpu_0_0_fan_trip1 {
  3337. temperature = <0x14c08>;
  3338. hysteresis = <0x3e8>;
  3339. type = "active";
  3340. phandle = <0x47>;
  3341. };
  3342. };
  3343.  
  3344. cooling-maps {
  3345.  
  3346. cpu_0_0_fan_map0 {
  3347. trip = <0x46>;
  3348. cooling-device = <0x43 0x00 0x03>;
  3349. phandle = <0xaf>;
  3350. };
  3351.  
  3352. cpu_0_0_fan_map1 {
  3353. trip = <0x47>;
  3354. cooling-device = <0x43 0x03 0x06>;
  3355. phandle = <0xb0>;
  3356. };
  3357.  
  3358. cpu_0_0_fan_1_map0 {
  3359. trip = <0x46>;
  3360. cooling-device = <0x45 0x00 0x03>;
  3361. phandle = <0xb1>;
  3362. };
  3363.  
  3364. cpu_0_0_fan_1_map1 {
  3365. trip = <0x47>;
  3366. cooling-device = <0x45 0x03 0x06>;
  3367. phandle = <0xb2>;
  3368. };
  3369. };
  3370. };
  3371.  
  3372. cpu-0-1-fan {
  3373. polling-delay-passive = <0x00>;
  3374. polling-delay = <0x00>;
  3375. thermal-sensors = <0xffffffff 0x02>;
  3376. thermal-governor = "step_wise";
  3377. wake-capable-sensor;
  3378.  
  3379. trips {
  3380.  
  3381. cpu_0_1_fan_trip0 {
  3382. temperature = <0xafc8>;
  3383. hysteresis = <0x3e8>;
  3384. type = "active";
  3385. phandle = <0x48>;
  3386. };
  3387.  
  3388. cpu_0_1_fan_trip1 {
  3389. temperature = <0x14c08>;
  3390. hysteresis = <0x3e8>;
  3391. type = "active";
  3392. phandle = <0x49>;
  3393. };
  3394. };
  3395.  
  3396. cooling-maps {
  3397.  
  3398. cpu_0_1_fan_map0 {
  3399. trip = <0x48>;
  3400. cooling-device = <0x43 0x00 0x03>;
  3401. phandle = <0xb3>;
  3402. };
  3403.  
  3404. cpu_0_1_fan_map1 {
  3405. trip = <0x49>;
  3406. cooling-device = <0x43 0x03 0x06>;
  3407. phandle = <0xb4>;
  3408. };
  3409.  
  3410. cpu_0_1_fan_1_map0 {
  3411. trip = <0x48>;
  3412. cooling-device = <0x45 0x00 0x03>;
  3413. phandle = <0xb5>;
  3414. };
  3415.  
  3416. cpu_0_1_fan_1_map1 {
  3417. trip = <0x49>;
  3418. cooling-device = <0x45 0x03 0x06>;
  3419. phandle = <0xb6>;
  3420. };
  3421. };
  3422. };
  3423.  
  3424. cpu-0-2-fan {
  3425. polling-delay-passive = <0x00>;
  3426. polling-delay = <0x00>;
  3427. thermal-sensors = <0xffffffff 0x03>;
  3428. thermal-governor = "step_wise";
  3429. wake-capable-sensor;
  3430.  
  3431. trips {
  3432.  
  3433. cpu_0_2_fan_trip0 {
  3434. temperature = <0xafc8>;
  3435. hysteresis = <0x3e8>;
  3436. type = "active";
  3437. phandle = <0x4a>;
  3438. };
  3439.  
  3440. cpu_0_2_fan_trip1 {
  3441. temperature = <0x14c08>;
  3442. hysteresis = <0x3e8>;
  3443. type = "active";
  3444. phandle = <0x4b>;
  3445. };
  3446. };
  3447.  
  3448. cooling-maps {
  3449.  
  3450. cpu_0_2_fan_map0 {
  3451. trip = <0x4a>;
  3452. cooling-device = <0x43 0x00 0x03>;
  3453. phandle = <0xb7>;
  3454. };
  3455.  
  3456. cpu_0_2_fan_map1 {
  3457. trip = <0x4b>;
  3458. cooling-device = <0x43 0x03 0x06>;
  3459. phandle = <0xb8>;
  3460. };
  3461.  
  3462. cpu_0_2_fan_1_map0 {
  3463. trip = <0x4a>;
  3464. cooling-device = <0x45 0x00 0x03>;
  3465. phandle = <0xb9>;
  3466. };
  3467.  
  3468. cpu_0_2_fan_1_map1 {
  3469. trip = <0x4b>;
  3470. cooling-device = <0x45 0x03 0x06>;
  3471. phandle = <0xba>;
  3472. };
  3473. };
  3474. };
  3475.  
  3476. cpu-0-3-fan {
  3477. polling-delay-passive = <0x00>;
  3478. polling-delay = <0x00>;
  3479. thermal-sensors = <0xffffffff 0x04>;
  3480. thermal-governor = "step_wise";
  3481. wake-capable-sensor;
  3482.  
  3483. trips {
  3484.  
  3485. cpu_0_3_fan_trip0 {
  3486. temperature = <0xafc8>;
  3487. hysteresis = <0x3e8>;
  3488. type = "active";
  3489. phandle = <0x4c>;
  3490. };
  3491.  
  3492. cpu_0_3_fan_trip1 {
  3493. temperature = <0x14c08>;
  3494. hysteresis = <0x3e8>;
  3495. type = "active";
  3496. phandle = <0x4d>;
  3497. };
  3498. };
  3499.  
  3500. cooling-maps {
  3501.  
  3502. cpu_0_3_fan_map0 {
  3503. trip = <0x4c>;
  3504. cooling-device = <0x43 0x00 0x03>;
  3505. phandle = <0xbb>;
  3506. };
  3507.  
  3508. cpu_0_3_fan_map1 {
  3509. trip = <0x4d>;
  3510. cooling-device = <0x43 0x03 0x06>;
  3511. phandle = <0xbc>;
  3512. };
  3513.  
  3514. cpu_0_3_fan_1_map0 {
  3515. trip = <0x4c>;
  3516. cooling-device = <0x45 0x00 0x03>;
  3517. phandle = <0xbd>;
  3518. };
  3519.  
  3520. cpu_0_3_fan_1_map1 {
  3521. trip = <0x4d>;
  3522. cooling-device = <0x45 0x03 0x06>;
  3523. phandle = <0xbe>;
  3524. };
  3525. };
  3526. };
  3527.  
  3528. cpu-1-0-fan {
  3529. polling-delay-passive = <0x00>;
  3530. polling-delay = <0x00>;
  3531. thermal-sensors = <0xffffffff 0x07>;
  3532. thermal-governor = "step_wise";
  3533. wake-capable-sensor;
  3534.  
  3535. trips {
  3536.  
  3537. cpu_1_0_fan_trip0 {
  3538. temperature = <0xafc8>;
  3539. hysteresis = <0x3e8>;
  3540. type = "active";
  3541. phandle = <0x4e>;
  3542. };
  3543.  
  3544. cpu_1_0_fan_trip1 {
  3545. temperature = <0x14c08>;
  3546. hysteresis = <0x3e8>;
  3547. type = "active";
  3548. phandle = <0x4f>;
  3549. };
  3550. };
  3551.  
  3552. cooling-maps {
  3553.  
  3554. cpu_1_0_fan_0_map0 {
  3555. trip = <0x4e>;
  3556. cooling-device = <0x43 0x00 0x03>;
  3557. phandle = <0xbf>;
  3558. };
  3559.  
  3560. cpu_1_0_fan_0_map1 {
  3561. trip = <0x4f>;
  3562. cooling-device = <0x43 0x03 0x06>;
  3563. phandle = <0xc0>;
  3564. };
  3565.  
  3566. cpu_1_0_fan_1_map0 {
  3567. trip = <0x4e>;
  3568. cooling-device = <0x43 0x00 0x03>;
  3569. phandle = <0xc1>;
  3570. };
  3571.  
  3572. cpu_1_0_fan_map1 {
  3573. trip = <0x4f>;
  3574. cooling-device = <0x43 0x03 0x06>;
  3575. phandle = <0xc2>;
  3576. };
  3577. };
  3578. };
  3579.  
  3580. cpu-1-1-fan {
  3581. polling-delay-passive = <0x00>;
  3582. polling-delay = <0x00>;
  3583. thermal-sensors = <0xffffffff 0x08>;
  3584. thermal-governor = "step_wise";
  3585. wake-capable-sensor;
  3586.  
  3587. trips {
  3588.  
  3589. cpu_1_1_fan_trip0 {
  3590. temperature = <0xafc8>;
  3591. hysteresis = <0x3e8>;
  3592. type = "active";
  3593. phandle = <0x50>;
  3594. };
  3595.  
  3596. cpu_1_1_fan_trip1 {
  3597. temperature = <0x14c08>;
  3598. hysteresis = <0x3e8>;
  3599. type = "active";
  3600. phandle = <0x51>;
  3601. };
  3602. };
  3603.  
  3604. cooling-maps {
  3605.  
  3606. cpu_1_1_fan_0_map0 {
  3607. trip = <0x50>;
  3608. cooling-device = <0x43 0x00 0x03>;
  3609. phandle = <0xc3>;
  3610. };
  3611.  
  3612. cpu_1_1_fan_0_map1 {
  3613. trip = <0x51>;
  3614. cooling-device = <0x43 0x03 0x06>;
  3615. phandle = <0xc4>;
  3616. };
  3617.  
  3618. cpu_1_1_fan_1_map0 {
  3619. trip = <0x50>;
  3620. cooling-device = <0x43 0x00 0x03>;
  3621. phandle = <0xc5>;
  3622. };
  3623.  
  3624. cpu_1_1_fan_map1 {
  3625. trip = <0x51>;
  3626. cooling-device = <0x43 0x03 0x06>;
  3627. phandle = <0xc6>;
  3628. };
  3629. };
  3630. };
  3631.  
  3632. cpu-1-2-fan {
  3633. polling-delay-passive = <0x00>;
  3634. polling-delay = <0x00>;
  3635. thermal-sensors = <0xffffffff 0x09>;
  3636. thermal-governor = "step_wise";
  3637. wake-capable-sensor;
  3638.  
  3639. trips {
  3640.  
  3641. cpu_1_2_fan_trip0 {
  3642. temperature = <0xafc8>;
  3643. hysteresis = <0x3e8>;
  3644. type = "active";
  3645. phandle = <0x52>;
  3646. };
  3647.  
  3648. cpu_1_2_fan_trip1 {
  3649. temperature = <0x14c08>;
  3650. hysteresis = <0x3e8>;
  3651. type = "active";
  3652. phandle = <0x53>;
  3653. };
  3654. };
  3655.  
  3656. cooling-maps {
  3657.  
  3658. cpu_1_2_fan_0_map0 {
  3659. trip = <0x52>;
  3660. cooling-device = <0x43 0x00 0x03>;
  3661. phandle = <0xc7>;
  3662. };
  3663.  
  3664. cpu_1_2_fan_0_map1 {
  3665. trip = <0x53>;
  3666. cooling-device = <0x43 0x03 0x06>;
  3667. phandle = <0xc8>;
  3668. };
  3669.  
  3670. cpu_1_2_fan_1_map0 {
  3671. trip = <0x52>;
  3672. cooling-device = <0x43 0x00 0x03>;
  3673. phandle = <0xc9>;
  3674. };
  3675.  
  3676. cpu_1_2_fan_map1 {
  3677. trip = <0x53>;
  3678. cooling-device = <0x43 0x03 0x06>;
  3679. phandle = <0xca>;
  3680. };
  3681. };
  3682. };
  3683.  
  3684. cpu-1-3-fan {
  3685. polling-delay-passive = <0x00>;
  3686. polling-delay = <0x00>;
  3687. thermal-sensors = <0xffffffff 0x0a>;
  3688. thermal-governor = "step_wise";
  3689. wake-capable-sensor;
  3690.  
  3691. trips {
  3692.  
  3693. cpu_1_3_fan_trip0 {
  3694. temperature = <0xafc8>;
  3695. hysteresis = <0x3e8>;
  3696. type = "active";
  3697. phandle = <0x54>;
  3698. };
  3699.  
  3700. cpu_1_3_fan_trip1 {
  3701. temperature = <0x14c08>;
  3702. hysteresis = <0x3e8>;
  3703. type = "active";
  3704. phandle = <0x55>;
  3705. };
  3706. };
  3707.  
  3708. cooling-maps {
  3709.  
  3710. cpu_1_3_fan_0_map0 {
  3711. trip = <0x54>;
  3712. cooling-device = <0x43 0x00 0x03>;
  3713. phandle = <0xcb>;
  3714. };
  3715.  
  3716. cpu_1_3_fan_0_map1 {
  3717. trip = <0x55>;
  3718. cooling-device = <0x43 0x03 0x06>;
  3719. phandle = <0xcc>;
  3720. };
  3721.  
  3722. cpu_1_3_fan_1_map0 {
  3723. trip = <0x54>;
  3724. cooling-device = <0x43 0x00 0x03>;
  3725. phandle = <0xcd>;
  3726. };
  3727.  
  3728. cpu_1_3_fan_1_map1 {
  3729. trip = <0x55>;
  3730. cooling-device = <0x43 0x03 0x06>;
  3731. phandle = <0xce>;
  3732. };
  3733. };
  3734. };
  3735.  
  3736. cpu-1-4-fan {
  3737. polling-delay-passive = <0x00>;
  3738. polling-delay = <0x00>;
  3739. thermal-sensors = <0xffffffff 0x0b>;
  3740. thermal-governor = "step_wise";
  3741. wake-capable-sensor;
  3742.  
  3743. trips {
  3744.  
  3745. cpu_1_4_fan_trip0 {
  3746. temperature = <0xafc8>;
  3747. hysteresis = <0x3e8>;
  3748. type = "active";
  3749. phandle = <0x56>;
  3750. };
  3751.  
  3752. cpu_1_4_fan_trip1 {
  3753. temperature = <0x14c08>;
  3754. hysteresis = <0x3e8>;
  3755. type = "active";
  3756. phandle = <0x57>;
  3757. };
  3758. };
  3759.  
  3760. cooling-maps {
  3761.  
  3762. cpu_1_4_fan_0_map0 {
  3763. trip = <0x56>;
  3764. cooling-device = <0x43 0x00 0x03>;
  3765. phandle = <0xcf>;
  3766. };
  3767.  
  3768. cpu_1_4_fan_0_map1 {
  3769. trip = <0x57>;
  3770. cooling-device = <0x43 0x03 0x06>;
  3771. phandle = <0xd0>;
  3772. };
  3773.  
  3774. cpu_1_4_fan_1_map0 {
  3775. trip = <0x56>;
  3776. cooling-device = <0x43 0x00 0x03>;
  3777. phandle = <0xd1>;
  3778. };
  3779.  
  3780. cpu_1_4_fan_1_map1 {
  3781. trip = <0x57>;
  3782. cooling-device = <0x43 0x03 0x06>;
  3783. phandle = <0xd2>;
  3784. };
  3785. };
  3786. };
  3787.  
  3788. cpu-1-5-fan {
  3789. polling-delay-passive = <0x00>;
  3790. polling-delay = <0x00>;
  3791. thermal-sensors = <0xffffffff 0x0c>;
  3792. thermal-governor = "step_wise";
  3793. wake-capable-sensor;
  3794.  
  3795. trips {
  3796.  
  3797. cpu_1_5_fan_trip0 {
  3798. temperature = <0xafc8>;
  3799. hysteresis = <0x3e8>;
  3800. type = "active";
  3801. phandle = <0x58>;
  3802. };
  3803.  
  3804. cpu_1_5_fan_trip1 {
  3805. temperature = <0x14c08>;
  3806. hysteresis = <0x3e8>;
  3807. type = "active";
  3808. phandle = <0x59>;
  3809. };
  3810. };
  3811.  
  3812. cooling-maps {
  3813.  
  3814. cpu_1_5_fan_0_map0 {
  3815. trip = <0x58>;
  3816. cooling-device = <0x43 0x00 0x03>;
  3817. phandle = <0xd3>;
  3818. };
  3819.  
  3820. cpu_1_5_fan_0_map1 {
  3821. trip = <0x59>;
  3822. cooling-device = <0x43 0x03 0x06>;
  3823. phandle = <0xd4>;
  3824. };
  3825.  
  3826. cpu_1_5_fan_1_map0 {
  3827. trip = <0x58>;
  3828. cooling-device = <0x43 0x00 0x03>;
  3829. phandle = <0xd5>;
  3830. };
  3831.  
  3832. cpu_1_5_fan_1_map1 {
  3833. trip = <0x59>;
  3834. cooling-device = <0x43 0x03 0x06>;
  3835. phandle = <0xd6>;
  3836. };
  3837. };
  3838. };
  3839.  
  3840. cpu-1-6-fan {
  3841. polling-delay-passive = <0x00>;
  3842. polling-delay = <0x00>;
  3843. thermal-sensors = <0xffffffff 0x0d>;
  3844. thermal-governor = "step_wise";
  3845. wake-capable-sensor;
  3846.  
  3847. trips {
  3848.  
  3849. cpu_1_6_fan_trip0 {
  3850. temperature = <0xafc8>;
  3851. hysteresis = <0x3e8>;
  3852. type = "active";
  3853. phandle = <0x5a>;
  3854. };
  3855.  
  3856. cpu_1_6_fan_trip1 {
  3857. temperature = <0x14c08>;
  3858. hysteresis = <0x3e8>;
  3859. type = "active";
  3860. phandle = <0x5b>;
  3861. };
  3862. };
  3863.  
  3864. cooling-maps {
  3865.  
  3866. cpu_1_6_fan_0_map0 {
  3867. trip = <0x5a>;
  3868. cooling-device = <0x43 0x00 0x03>;
  3869. phandle = <0xd7>;
  3870. };
  3871.  
  3872. cpu_1_6_fan_0_map1 {
  3873. trip = <0x5b>;
  3874. cooling-device = <0x43 0x03 0x06>;
  3875. phandle = <0xd8>;
  3876. };
  3877.  
  3878. cpu_1_6_fan_1_map0 {
  3879. trip = <0x5a>;
  3880. cooling-device = <0x43 0x00 0x03>;
  3881. phandle = <0xd9>;
  3882. };
  3883.  
  3884. cpu_1_6_fan_1_map1 {
  3885. trip = <0x5b>;
  3886. cooling-device = <0x43 0x03 0x06>;
  3887. phandle = <0xda>;
  3888. };
  3889. };
  3890. };
  3891.  
  3892. cpu-1-7-fan {
  3893. polling-delay-passive = <0x00>;
  3894. polling-delay = <0x00>;
  3895. thermal-sensors = <0xffffffff 0x0e>;
  3896. thermal-governor = "step_wise";
  3897. wake-capable-sensor;
  3898.  
  3899. trips {
  3900.  
  3901. cpu_1_7_fan_trip0 {
  3902. temperature = <0xafc8>;
  3903. hysteresis = <0x3e8>;
  3904. type = "active";
  3905. phandle = <0x5c>;
  3906. };
  3907.  
  3908. cpu_1_7_fan_trip1 {
  3909. temperature = <0x14c08>;
  3910. hysteresis = <0x3e8>;
  3911. type = "active";
  3912. phandle = <0x5d>;
  3913. };
  3914. };
  3915.  
  3916. cooling-maps {
  3917.  
  3918. cpu_1_7_fan_0_map0 {
  3919. trip = <0x5c>;
  3920. cooling-device = <0x43 0x00 0x03>;
  3921. phandle = <0xdb>;
  3922. };
  3923.  
  3924. cpu_1_7_fan_0_map1 {
  3925. trip = <0x5d>;
  3926. cooling-device = <0x43 0x03 0x06>;
  3927. phandle = <0xdc>;
  3928. };
  3929.  
  3930. cpu_1_7_fan_1_map0 {
  3931. trip = <0x5c>;
  3932. cooling-device = <0x43 0x00 0x03>;
  3933. phandle = <0xdd>;
  3934. };
  3935.  
  3936. cpu_1_7_fan_1_map1 {
  3937. trip = <0x5d>;
  3938. cooling-device = <0x43 0x03 0x06>;
  3939. phandle = <0xde>;
  3940. };
  3941. };
  3942. };
  3943.  
  3944. cpuss-0-fan {
  3945. polling-delay-passive = <0x00>;
  3946. polling-delay = <0x00>;
  3947. thermal-sensors = <0xffffffff 0x05>;
  3948. thermal-governor = "step_wise";
  3949. wake-capable-sensor;
  3950.  
  3951. trips {
  3952.  
  3953. cpuss_0_fan_trip0 {
  3954. temperature = <0xafc8>;
  3955. hysteresis = <0x3e8>;
  3956. type = "active";
  3957. phandle = <0x5e>;
  3958. };
  3959.  
  3960. cpuss_0_fan_trip1 {
  3961. temperature = <0x14c08>;
  3962. hysteresis = <0x3e8>;
  3963. type = "active";
  3964. phandle = <0x5f>;
  3965. };
  3966. };
  3967.  
  3968. cooling-maps {
  3969.  
  3970. cpuss_0_fan_0_map0 {
  3971. trip = <0x5e>;
  3972. cooling-device = <0x43 0x00 0x03>;
  3973. phandle = <0xdf>;
  3974. };
  3975.  
  3976. cpuss_0_fan_0_map1 {
  3977. trip = <0x5f>;
  3978. cooling-device = <0x43 0x03 0x06>;
  3979. phandle = <0xe0>;
  3980. };
  3981.  
  3982. cpuss_0_fan_1_map0 {
  3983. trip = <0x5e>;
  3984. cooling-device = <0x45 0x00 0x03>;
  3985. phandle = <0xe1>;
  3986. };
  3987.  
  3988. cpuss_0_fan_1_map1 {
  3989. trip = <0x5f>;
  3990. cooling-device = <0x45 0x03 0x06>;
  3991. phandle = <0xe2>;
  3992. };
  3993. };
  3994. };
  3995.  
  3996. cpuss-1-fan {
  3997. polling-delay-passive = <0x00>;
  3998. polling-delay = <0x00>;
  3999. thermal-sensors = <0xffffffff 0x06>;
  4000. thermal-governor = "step_wise";
  4001. wake-capable-sensor;
  4002.  
  4003. trips {
  4004.  
  4005. cpuss_1_fan_trip0 {
  4006. temperature = <0xafc8>;
  4007. hysteresis = <0x3e8>;
  4008. type = "active";
  4009. phandle = <0x60>;
  4010. };
  4011.  
  4012. cpuss_1_fan_trip1 {
  4013. temperature = <0x14c08>;
  4014. hysteresis = <0x3e8>;
  4015. type = "active";
  4016. phandle = <0x61>;
  4017. };
  4018. };
  4019.  
  4020. cooling-maps {
  4021.  
  4022. cpuss_1_fan_0_map0 {
  4023. trip = <0x60>;
  4024. cooling-device = <0x43 0x00 0x03>;
  4025. phandle = <0xe3>;
  4026. };
  4027.  
  4028. cpuss_1_fan_0_map1 {
  4029. trip = <0x61>;
  4030. cooling-device = <0x43 0x03 0x06>;
  4031. phandle = <0xe4>;
  4032. };
  4033.  
  4034. cpuss_1_fan_1_map0 {
  4035. trip = <0x60>;
  4036. cooling-device = <0x45 0x00 0x03>;
  4037. phandle = <0xe5>;
  4038. };
  4039.  
  4040. cpuss_1_fan_1_map1 {
  4041. trip = <0x61>;
  4042. cooling-device = <0x45 0x03 0x06>;
  4043. phandle = <0xe6>;
  4044. };
  4045. };
  4046. };
  4047.  
  4048. gpuss-0-fan {
  4049. polling-delay-passive = <0x00>;
  4050. polling-delay = <0x00>;
  4051. thermal-sensors = <0xffffffff 0x0f>;
  4052. thermal-governor = "step_wise";
  4053. wake-capable-sensor;
  4054.  
  4055. trips {
  4056.  
  4057. gpuss_0_fan_trip0 {
  4058. temperature = <0xafc8>;
  4059. hysteresis = <0x3e8>;
  4060. type = "active";
  4061. phandle = <0x62>;
  4062. };
  4063.  
  4064. gpuss_0_fan_trip1 {
  4065. temperature = <0x14c08>;
  4066. hysteresis = <0x3e8>;
  4067. type = "active";
  4068. phandle = <0x63>;
  4069. };
  4070. };
  4071.  
  4072. cooling-maps {
  4073.  
  4074. gpuss_0_fan_0_map0 {
  4075. trip = <0x62>;
  4076. cooling-device = <0x43 0x00 0x03>;
  4077. phandle = <0xe7>;
  4078. };
  4079.  
  4080. gpuss_0_fan_0_map1 {
  4081. trip = <0x63>;
  4082. cooling-device = <0x43 0x03 0x06>;
  4083. phandle = <0xe8>;
  4084. };
  4085.  
  4086. gpuss_0_fan_1_map0 {
  4087. trip = <0x62>;
  4088. cooling-device = <0x45 0x00 0x03>;
  4089. phandle = <0xe9>;
  4090. };
  4091.  
  4092. gpuss_0_fan_1_map1 {
  4093. trip = <0x63>;
  4094. cooling-device = <0x45 0x03 0x06>;
  4095. phandle = <0xea>;
  4096. };
  4097. };
  4098. };
  4099.  
  4100. gpuss-1-fan {
  4101. polling-delay-passive = <0x00>;
  4102. polling-delay = <0x00>;
  4103. thermal-sensors = <0xffffffff 0x08>;
  4104. thermal-governor = "step_wise";
  4105. wake-capable-sensor;
  4106.  
  4107. trips {
  4108.  
  4109. gpuss_1_fan_trip0 {
  4110. temperature = <0xafc8>;
  4111. hysteresis = <0x3e8>;
  4112. type = "active";
  4113. phandle = <0x64>;
  4114. };
  4115.  
  4116. gpuss_1_fan_trip1 {
  4117. temperature = <0x14c08>;
  4118. hysteresis = <0x3e8>;
  4119. type = "active";
  4120. phandle = <0x65>;
  4121. };
  4122. };
  4123.  
  4124. cooling-maps {
  4125.  
  4126. gpuss_1_fan_0_map0 {
  4127. trip = <0x64>;
  4128. cooling-device = <0x43 0x00 0x03>;
  4129. phandle = <0xeb>;
  4130. };
  4131.  
  4132. gpuss_1_fan_0_map1 {
  4133. trip = <0x65>;
  4134. cooling-device = <0x43 0x03 0x06>;
  4135. phandle = <0xec>;
  4136. };
  4137.  
  4138. gpuss_1_fan_1_map0 {
  4139. trip = <0x64>;
  4140. cooling-device = <0x45 0x00 0x03>;
  4141. phandle = <0xed>;
  4142. };
  4143.  
  4144. gpuss_1_fan_1_map1 {
  4145. trip = <0x65>;
  4146. cooling-device = <0x45 0x03 0x06>;
  4147. phandle = <0xee>;
  4148. };
  4149. };
  4150. };
  4151. };
  4152. };
  4153.  
  4154. fragment@44 {
  4155. target = <0xffffffff>;
  4156.  
  4157. __overlay__ {
  4158. vdd-supply = <0xffffffff>;
  4159. qcom,vdd-voltage-level = <0x2d0370 0x2d2a80>;
  4160. qcom,vdd-current-level = <0xc8 0xc3500>;
  4161. vdd-io-supply = <0xffffffff>;
  4162. qcom,vdd-io-voltage-level = <0x1b9680 0x2d2a80>;
  4163. qcom,vdd-io-current-level = <0xc8 0x55f0>;
  4164. pinctrl-names = "active\0sleep";
  4165. pinctrl-0 = <0xffffffff 0xffffffff 0xffffffff 0xffffffff>;
  4166. pinctrl-1 = <0xffffffff 0xffffffff 0xffffffff 0xffffffff>;
  4167. cd-gpios = <0xffffffff 0x4d 0x01>;
  4168. status = "ok";
  4169. };
  4170. };
  4171.  
  4172. fragment@45 {
  4173. target = <0xffffffff>;
  4174.  
  4175. __overlay__ {
  4176. vdd-hba-supply = <0xffffffff>;
  4177. vdd-hba-fixed-regulator;
  4178. vcc-supply = <0xffffffff>;
  4179. vcc-voltage-level = <0x263540 0x2d0370>;
  4180. vcc-low-voltage-sup;
  4181. vccq-supply = <0xffffffff>;
  4182. vccq2-supply = <0xffffffff>;
  4183. vcc-max-microamp = <0xc3500>;
  4184. vccq-max-microamp = <0xc3500>;
  4185. vccq2-max-microamp = <0xc3500>;
  4186. qcom,vddp-ref-clk-supply = <0xffffffff>;
  4187. qcom,vddp-ref-clk-max-microamp = <0x64>;
  4188. status = "ok";
  4189. };
  4190. };
  4191.  
  4192. fragment@46 {
  4193. target = <0xffffffff>;
  4194.  
  4195. __overlay__ {
  4196. compatible = "qcom,ufs-phy-qmp-v4";
  4197. vdda-phy-supply = <0xffffffff>;
  4198. vdda-phy-always-on;
  4199. vdda-pll-supply = <0xffffffff>;
  4200. vdda-phy-max-microamp = <0x15f2c>;
  4201. vdda-pll-max-microamp = <0x4970>;
  4202. status = "ok";
  4203. };
  4204. };
  4205.  
  4206. fragment@47 {
  4207. target = <0xffffffff>;
  4208.  
  4209. __overlay__ {
  4210.  
  4211. qcom,battery-data {
  4212. qcom,batt-id-range-pct = <0x0f>;
  4213. phandle = <0x08>;
  4214.  
  4215. qcom,4081226_goertek_hollywood_15k_3636mah_aug26th2019 {
  4216. qcom,profile-revision = <0x18>;
  4217. qcom,max-voltage-uv = <0x432380>;
  4218. qcom,fastchg-current-ma = <0x7d0>;
  4219. qcom,jeita-fcc-ranges-0 = <0x32 0x64 0xafc80 0x65 0xc8 0x1bc560 0xc9 0x1c2 0x1e8480 0x1c3 0x226 0xafc80>;
  4220. qcom,jeita-fcc-ranges-1 = <0x32 0x64 0xafc80 0x65 0xc8 0x1bc560 0xc9 0x1c2 0x1e8480 0x1c3 0x226 0xafc80>;
  4221. qcom,jeita-fv-ranges-0 = <0x32 0x64 0x432380 0x65 0xc8 0x432380 0xc9 0x1c2 0x432380 0x1c3 0x226 0x401640>;
  4222. qcom,jeita-fv-ranges-1 = <0x32 0x64 0x3e8fa0 0x65 0xc8 0x3e8fa0 0xc9 0x1c2 0x3e8fa0 0x1c3 0x226 0x3b8260>;
  4223. qcom,cycle-fcc-ranges-0 = <0x00 0x12c 0x1e8480 0x12d 0x1f4 0x1e8480 0x1f5 0x320 0x1e8480>;
  4224. qcom,cycle-fcc-ranges-1 = <0x00 0x12c 0x1e8480 0x12d 0x1f4 0x1e8480 0x1f5 0x320 0x1e8480>;
  4225. qcom,cycle-fv-ranges-0 = <0x00 0x12c 0x432380 0x12d 0x1f4 0x432380 0x1f5 0x320 0x419ce0>;
  4226. qcom,cycle-fv-ranges-1 = <0x00 0x12c 0x3e8fa0 0x12d 0x1f4 0x3e8fa0 0x1f5 0x320 0x3d0900>;
  4227. qcom,chg-disable-ranges-0 = <0x36ee80 0x3e8fa0 0x00 0x3e9388 0x432380 0x00>;
  4228. qcom,chg-disable-ranges-1 = <0x36ee80 0x3e8fa0 0x00 0x3e9388 0x432380 0x01>;
  4229. qcom,step-chg-ranges-0 = <0x36ee80 0x3df360 0x1e8480 0x3df748 0x432380 0x1e8480>;
  4230. qcom,step-chg-ranges-1 = <0x36ee80 0x3df360 0x1e8480 0x3df748 0x432380 0x1e8480>;
  4231. qcom,jeita-hard-thresholds = <0x58cd 0x1882>;
  4232. qcom,jeita-soft-thresholds = <0x4ccc 0x20b8>;
  4233. qcom,jeita-soft-hys-thresholds = <0x4a2a 0x22b8>;
  4234. qcom,jeita-soft-fcc-ua = <0xafc80 0xafc80>;
  4235. qcom,jeita-soft-fv-uv = <0x419ce0 0x419ce0>;
  4236. qcom,ocv-based-step-chg;
  4237. qcom,fg-cc-cv-threshold-mv = <0x1126>;
  4238. qcom,nom-batt-capacity-mah = <0xe34>;
  4239. qcom,batt-id-kohm = <0x0f>;
  4240. qcom,battery-beta = <0x109a>;
  4241. qcom,therm-room-temp = <0x186a0>;
  4242. qcom,battery-type = "4081226_goertek_hollywood_15k_3636mah_aug26th2019";
  4243. qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>;
  4244. qcom,therm-center-offset = <0x70>;
  4245. qcom,therm-pull-up = <0x64>;
  4246. qcom,rslow-normal-coeffs = <0xdd 0x05 0x51 0x12>;
  4247. qcom,rslow-low-coeffs = <0x41 0x15 0xe7 0x05>;
  4248. qcom,checksum = <0xef51>;
  4249. qcom,gui-version = "PM855GUI - 1.0.0.13";
  4250. qcom,fg-profile-data = <0x90017ea 0xb5e515ea 0xabe50000 0x2dbd7b8a 0xfc87e993 0x884f187 0x2300dd05 0x5112c604 0x502ce07 0x3200deeb 0x63ed85dc 0xf10b0add 0x4bc4c30c 0xb30135da 0x60003c00 0x3e003f00 0x37003000 0x36003d00 0x3f004700 0x4b006000 0x2e003600 0x3d003800 0x35006300 0x53644100 0x3f004308 0x60f85200 0x5d008010 0x6f105f00 0xb0288650 0x6b605f0b 0x6700d800 0xc11f6e0d 0x60fa5705 0x781c760b 0x7e0db02a 0x5d17e54a 0xf75def03 0x680f3d1f 0x11060b02 0x9f05e41c 0x102a405 0xb00ad317 0x1722d545 0x145b7211 0x971ec8e6 0x26cb2fc7 0xdc1cb1c1 0x9d040aba 0xb117c18b 0x8e8429a2 0x72a00980 0xe6fb9004 0xbc02b502 0xf8d8dc 0x9fe3f407 0x4e286c5 0x421818f8 0x27d59e02 0xad057c01 0xce073200 0xf902dc03 0x43042601 0x8c056503 0xce022102 0xa7044f00 0x3a004000 0x43644600 0x46004600 0x4be84700 0x48004910 0x43103c00 0x4c284d48 0x5658630d 0x43004e00 0x55085bf8 0x4c004600 0x4d106310 0x5d007028 0x8b485860 0x660d6e00 0x69004908 0xd800491f 0xaa06a80a 0x7b0ced1c 0xc23f545 0x205a8f18 0xa02af05 0xa4036710 0x3f0ae71f 0x6d058b02 0x9504be1c 0x2803d005 0x5c026f18 0x17028a05 0x3026a00 0x551f0006 0x2f029606 0xd81c5902 0x20053803 0x97185603 0xcb042102 0x6e002501 0xc000fa00 0x9b0e0000>;
  4251. };
  4252.  
  4253. qcom,4203348_goertek_hollywood_100k_3636mah_oct21st2019 {
  4254. qcom,profile-revision = <0x18>;
  4255. qcom,max-voltage-uv = <0x432380>;
  4256. qcom,fastchg-current-ma = <0x7d0>;
  4257. qcom,jeita-fcc-ranges-0 = <0x32 0x64 0xafc80 0x65 0xc8 0x1bc560 0xc9 0x1c2 0x1e8480 0x1c3 0x226 0xafc80>;
  4258. qcom,jeita-fcc-ranges-1 = <0x32 0x64 0xafc80 0x65 0xc8 0x1bc560 0xc9 0x1c2 0x1e8480 0x1c3 0x226 0xafc80>;
  4259. qcom,jeita-fv-ranges-0 = <0x32 0x64 0x432380 0x65 0xc8 0x432380 0xc9 0x1c2 0x432380 0x1c3 0x226 0x401640>;
  4260. qcom,jeita-fv-ranges-1 = <0x32 0x64 0x3e8fa0 0x65 0xc8 0x3e8fa0 0xc9 0x1c2 0x3e8fa0 0x1c3 0x226 0x3b8260>;
  4261. qcom,cycle-fcc-ranges-0 = <0x00 0x12c 0x1e8480 0x12d 0x1f4 0x1e8480 0x1f5 0x320 0x1e8480>;
  4262. qcom,cycle-fcc-ranges-1 = <0x00 0x12c 0x1e8480 0x12d 0x1f4 0x1e8480 0x1f5 0x320 0x1e8480>;
  4263. qcom,cycle-fv-ranges-0 = <0x00 0x12c 0x432380 0x12d 0x1f4 0x432380 0x1f5 0x320 0x419ce0>;
  4264. qcom,cycle-fv-ranges-1 = <0x00 0x12c 0x3e8fa0 0x12d 0x1f4 0x3e8fa0 0x1f5 0x320 0x3d0900>;
  4265. qcom,chg-disable-ranges-0 = <0x36ee80 0x3e8fa0 0x00 0x3e9388 0x432380 0x00>;
  4266. qcom,chg-disable-ranges-1 = <0x36ee80 0x3e8fa0 0x00 0x3e9388 0x432380 0x01>;
  4267. qcom,step-chg-ranges-0 = <0x36ee80 0x3df360 0x1e8480 0x3df748 0x432380 0x1e8480>;
  4268. qcom,step-chg-ranges-1 = <0x36ee80 0x3df360 0x1e8480 0x3df748 0x432380 0x1e8480>;
  4269. qcom,jeita-hard-thresholds = <0x58cd 0x1882>;
  4270. qcom,jeita-soft-thresholds = <0x4ccc 0x20b8>;
  4271. qcom,jeita-soft-hys-thresholds = <0x4a2a 0x22b8>;
  4272. qcom,jeita-soft-fcc-ua = <0xafc80 0xafc80>;
  4273. qcom,jeita-soft-fv-uv = <0x419ce0 0x419ce0>;
  4274. qcom,ocv-based-step-chg;
  4275. qcom,fg-cc-cv-threshold-mv = <0x1126>;
  4276. qcom,nom-batt-capacity-mah = <0xe34>;
  4277. qcom,batt-id-kohm = <0x64>;
  4278. qcom,battery-beta = <0x109a>;
  4279. qcom,therm-room-temp = <0x186a0>;
  4280. qcom,battery-type = "4203348_goertek_hollywood_3636mah_oct21st2019";
  4281. qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>;
  4282. qcom,therm-center-offset = <0x70>;
  4283. qcom,therm-pull-up = <0x64>;
  4284. qcom,rslow-normal-coeffs = <0xed 0xe4 0x0e 0x12>;
  4285. qcom,rslow-low-coeffs = <0xfb 0x02 0x2e 0x13>;
  4286. qcom,checksum = <0xb758>;
  4287. qcom,gui-version = "PM855GUI - 1.0.0.13";
  4288. qcom,fg-profile-data = <0x900f5e3 0x6cdc79e3 0x18dc0000 0xfdbc6b8b 0xf687138c 0xfa9d6d80 0x1c00ede4 0xe12a7fc 0x99f3ce07 0x32005fea 0xe1edd2db 0xba0b2ae5 0x8ec45513 0x29010700 0x60004a00 0x48004000 0x30003200 0x39004500 0x40003f00 0x3d006000 0x34004000 0x59004c00 0x41008b00 0x65644d00 0x42f84300 0x60004500 0x49006a10 0x59104d00 0x8d286948 0x5458480e 0x4d00d800 0xfe1e9d04 0xaef30c07 0x611c810b 0x7a0dcf22 0x74173942 0x925daf03 0x6010931e 0xef06c602 0xaaf5e01c 0xa029a05 0xc902cb17 0xd3236644 0x52526911 0x8c1effe6 0xaecacecd 0xda1cada9 0x8056bbb 0xc717968b 0xcf84e2a3 0x79a00980 0xa5035a04 0x1403b7fd 0xf812dd 0xc7e3f207 0xada87c4 0x68181600 0xfbdefb02 0x2c068f02 0xce073200 0xc902d902 0x7a058600 0x7f049903 0x3f028301 0xfc045200 0x35004100 0x44644800 0x47004600 0x46f04500 0x48004908 0x3d103e00 0x53285348 0x6058700e 0x4e005b00 0x63006af8 0x4a004300 0x49105a10 0x52006d20 0x7f485258 0x630e6c00 0x68004508 0xd8006d1f 0x6506470b 0xc60cdb1c 0x9231044 0x9526818 0x102cf05 0x53036a11 0x3f0a551f 0x3606e003 0xb705c51c 0x1703e105 0x54028818 0xd303e905 0x2b036500 0xbc1fbb05 0x4e028406 0xf41cf801 0xff052d02 0xad182503 0x25059203 0x7e002001 0xc000fa00 0x800e0000>;
  4289. };
  4290.  
  4291. qcom,4759214_facebook_seacliff_5348mah_averaged_masterslave_feb17th2021 {
  4292. qcom,profile-revision = <0x18>;
  4293. qcom,max-voltage-uv = <0x432380>;
  4294. qcom,fastchg-current-ma = <0x12cd>;
  4295. qcom,jeita-fcc-ranges-0 = <0x0a 0x64 0x104fc8 0x65 0xc8 0x28cd50 0xc9 0x1c2 0x4970c8 0x1c3 0x226 0x104fc8>;
  4296. qcom,jeita-fcc-ranges-1 = <0x0a 0x64 0x104fc8 0x65 0xc8 0x28cd50 0xc9 0x1c2 0x4970c8 0x1c3 0x226 0x104fc8>;
  4297. qcom,jeita-fv-ranges-0 = <0x0a 0x64 0x432380 0x65 0xc8 0x432380 0xc9 0x1c2 0x432380 0x1c3 0x226 0x401640>;
  4298. qcom,jeita-fv-ranges-1 = <0x0a 0x64 0x3e8fa0 0x65 0xc8 0x3e8fa0 0xc9 0x1c2 0x3e8fa0 0x1c3 0x226 0x3b8260>;
  4299. qcom,cycle-fcc-ranges-0 = <0x00 0x1f4 0x4970c8 0x1f5 0x320 0x4970c8>;
  4300. qcom,cycle-fcc-ranges-1 = <0x00 0x1f4 0x28cd50 0x1f5 0x320 0x28cd50>;
  4301. qcom,cycle-fv-ranges-0 = <0x00 0x1f4 0x432380 0x1f5 0x320 0x419ce0>;
  4302. qcom,cycle-fv-ranges-1 = <0x00 0x1f4 0x3e8fa0 0x1f5 0x320 0x3d0900>;
  4303. qcom,chg-disable-ranges-0 = <0x36ee80 0x3e8fa0 0x00 0x3e9388 0x432380 0x00>;
  4304. qcom,chg-disable-ranges-1 = <0x36ee80 0x3e8fa0 0x00 0x3e9388 0x432380 0x01>;
  4305. qcom,rblt-ranges = <0x00 0x11a08 0x3b8260 0x11a6c 0x20e90 0x401640 0x20ef4 0x23924 0x432380 0x23988 0x2bcc8 0x401640>;
  4306. qcom,rblt-limited-check;
  4307. qcom,step-chg-ranges-0 = <0x2dc6c0 0x401640 0x4970c8 0x401a28 0x432380 0x28cd50>;
  4308. qcom,step-chg-ranges-1 = <0x2dc6c0 0x3d0900 0x28cd50 0x3d0ce8 0x432380 0x28cd50>;
  4309. qcom,jeita-hard-thresholds = <0x58cd 0x1882>;
  4310. qcom,jeita-soft-thresholds = <0x4ccc 0x20b8>;
  4311. qcom,jeita-soft-hys-thresholds = <0x4a2a 0x22b8>;
  4312. qcom,jeita-soft-fcc-ua = <0x104fc8 0x104fc8>;
  4313. qcom,jeita-soft-fv-uv = <0x401640 0x401640>;
  4314. qcom,vnow-based-step-chg;
  4315. qcom,taper-fcc;
  4316. qcom,fg-cc-cv-threshold-mv = <0x1126>;
  4317. qcom,nom-batt-capacity-mah = <0x14e4>;
  4318. qcom,batt-id-kohm = <0x96>;
  4319. qcom,battery-beta = <0x109a>;
  4320. qcom,therm-room-temp = <0x186a0>;
  4321. qcom,battery-type = "4759214_facebook_seacliff_5348mah_averaged_masterslave_feb17th2021";
  4322. qcom,therm-coefficients = <0x2319 0xcb5 0xdb70 0xc48e 0x856b>;
  4323. qcom,therm-center-offset = <0x70>;
  4324. qcom,therm-pull-up = <0x64>;
  4325. qcom,rslow-normal-coeffs = <0x68 0x02 0x41 0x12>;
  4326. qcom,rslow-low-coeffs = <0x6c 0x0c 0xaf 0xdc>;
  4327. qcom,checksum = <0xf260>;
  4328. qcom,gui-version = "PM855GUI - 1.0.0.14";
  4329. qcom,fg-profile-data = <0x9005de3 0x6edd5fe2 0x62dd0000 0xdcbd9086 0x1480ff95 0xfc8c4e80 0x27006802 0x4112bffb 0xe10dce07 0x3200d4ea 0xbf0756c2 0xc90a5d07 0xedcde00b 0x4e0af8db 0x60006200 0x52004600 0x37003700 0x3c004000 0x46004400 0x3e006000 0x36004700 0x49004500 0x3f007500 0x68645200 0x46004008 0x60f85e00 0x59007d10 0x73105d00 0xb9208940 0x6f585d10 0x5d00d800 0xa31f910d 0x35facbfd 0x931cfd0a 0xe80d3e22 0x72184943 0xdf541202 0x6c12991f 0xabfd4602 0x4bf5e11c 0xdb03d30d 0x6d0a9318 0xfe226f3d 0x7537a14 0x961e69e5 0x4ecb67bc 0xba1c07c2 0xb205b2ba 0x9c18998a 0x4841d92 0x6ba00980 0x12eb440d 0x650394eb 0xf83eed 0xb5eaf9cf 0xe0e587cc 0x1a111cf8 0xcde42a02 0x93067a03 0xce073200 0xb7026a02 0xbf040b05 0x4805f802 0x62024d03 0xe5054500 0x3c004800 0x4a644d00 0x4f084c10 0x52084c00 0x50004d08 0x47083900 0x54285c48 0x6a60770d 0x5b006d00 0x76088600 0x68005900 0x4c107010 0x6e008828 0x9e486658 0x7a0d8900 0x8e005e08 0xd800af25 0x804d60a 0xee15041d 0x80224b45 0x695a7918 0x2d026905 0x1f029f0f 0x3f0a0720 0x3d05ae02 0x2c06b71c 0x3d03b805 0x76027b18 0xf029405 0xf4036a00 0x1c1f2f06 0x1302ae06 0xbb1cc502 0x2c043402 0x9c185e03 0xad044602 0x6300ca00 0xc000fa00 0xef150000>;
  4330. };
  4331. };
  4332. };
  4333. };
  4334.  
  4335. fragment@48 {
  4336. target = <0xffffffff>;
  4337.  
  4338. __overlay__ {
  4339. regulator-always-on;
  4340. };
  4341. };
  4342.  
  4343. fragment@49 {
  4344. target = <0xffffffff>;
  4345.  
  4346. __overlay__ {
  4347. regulator-always-on;
  4348. };
  4349. };
  4350.  
  4351. fragment@50 {
  4352. target = <0xffffffff>;
  4353.  
  4354. __overlay__ {
  4355. status = "ok";
  4356. };
  4357. };
  4358.  
  4359. fragment@51 {
  4360. target = <0xffffffff>;
  4361.  
  4362. __overlay__ {
  4363. status = "ok";
  4364. };
  4365. };
  4366.  
  4367. fragment@52 {
  4368. target = <0xffffffff>;
  4369.  
  4370. __overlay__ {
  4371. status = "ok";
  4372.  
  4373. spi_ctrl_left {
  4374. compatible = "oculus,seabright-spi-ctrl";
  4375. reg = <0x00>;
  4376. spi-max-frequency = <0xe4e1c0>;
  4377. };
  4378. };
  4379. };
  4380.  
  4381. fragment@53 {
  4382. target = <0xffffffff>;
  4383.  
  4384. __overlay__ {
  4385. status = "ok";
  4386.  
  4387. spi_ctrl_right {
  4388. compatible = "oculus,seabright-spi-ctrl";
  4389. reg = <0x00>;
  4390. spi-max-frequency = <0xe4e1c0>;
  4391. };
  4392. };
  4393. };
  4394.  
  4395. fragment@54 {
  4396. target = <0xffffffff>;
  4397.  
  4398. __overlay__ {
  4399. status = "ok";
  4400. pinctrl-0 = <0x66>;
  4401. pinctrl-1 = <0x67 0x68>;
  4402. };
  4403. };
  4404.  
  4405. fragment@55 {
  4406. target = <0xffffffff>;
  4407.  
  4408. __overlay__ {
  4409. status = "ok";
  4410. qcom,rt;
  4411.  
  4412. oculusnrf@0 {
  4413. status = "okay";
  4414. compatible = "oculus,syncboss";
  4415. reg = <0x00>;
  4416. spi-max-frequency = <0x7a1200>;
  4417. spi-cpol;
  4418. spi-cpha;
  4419. pinctrl-names = "syncboss_default";
  4420. pinctrl-0 = <0x69 0x6a>;
  4421. oculus,swdflavor = "nrf52832";
  4422. oculus,syncboss-reset = <0xffffffff 0x05 0x00>;
  4423. oculus,syncboss-timesync = <0xffffffff 0x44 0x00>;
  4424. oculus,syncboss-wakeup = <0xffffffff 0x04 0x00>;
  4425. oculus,syncboss-has-prox;
  4426. oculus,syncboss-use-fastpath;
  4427. oculus,syncboss-use-streaming-wakelock;
  4428. oculus,transaction-length = <0xf8>;
  4429. phandle = <0xef>;
  4430.  
  4431. swd@0 {
  4432. compatible = "oculus,swd";
  4433. pinctrl-names = "swd_default";
  4434. pinctrl-0 = <0x6b>;
  4435. oculus,swd-clk = <0xffffffff 0x34 0x00>;
  4436. oculus,swd-io = <0xffffffff 0x35 0x00>;
  4437. oculus,swd-flavor = "nrf52832";
  4438. oculus,fw-path = "syncboss-ipl-spl.bin";
  4439. oculus,flash-block-size = <0x200>;
  4440. oculus,flash-page-size = <0x1000>;
  4441. oculus,flash-page-count = <0x80>;
  4442. oculus,flash-page-retained-count = <0x03>;
  4443. };
  4444. };
  4445. };
  4446. };
  4447.  
  4448. fragment@56 {
  4449. target = <0xffffffff>;
  4450.  
  4451. __overlay__ {
  4452.  
  4453. syncboss_float_swd {
  4454. phandle = <0x6b>;
  4455.  
  4456. mux {
  4457. pins = "gpio52\0gpio53";
  4458. function = "gpio";
  4459. };
  4460.  
  4461. config {
  4462. pins = "gpio52\0gpio53";
  4463. drive-strength = <0x06>;
  4464. bias-disable;
  4465. input-enable;
  4466. };
  4467. };
  4468.  
  4469. syncboss_wakeup {
  4470. phandle = <0x6a>;
  4471.  
  4472. mux {
  4473. pins = "gpio4";
  4474. function = "gpio";
  4475. };
  4476.  
  4477. config {
  4478. pins = "gpio4";
  4479. bias-pull-down;
  4480. input-enable;
  4481. };
  4482. };
  4483.  
  4484. syncboss_reset_default {
  4485. phandle = <0x69>;
  4486.  
  4487. mux {
  4488. pins = "gpio5";
  4489. function = "gpio";
  4490. };
  4491.  
  4492. config {
  4493. pins = "gpio5";
  4494. drive-strength = <0x06>;
  4495. output-high;
  4496. };
  4497. };
  4498.  
  4499. syncboss_uart_active {
  4500. phandle = <0x66>;
  4501.  
  4502. mux {
  4503. pins = "gpio54\0gpio55";
  4504. function = "qup17";
  4505. };
  4506.  
  4507. config {
  4508. pins = "gpio54\0gpio55";
  4509. drive-strength = <0x02>;
  4510. bias-disable;
  4511. };
  4512. };
  4513.  
  4514. syncboss_uart_sleep_tx {
  4515. phandle = <0x67>;
  4516.  
  4517. mux {
  4518. pins = "gpio54";
  4519. function = "gpio";
  4520. };
  4521.  
  4522. config {
  4523. pins = "gpio54";
  4524. drive-strength = <0x02>;
  4525. bias-pull-up;
  4526. };
  4527. };
  4528.  
  4529. syncboss_uart_sleep_rx {
  4530. phandle = <0x68>;
  4531.  
  4532. mux {
  4533. pins = "gpio55";
  4534. function = "gpio";
  4535. };
  4536.  
  4537. config {
  4538. pins = "gpio55";
  4539. drive-strength = <0x02>;
  4540. bias-disable;
  4541. };
  4542. };
  4543. };
  4544. };
  4545.  
  4546. __symbols__ {
  4547. pm8150_tz = "/fragment@0/__overlay__/qcom,pm8150@0/qcom,temp-alarm@2400";
  4548. pm8150_clkdiv = "/fragment@0/__overlay__/qcom,pm8150@0/clock-controller@5b00";
  4549. pm8150_sdam_2 = "/fragment@0/__overlay__/qcom,pm8150@0/sdam@b100";
  4550. pm8150_gpios = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000";
  4551. key_home_default = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000/key_home/key_home_default";
  4552. imu_clkin_default = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000/imu_clkin/imu_clkin_default";
  4553. imu_clkin_sleep = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000/imu_clkin/imu_clkin_sleep";
  4554. key_vol_up_default = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000/key_vol_up/key_vol_up_default";
  4555. key_confirm_default = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000/key_confirm/key_confirm_default";
  4556. usb2_vbus_boost_default = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000/usb2_vbus_boost/usb2_vbus_boost_default";
  4557. usb2_vbus_det_default = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000/usb2_vbus_det/usb2_vbus_det_default";
  4558. pm_gpio_adc_default = "/fragment@0/__overlay__/qcom,pm8150@0/pinctrl@c000/pm8150_adc_therm/pm_gpio_adc_default";
  4559. pm8150_rtc = "/fragment@0/__overlay__/qcom,pm8150@0/qcom,pm8150_rtc";
  4560. pm8150_vadc = "/fragment@0/__overlay__/qcom,pm8150@0/vadc@3100";
  4561. pm8150_adc_tm = "/fragment@0/__overlay__/qcom,pm8150@0/adc_tm@3500";
  4562. pm8150_temp_alarm = "/fragment@1/__overlay__/pm8150_tz";
  4563. pm8150_trip0 = "/fragment@1/__overlay__/pm8150_tz/trips/trip0";
  4564. pm8150_trip1 = "/fragment@1/__overlay__/pm8150_tz/trips/trip1";
  4565. pm8150b_revid = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,revid@100";
  4566. pm8150b_tz = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,temp-alarm@2400";
  4567. pm8150b_clkdiv = "/fragment@2/__overlay__/qcom,pm8150b@2/clock-controller@6000";
  4568. pm8150b_pbs1 = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,pbs@7200";
  4569. pm8150b_qnovo = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,sdam-qnovo@b000";
  4570. pm8150b_gpios = "/fragment@2/__overlay__/qcom,pm8150b@2/pinctrl@c000";
  4571. qnovo_fet_ctrl_state1 = "/fragment@2/__overlay__/qcom,pm8150b@2/pinctrl@c000/qnovo_fet_ctrl/qnovo_fet_ctrl_state1";
  4572. qnovo_fet_ctrl_state2 = "/fragment@2/__overlay__/qcom,pm8150b@2/pinctrl@c000/qnovo_fet_ctrl/qnovo_fet_ctrl_state2";
  4573. smb_stat_default = "/fragment@2/__overlay__/qcom,pm8150b@2/pinctrl@c000/smb_stat/smb_stat_default";
  4574. haptics_boost_default = "/fragment@2/__overlay__/qcom,pm8150b@2/pinctrl@c000/haptics_boost/haptics_boost_default";
  4575. pmb_gpio_adc_default = "/fragment@2/__overlay__/qcom,pm8150b@2/pinctrl@c000/pm8150b_adc_therm/pmb_gpio_adc_default";
  4576. pm8150b_charger = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,qpnp-smb5";
  4577. smb5_vconn = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,qpnp-smb5/qcom,smb5-vconn";
  4578. smb5_vbus = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,qpnp-smb5/qcom,smb5-vbus";
  4579. pm8150b_pdphy = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,usb-pdphy@1700";
  4580. pm8150b_bcl = "/fragment@2/__overlay__/qcom,pm8150b@2/bcl@1d00";
  4581. bcl_soc = "/fragment@2/__overlay__/qcom,pm8150b@2/bcl-soc";
  4582. pm8150b_fg = "/fragment@2/__overlay__/qcom,pm8150b@2/qpnp,fg";
  4583. pm8150b_vadc = "/fragment@2/__overlay__/qcom,pm8150b@2/vadc@3100";
  4584. pm8150b_adc_tm = "/fragment@2/__overlay__/qcom,pm8150b@2/adc_tm@3500";
  4585. pm8150b_pwm = "/fragment@2/__overlay__/qcom,pm8150b@3/qcom,pwms@b100";
  4586. pm8150b_hr_led = "/fragment@2/__overlay__/qcom,pm8150b@3/qcom,leds@d000";
  4587. pm8150b_haptics = "/fragment@2/__overlay__/qcom,pm8150b@3/qcom,haptics@c000";
  4588. pm8150b_temp_alarm = "/fragment@3/__overlay__/pm8150b_tz";
  4589. pm8150b_trip0 = "/fragment@3/__overlay__/pm8150b_tz/trips/trip0";
  4590. pm8150b_trip1 = "/fragment@3/__overlay__/pm8150b_tz/trips/trip1";
  4591. ibat_lvl0 = "/fragment@3/__overlay__/pm8150b-ibat-lvl0/trips/ibat-lvl0";
  4592. ibat_lvl1 = "/fragment@3/__overlay__/pm8150b-ibat-lvl1/trips/ibat-lvl1";
  4593. vbat_lvl0 = "/fragment@3/__overlay__/pm8150b-vbat-lvl0/trips/vbat-lvl0";
  4594. vbat_lvl1 = "/fragment@3/__overlay__/pm8150b-vbat-lvl1/trips/vbat-lvl1";
  4595. vbat_lvl2 = "/fragment@3/__overlay__/pm8150b-vbat-lvl2/trips/vbat-lvl2";
  4596. b_bcl_lvl0 = "/fragment@3/__overlay__/pm8150b-bcl-lvl0/trips/b-bcl-lvl0";
  4597. b_bcl_lvl1 = "/fragment@3/__overlay__/pm8150b-bcl-lvl1/trips/b-bcl-lvl1";
  4598. b_bcl_lvl2 = "/fragment@3/__overlay__/pm8150b-bcl-lvl2/trips/b-bcl-lvl2";
  4599. soc_trip = "/fragment@3/__overlay__/soc/trips/soc-trip";
  4600. pm8150l_revid = "/fragment@4/__overlay__/qcom,pm8150l@4/qcom,revid@100";
  4601. pm8150l_tz = "/fragment@4/__overlay__/qcom,pm8150l@4/qcom,temp-alarm@2400";
  4602. pm8150l_clkdiv = "/fragment@4/__overlay__/qcom,pm8150l@4/clock-controller@5b00";
  4603. pm8150l_gpios = "/fragment@4/__overlay__/qcom,pm8150l@4/pinctrl@c000";
  4604. pml_gpio_adc_default = "/fragment@4/__overlay__/qcom,pm8150l@4/pinctrl@c000/pm8150l_adc_therm/pml_gpio_adc_default";
  4605. fan_pwm_default_0 = "/fragment@4/__overlay__/qcom,pm8150l@4/pinctrl@c000/fan_pwm@0/fan_pwm_default_0";
  4606. fan_pwm_default_1 = "/fragment@4/__overlay__/qcom,pm8150l@4/pinctrl@c000/fan_pwm@1/fan_pwm_default_1";
  4607. pm8150l_vadc = "/fragment@4/__overlay__/qcom,pm8150l@4/vadc@3100";
  4608. pm8150l_bcl = "/fragment@4/__overlay__/qcom,pm8150l@4/bcl@3d00";
  4609. pm8150l_adc_tm = "/fragment@4/__overlay__/qcom,pm8150l@4/adc_tm@3500";
  4610. pm8150l_lcdb = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,lcdb@ec00";
  4611. lcdb_ldo_vreg = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,lcdb@ec00/ldo";
  4612. lcdb_ncp_vreg = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,lcdb@ec00/ncp";
  4613. lcdb_bst_vreg = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,lcdb@ec00/bst";
  4614. flash_led = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,leds@d300";
  4615. pm8150l_flash0 = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,leds@d300/qcom,flash_0";
  4616. pm8150l_flash1 = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,leds@d300/qcom,flash_1";
  4617. pm8150l_flash2 = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,leds@d300/qcom,flash_2";
  4618. pm8150l_torch0 = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,leds@d300/qcom,torch_0";
  4619. pm8150l_torch1 = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,leds@d300/qcom,torch_1";
  4620. pm8150l_torch2 = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,leds@d300/qcom,torch_2";
  4621. pm8150l_switch0 = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,leds@d300/qcom,led_switch_0";
  4622. pm8150l_switch1 = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,leds@d300/qcom,led_switch_1";
  4623. pm8150l_switch2 = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,leds@d300/qcom,led_switch_2";
  4624. pm8150l_switch3 = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,leds@d300/qcom,led_switch_3";
  4625. pm8150l_wled = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,wled@d800";
  4626. wled_flash = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,wled@d800/qcom,wled-flash";
  4627. wled_torch = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,wled@d800/qcom,wled-torch";
  4628. wled_switch = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,wled@d800/qcom,wled-switch";
  4629. pm8150l_lpg = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,pwms@b100";
  4630. pm8150l_pwm = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,pwms@bc00";
  4631. pm8150l_rgb_led = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,leds@d000";
  4632. pm8150a_amoled = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,amoled";
  4633. oledb_vreg = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,amoled/oledb@e000";
  4634. ab_vreg = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,amoled/ab@de00";
  4635. ibb_vreg = "/fragment@4/__overlay__/qcom,pm8150l@5/qcom,amoled/ibb@dc00";
  4636. pm8150l_temp_alarm = "/fragment@5/__overlay__/pm8150l_tz";
  4637. vph_lvl0 = "/fragment@5/__overlay__/pm8150l-vph-lvl0/trips/vph-lvl0";
  4638. vph_lvl1 = "/fragment@5/__overlay__/pm8150l-vph-lvl1/trips/vph-lvl1";
  4639. vph_lvl2 = "/fragment@5/__overlay__/pm8150l-vph-lvl2/trips/vph-lvl2";
  4640. l_bcl_lvl0 = "/fragment@5/__overlay__/pm8150l-bcl-lvl0/trips/l-bcl-lvl0";
  4641. l_bcl_lvl1 = "/fragment@5/__overlay__/pm8150l-bcl-lvl1/trips/l-bcl-lvl1";
  4642. l_bcl_lvl2 = "/fragment@5/__overlay__/pm8150l-bcl-lvl2/trips/l-bcl-lvl2";
  4643. pm8009_gpios = "/fragment@6/__overlay__/qcom,pm8009@a/pinctrl@c000";
  4644. vreg_tof = "/fragment@8/__overlay__/regulator-dbb1";
  4645. vreg_hap_boost = "/fragment@8/__overlay__/regulator-haptics-boost";
  4646. display_panel_avdd_default = "/fragment@11/__overlay__/display_panel_avdd_default";
  4647. ext_disp = "/fragment@12/__overlay__/qcom,msm-ext-disp";
  4648. ext_disp_audio_codec = "/fragment@12/__overlay__/qcom,msm-ext-disp/qcom,msm-ext-disp-audio-codec-rx";
  4649. dsi_panel_pwr_supply = "/fragment@12/__overlay__/dsi_panel_pwr_supply";
  4650. dsi_panel_pwr_supply_lab_ibb = "/fragment@12/__overlay__/dsi_panel_pwr_supply_lab_ibb";
  4651. dsi_panel_pwr_supply_avdd = "/fragment@12/__overlay__/dsi_panel_pwr_supply_avdd";
  4652. display_panel_avdd = "/fragment@12/__overlay__/display_gpio_regulator@1";
  4653. sde_dsi = "/fragment@12/__overlay__/qcom,dsi-display-primary";
  4654. sde_dsi1 = "/fragment@12/__overlay__/qcom,dsi-display-secondary";
  4655. sde_wb = "/fragment@12/__overlay__/qcom,wb-display@0";
  4656. msm_notifier = "/fragment@12/__overlay__/qcom,msm_notifier@0";
  4657. ramoops = "/fragment@19/__overlay__/ramoops";
  4658. dsi_dual_boe_lcd_dsc_video = "/fragment@22/__overlay__/qcom,mdss_dsi_dual_boe_lcd_dsc_video";
  4659. dsi_dual_boe_lcd_video = "/fragment@23/__overlay__/qcom,mdss_dsi_dual_boe_lcd_video";
  4660. dsi_dual_boe_spi_blu_dsc_video = "/fragment@24/__overlay__/qcom,mdss_dsi_dual_boe_spi_blu_dsc_video";
  4661. dsi_dual_nt57950_uoled_dsc_video = "/fragment@29/__overlay__/qcom,mdss_dsi_dual_nt57950_uoled_dsc_video";
  4662. display_panel_blu_en = "/fragment@33/__overlay__/blu_gpio_regulator@1";
  4663. display_panel_blu_en_default = "/fragment@34/__overlay__/display_panel_blu_en_default";
  4664. seacliff_blu_pvdd_en_active = "/fragment@34/__overlay__/seacliff_blu_pvdd_en_active";
  4665. seacliff_blu_pvdd_en_suspend = "/fragment@34/__overlay__/seacliff_blu_pvdd_en_suspend";
  4666. bcm_bt_en_default = "/fragment@36/__overlay__/bcm_bt_en_default";
  4667. bcm_bt_wake_default = "/fragment@36/__overlay__/bcm_bt_wake_default";
  4668. bcm_bt_hostwake_default = "/fragment@36/__overlay__/bcm_bt_hostwake_default";
  4669. bcmdhd_wlan_en = "/fragment@36/__overlay__/bcmdhd_wlan_en";
  4670. bcmdhd_wlan_hostwake_default = "/fragment@36/__overlay__/bcmdhd_wlan_hostwake_default";
  4671. bt_bluesleep = "/fragment@40/__overlay__/bt_bluesleep";
  4672. fan_tach_default_0 = "/fragment@41/__overlay__/fan_tach_default@0";
  4673. fan_tach_default_1 = "/fragment@41/__overlay__/fan_tach_default@1";
  4674. fan_0 = "/fragment@42/__overlay__/qcom,pm8150l@5/pwm-tach-fan@0";
  4675. fan_1 = "/fragment@42/__overlay__/qcom,pm8150l@5/pwm-tach-fan@1";
  4676. batt_fan_trip0 = "/fragment@43/__overlay__/batt-fan/trips/batt_fan_trip0";
  4677. batt_fan_trip1 = "/fragment@43/__overlay__/batt-fan/trips/batt_fan_trip1";
  4678. batt_fan_0_map0 = "/fragment@43/__overlay__/batt-fan/cooling-maps/batt_fan_0_map0";
  4679. batt_fan_0_map1 = "/fragment@43/__overlay__/batt-fan/cooling-maps/batt_fan_0_map1";
  4680. batt_fan_1_map0 = "/fragment@43/__overlay__/batt-fan/cooling-maps/batt_fan_1_map0";
  4681. batt_fan_1_map1 = "/fragment@43/__overlay__/batt-fan/cooling-maps/batt_fan_1_map1";
  4682. cpu_0_0_fan_trip0 = "/fragment@43/__overlay__/cpu-0-0-fan/trips/cpu_0_0_fan_trip0";
  4683. cpu_0_0_fan_trip1 = "/fragment@43/__overlay__/cpu-0-0-fan/trips/cpu_0_0_fan_trip1";
  4684. cpu_0_0_fan_map0 = "/fragment@43/__overlay__/cpu-0-0-fan/cooling-maps/cpu_0_0_fan_map0";
  4685. cpu_0_0_fan_map1 = "/fragment@43/__overlay__/cpu-0-0-fan/cooling-maps/cpu_0_0_fan_map1";
  4686. cpu_0_0_fan_1_map0 = "/fragment@43/__overlay__/cpu-0-0-fan/cooling-maps/cpu_0_0_fan_1_map0";
  4687. cpu_0_0_fan_1_map1 = "/fragment@43/__overlay__/cpu-0-0-fan/cooling-maps/cpu_0_0_fan_1_map1";
  4688. cpu_0_1_fan_trip0 = "/fragment@43/__overlay__/cpu-0-1-fan/trips/cpu_0_1_fan_trip0";
  4689. cpu_0_1_fan_trip1 = "/fragment@43/__overlay__/cpu-0-1-fan/trips/cpu_0_1_fan_trip1";
  4690. cpu_0_1_fan_map0 = "/fragment@43/__overlay__/cpu-0-1-fan/cooling-maps/cpu_0_1_fan_map0";
  4691. cpu_0_1_fan_map1 = "/fragment@43/__overlay__/cpu-0-1-fan/cooling-maps/cpu_0_1_fan_map1";
  4692. cpu_0_1_fan_1_map0 = "/fragment@43/__overlay__/cpu-0-1-fan/cooling-maps/cpu_0_1_fan_1_map0";
  4693. cpu_0_1_fan_1_map1 = "/fragment@43/__overlay__/cpu-0-1-fan/cooling-maps/cpu_0_1_fan_1_map1";
  4694. cpu_0_2_fan_trip0 = "/fragment@43/__overlay__/cpu-0-2-fan/trips/cpu_0_2_fan_trip0";
  4695. cpu_0_2_fan_trip1 = "/fragment@43/__overlay__/cpu-0-2-fan/trips/cpu_0_2_fan_trip1";
  4696. cpu_0_2_fan_map0 = "/fragment@43/__overlay__/cpu-0-2-fan/cooling-maps/cpu_0_2_fan_map0";
  4697. cpu_0_2_fan_map1 = "/fragment@43/__overlay__/cpu-0-2-fan/cooling-maps/cpu_0_2_fan_map1";
  4698. cpu_0_2_fan_1_map0 = "/fragment@43/__overlay__/cpu-0-2-fan/cooling-maps/cpu_0_2_fan_1_map0";
  4699. cpu_0_2_fan_1_map1 = "/fragment@43/__overlay__/cpu-0-2-fan/cooling-maps/cpu_0_2_fan_1_map1";
  4700. cpu_0_3_fan_trip0 = "/fragment@43/__overlay__/cpu-0-3-fan/trips/cpu_0_3_fan_trip0";
  4701. cpu_0_3_fan_trip1 = "/fragment@43/__overlay__/cpu-0-3-fan/trips/cpu_0_3_fan_trip1";
  4702. cpu_0_3_fan_map0 = "/fragment@43/__overlay__/cpu-0-3-fan/cooling-maps/cpu_0_3_fan_map0";
  4703. cpu_0_3_fan_map1 = "/fragment@43/__overlay__/cpu-0-3-fan/cooling-maps/cpu_0_3_fan_map1";
  4704. cpu_0_3_fan_1_map0 = "/fragment@43/__overlay__/cpu-0-3-fan/cooling-maps/cpu_0_3_fan_1_map0";
  4705. cpu_0_3_fan_1_map1 = "/fragment@43/__overlay__/cpu-0-3-fan/cooling-maps/cpu_0_3_fan_1_map1";
  4706. cpu_1_0_fan_trip0 = "/fragment@43/__overlay__/cpu-1-0-fan/trips/cpu_1_0_fan_trip0";
  4707. cpu_1_0_fan_trip1 = "/fragment@43/__overlay__/cpu-1-0-fan/trips/cpu_1_0_fan_trip1";
  4708. cpu_1_0_fan_0_map0 = "/fragment@43/__overlay__/cpu-1-0-fan/cooling-maps/cpu_1_0_fan_0_map0";
  4709. cpu_1_0_fan_0_map1 = "/fragment@43/__overlay__/cpu-1-0-fan/cooling-maps/cpu_1_0_fan_0_map1";
  4710. cpu_1_0_fan_1_map0 = "/fragment@43/__overlay__/cpu-1-0-fan/cooling-maps/cpu_1_0_fan_1_map0";
  4711. cpu_1_0_fan_map1 = "/fragment@43/__overlay__/cpu-1-0-fan/cooling-maps/cpu_1_0_fan_map1";
  4712. cpu_1_1_fan_trip0 = "/fragment@43/__overlay__/cpu-1-1-fan/trips/cpu_1_1_fan_trip0";
  4713. cpu_1_1_fan_trip1 = "/fragment@43/__overlay__/cpu-1-1-fan/trips/cpu_1_1_fan_trip1";
  4714. cpu_1_1_fan_0_map0 = "/fragment@43/__overlay__/cpu-1-1-fan/cooling-maps/cpu_1_1_fan_0_map0";
  4715. cpu_1_1_fan_0_map1 = "/fragment@43/__overlay__/cpu-1-1-fan/cooling-maps/cpu_1_1_fan_0_map1";
  4716. cpu_1_1_fan_1_map0 = "/fragment@43/__overlay__/cpu-1-1-fan/cooling-maps/cpu_1_1_fan_1_map0";
  4717. cpu_1_1_fan_map1 = "/fragment@43/__overlay__/cpu-1-1-fan/cooling-maps/cpu_1_1_fan_map1";
  4718. cpu_1_2_fan_trip0 = "/fragment@43/__overlay__/cpu-1-2-fan/trips/cpu_1_2_fan_trip0";
  4719. cpu_1_2_fan_trip1 = "/fragment@43/__overlay__/cpu-1-2-fan/trips/cpu_1_2_fan_trip1";
  4720. cpu_1_2_fan_0_map0 = "/fragment@43/__overlay__/cpu-1-2-fan/cooling-maps/cpu_1_2_fan_0_map0";
  4721. cpu_1_2_fan_0_map1 = "/fragment@43/__overlay__/cpu-1-2-fan/cooling-maps/cpu_1_2_fan_0_map1";
  4722. cpu_1_2_fan_1_map0 = "/fragment@43/__overlay__/cpu-1-2-fan/cooling-maps/cpu_1_2_fan_1_map0";
  4723. cpu_1_2_fan_map1 = "/fragment@43/__overlay__/cpu-1-2-fan/cooling-maps/cpu_1_2_fan_map1";
  4724. cpu_1_3_fan_trip0 = "/fragment@43/__overlay__/cpu-1-3-fan/trips/cpu_1_3_fan_trip0";
  4725. cpu_1_3_fan_trip1 = "/fragment@43/__overlay__/cpu-1-3-fan/trips/cpu_1_3_fan_trip1";
  4726. cpu_1_3_fan_0_map0 = "/fragment@43/__overlay__/cpu-1-3-fan/cooling-maps/cpu_1_3_fan_0_map0";
  4727. cpu_1_3_fan_0_map1 = "/fragment@43/__overlay__/cpu-1-3-fan/cooling-maps/cpu_1_3_fan_0_map1";
  4728. cpu_1_3_fan_1_map0 = "/fragment@43/__overlay__/cpu-1-3-fan/cooling-maps/cpu_1_3_fan_1_map0";
  4729. cpu_1_3_fan_1_map1 = "/fragment@43/__overlay__/cpu-1-3-fan/cooling-maps/cpu_1_3_fan_1_map1";
  4730. cpu_1_4_fan_trip0 = "/fragment@43/__overlay__/cpu-1-4-fan/trips/cpu_1_4_fan_trip0";
  4731. cpu_1_4_fan_trip1 = "/fragment@43/__overlay__/cpu-1-4-fan/trips/cpu_1_4_fan_trip1";
  4732. cpu_1_4_fan_0_map0 = "/fragment@43/__overlay__/cpu-1-4-fan/cooling-maps/cpu_1_4_fan_0_map0";
  4733. cpu_1_4_fan_0_map1 = "/fragment@43/__overlay__/cpu-1-4-fan/cooling-maps/cpu_1_4_fan_0_map1";
  4734. cpu_1_4_fan_1_map0 = "/fragment@43/__overlay__/cpu-1-4-fan/cooling-maps/cpu_1_4_fan_1_map0";
  4735. cpu_1_4_fan_1_map1 = "/fragment@43/__overlay__/cpu-1-4-fan/cooling-maps/cpu_1_4_fan_1_map1";
  4736. cpu_1_5_fan_trip0 = "/fragment@43/__overlay__/cpu-1-5-fan/trips/cpu_1_5_fan_trip0";
  4737. cpu_1_5_fan_trip1 = "/fragment@43/__overlay__/cpu-1-5-fan/trips/cpu_1_5_fan_trip1";
  4738. cpu_1_5_fan_0_map0 = "/fragment@43/__overlay__/cpu-1-5-fan/cooling-maps/cpu_1_5_fan_0_map0";
  4739. cpu_1_5_fan_0_map1 = "/fragment@43/__overlay__/cpu-1-5-fan/cooling-maps/cpu_1_5_fan_0_map1";
  4740. cpu_1_5_fan_1_map0 = "/fragment@43/__overlay__/cpu-1-5-fan/cooling-maps/cpu_1_5_fan_1_map0";
  4741. cpu_1_5_fan_1_map1 = "/fragment@43/__overlay__/cpu-1-5-fan/cooling-maps/cpu_1_5_fan_1_map1";
  4742. cpu_1_6_fan_trip0 = "/fragment@43/__overlay__/cpu-1-6-fan/trips/cpu_1_6_fan_trip0";
  4743. cpu_1_6_fan_trip1 = "/fragment@43/__overlay__/cpu-1-6-fan/trips/cpu_1_6_fan_trip1";
  4744. cpu_1_6_fan_0_map0 = "/fragment@43/__overlay__/cpu-1-6-fan/cooling-maps/cpu_1_6_fan_0_map0";
  4745. cpu_1_6_fan_0_map1 = "/fragment@43/__overlay__/cpu-1-6-fan/cooling-maps/cpu_1_6_fan_0_map1";
  4746. cpu_1_6_fan_1_map0 = "/fragment@43/__overlay__/cpu-1-6-fan/cooling-maps/cpu_1_6_fan_1_map0";
  4747. cpu_1_6_fan_1_map1 = "/fragment@43/__overlay__/cpu-1-6-fan/cooling-maps/cpu_1_6_fan_1_map1";
  4748. cpu_1_7_fan_trip0 = "/fragment@43/__overlay__/cpu-1-7-fan/trips/cpu_1_7_fan_trip0";
  4749. cpu_1_7_fan_trip1 = "/fragment@43/__overlay__/cpu-1-7-fan/trips/cpu_1_7_fan_trip1";
  4750. cpu_1_7_fan_0_map0 = "/fragment@43/__overlay__/cpu-1-7-fan/cooling-maps/cpu_1_7_fan_0_map0";
  4751. cpu_1_7_fan_0_map1 = "/fragment@43/__overlay__/cpu-1-7-fan/cooling-maps/cpu_1_7_fan_0_map1";
  4752. cpu_1_7_fan_1_map0 = "/fragment@43/__overlay__/cpu-1-7-fan/cooling-maps/cpu_1_7_fan_1_map0";
  4753. cpu_1_7_fan_1_map1 = "/fragment@43/__overlay__/cpu-1-7-fan/cooling-maps/cpu_1_7_fan_1_map1";
  4754. cpuss_0_fan_trip0 = "/fragment@43/__overlay__/cpuss-0-fan/trips/cpuss_0_fan_trip0";
  4755. cpuss_0_fan_trip1 = "/fragment@43/__overlay__/cpuss-0-fan/trips/cpuss_0_fan_trip1";
  4756. cpuss_0_fan_0_map0 = "/fragment@43/__overlay__/cpuss-0-fan/cooling-maps/cpuss_0_fan_0_map0";
  4757. cpuss_0_fan_0_map1 = "/fragment@43/__overlay__/cpuss-0-fan/cooling-maps/cpuss_0_fan_0_map1";
  4758. cpuss_0_fan_1_map0 = "/fragment@43/__overlay__/cpuss-0-fan/cooling-maps/cpuss_0_fan_1_map0";
  4759. cpuss_0_fan_1_map1 = "/fragment@43/__overlay__/cpuss-0-fan/cooling-maps/cpuss_0_fan_1_map1";
  4760. cpuss_1_fan_trip0 = "/fragment@43/__overlay__/cpuss-1-fan/trips/cpuss_1_fan_trip0";
  4761. cpuss_1_fan_trip1 = "/fragment@43/__overlay__/cpuss-1-fan/trips/cpuss_1_fan_trip1";
  4762. cpuss_1_fan_0_map0 = "/fragment@43/__overlay__/cpuss-1-fan/cooling-maps/cpuss_1_fan_0_map0";
  4763. cpuss_1_fan_0_map1 = "/fragment@43/__overlay__/cpuss-1-fan/cooling-maps/cpuss_1_fan_0_map1";
  4764. cpuss_1_fan_1_map0 = "/fragment@43/__overlay__/cpuss-1-fan/cooling-maps/cpuss_1_fan_1_map0";
  4765. cpuss_1_fan_1_map1 = "/fragment@43/__overlay__/cpuss-1-fan/cooling-maps/cpuss_1_fan_1_map1";
  4766. gpuss_0_fan_trip0 = "/fragment@43/__overlay__/gpuss-0-fan/trips/gpuss_0_fan_trip0";
  4767. gpuss_0_fan_trip1 = "/fragment@43/__overlay__/gpuss-0-fan/trips/gpuss_0_fan_trip1";
  4768. gpuss_0_fan_0_map0 = "/fragment@43/__overlay__/gpuss-0-fan/cooling-maps/gpuss_0_fan_0_map0";
  4769. gpuss_0_fan_0_map1 = "/fragment@43/__overlay__/gpuss-0-fan/cooling-maps/gpuss_0_fan_0_map1";
  4770. gpuss_0_fan_1_map0 = "/fragment@43/__overlay__/gpuss-0-fan/cooling-maps/gpuss_0_fan_1_map0";
  4771. gpuss_0_fan_1_map1 = "/fragment@43/__overlay__/gpuss-0-fan/cooling-maps/gpuss_0_fan_1_map1";
  4772. gpuss_1_fan_trip0 = "/fragment@43/__overlay__/gpuss-1-fan/trips/gpuss_1_fan_trip0";
  4773. gpuss_1_fan_trip1 = "/fragment@43/__overlay__/gpuss-1-fan/trips/gpuss_1_fan_trip1";
  4774. gpuss_1_fan_0_map0 = "/fragment@43/__overlay__/gpuss-1-fan/cooling-maps/gpuss_1_fan_0_map0";
  4775. gpuss_1_fan_0_map1 = "/fragment@43/__overlay__/gpuss-1-fan/cooling-maps/gpuss_1_fan_0_map1";
  4776. gpuss_1_fan_1_map0 = "/fragment@43/__overlay__/gpuss-1-fan/cooling-maps/gpuss_1_fan_1_map0";
  4777. gpuss_1_fan_1_map1 = "/fragment@43/__overlay__/gpuss-1-fan/cooling-maps/gpuss_1_fan_1_map1";
  4778. kona_mtp_batterydata = "/fragment@47/__overlay__/qcom,battery-data";
  4779. oculusnrf = "/fragment@55/__overlay__/oculusnrf@0";
  4780. syncboss_float_swd = "/fragment@56/__overlay__/syncboss_float_swd";
  4781. syncboss_wakeup = "/fragment@56/__overlay__/syncboss_wakeup";
  4782. syncboss_reset_default = "/fragment@56/__overlay__/syncboss_reset_default";
  4783. syncboss_uart_active = "/fragment@56/__overlay__/syncboss_uart_active";
  4784. syncboss_uart_sleep_tx = "/fragment@56/__overlay__/syncboss_uart_sleep_tx";
  4785. syncboss_uart_sleep_rx = "/fragment@56/__overlay__/syncboss_uart_sleep_rx";
  4786. };
  4787.  
  4788. __fixups__ {
  4789. spmi_bus = "/fragment@0:target:0\0/fragment@2:target:0\0/fragment@4:target:0\0/fragment@6:target:0\0/fragment@7:target:0\0/fragment@42:target:0";
  4790. clock_rpmh = "/fragment@0/__overlay__/qcom,pm8150@0/clock-controller@5b00:clocks:0\0/fragment@2/__overlay__/qcom,pm8150b@2/clock-controller@6000:clocks:0\0/fragment@4/__overlay__/qcom,pm8150l@4/clock-controller@5b00:clocks:0";
  4791. thermal_zones = "/fragment@1:target:0\0/fragment@3:target:0\0/fragment@5:target:0\0/fragment@16:target:0\0/fragment@35:target:0\0/fragment@43:target:0";
  4792. usb2_phy0 = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,qpnp-smb5:dpdm-supply:0";
  4793. pm8150_l2 = "/fragment@2/__overlay__/qcom,pm8150b@2/qcom,usb-pdphy@1700:vdd-pdphy-supply:0";
  4794. soc = "/fragment@8:target:0\0/fragment@12:target:0\0/fragment@20:target:0\0/fragment@33:target:0\0/fragment@39:target:0";
  4795. usb0 = "/fragment@9:target:0";
  4796. eud = "/fragment@9/__overlay__:extcon:4";
  4797. sde_dp = "/fragment@10:target:0\0/fragment@13:target:0\0/fragment@14/__overlay__:connectors:0\0/fragment@28:target:0";
  4798. tlmm = "/fragment@11:target:0\0/fragment@12/__overlay__/display_gpio_regulator@1:gpio:0\0/fragment@13/__overlay__:qcom,usbplug-cc-gpio:0\0/fragment@22/__overlay__/qcom,mdss_dsi_dual_boe_lcd_dsc_video:qcom,platform-en-gpio:0\0/fragment@22/__overlay__/qcom,mdss_dsi_dual_boe_lcd_dsc_video:qcom,platform-reset-gpio:0\0/fragment@22/__overlay__/qcom,mdss_dsi_dual_boe_lcd_dsc_video:qcom,panel-sec-reset-gpio:0\0/fragment@23/__overlay__/qcom,mdss_dsi_dual_boe_lcd_video:qcom,platform-en-gpio:0\0/fragment@23/__overlay__/qcom,mdss_dsi_dual_boe_lcd_video:qcom,platform-reset-gpio:0\0/fragment@23/__overlay__/qcom,mdss_dsi_dual_boe_lcd_video:qcom,panel-sec-reset-gpio:0\0/fragment@24/__overlay__/qcom,mdss_dsi_dual_boe_spi_blu_dsc_video:qcom,platform-en-gpio:0\0/fragment@24/__overlay__/qcom,mdss_dsi_dual_boe_spi_blu_dsc_video:qcom,platform-reset-gpio:0\0/fragment@24/__overlay__/qcom,mdss_dsi_dual_boe_spi_blu_dsc_video:qcom,panel-sec-reset-gpio:0\0/fragment@28/__overlay__:qcom,uart-mux-en-gpio:0\0/fragment@29/__overlay__/qcom,mdss_dsi_dual_nt57950_uoled_dsc_video:qcom,platform-en-gpio:0\0/fragment@29/__overlay__/qcom,mdss_dsi_dual_nt57950_uoled_dsc_video:qcom,platform-reset-gpio:0\0/fragment@29/__overlay__/qcom,mdss_dsi_dual_nt57950_uoled_dsc_video:qcom,panel-sec-reset-gpio:0\0/fragment@33/__overlay__/blu_gpio_regulator@1:gpio:0\0/fragment@34:target:0\0/fragment@36:target:0\0/fragment@40/__overlay__/bt_driver:brcm,bt-reset-gpio:0\0/fragment@40/__overlay__/bt_bluesleep:brcm,bt-wake-gpio:0\0/fragment@40/__overlay__/bt_bluesleep:brcm,bt-host-wake-gpio:0\0/fragment@40/__overlay__/bcmdhd_wlan:wlan-en-gpio:0\0/fragment@40/__overlay__/bcmdhd_wlan:wlan-host-wake-gpio:0\0/fragment@41:target:0\0/fragment@42/__overlay__/qcom,pm8150l@5/pwm-tach-fan@0:fan,tach-gpio:0\0/fragment@42/__overlay__/qcom,pm8150l@5/pwm-tach-fan@0:interrupt-parent:0\0/fragment@42/__overlay__/qcom,pm8150l@5/pwm-tach-fan@1:fan,tach-gpio:0\0/fragment@42/__overlay__/qcom,pm8150l@5/pwm-tach-fan@1:interrupt-parent:0\0/fragment@44/__overlay__:cd-gpios:0\0/fragment@55/__overlay__/oculusnrf@0:oculus,syncboss-reset:0\0/fragment@55/__overlay__/oculusnrf@0:oculus,syncboss-timesync:0\0/fragment@55/__overlay__/oculusnrf@0:oculus,syncboss-wakeup:0\0/fragment@55/__overlay__/oculusnrf@0/swd@0:oculus,swd-clk:0\0/fragment@55/__overlay__/oculusnrf@0/swd@0:oculus,swd-io:0\0/fragment@56:target:0";
  4799. mdss_dsi0 = "/fragment@12/__overlay__/qcom,dsi-display-primary:qcom,dsi-ctrl:0\0/fragment@12/__overlay__/qcom,dsi-display-secondary:qcom,dsi-ctrl:0";
  4800. mdss_dsi1 = "/fragment@12/__overlay__/qcom,dsi-display-primary:qcom,dsi-ctrl:4\0/fragment@12/__overlay__/qcom,dsi-display-secondary:qcom,dsi-ctrl:4";
  4801. mdss_dsi_phy0 = "/fragment@12/__overlay__/qcom,dsi-display-primary:qcom,dsi-phy:0\0/fragment@12/__overlay__/qcom,dsi-display-secondary:qcom,dsi-phy:0";
  4802. mdss_dsi_phy1 = "/fragment@12/__overlay__/qcom,dsi-display-primary:qcom,dsi-phy:4\0/fragment@12/__overlay__/qcom,dsi-display-secondary:qcom,dsi-phy:4";
  4803. mdss_dsi0_pll = "/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:0\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:8\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:16\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:24\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:32\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:40\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:48\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:56\0/fragment@12/__overlay__/qcom,dsi-display-secondary:clocks:0\0/fragment@12/__overlay__/qcom,dsi-display-secondary:clocks:8\0/fragment@12/__overlay__/qcom,dsi-display-secondary:clocks:16\0/fragment@12/__overlay__/qcom,dsi-display-secondary:clocks:24";
  4804. mdss_dsi1_pll = "/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:64\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:72\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:80\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:88\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:96\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:104\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:112\0/fragment@12/__overlay__/qcom,dsi-display-primary:clocks:120\0/fragment@12/__overlay__/qcom,dsi-display-secondary:clocks:32\0/fragment@12/__overlay__/qcom,dsi-display-secondary:clocks:40\0/fragment@12/__overlay__/qcom,dsi-display-secondary:clocks:48\0/fragment@12/__overlay__/qcom,dsi-display-secondary:clocks:56";
  4805. pm8150_l14 = "/fragment@12/__overlay__/qcom,dsi-display-primary:vddio-supply:0\0/fragment@12/__overlay__/qcom,dsi-display-secondary:vddio-supply:0\0/fragment@26:target:0";
  4806. pm8150a_l11 = "/fragment@12/__overlay__/qcom,dsi-display-primary:vdd-supply:0\0/fragment@12/__overlay__/qcom,dsi-display-primary:blu-mcu-supply:0\0/fragment@12/__overlay__/qcom,dsi-display-secondary:vdd-supply:0\0/fragment@25:target:0\0/fragment@32:target:0";
  4807. mdss_mdp = "/fragment@12/__overlay__/qcom,dsi-display-primary:qcom,mdp:0\0/fragment@12/__overlay__/qcom,dsi-display-secondary:qcom,mdp:0\0/fragment@14:target:0\0/fragment@15:target:0\0/fragment@22:target:0\0/fragment@23:target:0\0/fragment@24:target:0\0/fragment@27:target:0\0/fragment@29:target:0";
  4808. fsa4480 = "/fragment@13/__overlay__:qcom,dp-aux-switch:0";
  4809. sde_dp_usbplug_cc_active = "/fragment@13/__overlay__:pinctrl-0:0";
  4810. sde_dp_usbplug_cc_suspend = "/fragment@13/__overlay__:pinctrl-1:0";
  4811. sde_rscc = "/fragment@14/__overlay__:connectors:16\0/fragment@27/__overlay__:connectors:12";
  4812. cpu4_isolate = "/fragment@16/__overlay__/soc/cooling-maps/soc_cpu4:cooling-device:0\0/fragment@16/__overlay__/pm8150b-bcl-lvl0/cooling-maps/vbat_cpu4:cooling-device:0\0/fragment@16/__overlay__/pm8150l-bcl-lvl0/cooling-maps/vph_cpu4:cooling-device:0";
  4813. cpu5_isolate = "/fragment@16/__overlay__/soc/cooling-maps/soc_cpu5:cooling-device:0\0/fragment@16/__overlay__/pm8150b-bcl-lvl0/cooling-maps/vbat_cpu5:cooling-device:0\0/fragment@16/__overlay__/pm8150l-bcl-lvl0/cooling-maps/vph_cpu5:cooling-device:0";
  4814. cpu6_isolate = "/fragment@16/__overlay__/soc/cooling-maps/soc_cpu6:cooling-device:0\0/fragment@16/__overlay__/pm8150b-bcl-lvl1/cooling-maps/vbat_cpu6:cooling-device:0\0/fragment@16/__overlay__/pm8150l-bcl-lvl1/cooling-maps/vph_cpu6:cooling-device:0";
  4815. cpu7_isolate = "/fragment@16/__overlay__/soc/cooling-maps/soc_cpu7:cooling-device:0\0/fragment@16/__overlay__/pm8150b-bcl-lvl1/cooling-maps/vbat_cpu7:cooling-device:0\0/fragment@16/__overlay__/pm8150l-bcl-lvl1/cooling-maps/vph_cpu7:cooling-device:0";
  4816. msm_gpu = "/fragment@16/__overlay__/pm8150b-bcl-lvl0/cooling-maps/vbat_gpu0:cooling-device:0\0/fragment@16/__overlay__/pm8150b-bcl-lvl1/cooling-maps/vbat_gpu1:cooling-device:0\0/fragment@16/__overlay__/pm8150b-bcl-lvl2/cooling-maps/vbat_gpu2:cooling-device:0\0/fragment@16/__overlay__/pm8150l-bcl-lvl0/cooling-maps/vph_gpu0:cooling-device:0\0/fragment@16/__overlay__/pm8150l-bcl-lvl1/cooling-maps/vph_gpu1:cooling-device:0\0/fragment@16/__overlay__/pm8150l-bcl-lvl2/cooling-maps/vph_gpu2:cooling-device:0";
  4817. qcom_seecom = "/fragment@17:target:0";
  4818. removed_mem = "/fragment@18:target:0";
  4819. reserved_memory = "/fragment@19:target:0";
  4820. wlan = "/fragment@21:target:0";
  4821. pm8150_l16 = "/fragment@30:target:0";
  4822. pm8150_s5 = "/fragment@31:target:0";
  4823. pcie0 = "/fragment@37:target:0";
  4824. pcie0_clkreq_default = "/fragment@37/__overlay__:pinctrl-0:0";
  4825. pcie0_perst_default = "/fragment@37/__overlay__:pinctrl-0:4\0/fragment@37/__overlay__:pinctrl-1:4";
  4826. pcie0_clkreq_sleep = "/fragment@37/__overlay__:pinctrl-1:0";
  4827. qupv3_se0_spi = "/fragment@38:target:0";
  4828. vendor = "/fragment@40:target:0\0/fragment@47:target:0";
  4829. tsens0 = "/fragment@43/__overlay__/cpu-0-0-fan:thermal-sensors:0\0/fragment@43/__overlay__/cpu-0-1-fan:thermal-sensors:0\0/fragment@43/__overlay__/cpu-0-2-fan:thermal-sensors:0\0/fragment@43/__overlay__/cpu-0-3-fan:thermal-sensors:0\0/fragment@43/__overlay__/cpu-1-0-fan:thermal-sensors:0\0/fragment@43/__overlay__/cpu-1-1-fan:thermal-sensors:0\0/fragment@43/__overlay__/cpu-1-2-fan:thermal-sensors:0\0/fragment@43/__overlay__/cpu-1-3-fan:thermal-sensors:0\0/fragment@43/__overlay__/cpu-1-4-fan:thermal-sensors:0\0/fragment@43/__overlay__/cpu-1-5-fan:thermal-sensors:0\0/fragment@43/__overlay__/cpu-1-6-fan:thermal-sensors:0\0/fragment@43/__overlay__/cpu-1-7-fan:thermal-sensors:0\0/fragment@43/__overlay__/cpuss-0-fan:thermal-sensors:0\0/fragment@43/__overlay__/cpuss-1-fan:thermal-sensors:0\0/fragment@43/__overlay__/gpuss-0-fan:thermal-sensors:0";
  4830. tsens1 = "/fragment@43/__overlay__/gpuss-1-fan:thermal-sensors:0";
  4831. sdhc_2 = "/fragment@44:target:0";
  4832. pm8150a_l9 = "/fragment@44/__overlay__:vdd-supply:0";
  4833. pm8150a_l6 = "/fragment@44/__overlay__:vdd-io-supply:0";
  4834. sdc2_clk_on = "/fragment@44/__overlay__:pinctrl-0:0";
  4835. sdc2_cmd_on = "/fragment@44/__overlay__:pinctrl-0:4";
  4836. sdc2_data_on = "/fragment@44/__overlay__:pinctrl-0:8";
  4837. storage_cd = "/fragment@44/__overlay__:pinctrl-0:12\0/fragment@44/__overlay__:pinctrl-1:12";
  4838. sdc2_clk_off = "/fragment@44/__overlay__:pinctrl-1:0";
  4839. sdc2_cmd_off = "/fragment@44/__overlay__:pinctrl-1:4";
  4840. sdc2_data_off = "/fragment@44/__overlay__:pinctrl-1:8";
  4841. ufshc_mem = "/fragment@45:target:0";
  4842. ufs_phy_gdsc = "/fragment@45/__overlay__:vdd-hba-supply:0";
  4843. pm8150_l17 = "/fragment@45/__overlay__:vcc-supply:0";
  4844. pm8150_l6 = "/fragment@45/__overlay__:vccq-supply:0\0/fragment@45/__overlay__:qcom,vddp-ref-clk-supply:0";
  4845. pm8150_s4 = "/fragment@45/__overlay__:vccq2-supply:0";
  4846. ufsphy_mem = "/fragment@46:target:0";
  4847. pm8150_l5 = "/fragment@46/__overlay__:vdda-phy-supply:0";
  4848. pm8150_l9 = "/fragment@46/__overlay__:vdda-pll-supply:0";
  4849. pm8150a_l7 = "/fragment@48:target:0";
  4850. pm8150a_l8 = "/fragment@49:target:0";
  4851. qupv3_se9_i2c = "/fragment@50:target:0";
  4852. qupv3_se12_2uart = "/fragment@51:target:0";
  4853. qupv3_se13_spi = "/fragment@52:target:0";
  4854. qupv3_se14_spi = "/fragment@53:target:0";
  4855. qupv3_se17_4uart = "/fragment@54:target:0";
  4856. qupv3_se19_spi = "/fragment@55:target:0";
  4857. };
  4858.  
  4859. __local_fixups__ {
  4860.  
  4861. fragment@0 {
  4862.  
  4863. __overlay__ {
  4864.  
  4865. qcom,pm8150@0 {
  4866.  
  4867. qcom,temp-alarm@2400 {
  4868. io-channels = <0x00>;
  4869. };
  4870.  
  4871. adc_tm@3500 {
  4872. io-channels = <0x00 0x08 0x10 0x18>;
  4873. pinctrl-0 = <0x00>;
  4874. };
  4875. };
  4876. };
  4877. };
  4878.  
  4879. fragment@1 {
  4880.  
  4881. __overlay__ {
  4882.  
  4883. pm8150_tz {
  4884. thermal-sensors = <0x00>;
  4885. };
  4886. };
  4887. };
  4888.  
  4889. fragment@2 {
  4890.  
  4891. __overlay__ {
  4892.  
  4893. qcom,pm8150b@2 {
  4894.  
  4895. qcom,temp-alarm@2400 {
  4896. io-channels = <0x00>;
  4897. };
  4898.  
  4899. qcom,sdam-qnovo@b000 {
  4900. pinctrl-0 = <0x00>;
  4901. pinctrl-1 = <0x00>;
  4902. };
  4903.  
  4904. qcom,qpnp-smb5 {
  4905. qcom,pmic-revid = <0x00>;
  4906. io-channels = <0x00 0x08 0x10 0x18 0x20 0x28 0x30>;
  4907. qcom,battery-data = <0x00>;
  4908. };
  4909.  
  4910. qcom,usb-pdphy@1700 {
  4911. vbus-supply = <0x00>;
  4912. vconn-supply = <0x00>;
  4913. };
  4914.  
  4915. qpnp,fg {
  4916. qcom,pmic-revid = <0x00>;
  4917. qcom,pmic-pbs = <0x00>;
  4918. nvmem = <0x00>;
  4919. qcom,battery-data = <0x00>;
  4920. };
  4921.  
  4922. adc_tm@3500 {
  4923. qcom,pmic-revid = <0x00>;
  4924. io-channels = <0x00 0x08 0x10 0x18>;
  4925. pinctrl-0 = <0x00>;
  4926. };
  4927. };
  4928.  
  4929. qcom,pm8150b@3 {
  4930.  
  4931. qcom,leds@d000 {
  4932. nvmem = <0x00>;
  4933.  
  4934. hr_led1 {
  4935. pwms = <0x00>;
  4936. };
  4937.  
  4938. hr_led2 {
  4939. pwms = <0x00>;
  4940. };
  4941. };
  4942. };
  4943. };
  4944. };
  4945.  
  4946. fragment@3 {
  4947.  
  4948. __overlay__ {
  4949.  
  4950. pm8150b_tz {
  4951. thermal-sensors = <0x00>;
  4952. };
  4953.  
  4954. pm8150b-ibat-lvl0 {
  4955. thermal-sensors = <0x00>;
  4956. };
  4957.  
  4958. pm8150b-ibat-lvl1 {
  4959. thermal-sensors = <0x00>;
  4960. };
  4961.  
  4962. pm8150b-vbat-lvl0 {
  4963. thermal-sensors = <0x00>;
  4964. };
  4965.  
  4966. pm8150b-vbat-lvl1 {
  4967. thermal-sensors = <0x00>;
  4968. };
  4969.  
  4970. pm8150b-vbat-lvl2 {
  4971. thermal-sensors = <0x00>;
  4972. };
  4973.  
  4974. pm8150b-bcl-lvl0 {
  4975. thermal-sensors = <0x00>;
  4976. };
  4977.  
  4978. pm8150b-bcl-lvl1 {
  4979. thermal-sensors = <0x00>;
  4980. };
  4981.  
  4982. pm8150b-bcl-lvl2 {
  4983. thermal-sensors = <0x00>;
  4984. };
  4985.  
  4986. soc {
  4987. thermal-sensors = <0x00>;
  4988. };
  4989. };
  4990. };
  4991.  
  4992. fragment@4 {
  4993.  
  4994. __overlay__ {
  4995.  
  4996. qcom,pm8150l@4 {
  4997.  
  4998. qcom,temp-alarm@2400 {
  4999. io-channels = <0x00>;
  5000. };
  5001.  
  5002. adc_tm@3500 {
  5003. io-channels = <0x00 0x08 0x10 0x18>;
  5004. pinctrl-0 = <0x00>;
  5005. };
  5006. };
  5007.  
  5008. qcom,pm8150l@5 {
  5009.  
  5010. qcom,lcdb@ec00 {
  5011. qcom,pmic-revid = <0x00>;
  5012. };
  5013.  
  5014. qcom,leds@d300 {
  5015. qcom,pmic-revid = <0x00>;
  5016. };
  5017.  
  5018. qcom,wled@d800 {
  5019. qcom,pmic-revid = <0x00>;
  5020. };
  5021.  
  5022. qcom,leds@d000 {
  5023.  
  5024. red {
  5025. pwms = <0x00>;
  5026. };
  5027.  
  5028. green {
  5029. pwms = <0x00>;
  5030. };
  5031.  
  5032. blue {
  5033. pwms = <0x00>;
  5034. };
  5035. };
  5036. };
  5037. };
  5038. };
  5039.  
  5040. fragment@5 {
  5041.  
  5042. __overlay__ {
  5043.  
  5044. pm8150l_tz {
  5045. thermal-sensors = <0x00>;
  5046. };
  5047.  
  5048. pm8150l-vph-lvl0 {
  5049. thermal-sensors = <0x00>;
  5050. };
  5051.  
  5052. pm8150l-vph-lvl1 {
  5053. thermal-sensors = <0x00>;
  5054. };
  5055.  
  5056. pm8150l-vph-lvl2 {
  5057. thermal-sensors = <0x00>;
  5058. };
  5059.  
  5060. pm8150l-bcl-lvl0 {
  5061. thermal-sensors = <0x00>;
  5062. };
  5063.  
  5064. pm8150l-bcl-lvl1 {
  5065. thermal-sensors = <0x00>;
  5066. };
  5067.  
  5068. pm8150l-bcl-lvl2 {
  5069. thermal-sensors = <0x00>;
  5070. };
  5071. };
  5072. };
  5073.  
  5074. fragment@8 {
  5075.  
  5076. __overlay__ {
  5077.  
  5078. regulator-dbb1 {
  5079. gpio = <0x00>;
  5080. };
  5081.  
  5082. regulator-haptics-boost {
  5083. gpio = <0x00>;
  5084. pinctrl-0 = <0x00>;
  5085. };
  5086. };
  5087. };
  5088.  
  5089. fragment@9 {
  5090.  
  5091. __overlay__ {
  5092. extcon = <0x00>;
  5093. };
  5094. };
  5095.  
  5096. fragment@10 {
  5097.  
  5098. __overlay__ {
  5099. extcon = <0x00>;
  5100. };
  5101. };
  5102.  
  5103. fragment@12 {
  5104.  
  5105. __overlay__ {
  5106.  
  5107. display_gpio_regulator@1 {
  5108. pinctrl-0 = <0x00>;
  5109. };
  5110.  
  5111. qcom,dsi-display-primary {
  5112. pinctrl-0 = <0x00>;
  5113. pinctrl-1 = <0x00>;
  5114. lab-supply = <0x00>;
  5115. ibb-supply = <0x00>;
  5116. qcom,dsi-default-panel = <0x00>;
  5117. blu-en-supply = <0x00>;
  5118. };
  5119. };
  5120. };
  5121.  
  5122. fragment@13 {
  5123.  
  5124. __overlay__ {
  5125. qcom,dp-usbpd-detection = <0x00>;
  5126. qcom,ext-disp = <0x00>;
  5127. };
  5128. };
  5129.  
  5130. fragment@14 {
  5131.  
  5132. __overlay__ {
  5133. connectors = <0x04 0x08 0x0c>;
  5134. };
  5135. };
  5136.  
  5137. fragment@16 {
  5138.  
  5139. __overlay__ {
  5140.  
  5141. soc {
  5142.  
  5143. cooling-maps {
  5144.  
  5145. soc_cpu4 {
  5146. trip = <0x00>;
  5147. };
  5148.  
  5149. soc_cpu5 {
  5150. trip = <0x00>;
  5151. };
  5152.  
  5153. soc_cpu6 {
  5154. trip = <0x00>;
  5155. };
  5156.  
  5157. soc_cpu7 {
  5158. trip = <0x00>;
  5159. };
  5160. };
  5161. };
  5162.  
  5163. pm8150b-bcl-lvl0 {
  5164.  
  5165. cooling-maps {
  5166.  
  5167. vbat_cpu4 {
  5168. trip = <0x00>;
  5169. };
  5170.  
  5171. vbat_cpu5 {
  5172. trip = <0x00>;
  5173. };
  5174.  
  5175. vbat_gpu0 {
  5176. trip = <0x00>;
  5177. };
  5178. };
  5179. };
  5180.  
  5181. pm8150b-bcl-lvl1 {
  5182.  
  5183. cooling-maps {
  5184.  
  5185. vbat_cpu6 {
  5186. trip = <0x00>;
  5187. };
  5188.  
  5189. vbat_cpu7 {
  5190. trip = <0x00>;
  5191. };
  5192.  
  5193. vbat_gpu1 {
  5194. trip = <0x00>;
  5195. };
  5196. };
  5197. };
  5198.  
  5199. pm8150b-bcl-lvl2 {
  5200.  
  5201. cooling-maps {
  5202.  
  5203. vbat_gpu2 {
  5204. trip = <0x00>;
  5205. };
  5206. };
  5207. };
  5208.  
  5209. pm8150l-bcl-lvl0 {
  5210.  
  5211. cooling-maps {
  5212.  
  5213. vph_cpu4 {
  5214. trip = <0x00>;
  5215. };
  5216.  
  5217. vph_cpu5 {
  5218. trip = <0x00>;
  5219. };
  5220.  
  5221. vph_gpu0 {
  5222. trip = <0x00>;
  5223. };
  5224. };
  5225. };
  5226.  
  5227. pm8150l-bcl-lvl1 {
  5228.  
  5229. cooling-maps {
  5230.  
  5231. vph_cpu6 {
  5232. trip = <0x00>;
  5233. };
  5234.  
  5235. vph_cpu7 {
  5236. trip = <0x00>;
  5237. };
  5238.  
  5239. vph_gpu1 {
  5240. trip = <0x00>;
  5241. };
  5242. };
  5243. };
  5244.  
  5245. pm8150l-bcl-lvl2 {
  5246.  
  5247. cooling-maps {
  5248.  
  5249. vph_gpu2 {
  5250. trip = <0x00>;
  5251. };
  5252. };
  5253. };
  5254. };
  5255. };
  5256.  
  5257. fragment@20 {
  5258.  
  5259. __overlay__ {
  5260.  
  5261. gpio_keys {
  5262. pinctrl-0 = <0x00>;
  5263.  
  5264. vol_up {
  5265. gpios = <0x00>;
  5266. };
  5267. };
  5268. };
  5269. };
  5270.  
  5271. fragment@22 {
  5272.  
  5273. __overlay__ {
  5274.  
  5275. qcom,mdss_dsi_dual_boe_lcd_dsc_video {
  5276. qcom,panel-supply-entries = <0x00>;
  5277. };
  5278. };
  5279. };
  5280.  
  5281. fragment@23 {
  5282.  
  5283. __overlay__ {
  5284.  
  5285. qcom,mdss_dsi_dual_boe_lcd_video {
  5286. qcom,panel-supply-entries = <0x00>;
  5287. };
  5288. };
  5289. };
  5290.  
  5291. fragment@24 {
  5292.  
  5293. __overlay__ {
  5294.  
  5295. qcom,mdss_dsi_dual_boe_spi_blu_dsc_video {
  5296. qcom,panel-supply-entries = <0x00>;
  5297. };
  5298. };
  5299. };
  5300.  
  5301. fragment@27 {
  5302.  
  5303. __overlay__ {
  5304. connectors = <0x00 0x04 0x08>;
  5305. };
  5306. };
  5307.  
  5308. fragment@29 {
  5309.  
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  5553. cpu_1_0_fan_0_map1 {
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  5558. cpu_1_0_fan_1_map0 {
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  5574. cpu_1_1_fan_0_map0 {
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  5579. cpu_1_1_fan_0_map1 {
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  5584. cpu_1_1_fan_1_map0 {
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  5589. cpu_1_1_fan_map1 {
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  5600. cpu_1_2_fan_0_map0 {
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  5605. cpu_1_2_fan_0_map1 {
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  5610. cpu_1_2_fan_1_map0 {
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  5714. cpu_1_6_fan_1_map0 {
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  5728. cooling-maps {
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  5745. cpu_1_7_fan_1_map1 {
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  5761. cpuss_0_fan_0_map1 {
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  5832. cooling-maps {
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