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- module mux #(parameter m = 4, w = 2) (
- input [m-1:0][w-1:0] x,
- input [$clog2(m)-1:0] s,
- output reg [w-1:0] y
- );
- always @(x, s)
- begin
- y = x[s];
- end
- endmodule
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