Instruction Set

32-bit instruction set for the SHA-PU

== Registers ==
PC = Program Counter (not addressable)
GP0 - GP7 = General Purpose

== Instruction Breakdown ==
<opcode : 8 bits> <dst register : 4 bits> <srcA register : 4 bits> <srcB register : 4 bits> <padding : 12 bits>

GP0 - GP7 = 0000 - 0111

== Instructions ==
	== Data Transfer and Jumping ==
	MOVE <dst> <src> = Move a value from <src> reg to <dst> ref
	MOVE <dst> <value> = Move a value into <dst> reg, <value> is the final 16 bits within the instruction
	LOAD <dst> <addr> = Load a value from ram at <addr> into <dst> reg, <addr> is the final 16 bits within the instruction
	LOAD <dst> <src> = Load a value from ram at the address in <src> reg
	STORE <srcA> <addr> = Store the value in <srcA> reg in ram at <addr>, <addr> is the final 16 bits within the instruction
	STORE <dst> <src> = Store the value in <dst> reg in ram at the address in <src> reg
	JMP <addr> = Sets the PC to <addr>, <addr> is the final 16 bits within the instruction
	JMP <srcA> = Sets the PC to the value in <srcA> reg
	JMPC <src> <addr> = Sets the PC to <addr> if the value in <src> is > 0, <addr> is the final 16 bits within the instruction
	JMPC <srcA> <srcB> = Sets the PC to the value in <srcB> if the value in <src> is > 0, <addr> is the final 16 bits within the instruction
	NOOP = Does nothing

	== Arithmetic and Logic ==
	ADD <dst> <srcA> <srcB> = Adds <srcA> to <srcB> and stores in <dst>
	SUB <dst> <srcA> <srcB> = Subtracts <srcB> from <srcA> and stores in <dst>
	MUL <dst> <srcA> <srcB> = Multiplies <srcA> with <srcB> and stores in <dst>

	AND <dst> <srcA> <srcB> = Performs logical AND with <srcA> and <srcB> and stores in <dst>
	OR <dst> <srcA> <srcB> = Performs logical OR with <srcA> and <srcB> and stores in <dst>
	XOR <dst> <srcA> <srcB> = Performs logical XOR with <srcA> and <srcB> and stores in <dst>
	NOT <dst> <srcA> = Performs logical NOT with <srcA> and stores in <dst>

	RSHIFT <dst> <srcA> <srcB> =

	== Comparisons ==
	EQL <dst> <srcA> <srcB> = If <srcA> == <srcB>, fills <dst> with 1 - else fills with 0
	LESS <dst> <srcA> <srcB> = If <srcA> < <srcB>, fills <dst> with 1 - else fills with 0
	MORE <dst> <srcA> <srcB> = If <srcA> > <srcB>, fills <dst> with 1 - else fills with 0
	LEQL <dst> <srcA> <srcB> = If <srcA> <= <srcB>, fills <dst> with 1 - else fills with 0
	MEQL <dst> <srcA> <srcB> = If <srcA> >= <srcB>, fills <dst> with 1 - else fills with 0
	NEQL <dst> <srcA> <srcB> = If <srcA> != <srcB>, fills <dst> with 1 - else fills with 0

== Opcode Breakdown ==

8 bits
[usealu : 1 bit]
	if usealu is 1:
		[alutype : 6 bit]
		sourcedata = 110/6
		destdata = 00/0
	if usealu is 0:
		[sourcedata : 3 bit] [destdata : 2 bit] [padding : 1 bit]
		alutype = 0
[conditional : 1 bit]

alutype = what operation for the ALU to perform
	00 0000/0x00 = add
	00 0001/0x01 = sub
	00 0010/0x02 = mul

	00 1000/0x08 = rshift
	00 1001/0x09 = lshift
	00 1010/0x0A = rrot
	00 1011/0x0B = lrot

	01 0000/0x14 = and
	01 0001/0x15 = or
	01 0010/0x16 = xor
	01 0011/0x17 = not

	01 1000/0x18 = equal
	01 1001/0x19 = not equal
	01 1010/0x20 = lessthan
	01 1011/0x21 = morethan
	01 1100/0x22 = lessthan or equal
	01 1101/0x23 = morethan or equal

sourcedata = where the data is coming from
	000/0 = value of <srcA> register
	001/1 = value of <srcB> register
	010/2 = value of <dst> register
	011/3 = in-instruction-data (last 16 bits)

	100/4 = ram lookup (value of <srcA> register is address)
	101/5 = ram lookup (last 16 bits is address)

	110/6 = output of ALU

	111/7 = instruction is nop

destdata = where the data is going to
	00/0 = <dst> register
	01/1 = ram (last 16 bits is address)
	10/2 = ram (value of <srcA> register is address)
	11/3 = program counter

conditional = whether or not the instruction has a condition
	0 = instruction will always execute
	1 = instruction will execute if value in <srcB> exceeds 0

== Instruction Opcodes ==
	== Data Transfer and Jumping ==
	MOVE <dst> <src> = 0 000 00 /00 = 0x00
	MOVE <dst> <value> = 0 011 00 /00 = 0x30
	LOAD <dst> <addr> = 0 101 00 /00 = 0x50
	LOAD <dst> <src> = 0 100 00 /00 = 0x40
	STORE <dst> <addr> = 0 010 01 /00 = 0x24
	STORE <dst> <src> = 0 010 10 /00 = 0x28
	JMP <addr> = 0 011 11 /00 = 0x3C
	JMP <dst> = 0 000 11 /00 = 0x0B
	NOOP = 0 111 00 /00 = 0x70

	== Arithmetic and Logic ==
	ADD <dst> <srcA> <srcB> = 1 00 0000 /0 = 0x80
	SUB <dst> <srcA> <srcB> = 1 00 0001 /0 = 0x82
	MUL <dst> <srcA> <srcB> = 1 00 0010 /0 = 0x84

	AND <dst> <srcA> <srcB> = 1 01 0000 /0 = 0x90
	OR <dst> <srcA> <srcB> = 1 01 0001 /0 = 0x92
	XOR <dst> <srcA> <srcB> = 1 01 0010 /0 = 0x94
	NOT <dst> <srcA> = 1 01 0011 /0 = 0x96

	== Comparisons ==
	EQL <dst> <srcA> <srcB> 1 01 1000 /0 = 0xB0
	NEQL <dst> <srcA> <srcB> = 1 01 1001 /0 = 0xB2
	LESS <dst> <srcA> <srcB> = 1 01 1010 /0 = 0xB4
	MORE <dst> <srcA> <srcB> = 1 01 1011 /0 = 0xB6
	LEQL <dst> <srcA> <srcB> = 1 01 1100 /0 = 0xB8
	MEQL <dst> <srcA> <srcB> = 1 01 1100 /0 = 0xBA


== Test Program ==

MOVE gp0 0x0002
MOVE gp1 0x0006 CND GP0

0x30000002
0x31100006