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bambangSud

IR remote control receiver

bambangSud
Nov 21st, 2013
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  1. ;***************************************************************************
  2. ;* Description: ir remote control *mp3 kit
  3. ;*
  4. ;*
  5. ;* Writed at: 4nov13
  6. ;* Target: ATtiny2313
  7. ;* Author: bambangSud/kudaka
  8. ;* Support E-mail: [email protected], [email protected]
  9. ;* Home page:
  10. ;*
  11. ;* LCD rs pin connected to PD6
  12. ;* LCD r/w pin connected to PD5
  13. ;* LCD e pin connected to PD4
  14. ;* D4-D7 FROM LCD IS CONNECTED TO PORTD PD0-PD3
  15. ;* The 4x4 keypad is conected to PortB pins (PB0-PB7)
  16. ;* PB0,PB1,PB2,PB3 inputs, PB4,PB5,PB6,PB7 outputs
  17. ;* countdown timer with lcd ok 20-09-05
  18. ;* 24-09-05 > soal lcd paham banget
  19. ;* lm35 > AVR 17-12-05
  20. ;* 14 Januari 2006 OK (sore)
  21. ;* 4 jan 2011 lanjut
  22. ;* 15jan201 3pin OK
  23. ;***************************************************************************
  24.  
  25. .include "tn2313def.inc" ;Define chip particulars
  26.  
  27. ;***** Other equates
  28. .equ ignit =PB0
  29. .equ LED =PB1
  30. .equ Sign =PB2
  31. .equ horn =PB3
  32.  
  33. .equ data_ =PD0
  34. .equ enter_ =PD1
  35. .equ door_ =PD2
  36. .equ break_ =PD3
  37. .equ tran_ =PD4
  38. .equ lat_in =PD5
  39. .equ lat_out =PD6
  40. .equ nPin =3
  41. ;***** Registers used by timer overflow interrupt service routine
  42.  
  43. ;***** Global register variables
  44. .def nsiren =r1
  45. .def pin0 =r2
  46. .def pin1 =r3
  47. .def pin2 =r4
  48. .def pin3 =r5
  49. .def dpos =r6
  50. .def lstat =r7 // lock status
  51.  
  52. .def second =r9
  53. .def minute =r10
  54. .def hour =r11
  55.  
  56. .def timer =r14 ;scratch space for timer loading
  57. .def status =r15 ;low register to preserve status register
  58. //=========
  59. .def wreg =R16 ;General use working register
  60. .def timeout =R17 ;Timeout value passed to subroutine
  61. .def lcdstat =R18 ;LCD busy/wait status
  62. .def longtime=R19 ;Long timer for powerup
  63. .def temp =r20 ;general scratch space
  64. .def test =R21 ;test register
  65. .def monades =R22
  66. .def EEaddr =R23
  67.  
  68. .def tock =r24 ;5 ms pulse
  69. .def sec_tmr =r25 ;storage for RTC second count
  70.  
  71. //xyz reg
  72. ;.def minute =r26 ;storage for RTC minute count
  73. ;.def hour =r27 ;storage for RTC hour count
  74.  
  75.  
  76. ;******************************************************************
  77. ;* macro
  78. .macro buzz_on
  79. sbi ddrc,buzz
  80. sbi PORTC,buzz
  81. .endmacro
  82.  
  83. .macro loadram
  84. ldi XH,high(@0)
  85. ldi XH,low(@0)
  86. ld temp,x
  87. .endmacro
  88.  
  89. .macro stram
  90. ldi YH,high(@0)
  91. ldi YH,low(@0)
  92. st z,temp
  93. .endmacro
  94.  
  95. ;********* Data Segment RAM ***************************************
  96. .dseg
  97. .org $60
  98. ram_: .db 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
  99.  
  100.  
  101. tock1: .db 0 ;ram for timer
  102. ;*****Look up table for decoding **********************************
  103. .eseg ;EEPROM segment
  104. .org 0
  105.  
  106. table1: .db 0x00,0xf9,0xa4,0xb0,0x99,0x92,0x82,0xf8,0x80,0x90
  107. timer_table: .db 0x03,0x00,0x00 ;for store preset timer hh:mm:ss
  108. user_pin1: .db 1,1,1,12
  109. user_pin2: .db 2,2,2,12
  110. master_pin: .db 3,3,3,12
  111. pin_status: .db 0
  112. lock_stat: .db 0
  113. ;****Source code***************************************************
  114. .cseg ;CODE segment bootSector
  115. .org 0
  116. rjmp RESET ; Reset Handler
  117. nop; rjmp EXT_INT0 ; IRQ0 Handler
  118. nop; rjmp EXT_INT1 ; IRQ1 Handler
  119. nop ; Timer1 Capture Handler
  120. nop ; Timer1 Compare Handler
  121. rjmp TIM_OVF1 ; Timer1 Overflow Handler
  122. rjmp TIM_OVF0 ; Timer0 Overflow Handler
  123. nop ; UART RX Complete Handler
  124. nop ; UDR Empty Handler
  125. nop ; UART TX Complete Handler
  126. nop ; Analog Comparator Handler
  127.  
  128. ;.include "lib.txt"
  129. ;***************************************************************************
  130.  
  131. ; Main program entry point on reset
  132.  
  133. reset:
  134. //4 2313
  135. ldi temp,RAMEND
  136. out SPL,temp ;Init Stack Pointer
  137.  
  138. //timer0
  139. ldi temp,0x04 ;timer prescalar /256
  140. out TCCR0,temp
  141. ldi temp,176 ;load timer for 5 ms
  142. mov timer,temp
  143. out TCNT0,timer ;(256 - n)*256*0.2441 us
  144. ldi temp,0x82 ;enable timer interrupts, ICP disable
  145. out TIMSK,temp
  146.  
  147. //timer1
  148. ;TCCR1B=0x02; // start timer (timer period = 2uS)
  149. LDI R30,0x00 ;// prescaller << if 0 = stop
  150. OUT TCCR1B,R30
  151.  
  152. ldi temp,0x0A ;1010 = On falling edges 1111 = RisingEdges
  153. out MCUCR,temp
  154. sei ;enable global interrupts
  155.  
  156. main:
  157. ;uart_: ;ubrr=(freq/16*baud)-1
  158. ldi R16,0x0
  159. ldi R17,0x47 ;2400BAUD, FOsc = 4MHz > 0x67(103)|| 9600/11.0592=0x47(71)
  160. out UBRRH,r16
  161. out UBRRL,R17
  162. ldi R18,(1<<rxcie|1<<Rxen)|(1<<Txen);0x0b8;%10111000 ; Enable UDRE Interrupt
  163. ldi R18,0x18
  164. out UCSRB,R18
  165. ldi temp,0x06
  166. out UCSRC,temp
  167. ;---------------
  168. ldi r21,32
  169.  
  170. _loop:
  171. ldi ZH,high(ram_)
  172. ldi ZL,low(ram_)
  173.  
  174. _next:
  175. clr tock
  176. rcall read_pin
  177. cpi tock,10
  178. ldi temp,1
  179. brsh next_2
  180. clr temp
  181. next_2:
  182. st Z+,temp
  183.  
  184. dec r21
  185. brne _next
  186.  
  187. rcall _dispRam
  188. ldi temp,'#'
  189. rcall putchar
  190. rcall bits2hex
  191.  
  192. ldi temp,13
  193. rcall putchar
  194.  
  195. ldi temp,10
  196. rcall putchar
  197.  
  198. rcall longdelay
  199. rcall longdelay
  200. rcall longdelay
  201.  
  202. ldi r21,32
  203.  
  204.  
  205. rjmp _loop
  206. endless: rjmp endless
  207. ;---------------------------------------------------------------------------/
  208.  
  209. longdelay:
  210. ldi longtime,50 ;
  211. ldi timeout,255 ;
  212. puwait:
  213. rcall delay
  214. dec longtime
  215. brne puwait
  216. ret
  217.  
  218. ;***** Delay n*64 microseconds using timer 0, delay time passed in timeout
  219. delay:
  220. ldi test,64
  221. cagain: dec test
  222. brne cagain
  223. dec timeout
  224. brne delay
  225. ret
  226.  
  227. ;***************************************************************************
  228.  
  229.  
  230. blink_:
  231. sbis PINB,led
  232. rjmp blink1_
  233. cbi PORTB,led
  234. ret
  235.  
  236. blink1_:
  237. sbi PORTB,led
  238. ret
  239. ;***************************************************************************
  240. ;***************************************************************************
  241. ;*
  242. ;* Read/Write EEPROM 00.06.15 OK (SPL)
  243. ;*
  244. ;***************************************************************************
  245. EEread: ;read EEprom
  246. sbic EECR,EEWE ;If EEWE not clear // 2000.05.30 ok
  247. rjmp EEread ; Wait more
  248. out EEAR,EEaddr ;EEprom Address Register (1200)
  249. sbi EECR,EERE ;set EEPROM Read strobe
  250. ;This instruction takes 4 clock cycles since
  251. ;it halts the CPU for two clock cycles
  252. in Temp,EEDR ;get EEprom Data Register to temp
  253. cbi EECR,EERE ;clr EEPROM Read strobe
  254. ret
  255. ;#######
  256. EEwrite: ;WriteEEprom
  257. sbic EECR,EEWE ;If EEWE not clear // 2000.05.30 ok
  258. rjmp EEWrite ; Wait more
  259. out EEAR,EEaddr ;EEprom Address Register (1200)
  260. out EEDR,temp ;store data to temp
  261. sbi EECR,EEMWE ;set master write enable, remove if 1200
  262. ;is used *000614 OK
  263. sbi EECR,EEWE ;set EEPROM Write strobe
  264. ret
  265.  
  266.  
  267. ;---------------------------------------------------------------------------/
  268. ;***************************************************************************
  269. ;****Timer Overflow Interrupt service routine******************************
  270. ;****Updates 5 ms, flash and debounce counter to provide RTC time reference
  271. ;***************************************************************************
  272. TIM_OVF0:
  273. push temp
  274. cli
  275. tick:
  276. in status,SREG ;preserve status register
  277. inc tock ;add one to 5 ms 'tock' counter
  278. nop ;and blink rate counter
  279. nop ;and bounce rate delay
  280. nop ;set 5 ms flag for display time
  281. cpi tock,200 ;is one second up?
  282. breq onesec ;yes, add one to seconds
  283. nop ;balance interrupt time
  284. rjmp nosecond ;no, escape
  285.  
  286. onesec:
  287. inc sec_tmr
  288. inc second ;add one to seconds
  289. ;clr tock ;clear 5 ms counter
  290.  
  291. rcall blink_
  292.  
  293. mov temp,second
  294. cpi temp,60
  295. brne nosecond
  296. inc minute
  297. clr second
  298.  
  299. mov temp,minute
  300. cpi temp,60
  301. brne nosecond
  302. inc hour
  303. clr minute
  304.  
  305. nosecond:
  306. ldi temp,250 ;reload timer 176
  307. out TCNT0,temp
  308. out SREG,status ;restore status register
  309. pop temp
  310. sei
  311. reti ;return to main
  312.  
  313. ;***************************************************************************
  314. ;
  315. ;***************************************************************************
  316. TIM_OVF1:; 12jan2011
  317. push temp
  318. in status,SREG ;preserve status register
  319.  
  320. LDI R30,LOW(0xfff8)
  321. LDI R31,HIGH(0xffff)
  322. OUT TCNT1H,R31
  323. OUT TCNT1L,R30
  324.  
  325.  
  326. jump_:
  327. out SREG,status ;restore status register
  328. pop temp
  329. reti ;return to main
  330.  
  331.  
  332. ;***************************************************************************
  333. getchar: ; temp=getchar()
  334. sbis ucsra,rxc
  335. rjmp getchar ; loop if clear
  336. in temp,udr
  337. ret
  338. ;==============================
  339. putchar:; putchar(temp);
  340. sbis ucsra,udre
  341. rjmp putchar
  342. out udr,temp
  343. ret
  344.  
  345. ;***************************************************************************
  346. read_pin: ;5nov13
  347. sbic PINB,0
  348. rjmp read_pin ;loop
  349. nop
  350.  
  351. read_pin0:
  352. sbis PINB,0
  353. rjmp read_pin0
  354.  
  355. clr temp ; reset
  356. nop
  357.  
  358. read_pin1:
  359.  
  360. ;inc temp
  361. sbic PINB,0
  362. rjmp read_pin1 ;loop
  363.  
  364. ret
  365. ;***************************************************************************
  366. ;***************************************************************************
  367. hex2dec: ;convert hexa 2 ascii 2dgt (<99) 21-09-05
  368. push r16
  369. push r17
  370. push r18
  371. ldi r16,0x30
  372. ldi r17,0x30
  373. ldi r18,0x30
  374.  
  375. dec0: cpi temp,100
  376. brsh dec3
  377.  
  378. dec1: cpi temp,0x0A
  379. brsh dec2
  380. add r18,temp
  381. mov temp,r16
  382. rcall putchar
  383. mov temp,r17
  384. rcall putchar
  385. mov temp,r18
  386. rcall putchar
  387.  
  388. pop r18
  389. pop r17
  390. pop r16
  391.  
  392. ret
  393.  
  394. dec2: subi temp,0x0A
  395. inc r17
  396. rjmp dec1
  397.  
  398. dec3: subi temp,100
  399. inc r16
  400. rjmp dec0
  401. ;***************************************************************************
  402. _dispRam: ;5nov13
  403.  
  404. ldi ZH,high(ram_+16)
  405. ldi ZL,low(ram_+16)
  406. ldi r21,16
  407.  
  408. _dispRam1:
  409. ld temp,z+
  410. ;rcall hex2dec
  411. ldi r22,48
  412. add temp,r22
  413. rcall putchar
  414. dec r21
  415. brne _dispRam1
  416.  
  417.  
  418. ret
  419. ;***************************************************************************
  420. bits2hex: ; convert biner 8bits ke hexa 5nov13
  421. clr temp
  422. ldi ZH,high(ram_+16)
  423. ldi ZL,low(ram_+16)
  424. ldi r21,8
  425.  
  426. bits2hex_1:
  427. ld r0,z+
  428. add temp,r0
  429. lsl temp
  430. dec r21
  431. brne bits2hex_1
  432. rcall hex2dec
  433.  
  434. ret
  435. ;***************************************************************************
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