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- ;Exercise on slide 9: July 13th, 2000 exam
- org 400h
- timer1 equ 0h
- timer2 equ 1h
- synch equ 0AAAAh ;Initialized to 0, put to 1 when synching (when interrupt1 reaches), checked if 1 when synched (when interrupt2 reaches)
- ;Is put to 0 in that case, else CPU imports a longword from timer2 set at buffer and system is reset
- time1 equ 0BBBBh ;Time in between interruptions (timer1 interrupts)
- time2 equ 0CCCCh ;Time in between interruptions (timer2 interrupts)
- buffer equ 0DDDDh ;Memory buffer
- code
- jsr init ;Initializes devices
- main: jmp main ;Stalls until interrupt is received
- halt
- init: movb #0, synch ;Initializes synch to 0, then starts devices
- outb time1, timer1 ;Initializes timers to respective time counters
- outb time2, timer2
- start timer1
- start timer2
- seti
- setim timer1
- setim timer2
- ret
- driver 0, 700h ;Driver for timer1
- clrim timer2
- movb #1, synch ;Sets synch byte to 1 and returns to main
- start timer1
- rti
- driver 1, 1100h ;Driver for timer2
- push R0
- clrim timer1 ;Disables timer1 interrupts for driver execution
- movb #1, R0
- cmpb synch, R0 ;Checks if current synch value is 1
- jz unsynch ;If so, resets it to 0
- inl timer2, buffer ;If not, imports longword from timer
- jsr init ;Restarts devices
- unsynch: movb #0, synch ;Unsynchs devices
- start timer2
- resume: setim timer1 ;Returns from driver
- pop R0
- rti
- end
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