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Feb 15th, 2018
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  1. state_call1: begin
  2.     // transfer arg2 to address
  3.     arg2_drive = 1'b1;
  4.     address_write = 1'b1;
  5.     next_state = state_call2;
  6. end
  7.  
  8. state_call2: begin
  9.     // transfer IAR+4 to mem[arg2]
  10.     iar_drive = 1'b1;
  11.     memory_write = 1'b1;
  12.     next_state = state_call3;
  13. end
  14.  
  15. state_call3: begin
  16.     // transfer arg1 to IAR
  17.     arg1_drive = 1'b1;
  18.     iar_write = 1'b1;
  19.     next_state = state_fetch1;
  20. end
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