a88xme coreboot

coreboot-4.9-522-gd731a24ff1 Sun Jan 27 12:13:09 UTC 2019 romstage starting (log level: 8)...
APIC 00: CPU Family_Model = 00610f31

APIC 00: ** Enter AmdInitReset [00020007]
Fch OEM config in INIT RESET
AmdInitReset() returned AGESA_SUCCESS
APIC 00: Heap in LocalCache (2) at 0x00400000
APIC 00: ** Exit  AmdInitReset [00020007]

APIC 00: ** Enter AmdInitEarly [00020002]
AmdInitEarly() returned AGESA_SUCCESS
APIC 00: Heap in LocalCache (2) at 0x00400000
APIC 00: ** Exit  AmdInitEarly [00020002]

APIC 00: ** Enter AmdInitPost [00020006]
-------------READING SPD-----------
iobase: 0x00000B00, SmbusSlave: 0x000000A0, count: 128

-------------FINISHED READING SPD-----------
-------------READING SPD-----------
iobase: 0x00000B00, SmbusSlave: 0x000000A2, count: 128
-------------SPD READ ERROR-----------
AmdInitPost() returned AGESA_WARNING

EventLog:  EventClass = 4, EventInfo = 4012100.
  Param1 = 0, Param2 = 0.
  Param3 = 0, Param4 = 0.

EventLog:  EventClass = 4, EventInfo = 4012200.
  Param1 = 0, Param2 = 1.
  Param3 = 0, Param4 = 0.
APIC 00: Heap in TempMem (3) at 0x000b0000
APIC 00: ** Exit  AmdInitPost [00020006]
CBMEM:
IMD: root @ bffff000 254 entries.
IMD: root @ bfffec00 62 entries.
MTRR Range: Start=0 End=80000000 (Size 80000000)
MTRR Range: Start=80000000 End=c0000000 (Size 40000000)
MTRR Range: Start=fff00000 End=0 (Size 100000)
CBFS @ 200 size ffe00
CBFS: 'Master Header Locator' located CBFS at [200:100000)
CBFS: Locating 'fallback/postcar'
CBFS: Found @ offset 7edc0 size 33d0
Decompressing stage fallback/postcar @ 0xbffbcfc0 (29104 bytes)
Loading module at bffbd000 with entry bffbd000. filesize: 0x32d0 memsize: 0x7170
Processing 41 relocs. Offset value of 0xbdfbd000


coreboot-4.9-522-gd731a24ff1 Sun Jan 27 12:13:09 UTC 2019 ramstage starting (log level: 8)...
Normal boot.

APIC 00: ** Enter AmdInitEnv [00020003]
Wiped HEAP at [10000000 - 1002ffff]
Fch OEM config in INIT ENV
AmdInitEnv() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit  AmdInitEnv [00020003]
BS: BS_PRE_DEVICE times (us): entry 130422 run 0 exit 0
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 4 exit 0
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
DOMAIN: 0000: enabled 1
APIC: 10: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:03.0: enabled 1
PCI: 00:04.0: enabled 1
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:10.0: enabled 1
PCI: 00:10.1: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 0
PCI: 00:14.6: enabled 0
PCI: 00:14.7: enabled 0
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 1
PCI: 00:15.3: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
I2C: 00:50: enabled 1
I2C: 00:51: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 0
PNP: 002e.3: enabled 0
PNP: 002e.4: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 0
PNP: 002e.7: enabled 1
PNP: 002e.a: enabled 0
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 10: enabled 1
 DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:00.2: enabled 1
  PCI: 00:01.0: enabled 1
  PCI: 00:01.1: enabled 1
  PCI: 00:02.0: enabled 1
  PCI: 00:03.0: enabled 1
  PCI: 00:04.0: enabled 1
  PCI: 00:05.0: enabled 0
  PCI: 00:06.0: enabled 0
  PCI: 00:07.0: enabled 0
  PCI: 00:08.0: enabled 0
  PCI: 00:10.0: enabled 1
  PCI: 00:10.1: enabled 1
  PCI: 00:11.0: enabled 1
  PCI: 00:12.0: enabled 1
  PCI: 00:12.2: enabled 1
  PCI: 00:13.0: enabled 1
  PCI: 00:13.2: enabled 1
  PCI: 00:14.0: enabled 1
   I2C: 00:50: enabled 1
   I2C: 00:51: enabled 1
  PCI: 00:14.1: enabled 0
  PCI: 00:14.2: enabled 1
  PCI: 00:14.3: enabled 1
   PNP: 002e.0: enabled 0
   PNP: 002e.1: enabled 1
   PNP: 002e.2: enabled 0
   PNP: 002e.3: enabled 0
   PNP: 002e.4: enabled 1
   PNP: 002e.5: enabled 1
   PNP: 002e.6: enabled 0
   PNP: 002e.7: enabled 1
   PNP: 002e.a: enabled 0
  PCI: 00:14.4: enabled 1
  PCI: 00:14.5: enabled 0
  PCI: 00:14.6: enabled 0
  PCI: 00:14.7: enabled 0
  PCI: 00:15.0: enabled 1
  PCI: 00:15.1: enabled 0
  PCI: 00:15.2: enabled 1
  PCI: 00:15.3: enabled 0
  PCI: 00:18.0: enabled 1
  PCI: 00:18.1: enabled 1
  PCI: 00:18.2: enabled 1
  PCI: 00:18.3: enabled 1
  PCI: 00:18.4: enabled 1
  PCI: 00:18.5: enabled 1
Mainboard A88XM-E Enable.
Root Device scanning...
root_dev_scan_bus for Root Device
setup_bsp_ramtop, TOP MEM: msr.lo = 0xe0000000, msr.hi = 0x00000000
setup_bsp_ramtop, TOP MEM2: msr.lo = 0x1f000000, msr.hi = 0x00000001
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
CPU_CLUSTER: 0 scanning...
PCI: 00:18.5 family15h, core_max=0x10, core_nums=0xf, siblings=0x3
lpaicid_start=0x10 node 0x0 core 0x0 apicid=0x10
CPU: APIC: 10 enabled
lpaicid_start=0x10 node 0x0 core 0x1 apicid=0x11
CPU: APIC: 11 enabled
lpaicid_start=0x10 node 0x0 core 0x2 apicid=0x12
CPU: APIC: 12 enabled
lpaicid_start=0x10 node 0x0 core 0x3 apicid=0x13
CPU: APIC: 13 enabled
scan_bus: scanning of bus CPU_CLUSTER: 0 took 16912 usecs
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [1022/1410] enabled
PCI: 00:00.2 [1022/1419] ops
PCI: 00:00.2 [1022/1419] enabled
PCI: 00:01.0 [1002/990e] enabled
PCI: 00:01.1 [1002/9902] enabled
PCI: Static device PCI: 00:02.0 not found, disabling it.
PCI: Static device PCI: 00:03.0 not found, disabling it.
PCI: Static device PCI: 00:04.0 not found, disabling it.
hudson_enable()
PCI: 00:10.0 [1022/7814] enabled
hudson_enable()
PCI: 00:10.1 [1022/7814] enabled
hudson_enable()
PCI: 00:11.0 [1022/7801] ops
PCI: 00:11.0 [1022/7801] enabled
hudson_enable()
PCI: 00:12.0 [1022/7807] ops
PCI: 00:12.0 [1022/7807] enabled
hudson_enable()
PCI: 00:12.2 [1022/7808] ops
PCI: 00:12.2 [1022/7808] enabled
hudson_enable()
PCI: 00:13.0 [1022/7807] ops
PCI: 00:13.0 [1022/7807] enabled
hudson_enable()
PCI: 00:13.2 [1022/7808] ops
PCI: 00:13.2 [1022/7808] enabled
hudson_enable()
PCI: 00:14.0 [1022/780b] bus ops
PCI: 00:14.0 [1022/780b] enabled
hudson_enable()
hudson_enable()
PCI: 00:14.2 [1022/780d] ops
PCI: 00:14.2 [1022/780d] enabled
hudson_enable()
PCI: 00:14.3 [1022/780e] bus ops
PCI: 00:14.3 [1022/780e] enabled
hudson_enable()
PCI: 00:14.4 [1022/780f] bus ops
PCI: 00:14.4 [1022/780f] enabled
hudson_enable()
hudson_enable()
hudson_enable()
hudson_enable()
PCI: 00:15.0 [1022/43a0] bus ops
PCI: 00:15.0 [1022/43a0] enabled
hudson_enable()
hudson_enable()
PCI: Static device PCI: 00:15.2 not found, disabling it.
hudson_enable()
PCI: 00:18.0 [1022/1400] ops
PCI: 00:18.0 [1022/1400] enabled
PCI: 00:18.1 [1022/1401] enabled
PCI: 00:18.2 [1022/1402] enabled
PCI: 00:18.3 [1022/1403] enabled
PCI: 00:18.4 [1022/1404] enabled
PCI: 00:18.5 [1022/1405] enabled
PCI: Leftover static devices:
PCI: 00:02.0
PCI: 00:03.0
PCI: 00:04.0
PCI: 00:05.0
PCI: 00:06.0
PCI: 00:07.0
PCI: 00:08.0
PCI: 00:14.1
PCI: 00:14.5
PCI: 00:14.6
PCI: 00:14.7
PCI: 00:15.1
PCI: 00:15.2
PCI: 00:15.3
PCI: Check your devicetree.cb.
PCI: 00:14.0 scanning...
scan_generic_bus for PCI: 00:14.0
bus: PCI: 00:14.0[0]->I2C: 01:50 enabled
bus: PCI: 00:14.0[0]->I2C: 01:51 enabled
scan_generic_bus for PCI: 00:14.0 done
scan_bus: scanning of bus PCI: 00:14.0 took 8062 usecs
PCI: 00:14.3 scanning...
scan_lpc_bus for PCI: 00:14.3
PNP: 002e.0 disabled
PNP: 002e.1 enabled
PNP: 002e.2 disabled
PNP: 002e.3 disabled
PNP: 002e.4 enabled
PNP: 002e.5 enabled
PNP: 002e.6 disabled
PNP: 002e.7 enabled
PNP: 002e.a disabled
scan_lpc_bus for PCI: 00:14.3 done
scan_bus: scanning of bus PCI: 00:14.3 took 12655 usecs
PCI: 00:14.4 scanning...
do_pci_scan_bridge for PCI: 00:14.4
PCI: pci_scan_bus for bus 01
scan_bus: scanning of bus PCI: 00:14.4 took 4073 usecs
PCI: 00:15.0 scanning...
do_pci_scan_bridge for PCI: 00:15.0
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 [14e4/1677] enabled
scan_bus: scanning of bus PCI: 00:15.0 took 5546 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 127056 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 161441 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 8 run 284050 exit 0
found VGA at PCI: 00:01.0
Setting up VGA for PCI: 00:01.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
fx_devs=0x1
DOMAIN: 0000 read_resources bus 0 link: 0
PCI: 00:14.0 read_resources bus 1 link: 0
I2C: 01:50 missing read_resources
I2C: 01:51 missing read_resources
PCI: 00:14.0 read_resources bus 1 link: 0 done
PCI: 00:14.3 read_resources bus 0 link: 0
PCI: 00:14.3 read_resources bus 0 link: 0 done
PCI: 00:14.3 read_resources bus 0 link: 1
PCI: 00:14.3 read_resources bus 0 link: 1 done
PCI: 00:14.4 read_resources bus 1 link: 0
PCI: 00:14.4 read_resources bus 1 link: 0 done
PCI: 00:15.0 read_resources bus 2 link: 0
PCI: 00:15.0 read_resources bus 2 link: 0 done
Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
PCI: 00:18.0 read_resources bus 0 link: 0
PCI: 00:18.0 read_resources bus 0 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 1
PCI: 00:18.0 read_resources bus 0 link: 1 done
PCI: 00:18.0 read_resources bus 0 link: 2
PCI: 00:18.0 read_resources bus 0 link: 2 done
PCI: 00:18.0 read_resources bus 0 link: 3
PCI: 00:18.0 read_resources bus 0 link: 3 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 10
   APIC: 10
   APIC: 11
   APIC: 12
   APIC: 13
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.2
   PCI: 00:00.2 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 44
   PCI: 00:01.0
   PCI: 00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
   PCI: 00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14
   PCI: 00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 18
   PCI: 00:01.1
   PCI: 00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10
   PCI: 00:10.0
   PCI: 00:10.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
   PCI: 00:10.1
   PCI: 00:10.1 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
   PCI: 00:11.0
   PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
   PCI: 00:11.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
   PCI: 00:12.0
   PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:12.2
   PCI: 00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
   PCI: 00:13.0
   PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
   PCI: 00:13.2
   PCI: 00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10
   PCI: 00:14.0 child on link 0 I2C: 01:50
    I2C: 01:50
    I2C: 01:51
   PCI: 00:14.2
   PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:14.3 child on link 0 PNP: 002e.0
   PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
   PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 002e.0
    PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit fff flags c0000100 index 60
    PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
    PNP: 002e.1
    PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60
    PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.2
    PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60
    PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.3
    PNP: 002e.3 resource base 378 size 4 align 2 gran 2 limit fff flags c0000100 index 60
    PNP: 002e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 002e.4
    PNP: 002e.4 resource base 290 size 8 align 3 gran 3 limit fff flags c0000100 index 60
    PNP: 002e.4 resource base 220 size 8 align 3 gran 3 limit fff flags c0000100 index 62
    PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.5
    PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit fff flags c0000100 index 60
    PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit fff flags c0000100 index 62
    PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.6
    PNP: 002e.6 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.7
    PNP: 002e.7 resource base 228 size 1 align 0 gran 0 limit fff flags c0000100 index 60
    PNP: 002e.7 resource base 300 size 8 align 3 gran 3 limit fff flags c0000100 index 62
    PNP: 002e.7 resource base 238 size 8 align 3 gran 3 limit fff flags c0000100 index 64
    PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.a
    PNP: 002e.a resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
    PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
   PCI: 00:14.4
   PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
   PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:15.0 child on link 0 PCI: 02:00.0
   PCI: 00:15.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
   PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:15.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 02:00.0
    PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
    PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
   PCI: 00:18.0
   PCI: 00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.4
   PCI: 00:18.5
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:15.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 00:15.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 00:01.0 14 *  [0x0 - 0xff] io
PCI: 00:11.0 20 *  [0x400 - 0x40f] io
PCI: 00:11.0 10 *  [0x410 - 0x417] io
PCI: 00:11.0 18 *  [0x418 - 0x41f] io
PCI: 00:11.0 14 *  [0x420 - 0x423] io
PCI: 00:11.0 1c *  [0x424 - 0x427] io
DOMAIN: 0000 io: base: 428 size: 428 align: 8 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:15.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:15.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:15.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:00.0 10 *  [0x0 - 0xffff] mem
PCI: 02:00.0 30 *  [0x10000 - 0x1ffff] mem
PCI: 00:15.0 mem: base: 20000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:01.0 10 *  [0x0 - 0xfffffff] prefmem
PCI: 00:15.0 20 *  [0x10000000 - 0x100fffff] mem
PCI: 00:00.2 44 *  [0x10100000 - 0x1017ffff] mem
PCI: 00:01.0 18 *  [0x10180000 - 0x101bffff] mem
PCI: 00:01.1 10 *  [0x101c0000 - 0x101c3fff] mem
PCI: 00:14.2 10 *  [0x101c4000 - 0x101c7fff] mem
PCI: 00:10.0 10 *  [0x101c8000 - 0x101c9fff] mem
PCI: 00:10.1 10 *  [0x101ca000 - 0x101cbfff] mem
PCI: 00:12.0 10 *  [0x101cc000 - 0x101ccfff] mem
PCI: 00:13.0 10 *  [0x101cd000 - 0x101cdfff] mem
PCI: 00:11.0 24 *  [0x101ce000 - 0x101ce7ff] mem
PCI: 00:12.2 10 *  [0x101cf000 - 0x101cf0ff] mem
PCI: 00:13.2 10 *  [0x101d0000 - 0x101d00ff] mem
DOMAIN: 0000 mem: base: 101d0100 size: 101d0100 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:14.3 10000000 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:14.3 10000100 base ff800000 limit ffffffff mem (fixed)
constrain_resources: PCI: 00:14.3 02 base fec10000 limit fec103ff mem (fixed)
constrain_resources: PCI: 00:14.3 03 base fec00000 limit fec00fff mem (fixed)
constrain_resources: PCI: 00:18.0 c0010058 base f8000000 limit fbffffff mem (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:428 align:8 gran:0 limit:ffff
PCI: 00:01.0 14 *  [0x1000 - 0x10ff] io
PCI: 00:11.0 20 *  [0x1400 - 0x140f] io
PCI: 00:11.0 10 *  [0x1410 - 0x1417] io
PCI: 00:11.0 18 *  [0x1418 - 0x141f] io
PCI: 00:11.0 14 *  [0x1420 - 0x1423] io
PCI: 00:11.0 1c *  [0x1424 - 0x1427] io
DOMAIN: 0000 io: next_base: 1428 size: 428 align: 8 gran: 0 done
PCI: 00:14.4 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:14.4 io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 00:15.0 io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 00:15.0 io: next_base: ffff size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:e0000000 size:101d0100 align:28 gran:0 limit:f7ffffff
PCI: 00:01.0 10 *  [0xe0000000 - 0xefffffff] prefmem
PCI: 00:15.0 20 *  [0xf0000000 - 0xf00fffff] mem
PCI: 00:00.2 44 *  [0xf0100000 - 0xf017ffff] mem
PCI: 00:01.0 18 *  [0xf0180000 - 0xf01bffff] mem
PCI: 00:01.1 10 *  [0xf01c0000 - 0xf01c3fff] mem
PCI: 00:14.2 10 *  [0xf01c4000 - 0xf01c7fff] mem
PCI: 00:10.0 10 *  [0xf01c8000 - 0xf01c9fff] mem
PCI: 00:10.1 10 *  [0xf01ca000 - 0xf01cbfff] mem
PCI: 00:12.0 10 *  [0xf01cc000 - 0xf01ccfff] mem
PCI: 00:13.0 10 *  [0xf01cd000 - 0xf01cdfff] mem
PCI: 00:11.0 24 *  [0xf01ce000 - 0xf01ce7ff] mem
PCI: 00:12.2 10 *  [0xf01cf000 - 0xf01cf0ff] mem
PCI: 00:13.2 10 *  [0xf01d0000 - 0xf01d00ff] mem
DOMAIN: 0000 mem: next_base: f01d0100 size: 101d0100 align: 28 gran: 0 done
PCI: 00:14.4 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:14.4 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:14.4 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:14.4 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:15.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:15.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:15.0 mem: base:f0000000 size:100000 align:20 gran:20 limit:f00fffff
PCI: 02:00.0 10 *  [0xf0000000 - 0xf000ffff] mem
PCI: 02:00.0 30 *  [0xf0010000 - 0xf001ffff] mem
PCI: 00:15.0 mem: next_base: f0020000 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
node 0: mmio_basek=00380000, basek=00400000, limitk=00460000
add_uma_resource_below_tolm: uma size 0x20000000, memory start 0xc0000000
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:00.2 44 <- [0x00f0100000 - 0x00f017ffff] size 0x00080000 gran 0x13 mem
PCI: 00:01.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
PCI: 00:01.0 14 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 00:01.0 18 <- [0x00f0180000 - 0x00f01bffff] size 0x00040000 gran 0x12 mem
PCI: 00:01.1 10 <- [0x00f01c0000 - 0x00f01c3fff] size 0x00004000 gran 0x0e mem
PCI: 00:10.0 10 <- [0x00f01c8000 - 0x00f01c9fff] size 0x00002000 gran 0x0d mem64
PCI: 00:10.1 10 <- [0x00f01ca000 - 0x00f01cbfff] size 0x00002000 gran 0x0d mem64
PCI: 00:11.0 10 <- [0x0000001410 - 0x0000001417] size 0x00000008 gran 0x03 io
PCI: 00:11.0 14 <- [0x0000001420 - 0x0000001423] size 0x00000004 gran 0x02 io
PCI: 00:11.0 18 <- [0x0000001418 - 0x000000141f] size 0x00000008 gran 0x03 io
PCI: 00:11.0 1c <- [0x0000001424 - 0x0000001427] size 0x00000004 gran 0x02 io
PCI: 00:11.0 20 <- [0x0000001400 - 0x000000140f] size 0x00000010 gran 0x04 io
PCI: 00:11.0 24 <- [0x00f01ce000 - 0x00f01ce7ff] size 0x00000800 gran 0x0b mem
PCI: 00:12.0 10 <- [0x00f01cc000 - 0x00f01ccfff] size 0x00001000 gran 0x0c mem
PCI: 00:12.2 10 <- [0x00f01cf000 - 0x00f01cf0ff] size 0x00000100 gran 0x08 mem
PCI: 00:13.0 10 <- [0x00f01cd000 - 0x00f01cdfff] size 0x00001000 gran 0x0c mem
PCI: 00:13.2 10 <- [0x00f01d0000 - 0x00f01d00ff] size 0x00000100 gran 0x08 mem
PCI: 00:14.2 10 <- [0x00f01c4000 - 0x00f01c7fff] size 0x00004000 gran 0x0e mem64
PCI: 00:14.3 assign_resources, bus 0 link: 0
PNP: 002e.1 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.1 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.4 60 <- [0x0000000290 - 0x0000000297] size 0x00000008 gran 0x03 io
PNP: 002e.4 62 <- [0x0000000220 - 0x0000000227] size 0x00000008 gran 0x03 io
PNP: 002e.4 70 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq
PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PNP: 002e.7 60 <- [0x0000000228 - 0x0000000228] size 0x00000001 gran 0x00 io
PNP: 002e.7 62 <- [0x0000000300 - 0x0000000307] size 0x00000008 gran 0x03 io
PNP: 002e.7 64 <- [0x0000000238 - 0x000000023f] size 0x00000008 gran 0x03 io
PNP: 002e.7 70 <- [0x0000000000 - 0x0000000000] size 0x00000001 gran 0x00 irq
PCI: 00:14.3 assign_resources, bus 0 link: 0
PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:14.4 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:14.4 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:15.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:15.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:15.0 20 <- [0x00f0000000 - 0x00f00fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:15.0 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x00f0000000 - 0x00f000ffff] size 0x00010000 gran 0x10 mem64
PCI: 02:00.0 30 <- [0x00f0010000 - 0x00f001ffff] size 0x00010000 gran 0x10 romem
PCI: 00:15.0 assign_resources, bus 2 link: 0
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 10
   APIC: 10
   APIC: 11
   APIC: 12
   APIC: 13
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 1000 size 428 align 8 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base e0000000 size 101d0100 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
  DOMAIN: 0000 resource base c0000 size dff40000 align 0 gran 0 limit 0 flags e0004200 index 20
  DOMAIN: 0000 resource base 100000000 size 1f000000 align 0 gran 0 limit 0 flags e0004200 index 30
  DOMAIN: 0000 resource base c0000000 size 20000000 align 0 gran 0 limit 0 flags f0000200 index 7
   PCI: 00:00.0
   PCI: 00:00.2
   PCI: 00:00.2 resource base f0100000 size 80000 align 19 gran 19 limit f017ffff flags 60000200 index 44
   PCI: 00:01.0
   PCI: 00:01.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001200 index 10
   PCI: 00:01.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 14
   PCI: 00:01.0 resource base f0180000 size 40000 align 18 gran 18 limit f01bffff flags 60000200 index 18
   PCI: 00:01.1
   PCI: 00:01.1 resource base f01c0000 size 4000 align 14 gran 14 limit f01c3fff flags 60000200 index 10
   PCI: 00:10.0
   PCI: 00:10.0 resource base f01c8000 size 2000 align 13 gran 13 limit f01c9fff flags 60000201 index 10
   PCI: 00:10.1
   PCI: 00:10.1 resource base f01ca000 size 2000 align 13 gran 13 limit f01cbfff flags 60000201 index 10
   PCI: 00:11.0
   PCI: 00:11.0 resource base 1410 size 8 align 3 gran 3 limit 1417 flags 60000100 index 10
   PCI: 00:11.0 resource base 1420 size 4 align 2 gran 2 limit 1423 flags 60000100 index 14
   PCI: 00:11.0 resource base 1418 size 8 align 3 gran 3 limit 141f flags 60000100 index 18
   PCI: 00:11.0 resource base 1424 size 4 align 2 gran 2 limit 1427 flags 60000100 index 1c
   PCI: 00:11.0 resource base 1400 size 10 align 4 gran 4 limit 140f flags 60000100 index 20
   PCI: 00:11.0 resource base f01ce000 size 800 align 12 gran 11 limit f01ce7ff flags 60000200 index 24
   PCI: 00:12.0
   PCI: 00:12.0 resource base f01cc000 size 1000 align 12 gran 12 limit f01ccfff flags 60000200 index 10
   PCI: 00:12.2
   PCI: 00:12.2 resource base f01cf000 size 100 align 12 gran 8 limit f01cf0ff flags 60000200 index 10
   PCI: 00:13.0
   PCI: 00:13.0 resource base f01cd000 size 1000 align 12 gran 12 limit f01cdfff flags 60000200 index 10
   PCI: 00:13.2
   PCI: 00:13.2 resource base f01d0000 size 100 align 12 gran 8 limit f01d00ff flags 60000200 index 10
   PCI: 00:14.0 child on link 0 I2C: 01:50
    I2C: 01:50
    I2C: 01:51
   PCI: 00:14.2
   PCI: 00:14.2 resource base f01c4000 size 4000 align 14 gran 14 limit f01c7fff flags 60000201 index 10
   PCI: 00:14.3 child on link 0 PNP: 002e.0
   PCI: 00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags e0040200 index 2
   PCI: 00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
    PNP: 002e.0
    PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit fff flags c0000100 index 60
    PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
    PNP: 002e.1
    PNP: 002e.1 resource base 3f8 size 8 align 3 gran 3 limit fff flags e0000100 index 60
    PNP: 002e.1 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 002e.2
    PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit fff flags c0000100 index 60
    PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.3
    PNP: 002e.3 resource base 378 size 4 align 2 gran 2 limit fff flags c0000100 index 60
    PNP: 002e.3 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.3 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
    PNP: 002e.4
    PNP: 002e.4 resource base 290 size 8 align 3 gran 3 limit fff flags e0000100 index 60
    PNP: 002e.4 resource base 220 size 8 align 3 gran 3 limit fff flags e0000100 index 62
    PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 002e.5
    PNP: 002e.5 resource base 60 size 1 align 0 gran 0 limit fff flags e0000100 index 60
    PNP: 002e.5 resource base 64 size 1 align 0 gran 0 limit fff flags e0000100 index 62
    PNP: 002e.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 002e.6
    PNP: 002e.6 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 70
    PNP: 002e.7
    PNP: 002e.7 resource base 228 size 1 align 0 gran 0 limit fff flags e0000100 index 60
    PNP: 002e.7 resource base 300 size 8 align 3 gran 3 limit fff flags e0000100 index 62
    PNP: 002e.7 resource base 238 size 8 align 3 gran 3 limit fff flags e0000100 index 64
    PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
    PNP: 002e.a
    PNP: 002e.a resource base 0 size 8 align 3 gran 3 limit fff flags 100 index 60
    PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
   PCI: 00:14.4
   PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:14.4 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
   PCI: 00:15.0 child on link 0 PCI: 02:00.0
   PCI: 00:15.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
   PCI: 00:15.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:15.0 resource base f0000000 size 100000 align 20 gran 20 limit f00fffff flags 60080202 index 20
    PCI: 02:00.0
    PCI: 02:00.0 resource base f0000000 size 10000 align 16 gran 16 limit f000ffff flags 60000201 index 10
    PCI: 02:00.0 resource base f0010000 size 10000 align 16 gran 16 limit f001ffff flags 60002200 index 30
   PCI: 00:18.0
   PCI: 00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
   PCI: 00:18.1
   PCI: 00:18.2
   PCI: 00:18.3
   PCI: 00:18.4
   PCI: 00:18.5
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 995168 exit 0

APIC 00: ** Enter AmdInitMid [00020005]
AmdInitMid() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit  AmdInitMid [00020005]
Warning: Can't write PCI_INTR 0xC00/0xC01 registers because
'mainboard_picr_data' or 'mainboard_intr_data' tables are NULL
Warning: Can't write PCI IRQ assignments because 'mainboard_pirq_data' structure does not exist
Enabling resources...
PCI: 00:00.0 subsystem <- 1022/1410
PCI: 00:00.0 cmd <- 06
PCI: 00:00.2 subsystem <- 1022/1410
PCI: 00:00.2 cmd <- 06
PCI: 00:01.0 subsystem <- 1022/1410
PCI: 00:01.0 cmd <- 07
PCI: 00:01.1 subsystem <- 1022/1410
PCI: 00:01.1 cmd <- 02
PCI: 00:10.0 subsystem <- 1022/1410
PCI: 00:10.0 cmd <- 02
PCI: 00:10.1 subsystem <- 1022/1410
PCI: 00:10.1 cmd <- 02
PCI: 00:11.0 cmd <- 03
PCI: 00:12.0 subsystem <- 1022/1410
PCI: 00:12.0 cmd <- 02
PCI: 00:12.2 subsystem <- 1022/1410
PCI: 00:12.2 cmd <- 02
PCI: 00:13.0 subsystem <- 1022/1410
PCI: 00:13.0 cmd <- 02
PCI: 00:13.2 subsystem <- 1022/1410
PCI: 00:13.2 cmd <- 02
PCI: 00:14.0 subsystem <- 1022/1410
PCI: 00:14.0 cmd <- 403
PCI: 00:14.2 subsystem <- 1022/1410
PCI: 00:14.2 cmd <- 02
PCI: 00:14.3 subsystem <- 1022/1410
PCI: 00:14.3 cmd <- 0f
hudson lpc decode:PNP: 002e.1, base=0x000003f8, end=0x000003ff
hudson lpc decode:PNP: 002e.4, base=0x00000290, end=0x00000297
hudson lpc decode:PNP: 002e.4, base=0x00000220, end=0x00000227
hudson lpc decode:PNP: 002e.5, base=0x00000060, end=0x00000060
hudson lpc decode:PNP: 002e.5, base=0x00000064, end=0x00000064
hudson lpc decode:PNP: 002e.7, base=0x00000228, end=0x00000228
hudson lpc decode:PNP: 002e.7, base=0x00000300, end=0x00000307
hudson lpc decode:PNP: 002e.7, base=0x00000238, end=0x0000023f
PCI: 00:14.4 bridge ctrl <- 0003
PCI: 00:14.4 cmd <- 00
PCI: 00:15.0 bridge ctrl <- 0003
PCI: 00:15.0 cmd <- 06
PCI: 00:18.0 cmd <- 00
PCI: 00:18.1 subsystem <- 1022/1410
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 1022/1410
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 subsystem <- 1022/1410
PCI: 00:18.3 cmd <- 00
PCI: 00:18.4 subsystem <- 1022/1410
PCI: 00:18.4 cmd <- 00
PCI: 00:18.5 subsystem <- 1022/1410
PCI: 00:18.5 cmd <- 00
PCI: 02:00.0 cmd <- 02
done.
BS: BS_DEV_ENABLE times (us): entry 46152 run 79610 exit 0
Initializing devices...
Root Device init ...
Root Device init finished in 958 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Initializing CPU #0
CPU: vendor AMD device 610f31
CPU: family 15, model 13, stepping 01
Model 15 Init.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local APIC... apic_id: 0x10 done.
siblings = 03, CPU #0 initialized
CPU1: stack_base bfeec000, stack_top bfeecff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 17.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 17.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
CPU: vendor AMD device 610f31
CPU: family 15, model 13, stepping 01
Model 15 Init.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local APIC... apic_id: 0x11 done.
siblings = 03, CPU #1 initialized
CPU2: stack_base bfeeb000, stack_top bfeebff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 18.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 18.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #2
CPU: vendor AMD device 610f31
CPU: family 15, model 13, stepping 01
Model 15 Init.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local APIC... apic_id: 0x12 done.
siblings = 03, CPU #2 initialized
CPU3: stack_base bfeea000, stack_top bfeeaff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 19.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 19.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #3
Waiting for 1 CPUS to stop
CPU: vendor AMD device 610f31
CPU: family 15, model 13, stepping 01
Model 15 Init.

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Enabling cache
Setting up local APIC... apic_id: 0x13 done.
siblings = 03, CPU #3 initialized
All AP CPUs stopped (1088 loops)
CPU0: stack: bfeed000 - bfeee000, lowest used address bfeed55c, stack used: 2724 bytes
CPU1: stack: bfeec000 - bfeed000, lowest used address bfeecdcc, stack used: 564 bytes
CPU2: stack: bfeeb000 - bfeec000, lowest used address bfeebdcc, stack used: 564 bytes
CPU3: stack: bfeea000 - bfeeb000, lowest used address bfeeadcc, stack used: 564 bytes
CPU_CLUSTER: 0 init finished in 151729 usecs
DOMAIN: 0000 init ...
DOMAIN: 0000 init finished in 1003 usecs
PCI: 00:00.0 init ...
PCI: 00:00.0 init finished in 1003 usecs
PCI: 00:01.0 init ...
CBFS @ 200 size ffe00
CBFS: 'Master Header Locator' located CBFS at [200:100000)
CBFS: Locating 'pci1002,990e.rom'
CBFS: Found @ offset 6ed40 size 10000
In CBFS, ROM address for PCI: 00:01.0 = fff6ef88
PCI expansion ROM, signature 0xaa55, INIT size 0xf200, data ptr 0x01b4
PCI ROM image, vendor ID 1002, device ID 990e,
PCI ROM image, Class Code 030000, Code Type 00
Copying VGA ROM Image from fff6ef88 to 0xc0000, 0xf200 bytes
Real mode stub @00000600: 867 bytes
Calling Option ROM...
... Option ROM returned.
VGA Option ROM was run
PCI: 00:01.0 init finished in 72312 usecs
PCI: 00:01.1 init ...
PCI: 00:01.1 init finished in 1003 usecs
PCI: 00:10.0 init ...
PCI: 00:10.0 init finished in 1003 usecs
PCI: 00:10.1 init ...
PCI: 00:10.1 init finished in 1003 usecs
PCI: 00:11.0 init ...
PCI: 00:11.0 init finished in 1003 usecs
PCI: 00:12.0 init ...
PCI: 00:12.0 init finished in 1003 usecs
PCI: 00:12.2 init ...
PCI: 00:12.2 init finished in 999 usecs
PCI: 00:13.0 init ...
PCI: 00:13.0 init finished in 1003 usecs
PCI: 00:13.2 init ...
PCI: 00:13.2 init finished in 1003 usecs
PCI: 00:14.0 init ...
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x10
IOAPIC: ID = 0x04
IOAPIC: Dumping registers
  reg 0x0000: 0x04000000
  reg 0x0001: 0x00178021
  reg 0x0002: 0x04000000
IOAPIC: 24 interrupts
IOAPIC: Enabling interrupts on FSB
IOAPIC: reg 0x00000000 value 0x10000000 0x00000700
IOAPIC: reg 0x00000001 value 0x00000000 0x00010000
IOAPIC: reg 0x00000002 value 0x00000000 0x00010000
IOAPIC: reg 0x00000003 value 0x00000000 0x00010000
IOAPIC: reg 0x00000004 value 0x00000000 0x00010000
IOAPIC: reg 0x00000005 value 0x00000000 0x00010000
IOAPIC: reg 0x00000006 value 0x00000000 0x00010000
IOAPIC: reg 0x00000007 value 0x00000000 0x00010000
IOAPIC: reg 0x00000008 value 0x00000000 0x00010000
IOAPIC: reg 0x00000009 value 0x00000000 0x00010000
IOAPIC: reg 0x0000000a value 0x00000000 0x00010000
IOAPIC: reg 0x0000000b value 0x00000000 0x00010000
IOAPIC: reg 0x0000000c value 0x00000000 0x00010000
IOAPIC: reg 0x0000000d value 0x00000000 0x00010000
IOAPIC: reg 0x0000000e value 0x00000000 0x00010000
IOAPIC: reg 0x0000000f value 0x00000000 0x00010000
IOAPIC: reg 0x00000010 value 0x00000000 0x00010000
IOAPIC: reg 0x00000011 value 0x00000000 0x00010000
IOAPIC: reg 0x00000012 value 0x00000000 0x00010000
IOAPIC: reg 0x00000013 value 0x00000000 0x00010000
IOAPIC: reg 0x00000014 value 0x00000000 0x00010000
IOAPIC: reg 0x00000015 value 0x00000000 0x00010000
IOAPIC: reg 0x00000016 value 0x00000000 0x00010000
IOAPIC: reg 0x00000017 value 0x00000000 0x00010000
PCI: 00:14.0 init finished in 67074 usecs
PCI: 00:14.2 init ...
PCI: 00:14.2 init finished in 999 usecs
PCI: 00:14.3 init ...
RTC Init
PCI: 00:14.3 init finished in 1485 usecs
PCI: 00:14.4 init ...
PCI: 00:14.4 init finished in 1003 usecs
PCI: 00:15.0 init ...
PCI: 00:15.0 init finished in 1003 usecs
PCI: 00:18.0 init ...
PCI: 00:18.0 init finished in 1003 usecs
PCI: 00:18.1 init ...
PCI: 00:18.1 init finished in 1003 usecs
PCI: 00:18.2 init ...
PCI: 00:18.2 init finished in 1003 usecs
PCI: 00:18.3 init ...
PCI: 00:18.3 init finished in 999 usecs
PCI: 00:18.4 init ...
PCI: 00:18.4 init finished in 1002 usecs
PCI: 00:18.5 init ...
PCI: 00:18.5 init finished in 1003 usecs
PNP: 002e.1 init ...
PNP: 002e.1 init finished in 960 usecs
PNP: 002e.4 init ...
PNP: 002e.4 init finished in 1008 usecs
PNP: 002e.5 init ...
PNP: 002e.5 init finished in 1969 usecs
PNP: 002e.7 init ...
PNP: 002e.7 init finished in 959 usecs
PCI: 02:00.0 init ...
PCI: 02:00.0 init finished in 1003 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
DOMAIN: 0000: enabled 1
APIC: 10: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:00.2: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:01.1: enabled 1
PCI: 00:02.0: enabled 0
PCI: 00:03.0: enabled 0
PCI: 00:04.0: enabled 0
PCI: 00:05.0: enabled 0
PCI: 00:06.0: enabled 0
PCI: 00:07.0: enabled 0
PCI: 00:08.0: enabled 0
PCI: 00:10.0: enabled 1
PCI: 00:10.1: enabled 1
PCI: 00:11.0: enabled 1
PCI: 00:12.0: enabled 1
PCI: 00:12.2: enabled 1
PCI: 00:13.0: enabled 1
PCI: 00:13.2: enabled 1
PCI: 00:14.0: enabled 1
PCI: 00:14.1: enabled 0
PCI: 00:14.2: enabled 1
PCI: 00:14.3: enabled 1
PCI: 00:14.4: enabled 1
PCI: 00:14.5: enabled 0
PCI: 00:14.6: enabled 0
PCI: 00:14.7: enabled 0
PCI: 00:15.0: enabled 1
PCI: 00:15.1: enabled 0
PCI: 00:15.2: enabled 0
PCI: 00:15.3: enabled 0
PCI: 00:18.0: enabled 1
PCI: 00:18.1: enabled 1
PCI: 00:18.2: enabled 1
PCI: 00:18.3: enabled 1
PCI: 00:18.4: enabled 1
PCI: 00:18.5: enabled 1
I2C: 01:50: enabled 1
I2C: 01:51: enabled 1
PNP: 002e.0: enabled 0
PNP: 002e.1: enabled 1
PNP: 002e.2: enabled 0
PNP: 002e.3: enabled 0
PNP: 002e.4: enabled 1
PNP: 002e.5: enabled 1
PNP: 002e.6: enabled 0
PNP: 002e.7: enabled 1
PNP: 002e.a: enabled 0
APIC: 11: enabled 1
APIC: 12: enabled 1
APIC: 13: enabled 1
PCI: 02:00.0: enabled 1
BS: BS_DEV_INIT times (us): entry 0 run 433231 exit 0
Finalize devices...
Devices finalized

APIC 00: ** Enter AmdInitLate [00020004]
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187
ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776
AmdInitLate() returned AGESA_SUCCESS
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit  AmdInitLate [00020004]

APIC 00: ** Enter AmdS3Save [0002000b]
Manufacturer: ef
SF: Detected W25Q80_V with sector size 0x1000, total 0x100000
SF: Successfully erased 4096 bytes @ 0xffff1000
Manufacturer: ef
SF: Detected W25Q80_V with sector size 0x1000, total 0x100000
SF: Successfully erased 4096 bytes @ 0xffff0000
AmdS3Save() returned AGESA_SUCCESS
ASSERTION ERROR: file 'src/drivers/amd/agesa/state_machine.c', line 309
APIC 00: Heap in SystemMem (4) at 0x10000014
APIC 00: ** Exit  AmdS3Save [0002000b]
BS: BS_POST_DEVICE times (us): entry 0 run 1747 exit 136436
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 0 exit 0
Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
Writing IRQ routing tables to 0xbfd5a000...write_pirq_routing_table done.
PIRQ table: 48 bytes.
Wrote the mp table end at: 000f0410 - 000f0604
Wrote the mp table end at: bfd59010 - bfd59204
MP table: 516 bytes.
CBFS @ 200 size ffe00
CBFS: 'Master Header Locator' located CBFS at [200:100000)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 82200 size 1887
CBFS @ 200 size ffe00
CBFS: 'Master Header Locator' located CBFS at [200:100000)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at bfd35000.
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * FADT
pm_base: 0x0800
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
CBFS @ 200 size ffe00
CBFS: 'Master Header Locator' located CBFS at [200:100000)
CBFS: Locating 'pci1002,990e.rom'
CBFS: Found @ offset 6ed40 size 10000
In CBFS, ROM address for PCI: 00:01.0 = fff6ef88
PCI expansion ROM, signature 0xaa55, INIT size 0xf200, data ptr 0x01b4
PCI ROM image, vendor ID 1002, device ID 990e,
PCI ROM image, Class Code 030000, Code Type 00
PCI: 00:01.0: Missing ACPI scope
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI:    * MADT
ACPI: added table 3/32, length now 48
current = bfd36d20
CBFS @ 200 size ffe00
CBFS: 'Master Header Locator' located CBFS at [200:100000)
CBFS: Locating 'pci1002,990e.rom'
CBFS: Found @ offset 6ed40 size 10000
In CBFS, ROM address for PCI: 00:01.0 = fff6ef88
PCI expansion ROM, signature 0xaa55, INIT size 0xf200, data ptr 0x01b4
PCI ROM image, vendor ID 1002, device ID 990e,
PCI ROM image, Class Code 030000, Code Type 00
ACPI:    * VFCT at bfd36d20
           Copying initialized VBIOS image from 000c0000
ACPI: added table 4/32, length now 52
ACPI:    * HPET
ACPI: added table 5/32, length now 56
ACPI: added table 6/32, length now 60
ACPI:    * IVRS at bfd461a0
ACPI: added table 7/32, length now 64
ACPI:    * SRAT at bfd46210
  AGESA SRAT table NULL. Skipping.
ACPI:   * SLIT at bfd46210
  AGESA SLIT table NULL. Skipping.
ACPI:  * AGESA ALIB SSDT at bfd46210
ACPI: added table 8/32, length now 68
ACPI:    * SSDT at bfd46730
ACPI: added table 9/32, length now 72
ACPI:    * SSDT for PState at bfd472cc
ACPI: done.
ACPI tables: 74448 bytes.
smbios_write_tables: bfd34000
SMBIOS tables: 345 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 9008
Writing coreboot table at 0xbfd5b000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000c0000-00000000bfd33fff: RAM
 3. 00000000bfd34000-00000000bfea3fff: CONFIGURATION TABLES
 4. 00000000bfea4000-00000000bffb3fff: RAMSTAGE
 5. 00000000bffb4000-00000000bfffffff: CONFIGURATION TABLES
 6. 00000000c0000000-00000000dfffffff: RESERVED
 7. 00000000f8000000-00000000fbffffff: RESERVED
 8. 0000000100000000-000000011effffff: RAM
Manufacturer: ef
SF: Detected W25Q80_V with sector size 0x1000, total 0x100000
CBFS @ 200 size ffe00
CBFS: 'Master Header Locator' located CBFS at [200:100000)
FMAP: Found "FLASH" version 1.1 at 0.
FMAP: base = fff00000 size = 100000 #areas = 3
Wrote coreboot table at: bfd5b000, 0x350 bytes, checksum e342
coreboot table: 872 bytes.
IMD ROOT    0. bffff000 00001000
IMD SMALL   1. bfffe000 00001000
CONSOLE     2. bffde000 00020000
TIME STAMP  3. bffdd000 00000910
ROMSTG STCK 4. bffc5000 00018000
AFTER CAR   5. bffbc000 00009000
57a9e102    6. bffb4000 00007170
RAMSTAGE    7. bfea3000 00111000
57a9e100    8. bfd93000 0010f738
ACPISCRATCH 9. bfd63000 00030000
COREBOOT   10. bfd5b000 00008000
IRQ TABLE  11. bfd5a000 00001000
SMP TABLE  12. bfd59000 00001000
ACPI       13. bfd35000 00024000
SMBIOS     14. bfd34000 00000800
IMD small region:
  IMD ROOT    0. bfffec00 00000400
  ROMSTAGE    1. bfffebe0 00000004
  57a9e002    2. bfffebc0 00000018
  57a9e000    3. bfffeba0 00000018
  COREBOOTFWD 4. bfffeb60 00000028
BS: BS_WRITE_TABLES times (us): entry 0 run 177361 exit 0
CBFS @ 200 size ffe00
CBFS: 'Master Header Locator' located CBFS at [200:100000)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 83b00 size 120a8
Checking segment from ROM address 0xfff83d38
Checking segment from ROM address 0xfff83d54
Loading segment from ROM address 0xfff83d38
  code (compression=1)
  New segment dstaddr 0x000dcea0 memsize 0x23160 srcaddr 0xfff83d70 filesize 0x12070
Loading Segment: addr: 0x000dcea0 memsz: 0x0000000000023160 filesz: 0x0000000000012070
using LZMA
[ 0x000dcea0, 00100000, 0x00100000) <- fff83d70
Loading segment from ROM address 0xfff83d54
  Entry Point 0x000fcb08
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 41749 exit 0
Jumping to boot code at 000fcb08(bfd5b000)
CPU0: stack: bfeed000 - bfeee000, lowest used address bfeed55c, stack used: 2724 bytes
SeaBIOS (version rel-1.12.0-0-ga698c89)
BUILD: gcc: (coreboot toolchain v3f7fd58823 2019-01-16) 8.2.0 binutils: (GNU Binutils) 2.31.1
Found coreboot cbmem console @ bffde000
Found mainboard ASUS A88XM-E
malloc preinit
Add to e820 map: 000a0000 00050000 -1
Add to e820 map: 000f0000 00010000 2
Add to e820 map: bfcf4000 00040000 2
phys_alloc zone=0x000ebb18 size=54432 align=20 ret=bfce6ac0 (detail=0xbfce6a90)
Relocating init from 0x000de760 to 0xbfce6ac0 (size 54432)
malloc init
Found CBFS header at 0xfff00238
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce6990 (detail=0xbfce6960)
Add romfile: cbfs master header (size=32)
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce68c0 (detail=0xbfce6890)
Add romfile: fallback/ramstage (size=128674)
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce67f0 (detail=0xbfce67c0)
Add romfile: config (size=217)
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce6720 (detail=0xbfce66f0)
Add romfile: revision (size=575)
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce6650 (detail=0xbfce6620)
Add romfile: payload_revision (size=237)
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce6580 (detail=0xbfce6550)
Add romfile:  (size=280)
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce64b0 (detail=0xbfce6480)
Add romfile: apu/amdfw (size=4096)
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce63e0 (detail=0xbfce63b0)
Add romfile: fallback/romstage (size=317900)
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce6310 (detail=0xbfce62e0)
Add romfile: cmos_layout.bin (size=1164)
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce6240 (detail=0xbfce6210)
Add romfile: pci1002,990e.rom (size=65536)
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce6170 (detail=0xbfce6140)
Add romfile: fallback/postcar (size=13264)
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce60a0 (detail=0xbfce6070)
Add romfile: fallback/dsdt.aml (size=6279)
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce5fd0 (detail=0xbfce5fa0)
Add romfile: fallback/payload (size=73896)
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce5f00 (detail=0xbfce5ed0)
Add romfile: payload_config (size=1593)
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce5e30 (detail=0xbfce5e00)
Add romfile:  (size=367384)
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce5d60 (detail=0xbfce5d30)
Add romfile: s3nv (size=32768)
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce5c90 (detail=0xbfce5c60)
Add romfile:  (size=31704)
phys_alloc zone=0xbfcf3e78 size=156 align=10 ret=bfce5bc0 (detail=0xbfce5b90)
Add romfile: bootblock (size=928)
multiboot: eax=bfee4b80, ebx=bfee4b34
init ivt
init bda
Add to e820 map: 0009fc00 00000400 2
init bios32
init PMM
init PNPBIOS table
init keyboard
init mouse
init pic
math cp init
PCI probe
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5b70 (detail=0xbfce5b40)
PCI device 00:00.0 (vd=1022:1410 c=0600)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5b20 (detail=0xbfce5af0)
PCI device 00:00.2 (vd=1022:1419 c=0806)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5ad0 (detail=0xbfce5aa0)
PCI device 00:01.0 (vd=1002:990e c=0300)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5a80 (detail=0xbfce5a50)
PCI device 00:01.1 (vd=1002:9902 c=0403)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5a30 (detail=0xbfce5a00)
PCI device 00:10.0 (vd=1022:7814 c=0c03)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce59e0 (detail=0xbfce59b0)
PCI device 00:10.1 (vd=1022:7814 c=0c03)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5990 (detail=0xbfce5960)
PCI device 00:11.0 (vd=1022:7801 c=0106)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5940 (detail=0xbfce5910)
PCI device 00:12.0 (vd=1022:7807 c=0c03)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce58f0 (detail=0xbfce58c0)
PCI device 00:12.2 (vd=1022:7808 c=0c03)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce58a0 (detail=0xbfce5870)
PCI device 00:13.0 (vd=1022:7807 c=0c03)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5850 (detail=0xbfce5820)
PCI device 00:13.2 (vd=1022:7808 c=0c03)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5800 (detail=0xbfce57d0)
PCI device 00:14.0 (vd=1022:780b c=0c05)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce57b0 (detail=0xbfce5780)
PCI device 00:14.2 (vd=1022:780d c=0403)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5760 (detail=0xbfce5730)
PCI device 00:14.3 (vd=1022:780e c=0601)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5710 (detail=0xbfce56e0)
PCI device 00:14.4 (vd=1022:780f c=0604)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce56c0 (detail=0xbfce5690)
PCI device 00:15.0 (vd=1022:43a0 c=0604)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5670 (detail=0xbfce5640)
PCI device 00:18.0 (vd=1022:1400 c=0600)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5620 (detail=0xbfce55f0)
PCI device 00:18.1 (vd=1022:1401 c=0600)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce55d0 (detail=0xbfce55a0)
PCI device 00:18.2 (vd=1022:1402 c=0600)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5580 (detail=0xbfce5550)
PCI device 00:18.3 (vd=1022:1403 c=0600)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5530 (detail=0xbfce5500)
PCI device 00:18.4 (vd=1022:1404 c=0600)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce54e0 (detail=0xbfce54b0)
PCI device 00:18.5 (vd=1022:1405 c=0600)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5490 (detail=0xbfce5460)
PCI device 02:00.0 (vd=14e4:1677 c=0200)
Found 23 PCI devices (max PCI bus is 02)
Relocating coreboot bios tables
phys_alloc zone=0xbfcf3e80 size=31 align=10 ret=f51a0 (detail=0xbfce5430)
Copying SMBIOS entry point from 0xbfd34000 to 0x000f51a0
phys_alloc zone=0xbfcf3e80 size=36 align=10 ret=f5170 (detail=0xbfce5400)
Copying ACPI RSDP from 0xbfd35000 to 0x000f5170
phys_alloc zone=0xbfcf3e80 size=516 align=10 ret=f4f60 (detail=0xbfce53d0)
Copying MPTABLE from 0xbfd59000/bfd59010 to 0x000f4f60
phys_alloc zone=0xbfcf3e80 size=48 align=10 ret=f4f30 (detail=0xbfce53a0)
Copying PIR from 0xbfd5a000 to 0x000f4f30
rsdp=0x000f5170
rsdt=0xbfd35030
table(50434146)=0xbfd36b10
pm_tmr_blk=818
Using pmtimer, ioport 0x818
init timer
WARNING - Timeout at wait_reg8:81!
Scan for VGA option rom
Attempting to init PCI bdf 00:01.0 (vd 1002:990e)
Copying data 65536@0xfff6ef88 to 65536@0x000c0000
Checking rom 0x000c0000 (sig aa55 size 121)
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.12.0-0-ga698c89)
init usb
phys_alloc zone=0xbfcf3e84 size=72 align=10 ret=bfd33fb0 (detail=0xbfce5370)
XHCI init on dev 00:10.0: regs @ 0xf01c8000, 4 ports, 32 slots, 32 byte contexts
XHCI    extcap 0x1 @ 0xf01c8500
XHCI    protocol USB  3.00, 2 ports (offset 1), def 0
XHCI    protocol USB  2.00, 2 ports (offset 3), def 10
phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfce4000 (detail=0xbfce5340)
/bfce4000\ Start thread
|bfce4000| phys_alloc zone=0xbfcf3e84 size=264 align=40 ret=bfd33e80 (detail=0xbfce5310)
|bfce4000| phys_alloc zone=0xbfcf3e84 size=16 align=40 ret=bfd33e40 (detail=0xbfce52e0)
|bfce4000| phys_alloc zone=0xbfcf3e84 size=288 align=100 ret=bfd33d00 (detail=0xbfce52b0)
|bfce4000| phys_alloc zone=0xbfcf3e84 size=288 align=100 ret=bfd33b00 (detail=0xbfce5280)
|bfce4000| configure_xhci: resetting
phys_alloc zone=0xbfcf3e84 size=72 align=10 ret=bfd33cb0 (detail=0xbfce5250)
XHCI init on dev 00:10.1: regs @ 0xf01ca000, 4 ports, 32 slots, 32 byte contexts
XHCI    extcap 0x1 @ 0xf01ca500
XHCI    protocol USB  3.00, 2 ports (offset 1), def 0
XHCI    protocol USB  2.00, 2 ports (offset 3), def 10
phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfce3000 (detail=0xbfce5220)
/bfce3000\ Start thread
|bfce3000| phys_alloc zone=0xbfcf3e84 size=264 align=40 ret=bfd339c0 (detail=0xbfce51f0)
|bfce3000| phys_alloc zone=0xbfcf3e84 size=16 align=40 ret=bfd33c80 (detail=0xbfce51c0)
|bfce3000| phys_alloc zone=0xbfcf3e84 size=288 align=100 ret=bfd33800 (detail=0xbfce5190)
|bfce3000| phys_alloc zone=0xbfcf3e84 size=288 align=100 ret=bfd33600 (detail=0xbfce5160)
|bfce3000| configure_xhci: resetting
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5140 (detail=0xbfce5110)
EHCI init on dev 00:12.2 (regs=0xf01cf020)
phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfce2000 (detail=0xbfce50e0)
/bfce2000\ Start thread
|bfce2000| phys_alloc zone=0xbfcf3e84 size=4096 align=1000 ret=bfd32000 (detail=0xbfce50b0)
|bfce2000| phys_alloc zone=0xbfcf3e84 size=68 align=80 ret=bfd33780 (detail=0xbfce5080)
|bfce2000| phys_alloc zone=0xbfcf3e84 size=68 align=80 ret=bfd33580 (detail=0xbfce5050)
|bfce4000| WARNING - Timeout at wait_bit:302!
|bfce4000| phys_free bfd33e40 (detail=0xbfce52e0)
|bfce4000| phys_free bfd33b00 (detail=0xbfce5280)
|bfce4000| phys_free bfd33d00 (detail=0xbfce52b0)
|bfce4000| phys_free bfd33e80 (detail=0xbfce5310)
|bfce4000| phys_free bfd33fb0 (detail=0xbfce5370)
\bfce4000/ End thread
phys_free bfce4000 (detail=0xbfce5340)
phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5380 (detail=0xbfce5350)
EHCI init on dev 00:13.2 (regs=0xf01d0020)
phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfce4000 (detail=0xbfce5320)
/bfce4000\ Start thread
|bfce4000| phys_alloc zone=0xbfcf3e84 size=4096 align=1000 ret=bfd31000 (detail=0xbfce52f0)
|bfce4000| phys_alloc zone=0xbfcf3e84 size=68 align=80 ret=bfd33f80 (detail=0xbfce52c0)
|bfce4000| phys_alloc zone=0xbfcf3e84 size=68 align=80 ret=bfd33f00 (detail=0xbfce5290)
|bfce2000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce5030 (detail=0xbfce5000)
|bfce2000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfce1000 (detail=0xbfce0fd0)
/bfce1000\ Start thread
|bfce1000| phys_free bfce5030 (detail=0xbfce5000)
\bfce1000/ End thread
phys_free bfce1000 (detail=0xbfce0fd0)
|bfce3000| WARNING - Timeout at wait_bit:302!
|bfce3000| phys_free bfd33c80 (detail=0xbfce51c0)
|bfce3000| phys_free bfd33600 (detail=0xbfce5160)
|bfce3000| phys_free bfd33800 (detail=0xbfce5190)
|bfce3000| phys_free bfd339c0 (detail=0xbfce51f0)
|bfce3000| phys_free bfd33cb0 (detail=0xbfce5250)
\bfce3000/ End thread
phys_free bfce3000 (detail=0xbfce5220)
phys_alloc zone=0xbfcf3e78 size=20 align=10 ret=bfce5270 (detail=0xbfce5240)
OHCI init on dev 00:12.0 (regs=0xf01cc000)
phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfce3000 (detail=0xbfce5210)
/bfce3000\ Start thread
|bfce3000| phys_alloc zone=0xbfcf3e84 size=256 align=100 ret=bfd33e00 (detail=0xbfce51e0)
|bfce3000| phys_alloc zone=0xbfcf3e84 size=16 align=10 ret=bfd33ff0 (detail=0xbfce51b0)
|bfce4000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce5190 (detail=0xbfce5160)
|bfce4000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfce1000 (detail=0xbfce5020)
/bfce1000\ Start thread
|bfce2000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce5000 (detail=0xbfce0fd0)
|bfce2000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcdf000 (detail=0xbfce0fa0)
/bfcdf000\ Start thread
phys_alloc zone=0xbfcf3e78 size=20 align=10 ret=bfce0f80 (detail=0xbfce0f50)
OHCI init on dev 00:13.0 (regs=0xf01cd000)
phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcde000 (detail=0xbfce0f20)
/bfcde000\ Start thread
|bfcde000| phys_alloc zone=0xbfcf3e84 size=256 align=100 ret=bfd33d00 (detail=0xbfce0ef0)
|bfcde000| phys_alloc zone=0xbfcf3e84 size=16 align=10 ret=bfd33fe0 (detail=0xbfce0ec0)
|bfce4000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce0ea0 (detail=0xbfce0e70)
|bfce4000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcdd000 (detail=0xbfce0e40)
/bfcdd000\ Start thread
|bfce2000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce0e20 (detail=0xbfce0df0)
|bfce2000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcdc000 (detail=0xbfce0dc0)
/bfcdc000\ Start thread
|bfcdc000| phys_free bfce0e20 (detail=0xbfce0df0)
\bfcdc000/ End thread
phys_free bfcdc000 (detail=0xbfce0dc0)
init ps2port
phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcdc000 (detail=0xbfce0e10)
/bfcdc000\ Start thread
|bfcdc000| i8042_flush
|bfcdc000| i8042_command cmd=ad
|bfcdc000| i8042_wait_write
|bfcdc000| i8042_command cmd=a7
|bfcdc000| i8042_wait_write
|bfcdc000| i8042_flush
|bfcdc000| i8042_command cmd=1aa
|bfcdc000| i8042_wait_write
|bfcdc000| i8042_wait_read
|bfcdc000| i8042 param=55
|bfcdc000| i8042_command cmd=1ab
|bfcdc000| i8042_wait_write
|bfcdc000| i8042_wait_read
|bfcdc000| i8042 param=0
|bfcdc000| ps2_command aux=0 cmd=1ff
|bfcdc000| i8042 ctr old=30 new=30
|bfcdc000| i8042_command cmd=1060
|bfcdc000| i8042_wait_write
|bfcdc000| i8042_wait_write
|bfce3000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce0df0 (detail=0xbfce0dc0)
|bfce3000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcdb000 (detail=0xbfce0d90)
/bfcdb000\ Start thread
|bfce4000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce0d70 (detail=0xbfce0d40)
|bfce4000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcda000 (detail=0xbfce0d10)
/bfcda000\ Start thread
|bfcda000| phys_free bfce0d70 (detail=0xbfce0d40)
\bfcda000/ End thread
phys_free bfcda000 (detail=0xbfce0d10)
|bfcdd000| phys_free bfce0ea0 (detail=0xbfce0e70)
\bfcdd000/ End thread
phys_free bfcdd000 (detail=0xbfce0e40)
|bfce1000| phys_free bfce5190 (detail=0xbfce5160)
\bfce1000/ End thread
phys_free bfce1000 (detail=0xbfce5020)
|bfce2000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce5190 (detail=0xbfce5160)
|bfce2000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfce1000 (detail=0xbfce5020)
/bfce1000\ Start thread
|bfce1000| phys_free bfce5190 (detail=0xbfce5160)
\bfce1000/ End thread
phys_free bfce1000 (detail=0xbfce5020)
|bfcdf000| set_address 0xbfce5140
init floppy drives
init hard drives
init ahci
phys_alloc zone=0xbfcf3e88 size=2048 align=10 ret=eab40 (detail=0xbfce5180)
phys_alloc zone=0xbfcf3e80 size=20 align=10 ret=f4f10 (detail=0xbfce5020)
AHCI controller at 00:11.0, iobase 0xf01ce000, irq 0
AHCI: cap 0xf3309f07, ports_impl 0x1
phys_alloc zone=0xbfcf3e78 size=68 align=10 ret=bfce1fb0 (detail=0xbfce1f80)
phys_alloc zone=0xbfcf3e78 size=1024 align=400 ret=bfce1800 (detail=0xbfce1f50)
phys_alloc zone=0xbfcf3e78 size=256 align=100 ret=bfce1e00 (detail=0xbfce1f20)
phys_alloc zone=0xbfcf3e78 size=256 align=100 ret=bfce1d00 (detail=0xbfce1cd0)
phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcdd000 (detail=0xbfce1ca0)
/bfcdd000\ Start thread
|bfcdd000| AHCI/0: probing
|bfcdc000| i8042_command cmd=1060
|bfcdc000| i8042_wait_write
|bfcdc000| i8042_wait_write
|bfcdc000| ps2_sendbyte aux=0 cmd=ff
|bfcdc000| i8042_kbd_write c=255
|bfcdc000| i8042_wait_write
|bfcde000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce5160 (detail=0xbfce1c70)
|bfcde000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcda000 (detail=0xbfce1c40)
/bfcda000\ Start thread
|bfce3000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce1f00 (detail=0xbfce1c10)
|bfce3000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcd9000 (detail=0xbfce17d0)
/bfcd9000\ Start thread
|bfcd9000| phys_free bfce1f00 (detail=0xbfce1c10)
\bfcd9000/ End thread
phys_free bfcd9000 (detail=0xbfce17d0)
|bfcdb000| set_address 0xbfce5270
|bfce4000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce1f00 (detail=0xbfce1c10)
|bfce4000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcd9000 (detail=0xbfce17d0)
/bfcd9000\ Start thread
|bfcd9000| phys_free bfce1f00 (detail=0xbfce1c10)
\bfcd9000/ End thread
phys_free bfcd9000 (detail=0xbfce17d0)
|bfce2000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce1f00 (detail=0xbfce1c10)
|bfce2000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcd9000 (detail=0xbfce17d0)
/bfcd9000\ Start thread
|bfcd9000| phys_free bfce1f00 (detail=0xbfce1c10)
\bfcd9000/ End thread
phys_free bfcd9000 (detail=0xbfce17d0)
|bfcdf000| ehci_alloc_async_pipe 0xbfce5140 0
|bfcdf000| phys_alloc zone=0xbfcf3e78 size=92 align=80 ret=bfce1780 (detail=0xbfce1c10)
|bfcdf000| ehci_send_pipe qh=0xbfce1780 dir=0 data=0x00000000 size=0
init megasas
init nvme
init lpt
Found 0 lpt ports
init serial
Found 1 serial ports
|bfcdd000| AHCI/0: link down
|bfcdc000| ps2 read fe
|bfcdc000| Got ps2 nak (status=51)
|bfcdc000| i8042_command cmd=1060
|bfcdc000| i8042_wait_write
|bfcdc000| i8042_wait_write
|bfcdc000| ps2 command 1ff failed (aux=0)
\bfcdc000/ End thread
phys_free bfcdc000 (detail=0xbfce0e10)
|bfcde000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce1f00 (detail=0xbfce1750)
|bfcde000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcdc000 (detail=0xbfce1720)
/bfcdc000\ Start thread
|bfcdc000| phys_free bfce1f00 (detail=0xbfce1750)
\bfcdc000/ End thread
phys_free bfcdc000 (detail=0xbfce1720)
|bfcda000| phys_free bfce5160 (detail=0xbfce1c70)
\bfcda000/ End thread
phys_free bfcda000 (detail=0xbfce1c40)
|bfce3000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce5160 (detail=0xbfce1c70)
|bfce3000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcdc000 (detail=0xbfce1c40)
/bfcdc000\ Start thread
|bfcdc000| phys_free bfce5160 (detail=0xbfce1c70)
\bfcdc000/ End thread
phys_free bfcdc000 (detail=0xbfce1c40)
|bfcdb000| ohci_alloc_async_pipe 0xbfce5270
|bfcdb000| phys_alloc zone=0xbfcf3e78 size=44 align=10 ret=bfce1c70 (detail=0xbfce1c40)
|bfcdb000| ohci_send_pipe 0xbfce1c80
|bfce4000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce5160 (detail=0xbfce1750)
|bfce4000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcdc000 (detail=0xbfce1720)
/bfcdc000\ Start thread
|bfcdc000| phys_free bfce5160 (detail=0xbfce1750)
\bfcdc000/ End thread
phys_free bfcdc000 (detail=0xbfce1720)
|bfcdd000| phys_free bfce1800 (detail=0xbfce1f50)
|bfcdd000| phys_free bfce1e00 (detail=0xbfce1f20)
|bfcdd000| phys_free bfce1d00 (detail=0xbfce1cd0)
|bfcdd000| phys_free bfce1fb0 (detail=0xbfce1f80)
\bfcdd000/ End thread
phys_free bfcdd000 (detail=0xbfce1ca0)
|bfcde000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce5160 (detail=0xbfce1fd0)
|bfcde000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcdd000 (detail=0xbfce1fa0)
/bfcdd000\ Start thread
|bfcdd000| phys_free bfce5160 (detail=0xbfce1fd0)
\bfcdd000/ End thread
phys_free bfcdd000 (detail=0xbfce1fa0)
|bfce3000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce5160 (detail=0xbfce1fd0)
|bfce3000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcdd000 (detail=0xbfce1fa0)
/bfcdd000\ Start thread
|bfcdd000| phys_free bfce5160 (detail=0xbfce1fd0)
\bfcdd000/ End thread
phys_free bfcdd000 (detail=0xbfce1fa0)
|bfce4000| ehci_free_pipes 0xbfce5380
|bfcdf000| ehci_alloc_async_pipe 0xbfce5140 0
|bfcdf000| config_usb: 0xbfce17d0
|bfcdf000| ehci_send_pipe qh=0xbfce1780 dir=128 data=0xbfcdff8a size=8
|bfcde000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce5160 (detail=0xbfce1fd0)
|bfcde000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcdd000 (detail=0xbfce1fa0)
/bfcdd000\ Start thread
|bfcdd000| phys_free bfce5160 (detail=0xbfce1fd0)
\bfcdd000/ End thread
phys_free bfcdd000 (detail=0xbfce1fa0)
|bfce3000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce5160 (detail=0xbfce1fd0)
|bfce3000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcdd000 (detail=0xbfce1fa0)
/bfcdd000\ Start thread
|bfcdd000| phys_free bfce5160 (detail=0xbfce1fd0)
\bfcdd000/ End thread
phys_free bfcdd000 (detail=0xbfce1fa0)
|bfcdb000| ohci_alloc_async_pipe 0xbfce5270
|bfcdb000| config_usb: 0xbfce1c80
|bfcdb000| ohci_send_pipe 0xbfce1c80
|bfcdf000| device rev=0210 cls=00 sub=00 proto=00 size=64
|bfcdf000| ehci_alloc_async_pipe 0xbfce5140 0
|bfcdf000| ehci_send_pipe qh=0xbfce1780 dir=128 data=0xbfcdffb0 size=9
|bfcde000| phys_alloc zone=0xbfcf3e78 size=28 align=10 ret=bfce5160 (detail=0xbfce1fd0)
|bfcde000| phys_alloc zone=0xbfcf3e78 size=4096 align=1000 ret=bfcdd000 (detail=0xbfce1fa0)
/bfcdd000\ Start thread
|bfcdd000| phys_free bfce5160 (detail=0xbfce1fd0)
\bfcdd000/ End thread
phys_free bfcdd000 (detail=0xbfce1fa0)
|bfcdb000| device rev=0110 cls=00 sub=00 proto=00 size=8
|bfcdb000| ohci_alloc_async_pipe 0xbfce5270
|bfcdb000| ohci_send_pipe 0xbfce1c80
|bfce4000| phys_free bfd31000 (detail=0xbfce52f0)
|bfce4000| phys_free bfd33f80 (detail=0xbfce52c0)
|bfce4000| phys_free bfd33f00 (detail=0xbfce5290)
|bfce4000| phys_free bfce5380 (detail=0xbfce5350)
\bfce4000/ End thread
phys_free bfce4000 (detail=0xbfce5320)
|bfcdf000| phys_alloc zone=0xbfcf3e78 size=32 align=10 ret=bfce5380 (detail=0xbfce5350)
|bfcdf000| ehci_send_pipe qh=0xbfce1780 dir=128 data=0xbfce5380 size=32
|bfcde000| ohci_free_pipes 0xbfce0f80
|bfcdb000| phys_alloc zone=0xbfcf3e78 size=59 align=10 ret=bfce5310 (detail=0xbfce52e0)
|bfcdb000| ohci_send_pipe 0xbfce1c80
|bfcdf000| ehci_send_pipe qh=0xbfce1780 dir=0 data=0x00000000 size=0
|bfcde000| phys_free bfd33d00 (detail=0xbfce0ef0)
|bfcde000| phys_free bfd33fe0 (detail=0xbfce0ec0)
\bfcde000/ End thread
phys_free bfcde000 (detail=0xbfce0f20)
|bfcdb000| ohci_send_pipe 0xbfce1c80
|bfcdf000| ehci_alloc_async_pipe 0xbfce5140 2
|bfcdf000| phys_alloc zone=0xbfcf3e88 size=92 align=80 ret=eaa80 (detail=0xbfce52b0)
|bfcdf000| ehci_alloc_async_pipe 0xbfce5140 2
|bfcdf000| phys_alloc zone=0xbfcf3e88 size=92 align=80 ret=eaa00 (detail=0xbfce4fd0)
|bfcdf000| ehci_send_pipe qh=0xbfce1780 dir=128 data=0xbfcdff9c size=1
|bfcdb000| usb_hid_setup 0xbfce1c80
|bfcdb000| ohci_send_pipe 0xbfce1c80
|bfcdf000| phys_alloc zone=0xbfcf3e80 size=48 align=10 ret=f4ee0 (detail=0xbfce4fa0)
|bfcdf000| Searching bootorder for: /pci@i0cf8/usb@12,2/storage@2/*@0/*@0,0
|bfcdf000| Searching bootorder for: /pci@i0cf8/usb@12,2/usb-*@2
|bfcdf000| ehci_send_pipe qh=0x000eaa00 dir=0 data=0xbfcdfe11 size=31
|bfcdb000| ohci_send_pipe 0xbfce1c80
|bfcdf000| ehci_send_pipe qh=0x000eaa80 dir=128 data=0xbfcdff00 size=36
|bfcdb000| ohci_alloc_intr_pipe 0xbfce5270 4
|bfcdb000| phys_alloc zone=0xbfcf3e88 size=44 align=10 ret=eab10 (detail=0xbfce4f70)
|bfcdb000| phys_alloc zone=0xbfcf3e88 size=128 align=10 ret=ea980 (detail=0xbfce4f40)
|bfcdb000| phys_alloc zone=0xbfcf3e88 size=64 align=10 ret=ea940 (detail=0xbfce4f10)
|bfcdb000| USB keyboard initialized
|bfcdb000| phys_free bfce5310 (detail=0xbfce52e0)
|bfcdb000| phys_free bfce0df0 (detail=0xbfce0dc0)
\bfcdb000/ End thread
phys_free bfcdb000 (detail=0xbfce0d90)
|bfce3000| ohci_free_pipes 0xbfce5270
|bfce3000| phys_free bfce1c70 (detail=0xbfce1c40)
\bfce3000/ End thread
phys_free bfce3000 (detail=0xbfce5210)
|bfcdf000| ehci_send_pipe qh=0x000eaa80 dir=128 data=0xbfcdfe04 size=13
|bfcdf000| USB MSC vendor='JetFlash' product='Transcend 32GB' rev='1100' type=0 removable=1
|bfcdf000| scsi_is_ready (drive=0x000f4ee0)
|bfcdf000| ehci_send_pipe qh=0x000eaa00 dir=0 data=0xbfcdfdd5 size=31
|bfcdf000| ehci_send_pipe qh=0x000eaa80 dir=128 data=0xbfcdfdc8 size=13
|bfcdf000| ehci_send_pipe qh=0x000eaa00 dir=0 data=0xbfcdfe11 size=31
|bfcdf000| ehci_send_pipe qh=0x000eaa80 dir=128 data=0xbfcdfeba size=8
|bfcdf000| ehci_send_pipe qh=0x000eaa80 dir=128 data=0xbfcdfe04 size=13
|bfcdf000| USB MSC blksize=512 sectors=61702144
|bfcdf000| phys_alloc zone=0xbfcf3e78 size=80 align=10 ret=bfce5300 (detail=0xbfce5210)
|bfcdf000| phys_alloc zone=0xbfcf3e78 size=24 align=10 ret=bfce52e0 (detail=0xbfce4ee0)
|bfcdf000| Registering bootable: USB MSC Drive JetFlash Transcend 32GB 1100 (type:2 prio:103 data:f4ee0)
|bfcdf000| phys_free bfce5380 (detail=0xbfce5350)
|bfcdf000| phys_free bfce5000 (detail=0xbfce0fd0)
\bfcdf000/ End thread
phys_free bfcdf000 (detail=0xbfce0fa0)
|bfce2000| ehci_free_pipes 0xbfce5140
|bfce2000| phys_free bfce1780 (detail=0xbfce1c10)
\bfce2000/ End thread
phys_free bfce2000 (detail=0xbfce50e0)
All threads complete.
Scan for option roms
Attempting to init PCI bdf 00:00.0 (vd 1022:1410)
Attempting to map option rom on dev 00:00.0
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:00.2 (vd 1022:1419)
Attempting to map option rom on dev 00:00.2
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:01.1 (vd 1002:9902)
Attempting to map option rom on dev 00:01.1
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:14.0 (vd 1022:780b)
Attempting to map option rom on dev 00:14.0
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:14.2 (vd 1022:780d)
Attempting to map option rom on dev 00:14.2
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:14.3 (vd 1022:780e)
Attempting to map option rom on dev 00:14.3
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:14.4 (vd 1022:780f)
Attempting to map option rom on dev 00:14.4
Skipping non-normal pci device (type=81)
Attempting to init PCI bdf 00:15.0 (vd 1022:43a0)
Attempting to map option rom on dev 00:15.0
Skipping non-normal pci device (type=81)
Attempting to init PCI bdf 00:18.0 (vd 1022:1400)
Attempting to map option rom on dev 00:18.0
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:18.1 (vd 1022:1401)
Attempting to map option rom on dev 00:18.1
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:18.2 (vd 1022:1402)
Attempting to map option rom on dev 00:18.2
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:18.3 (vd 1022:1403)
Attempting to map option rom on dev 00:18.3
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:18.4 (vd 1022:1404)
Attempting to map option rom on dev 00:18.4
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:18.5 (vd 1022:1405)
Attempting to map option rom on dev 00:18.5
Option rom sizing returned 0 0
Attempting to init PCI bdf 02:00.0 (vd 14e4:1677)
Attempting to map option rom on dev 02:00.0
Option rom sizing returned f0010000 ffff0000
Inspecting possible rom at 0xf0010000 (vd=14e4:1677 bdf=02:00.0)
Copying option rom (size 14336) from 0xf0010000 to 0x000cf800
Checking rom 0x000cf800 (sig aa55 size 28)
Running option rom at cf80:0003
Checking rom 0x000cf800 (sig aa55 size 13)
Searching bootorder for: /pci@i0cf8/pci-bridge@15/*@0
phys_alloc zone=0xbfcf3e78 size=24 align=10 ret=bfce5380 (detail=0xbfce5350)
Registering bootable: MBA v9.0.12  Slot 0200 (type:128 prio:104 data:cf801101)

Press ESC for boot menu.

Checking for bootsplash
Searching bootorder for: HALT
Mapping hd drive 0x000f4ee0 to 0
drive 0x000f4ee0: PCHS=0/0/0 translation=lba LCHS=1024/255/63 s=61702144
finalize PMM
malloc finalize
Add to e820 map: 0009fc00 00000400 2
Space available for UMB: d1800-ea800, f49c0-f4ee0
Add to e820 map: bfcf4000 0003e000 1
Returned 253952 bytes of ZoneHigh
e820 map has 7 items:
  0: 0000000000000000 - 000000000009fc00 = 1 RAM
  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 00000000bfd32000 = 1 RAM
  4: 00000000bfd32000 - 00000000e0000000 = 2 RESERVED
  5: 00000000f8000000 - 00000000fc000000 = 2 RESERVED
  6: 0000000100000000 - 000000011f000000 = 1 RAM
Jump to int19
enter handle_19:
  NULL
Booting from Hard Disk...
Booting from 0000:7c00