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lr35902-masm

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Feb 8th, 2020
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  1. ;; cpu_optick.asm  (old version for MASM Assembler)
  2. ;; Sharp LR35902 Chip Opcode for GameBoy
  3. ;;
  4. ;; Copyright (C) 2018 moecmks
  5. ;; This file is part of KS3578.
  6. ;;
  7. ;; do What The Fuck you want to Public License
  8. ;;
  9. ;; Version 1.0, March 2000
  10. ;; Copyright (C) 2000 Banlu Kemiyatorn (]d).
  11. ;; 136 Nives 7 Jangwattana 14 Laksi Bangkok
  12. ;; Everyone is permitted to copy and distribute verbatim copies
  13. ;; of this license document, but changing it is not allowed.
  14. ;;
  15. ;; Ok, the purpose of this license is simple
  16. ;; and you just
  17. ;;
  18. ;; DO WHAT THE FUCK YOU WANT TO.
  19. ;;
  20.  
  21.   .686                      ; create 32 bit code          
  22.   .model flat, stdcall      ; 32 bit memory model
  23.   option casemap :none      ; case sensitive
  24.  
  25. ;; Sharp LR35902 Chip opcode mapper
  26. ;; http://www.pastraiser.com/cpu/gameboy/gameboy_opcodes.html
  27. ;; Z80 Chip opcode mapper
  28. ;; http://clrhome.org/table/
  29.  
  30. ;; Register F Mask
  31. ;; The register flag field is different from the standard, in order to optimize instruction operation.
  32. Z_FLAG equ 040H
  33. H_FLAG equ 010H
  34. N_FLAG equ 002H
  35. C_FLAG equ 001H
  36. ZC_FLAG equ 041H
  37.  
  38. ;; extern memory/IO read/write
  39. extrn gameboy_mmu_read@8:proc  ;; prototype ks_uint8 __stdcall gameboy_mmu_read (void;;gameboy, ks_uint16 addresss)
  40. extrn gameboy_mmu_write@12:proc ;; prototype void __stdcall gameboy_mmu_write (void;;gameboy, ks_uint16 addresss, ks_uint8 value)
  41. extrn gameboy_mmu_read_w@8:proc ;; prototype ks_uint16 __stdcall gameboy_mmu_read_w (void;;gameboy, ks_uint16 addresss)
  42. extrn gameboy_mmu_write_w@12:proc ;; prototype void __stdcall gameboy_mmu_write_w (void;;gameboy, ks_uint16 addresss, ks_uint16 value)
  43.  
  44. ;;  define union .
  45. defREG macro lo, hi
  46.   union
  47.     struct
  48.       lo db ?
  49.       hi db ?
  50.     ends
  51.     hi&lo dw ?
  52.   ends
  53. endm
  54.  
  55. defREG2 macro lo, hi, blk
  56.   union
  57.     struct
  58.       lo db ?
  59.       hi db ?
  60.     ends
  61.     blk dw ?
  62.   ends
  63. endm
  64.  
  65. ;;  XXX:memory order dep.
  66. cpu struct
  67.   defREG F, A  ;; A (Accumulator)
  68.                ;; probably the most commonly used register.
  69.                ;; Many instructions have special extended operation codes for accumulators.
  70.                ;; F (Program status byte)
  71.                
  72.   ;; defREG C, B ;; A2008: syntax error : C
  73.   union
  74.     struct
  75.       C_ db ?
  76.       B db ?
  77.     ends
  78.     BC dw ?
  79.   ends           ;; Register BC, without special explanation.
  80.   defREG E, D    ;; Register DE, without special explanation.
  81.   defREG L, H    ;; Register HL, which is mostly used to address 16-bit address data,
  82.                  ;;                              also has the basic properties of BC, DE registers
  83.   defREG2 SP_LO, SP_HI, SP_ ;; Stack Pointer.
  84.   defREG2 PC_LO, PC_HI, PC ;; Program Pointer.
  85.  
  86.   IME db ?        ;; Interrupt Master Enable
  87.  
  88.   halt dd ?     ;; for Halt
  89.  
  90.   stop dd ?     ;; for stop
  91.   _backup dd ?     ;; for halt bug
  92.   key1 db ?  
  93.  
  94.   gameboy dd ?
  95. cpu ends
  96.  
  97.     .code
  98.  
  99. ;;  prototype ks_trigger32 cpu_optick (struct cpu;;cpu_);
  100. cpu_optick proc C
  101.              option prologue:none, epilogue:none
  102.  
  103.         push ebx ;U -  save old frame      
  104.         push edi ;V -  save old frame
  105.         push esi
  106.         nop  
  107.        
  108. YG_PF_8 equ bl        
  109. YG_PF equ ebx
  110. YG_PC equ esi
  111. YG_GP equ edi
  112.  
  113. _GB_INT3_ASSERT macro address
  114.   .if [YG_GP].PC == address
  115.     int 3
  116.   .endif
  117. endm  
  118.         ; ebx <- save now P (cpu's PSB reg)
  119.         ; esi <- save now PC (cpu's EIP reg)
  120.         ; edi <- save regs root
  121.         ; eax <- calc temp or final calc out reslt
  122.         ; ecx <- calc temp
  123.         ; edx <- calc temp
  124.        
  125.         mov YG_GP, [esp+4+12]   ;; fetch CPU struct
  126.         mov si, [YG_GP].PC  
  127.         mov bl, [YG_GP].F
  128.         assume edi:ptr cpu
  129. ;;_GB_INT3_ASSERT 0C000H
  130.         ; Fetch Opcode, PC++
  131.         push YG_PC
  132.         push [YG_GP].gameboy
  133.         call gameboy_mmu_read@8
  134.         inc YG_PC
  135.         and eax, 255
  136.         add esi, [YG_GP]._backup
  137.         jmp dword ptr[OPTAB+eax*4]
  138.        
  139. EmptyMacro macro
  140. endm  
  141.  
  142. SetCyclesAndRet macro Cycles
  143.   ;; write back PC
  144.   mov [YG_GP].PC, si
  145.   mov eax, Cycles
  146.   jmp V_EXIT
  147. endm
  148.  
  149. SetCyclesRetP macro Cycles
  150.   ;; write back PC
  151.   mov [YG_GP].F, bl
  152.   SetCyclesAndRet Cycles
  153. endm
  154.  
  155. ;;  Register access-write unwind
  156. B_Write equ mov [YG_GP].B, al
  157. C_Write equ mov [YG_GP].C_, al
  158. D_Write equ mov [YG_GP].D, al
  159. E_Write equ mov [YG_GP].E, al
  160. H_Write equ mov [YG_GP].H, al
  161. L_Write equ mov [YG_GP].L, al
  162. A_Write equ mov [YG_GP].A, al
  163. F_Write equ mov [YG_GP].F, al
  164. SP_Write equ mov [YG_GP].SP_, ax
  165. DE_Write equ mov [YG_GP].DE, ax
  166. BC_Write equ mov [YG_GP].BC, ax
  167. HL_Write equ mov [YG_GP].HL, ax
  168. AF_Write equ mov [YG_GP].AF, ax
  169. PC_Write equ mov [YG_GP].PC, ax
  170.  
  171. ;; (Imm16) := Z80Register:BYTE
  172. xImm16_WriteReg8 macro _Reg
  173.   mov cl, [YG_GP]._Reg
  174.   push ecx
  175.   push eax
  176.   push [YG_GP].gameboy
  177.   call gameboy_mmu_write@12  
  178. endm
  179.  
  180. ;; (Imm16) := Z80Register:WORD
  181. xImm16_WriteReg16 macro _Reg
  182.   mov cx, [YG_GP]._Reg
  183.   push ecx
  184.   push eax
  185.   push [YG_GP].gameboy
  186.   call gameboy_mmu_write_w@12  
  187. endm
  188.  
  189. ;; (Imm16) := Z80Register-SP
  190. xImm16_WriteRegSP macro
  191.   xImm16_WriteReg16 SP_
  192. endm
  193.  
  194. ;; (Imm16) := Z80Register-A
  195. xImm16_WriteRegA macro
  196.   xImm16_WriteReg8 A
  197. endm
  198.  
  199. ;; (Z80Register:WORD ) :=  Value8:eax::al
  200. xRegister_WriteReg8 macro _Reg
  201.   push eax
  202.   mov ax, [YG_GP]._Reg
  203.   push eax
  204.   push [YG_GP].gameboy
  205.   call gameboy_mmu_write@12
  206. endm
  207.  
  208. ;; Unwind4
  209. xBC_Write equ xRegister_WriteReg8 BC  
  210. xDE_Write equ xRegister_WriteReg8 DE
  211. xHL_Write equ xRegister_WriteReg8 HL
  212. xAF_Write equ xRegister_WriteReg8 AF
  213. xPC_Write equ xRegister_WriteReg8 PC
  214.  
  215. xHL_Write_Inc macro
  216.   xHL_Write
  217.   inc [YG_GP].HL
  218. endm
  219.  
  220. xHL_Write_Dec macro
  221.   xHL_Write
  222.   dec [YG_GP].HL
  223. endm
  224.  
  225. ;;  Register access-read unwind
  226. B_Read equ  mov al, [YG_GP].B
  227. C_Read equ  mov al, [YG_GP].C_
  228. D_Read equ  mov al, [YG_GP].D
  229. E_Read equ  mov al, [YG_GP].E
  230. H_Read equ  mov al, [YG_GP].H
  231. L_Read equ  mov al, [YG_GP].L
  232. A_Read equ  mov al, [YG_GP].A
  233. BC_Read equ  mov ax, [YG_GP].BC
  234. DE_Read equ  mov ax, [YG_GP].DE
  235. HL_Read equ  mov ax, [YG_GP].HL
  236. SP_Read equ  mov ax, [YG_GP].SP_
  237. AF_Read equ  mov ax, [YG_GP].AF
  238.  
  239. ;; Imm8:eax::al := FetchPC++
  240. Imm8_Read macro
  241.   push    esi
  242.   push   [YG_GP].gameboy
  243.   call    gameboy_mmu_read@8
  244.   inc     esi
  245. endm
  246.  
  247. ;; Imm16:eax::ax := FetchPC, FetchPC +=2
  248. Imm16_Read macro
  249.   push    esi
  250.   push   [YG_GP].gameboy
  251.   call    gameboy_mmu_read_w@8
  252.   add     esi, 2
  253. endm
  254.  
  255. Read_ByxX86SpecRegister macro _Reg
  256.   ;;  _Reg:x86Register
  257.   push    _Reg
  258.   push   [YG_GP].gameboy
  259.   call    gameboy_mmu_read@8
  260. endm
  261.  
  262. Imm8Read_ExpandAddress16 macro
  263.   Imm8_Read
  264.   and eax, 000FFh
  265.   add eax, 0FF00h
  266. endm
  267.  
  268. Imm8_ExpandSignWord macro
  269.   Imm8_Read
  270.   movsx eax, al
  271. endm
  272.  
  273. C_ExpandAddress16 macro
  274.   movzx eax, [YG_GP].C_
  275.   add eax, 0FF00h
  276. endm
  277.  
  278. Imm8Read_ExpandAddress16_Fetch macro
  279.   Imm8Read_ExpandAddress16
  280.   Read_ByxX86SpecRegister eax
  281. endm
  282.  
  283. Imm16Read_Address_Fetch macro
  284.   Imm16_Read
  285.   Read_ByxX86SpecRegister eax
  286. endm
  287.  
  288. C_ExpandAddress16_Fetch macro
  289.   mov al, [YG_GP].C_
  290.   add eax, 0FF00h
  291.   Read_ByxX86SpecRegister eax
  292. endm
  293.  
  294. xRegister_Read macro _Reg
  295.   mov ax, [YG_GP].&_Reg
  296.   push eax
  297.   push [YG_GP].gameboy
  298.   call gameboy_mmu_read@8
  299. endm
  300.  
  301. ;; Unwind5
  302. xBC_Read equ xRegister_Read BC  
  303. xDE_Read equ xRegister_Read DE
  304. xHL_Read equ xRegister_Read HL
  305. xAF_Read equ xRegister_Read AF
  306. xPC_Read equ xRegister_Read PC
  307.  
  308. xHL_Read_Inc macro
  309.   xHL_Read
  310.   inc [YG_GP].HL
  311. endm
  312.  
  313. xHL_Read_Dec macro
  314.   xHL_Read
  315.   dec [YG_GP].HL
  316. endm
  317.  
  318. LD@Imm8 macro OpCase, Cycles_, WriteOrExt
  319.  OpCase&:
  320.     Imm8_Read
  321.     WriteOrExt
  322.     SetCyclesAndRet Cycles_
  323. endm
  324.       LD@Imm8 OP06, 8,  B_Write ;; LD B Imm8, 2, Cycles:8
  325.       LD@Imm8 OP0E, 8,  C_Write ;; LD C Imm8, 2, Cycles:8
  326.       LD@Imm8 OP16, 8,  D_Write ;; LD D Imm8, 2, Cycles:8
  327.       LD@Imm8 OP1E, 8,  E_Write ;; LD E Imm8, 2, Cycles:8
  328.       LD@Imm8 OP26, 8,  H_Write ;; LD H Imm8, 2, Cycles:8
  329.       LD@Imm8 OP2E, 8,  L_Write ;; LD L Imm8, 2, Cycles:8
  330.       LD@Imm8 OP36,12,  xHL_Write ;; LD xHL Imm8, 2, Cycles:8
  331.       LD@Imm8 OP3E, 8,  A_Write ;; LD A Imm8, 2, Cycles:8
  332.    
  333. LD@Imm16 macro OpCase, Cycles_, lrReg
  334.  OpCase&:
  335.     Imm16_Read
  336.     mov [YG_GP].&lrReg, ax
  337.     SetCyclesAndRet Cycles_
  338. endm    
  339.       LD@Imm16 OP01, 12, BC ;; LD BC Imm16, 3 Cycles:12
  340.       LD@Imm16 OP11, 12, DE ;; LD DE Imm16, 3 Cycles:12    
  341.       LD@Imm16 OP21, 12, HL ;; LD HL Imm16, 3 Cycles:12    
  342.       LD@Imm16 OP31, 12, SP_ ;; LD SP Imm16, 3 Cycles:12      
  343.  
  344. LD@RxHLToRxHL macro OpCase, Cycles_, ReadOrExt, WriteOrExt
  345.  OpCase&:
  346.     ReadOrExt
  347.     WriteOrExt
  348.     SetCyclesAndRet Cycles_
  349. endm      
  350.       LD@RxHLToRxHL OP40, 4, B_Read, B_Write ;; LD B B, 1 Cycles:4
  351.       LD@RxHLToRxHL OP41, 4, C_Read, B_Write ;; LD B C, 1 Cycles:4
  352.       LD@RxHLToRxHL OP42, 4, D_Read, B_Write ;; LD B D, 1 Cycles:4
  353.       LD@RxHLToRxHL OP43, 4, E_Read, B_Write ;; LD B E, 1 Cycles:4
  354.       LD@RxHLToRxHL OP44, 4, H_Read, B_Write ;; LD B H, 1 Cycles:4
  355.       LD@RxHLToRxHL OP45, 4, L_Read, B_Write ;; LD B L, 1 Cycles:4
  356.       LD@RxHLToRxHL OP46, 8, xHL_Read, B_Write ;; LD B xHL, 1 Cycles:8
  357.       LD@RxHLToRxHL OP47, 4, A_Read, B_Write ;; LD B A, 1 Cycles:4  
  358.      
  359.       LD@RxHLToRxHL OP48, 4, B_Read, C_Write ;; LD C B, 1 Cycles:4
  360.       LD@RxHLToRxHL OP49, 4, C_Read, C_Write ;; LD C C, 1 Cycles:4
  361.       LD@RxHLToRxHL OP4A, 4, D_Read, C_Write ;; LD C D, 1 Cycles:4
  362.       LD@RxHLToRxHL OP4B, 4, E_Read, C_Write ;; LD C E, 1 Cycles:4
  363.       LD@RxHLToRxHL OP4C, 4, H_Read, C_Write ;; LD C H, 1 Cycles:4
  364.       LD@RxHLToRxHL OP4D, 4, L_Read, C_Write ;; LD C L, 1 Cycles:4
  365.       LD@RxHLToRxHL OP4E, 8, xHL_Read, C_Write ;; LD C xHL, 1 Cycles:8
  366.       LD@RxHLToRxHL OP4F, 4, A_Read, C_Write ;; LD C A, 1 Cycles:4  
  367.  
  368.       LD@RxHLToRxHL OP50, 4, B_Read, D_Write ;; LD D B, 1 Cycles:4
  369.       LD@RxHLToRxHL OP51, 4, C_Read, D_Write ;; LD D C, 1 Cycles:4
  370.       LD@RxHLToRxHL OP52, 4, D_Read, D_Write ;; LD D D, 1 Cycles:4
  371.       LD@RxHLToRxHL OP53, 4, E_Read, D_Write ;; LD D E, 1 Cycles:4
  372.       LD@RxHLToRxHL OP54, 4, H_Read, D_Write ;; LD D H, 1 Cycles:4
  373.       LD@RxHLToRxHL OP55, 4, L_Read, D_Write ;; LD D L, 1 Cycles:4
  374.       LD@RxHLToRxHL OP56, 8, xHL_Read, D_Write ;; LD D xHL, 1 Cycles:8
  375.       LD@RxHLToRxHL OP57, 4, A_Read, D_Write ;; LD D A, 1 Cycles:4  
  376.      
  377.       LD@RxHLToRxHL OP58, 4, B_Read, E_Write ;; LD E B, 1 Cycles:4
  378.       LD@RxHLToRxHL OP59, 4, C_Read, E_Write ;; LD E C, 1 Cycles:4
  379.       LD@RxHLToRxHL OP5A, 4, D_Read, E_Write ;; LD E D, 1 Cycles:4
  380.       LD@RxHLToRxHL OP5B, 4, E_Read, E_Write ;; LD E E, 1 Cycles:4
  381.       LD@RxHLToRxHL OP5C, 4, H_Read, E_Write ;; LD E H, 1 Cycles:4
  382.       LD@RxHLToRxHL OP5D, 4, L_Read, E_Write ;; LD E L, 1 Cycles:4
  383.       LD@RxHLToRxHL OP5E, 8, xHL_Read, E_Write ;; LD E xHL, 1 Cycles:8
  384.       LD@RxHLToRxHL OP5F, 4, A_Read, E_Write ;; LD E A, 1 Cycles:4  
  385.  
  386.       LD@RxHLToRxHL OP60, 4, B_Read, H_Write ;; LD H B, 1 Cycles:4
  387.       LD@RxHLToRxHL OP61, 4, C_Read, H_Write ;; LD H C, 1 Cycles:4
  388.       LD@RxHLToRxHL OP62, 4, D_Read, H_Write ;; LD H D, 1 Cycles:4
  389.       LD@RxHLToRxHL OP63, 4, E_Read, H_Write ;; LD H E, 1 Cycles:4
  390.       LD@RxHLToRxHL OP64, 4, H_Read, H_Write ;; LD H H, 1 Cycles:4
  391.       LD@RxHLToRxHL OP65, 4, L_Read, H_Write ;; LD H L, 1 Cycles:4
  392.       LD@RxHLToRxHL OP66, 8, xHL_Read, H_Write ;; LD H xHL, 1 Cycles:8
  393.       LD@RxHLToRxHL OP67, 4, A_Read, H_Write ;; LD H A, 1 Cycles:4  
  394.      
  395.       LD@RxHLToRxHL OP68, 4, B_Read, L_Write ;; LD L B, 1 Cycles:4
  396.       LD@RxHLToRxHL OP69, 4, C_Read, L_Write ;; LD L C, 1 Cycles:4
  397.       LD@RxHLToRxHL OP6A, 4, D_Read, L_Write ;; LD L D, 1 Cycles:4
  398.       LD@RxHLToRxHL OP6B, 4, E_Read, L_Write ;; LD L E, 1 Cycles:4
  399.       LD@RxHLToRxHL OP6C, 4, H_Read, L_Write ;; LD L H, 1 Cycles:4
  400.       LD@RxHLToRxHL OP6D, 4, L_Read, L_Write ;; LD L L, 1 Cycles:4
  401.       LD@RxHLToRxHL OP6E, 8, xHL_Read, L_Write ;; LD L xHL, 1 Cycles:8
  402.       LD@RxHLToRxHL OP6F, 4, A_Read, L_Write ;; LD L A, 1 Cycles:4  
  403.        
  404.       LD@RxHLToRxHL OP70, 8, B_Read, xHL_Write ;; LD xHL B, 1 Cycles:8
  405.       LD@RxHLToRxHL OP71, 8, C_Read, xHL_Write ;; LD xHL C, 1 Cycles:8
  406.       LD@RxHLToRxHL OP72, 8, D_Read, xHL_Write ;; LD xHL D, 1 Cycles:8
  407.       LD@RxHLToRxHL OP73, 8, E_Read, xHL_Write ;; LD xHL E, 1 Cycles:8
  408.       LD@RxHLToRxHL OP74, 8, H_Read, xHL_Write ;; LD xHL H, 1 Cycles:8
  409.       LD@RxHLToRxHL OP75, 8, L_Read, xHL_Write ;; LD xHL L, 1 Cycles:8
  410.       ;; LD@RxHLToRxHL OP76, 8, xHL_Read, xHL_Write ;; LD xHL xHL, 1 Cycles:8
  411.       LD@RxHLToRxHL OP02, 8, A_Read, xBC_Write ;; LD xBC A, 1 Cycles:8    
  412.       LD@RxHLToRxHL OP12, 8, A_Read, xDE_Write ;; LD xDE A, 1 Cycles:8    
  413.       LD@RxHLToRxHL OP77, 8, A_Read, xHL_Write ;; LD xHL A, 1 Cycles:8    
  414.       LD@RxHLToRxHL OP22, 8, A_Read, xHL_Write_Inc;; LD xHL++ A, 1 Cycles:8  
  415.       LD@RxHLToRxHL OP32, 8, A_Read, xHL_Write_Dec ;; LD xHL-- A, 1 Cycles:8  
  416.        
  417.       LD@RxHLToRxHL OP78, 4, B_Read, A_Write ;; LD A B, 1 Cycles:4
  418.       LD@RxHLToRxHL OP79, 4, C_Read, A_Write ;; LD A C, 1 Cycles:4
  419.       LD@RxHLToRxHL OP7A, 4, D_Read, A_Write ;; LD A D, 1 Cycles:4
  420.       LD@RxHLToRxHL OP7B, 4, E_Read, A_Write ;; LD A E, 1 Cycles:4
  421.       LD@RxHLToRxHL OP7C, 4, H_Read, A_Write ;; LD A H, 1 Cycles:4
  422.       LD@RxHLToRxHL OP7D, 4, L_Read, A_Write ;; LD A L, 1 Cycles:4
  423.       LD@RxHLToRxHL OP0A, 8, xBC_Read, A_Write ;; LD A xBC, 1 Cycles:8
  424.       LD@RxHLToRxHL OP1A, 8, xDE_Read, A_Write ;; LD A xDE, 1 Cycles:8
  425.       LD@RxHLToRxHL OP7E, 8, xHL_Read, A_Write ;; LD A xHL, 1 Cycles:8
  426.       LD@RxHLToRxHL OP2A, 8, xHL_Read_Inc, A_Write ;; LD A xHL++, 1 Cycles:8
  427.       LD@RxHLToRxHL OP3A, 8, xHL_Read_Dec, A_Write ;; LD A xHL--, 1 Cycles:8
  428.       LD@RxHLToRxHL OP7F, 4, A_Read, A_Write ;; LD A A, 1 Cycles:4      
  429. ;; MISC LD
  430.       LD@RxHLToRxHL OP08,20, Imm16_Read, xImm16_WriteRegSP ;; LD (Imm16) SP, 3 Cycles:20
  431.       LD@RxHLToRxHL OPEA,16, Imm16_Read, xImm16_WriteRegA ;; LD (Imm16) A, 3 Cycles:16
  432.       LD@RxHLToRxHL OPE0,12, Imm8Read_ExpandAddress16, xImm16_WriteRegA ;; LD (Imm8+0FF00h) A, 2 Cycles:12
  433.       LD@RxHLToRxHL OPE2, 8, C_ExpandAddress16, xImm16_WriteRegA ;; LD (C+0FF00h) A, 2 Cycles:8  
  434.       LD@RxHLToRxHL OPF0,12, Imm8Read_ExpandAddress16_Fetch, A_Write ;; LD A, (Imm8+0FF00h)  2 Cycles:12
  435.       LD@RxHLToRxHL OPF2, 8, C_ExpandAddress16_Fetch, A_Write ;; LD A, (C+0FF00h) 2 Cycles:8    
  436.       LD@RxHLToRxHL OPFA,16, Imm16Read_Address_Fetch, A_Write ;; LD A, (Imm16) 3 Cycles:16
  437.       LD@RxHLToRxHL OPF9, 8, HL_Read, SP_Write ;; LD SP HL 1 Cycles:8
  438.      
  439.       OPF8: ;; LD HL SP+Imm8(sign8) 2 Cycles:12
  440.       Imm8_Read
  441.      
  442.       ;; Clear Reg-f
  443.       ;;xor YG_PF, YG_PF
  444.       xor edx, edx
  445.       ;; ext sign
  446.       movsx ax, al
  447.       mov cx, [YG_GP].SP_
  448.       and ecx, 0FFFFh
  449.       and eax, 0FFFFh
  450.       lea edx, [ecx+eax]
  451.       ;; SetH
  452.       mov [YG_GP].HL, dx
  453.       xor cx, ax
  454.       mov ax, dx
  455.       xor cx, ax
  456.       and cx, 01000h
  457.       shr cx, 8
  458.       ;;or YG_PF, ecx
  459.       ;; SetC
  460.       and dx, 010000h
  461.       shr dx, 16
  462.       ;;or YG_PF, edx
  463.       SetCyclesRetP 12
  464.      
  465.       ;; ALU, LOGIC 0x8x- 0xBx---------------------------------------------------------------------------------------
  466.  
  467. Add$c_xHLrToA macro atomic_it, Cycles
  468. ;; atomic_it 0(add) or 1(adc)
  469. ;; source value <- eax
  470. ;; target <- always register A
  471.   and eax, 0FFh ;; Value &= 0xFF
  472.   and YG_PF, atomic_it
  473.   shr YG_PF, 1 ;; check c-flags
  474.   movzx edx, [YG_GP].A
  475.   mov ecx, edx ;; temp WORD := A
  476.   adc ecx, eax ;; temp WORD := A + Value
  477.   mov [YG_GP].A, cl  ;; always write back A.
  478.   xor dx, ax  
  479.   mov ax, cx  
  480.   xor ax, dx  ;; temp WORD:= temp WORD^(A ^Value)
  481.   and ax, 010h
  482.   or YG_PF, eax   ;; SetH
  483.   or YG_PF_8, ch  ;; SetC
  484.   test cl, cl
  485.   setz cl
  486.   shl ecx, 6
  487.   or YG_PF, ecx ;; SetZ  XXX:ZTable
  488. endm
  489.      
  490. CmpSub$bc_xHLrToA macro atomic_it, Cycles, Register ;; [YG_GP].A || cl for cmp opcode
  491. ;; source <- eax
  492. ;; target <- always register A  or nodone
  493.   and eax, 0FFh ;; Value &= 0xFF
  494.   and YG_PF, atomic_it
  495.   shr YG_PF, 1 ;; check c-flags
  496.   movzx edx, [YG_GP].A
  497.   mov ecx, edx ;; temp WORD := A
  498.   sbb ecx, eax ;; temp WORD := A - Value
  499.   mov Register, cl  ;; always write back A.
  500.   xor dx, ax  
  501.   mov ax, cx  
  502.   xor ax, dx  ;; temp WORD:= temp WORD^(A ^Value)
  503.   and ax, 010h
  504.   or YG_PF, eax   ;; SetH
  505.   mov eax, ecx
  506.   shr ax, 15
  507.   or YG_PF_8, al  ;; SetC
  508.   test cl, cl
  509.   setz cl
  510.   shl ecx, 6
  511.   or YG_PF, ecx ;; SetZ  XXX:ZTable
  512.   or YG_PF, N_FLAG ;; SetN
  513. endm
  514.      
  515. ;; XOR | OR | AND do unwind base .
  516. Logic_T macro   Cycles, initFlags, LogicOp
  517. ;; source <- eax
  518. ;; target <- always register A
  519.  
  520. ;; clear psb .
  521.   mov YG_PF, initFlags
  522.   movzx edx, [YG_GP].A
  523.   LogicOp eax, edx
  524.   ;; always write back A.
  525.   mov [YG_GP].A, al
  526.  
  527.   ;; SetZ  XXX:ZTable
  528.   test al, al
  529.   setz al
  530.   shl eax, 6
  531.   or YG_PF, eax
  532. endm  
  533.      
  534. ;; unwind
  535. Add_ macro Cycles
  536.   Add$c_xHLrToA 0, Cycles
  537. endm
  538.  
  539. Adc_ macro Cycles
  540.   Add$c_xHLrToA 1, Cycles
  541. endm
  542.  
  543. Sub_ macro Cycles
  544.   CmpSub$bc_xHLrToA 0, Cycles, [YG_GP].A
  545. endm  
  546.      
  547. Sbc_ macro Cycles
  548.   CmpSub$bc_xHLrToA 1, Cycles, [YG_GP].A
  549. endm      
  550.  
  551. Cmp_ macro Cycles
  552.   CmpSub$bc_xHLrToA 0, Cycles, cl
  553. endm  
  554.      
  555. And_ macro Cycles
  556.   Logic_T Cycles, H_FLAG, and
  557. endm  
  558.      
  559. Xor_ macro Cycles
  560.   Logic_T Cycles, 0, xor
  561. endm      
  562.  
  563. Or_ macro Cycles
  564.   Logic_T Cycles, 0, or
  565. endm      
  566.  
  567. AddWord_  macro
  568. ;; source <- eax
  569. ;; target <- always register HL
  570.  
  571. ;; clear psb . save old Z
  572.   and YG_PF, Z_FLAG
  573.   movzx ecx, [YG_GP].HL
  574.   and eax, 0FFFFh
  575.   lea edx, [eax+ecx]
  576.   ;; always write back HL.
  577.   mov [YG_GP].HL, dx
  578.   ;; SetH
  579.   xor cx, ax
  580.   mov ax, dx
  581.   xor cx, ax
  582.   and cx, 01000h
  583.   shr cx, 8
  584.   or YG_PF, ecx
  585.   ;; SetC
  586.   and edx, 010000h
  587.   shr edx, 16
  588.   or YG_PF, edx
  589. endm
  590.  
  591. ;; TO SP
  592. AddWord2_  macro
  593. ;; source <- eax
  594. ;; target <- always register SP
  595.  
  596. ;; clear psb . save old Z
  597.   ;; xor YG_PF, YG_PF
  598.   movzx ecx, [YG_GP].SP_
  599.   and eax, 0FFFFh
  600.   lea edx, [eax+ecx]
  601.   ;; always write back SP.
  602.   mov [YG_GP].SP_, dx
  603.   ;; SetH
  604.   xor cx, ax
  605.   mov ax, dx
  606.   xor cx, ax
  607.   and cx, 01000h
  608.   shr cx, 8
  609.   ;;or YG_PF, ecx
  610.   ;; SetC
  611.   and dx, 010000h
  612.   shr dx, 16
  613.   ;;or YG_PF, edx
  614. endm
  615.  
  616.  
  617. DecWord_  macro
  618.   dec eax
  619. endm
  620.  
  621. IncWord_  macro
  622.   inc eax
  623. endm
  624.  
  625. Inc_  macro  ;; -----------------------
  626. ;; source <- eax
  627. ;; clear psb . save old Z
  628.   and YG_PF, C_FLAG
  629.   and eax, 0FFh
  630.   lea edx, [eax+1]
  631.   mov ecx, edx
  632.  
  633.   ;; SetH
  634.   xor cx, ax
  635.   and cx, 010h
  636.   or YG_PF, ecx
  637.  
  638.   mov eax, edx
  639.   test dl, dl
  640.   setz dl  
  641.   shl dl, 6
  642.   or YG_PF, edx
  643. endm
  644.  
  645. Dec_  macro  ;; -----------------------
  646. ;; source <- eax
  647. ;; clear psb . save old Z
  648.   and YG_PF, C_FLAG
  649.   or YG_PF, N_FLAG
  650.   and eax, 0FFh
  651.   lea edx, [eax-1]
  652.   mov ecx, edx
  653.  
  654.   ;; SetH
  655.   xor cx, ax
  656.   and cx, 010h
  657.   or YG_PF, ecx
  658.  
  659.   mov eax, edx
  660.   test dl, dl
  661.   setz dl
  662.   shl dl, 6
  663.   or YG_PF, edx
  664. endm
  665.  
  666. ;; --- Include OP, imm8 and ADD Word Register.
  667. Opcode@MainALU  macro  Opcode, Cycles, ReadOrExt, Op, WriteOrExt
  668.   Opcode&:
  669.     ReadOrExt
  670.     Op
  671.     WriteOrExt
  672.     SetCyclesRetP Cycles
  673. endm
  674.       Opcode@MainALU  OP80, 4, B_Read, Add_, EmptyMacro ;; ADD A, B  1 Cycles:4
  675.       Opcode@MainALU  OP81, 4, C_Read, Add_, EmptyMacro ;; ADD A, C  1 Cycles:4    
  676.       Opcode@MainALU  OP82, 4, D_Read, Add_, EmptyMacro ;; ADD A, D  1 Cycles:4
  677.       Opcode@MainALU  OP83, 4, E_Read, Add_, EmptyMacro ;; ADD A, E  1 Cycles:4      
  678.       Opcode@MainALU  OP84, 4, H_Read, Add_, EmptyMacro ;; ADD A, H  1 Cycles:4
  679.       Opcode@MainALU  OP85, 4, L_Read, Add_, EmptyMacro ;; ADD A, L  1 Cycles:4    
  680.       Opcode@MainALU  OP86, 8, xHL_Read, Add_, EmptyMacro ;; ADD A, xHL  1 Cycles:8
  681.       Opcode@MainALU  OP87, 4, A_Read, Add_, EmptyMacro ;; ADD A, A  1 Cycles:4  
  682.       Opcode@MainALU  OPC6, 8, Imm8_Read, Add_, EmptyMacro ;; ADD A, Imm8  2 Cycles:8
  683.       Opcode@MainALU  OP09, 8, BC_Read, AddWord_, HL_Write ;; ADD HL, BC  1 Cycles:8    
  684.       Opcode@MainALU  OP19, 8, DE_Read, AddWord_, HL_Write ;; ADD HL, DE  1 Cycles:8    
  685.       Opcode@MainALU  OP29, 8, HL_Read, AddWord_, HL_Write ;; ADD HL, HL  1 Cycles:8    
  686.       Opcode@MainALU  OP39, 8, SP_Read, AddWord_, HL_Write ;; ADD HL, SP  1 Cycles:8    
  687.       Opcode@MainALU  OPE8,16, Imm8_ExpandSignWord, AddWord2_, EmptyMacro ;; ADD SP, SignImm8  2 Cycles:16
  688.      
  689.       Opcode@MainALU  OP88, 4, B_Read, Adc_, EmptyMacro ;; ADC A, B  1 Cycles:4
  690.       Opcode@MainALU  OP89, 4, C_Read, Adc_, EmptyMacro ;; ADC A, C  1 Cycles:4    
  691.       Opcode@MainALU  OP8A, 4, D_Read, Adc_, EmptyMacro ;; ADC A, D  1 Cycles:4
  692.       Opcode@MainALU  OP8B, 4, E_Read, Adc_, EmptyMacro ;; ADC A, E  1 Cycles:4      
  693.       Opcode@MainALU  OP8C, 4, H_Read, Adc_, EmptyMacro ;; ADC A, H  1 Cycles:4
  694.       Opcode@MainALU  OP8D, 4, L_Read, Adc_, EmptyMacro ;; ADC A, L  1 Cycles:4    
  695.       Opcode@MainALU  OP8E, 8, xHL_Read, Adc_, EmptyMacro ;; ADC A, xHL  1 Cycles:8
  696.       Opcode@MainALU  OP8F, 4, A_Read, Adc_, EmptyMacro ;; ADC A, A  1 Cycles:4  
  697.       Opcode@MainALU  OPCE, 8, Imm8_Read, Adc_, EmptyMacro ;; ADC A, Imm8  2 Cycles:8    
  698.      
  699.       Opcode@MainALU  OP03, 8, BC_Read, IncWord_, BC_Write ;; INC BC  Cycles:8
  700.       Opcode@MainALU  OP13, 8, DE_Read, IncWord_, DE_Write ;; INC DE  Cycles:8
  701.       Opcode@MainALU  OP23, 8, HL_Read, IncWord_, HL_Write ;; INC HL  Cycles:8
  702.       Opcode@MainALU  OP33, 8, SP_Read, IncWord_, SP_Write ;; INC SP  Cycles:8
  703.      
  704.       Opcode@MainALU  OP04, 4, B_Read, Inc_, B_Write ;; INC B  1 Cycles:4
  705.       Opcode@MainALU  OP14, 4, D_Read, Inc_, D_Write ;; INC D  1 Cycles:4    
  706.       Opcode@MainALU  OP24, 4, H_Read, Inc_, H_Write ;; INC H  1 Cycles:4
  707.       Opcode@MainALU  OP34, 4, xHL_Read, Inc_, xHL_Write ;; INC xHL  1 Cycles:4      
  708.       Opcode@MainALU  OP0C, 4, C_Read, Inc_, C_Write ;; INC C  1 Cycles:4
  709.       Opcode@MainALU  OP1C, 4, E_Read, Inc_, E_Write ;; INC E  1 Cycles:4    
  710.       Opcode@MainALU  OP2C,12, L_Read, Inc_, L_Write ;; INC L  1 Cycles:12
  711.       Opcode@MainALU  OP3C, 4, A_Read, Inc_, A_Write ;; INC A  1 Cycles:4      
  712.      
  713.       Opcode@MainALU  OP90, 4, B_Read, Sub_, EmptyMacro ;; SUB A, B  1 Cycles:4
  714.       Opcode@MainALU  OP91, 4, C_Read, Sub_, EmptyMacro ;; SUB A, C  1 Cycles:4    
  715.       Opcode@MainALU  OP92, 4, D_Read, Sub_, EmptyMacro ;; SUB A, D  1 Cycles:4
  716.       Opcode@MainALU  OP93, 4, E_Read, Sub_, EmptyMacro ;; SUB A, E  1 Cycles:4      
  717.       Opcode@MainALU  OP94, 4, H_Read, Sub_, EmptyMacro ;; SUB A, H  1 Cycles:4
  718.       Opcode@MainALU  OP95, 4, L_Read, Sub_, EmptyMacro ;; SUB A, L  1 Cycles:4    
  719.       Opcode@MainALU  OP96, 8, xHL_Read, Sub_, EmptyMacro ;; SUB A, xHL  1 Cycles:8
  720.       Opcode@MainALU  OP97, 4, A_Read, Sub_, EmptyMacro ;; SUB A, A  1 Cycles:4  
  721.       Opcode@MainALU  OPD6, 8, Imm8_Read, Sub_, EmptyMacro ;; SUB A, Imm8  2 Cycles:8
  722.      
  723.       Opcode@MainALU  OP98, 4, B_Read, Sbc_, EmptyMacro ;; SBC A, B  1 Cycles:4
  724.       Opcode@MainALU  OP99, 4, C_Read, Sbc_, EmptyMacro ;; SBC A, C  1 Cycles:4    
  725.       Opcode@MainALU  OP9A, 4, D_Read, Sbc_, EmptyMacro ;; SBC A, D  1 Cycles:4
  726.       Opcode@MainALU  OP9B, 4, E_Read, Sbc_, EmptyMacro ;; SBC A, E  1 Cycles:4      
  727.       Opcode@MainALU  OP9C, 4, H_Read, Sbc_, EmptyMacro ;; SBC A, H  1 Cycles:4
  728.       Opcode@MainALU  OP9D, 4, L_Read, Sbc_, EmptyMacro ;; SBC A, L  1 Cycles:4    
  729.       Opcode@MainALU  OP9E, 8, xHL_Read, Sbc_, EmptyMacro ;; SBC A, xHL  1 Cycles:8
  730.       Opcode@MainALU  OP9F, 4, A_Read, Sbc_, EmptyMacro ;; SBC A, A  1 Cycles:4  
  731.       Opcode@MainALU  OPDE, 8, Imm8_Read, Sbc_, EmptyMacro ;; SBC A, Imm8  2 Cycles:8
  732.    
  733.       Opcode@MainALU  OP0B, 8, BC_Read, DecWord_, BC_Write ;; DEC BC  Cycles:8
  734.       Opcode@MainALU  OP1B, 8, DE_Read, DecWord_, DE_Write ;; DEC DE  Cycles:8
  735.       Opcode@MainALU  OP2B, 8, HL_Read, DecWord_, HL_Write ;; DEC HL  Cycles:8
  736.       Opcode@MainALU  OP3B, 8, SP_Read, DecWord_, SP_Write ;; DEC SP  Cycles:8
  737.      
  738.       Opcode@MainALU  OP05, 4, B_Read, Dec_, B_Write ;; DEC B  1 Cycles:4
  739.       Opcode@MainALU  OP15, 4, D_Read, Dec_, D_Write ;; DEC D  1 Cycles:4    
  740.       Opcode@MainALU  OP25, 4, H_Read, Dec_, H_Write ;; DEC H  1 Cycles:4
  741.       Opcode@MainALU  OP35, 4, xHL_Read, Dec_, xHL_Write ;; DEC xHL  1 Cycles:4      
  742.       Opcode@MainALU  OP0D, 4, C_Read, Dec_, C_Write ;; DEC C  1 Cycles:4
  743.       Opcode@MainALU  OP1D, 4, E_Read, Dec_, E_Write ;; DEC E  1 Cycles:4    
  744.       Opcode@MainALU  OP2D,12, L_Read, Dec_, L_Write ;; DEC L  1 Cycles:12
  745.       Opcode@MainALU  OP3D, 4, A_Read, Dec_, A_Write ;; DEC A  1 Cycles:4  
  746.      
  747.       Opcode@MainALU  OPA0, 4, B_Read, And_, EmptyMacro ;; AND A, B  1 Cycles:4
  748.       Opcode@MainALU  OPA1, 4, C_Read, And_, EmptyMacro ;; AND A, C  1 Cycles:4    
  749.       Opcode@MainALU  OPA2, 4, D_Read, And_, EmptyMacro ;; AND A, D  1 Cycles:4
  750.       Opcode@MainALU  OPA3, 4, E_Read, And_, EmptyMacro ;; AND A, E  1 Cycles:4      
  751.       Opcode@MainALU  OPA4, 4, H_Read, And_, EmptyMacro ;; AND A, H  1 Cycles:4
  752.       Opcode@MainALU  OPA5, 4, L_Read, And_, EmptyMacro ;; AND A, L  1 Cycles:4    
  753.       Opcode@MainALU  OPA6, 8, xHL_Read, And_, EmptyMacro ;; AND A, xHL  1 Cycles:8
  754.       Opcode@MainALU  OPA7, 4, A_Read, And_, EmptyMacro ;; AND A, A  1 Cycles:4  
  755.       Opcode@MainALU  OPE6, 8, Imm8_Read, And_, EmptyMacro ;; AND A, Imm8  2 Cycles:8
  756.        
  757.       Opcode@MainALU  OPA8, 4, B_Read, Xor_, EmptyMacro ;; XOR A, B  1 Cycles:4
  758.       Opcode@MainALU  OPA9, 4, C_Read, Xor_, EmptyMacro ;; XOR A, C  1 Cycles:4    
  759.       Opcode@MainALU  OPAA, 4, D_Read, Xor_, EmptyMacro ;; XOR A, D  1 Cycles:4
  760.       Opcode@MainALU  OPAB, 4, E_Read, Xor_, EmptyMacro ;; XOR A, E  1 Cycles:4      
  761.       Opcode@MainALU  OPAC, 4, H_Read, Xor_, EmptyMacro ;; XOR A, H  1 Cycles:4
  762.       Opcode@MainALU  OPAD, 4, L_Read, Xor_, EmptyMacro ;; XOR A, L  1 Cycles:4    
  763.       Opcode@MainALU  OPAE, 8, xHL_Read, Xor_, EmptyMacro ;; XOR A, xHL  1 Cycles:8
  764.       Opcode@MainALU  OPAF, 4, A_Read, Xor_, EmptyMacro ;; XOR A, A  1 Cycles:4  
  765.       Opcode@MainALU  OPEE, 8, Imm8_Read, Xor_, EmptyMacro ;; XOR A, Imm8  2 Cycles:8
  766.      
  767.       Opcode@MainALU  OPB0, 4, B_Read, Or_, EmptyMacro ;; OR A, B  1 Cycles:4
  768.       Opcode@MainALU  OPB1, 4, C_Read, Or_, EmptyMacro ;; OR A, C  1 Cycles:4    
  769.       Opcode@MainALU  OPB2, 4, D_Read, Or_, EmptyMacro ;; OR A, D  1 Cycles:4
  770.       Opcode@MainALU  OPB3, 4, E_Read, Or_, EmptyMacro ;; OR A, E  1 Cycles:4      
  771.       Opcode@MainALU  OPB4, 4, H_Read, Or_, EmptyMacro ;; OR A, H  1 Cycles:4
  772.       Opcode@MainALU  OPB5, 4, L_Read, Or_, EmptyMacro ;; OR A, L  1 Cycles:4    
  773.       Opcode@MainALU  OPB6, 8, xHL_Read, Or_, EmptyMacro ;; OR A, xHL  1 Cycles:8
  774.       Opcode@MainALU  OPB7, 4, A_Read, Or_, EmptyMacro ;; OR A, A  1 Cycles:4  
  775.       Opcode@MainALU  OPF6, 8, Imm8_Read, Or_, EmptyMacro ;; OR A, Imm8  2 Cycles:8
  776.      
  777.       Opcode@MainALU  OPB8, 4, B_Read, Cmp_, EmptyMacro ;; CP A, B  1 Cycles:4
  778.       Opcode@MainALU  OPB9, 4, C_Read, Cmp_, EmptyMacro ;; CP A, C  1 Cycles:4    
  779.       Opcode@MainALU  OPBA, 4, D_Read, Cmp_, EmptyMacro ;; CP A, D  1 Cycles:4
  780.       Opcode@MainALU  OPBB, 4, E_Read, Cmp_, EmptyMacro ;; CP A, E  1 Cycles:4      
  781.       Opcode@MainALU  OPBC, 4, H_Read, Cmp_, EmptyMacro ;; CP A, H  1 Cycles:4
  782.       Opcode@MainALU  OPBD, 4, L_Read, Cmp_, EmptyMacro ;; CP A, L  1 Cycles:4    
  783.       Opcode@MainALU  OPBE, 8, xHL_Read, Cmp_, EmptyMacro ;; CP A, xHL  1 Cycles:8
  784.       Opcode@MainALU  OPBF, 4, A_Read, Cmp_, EmptyMacro ;; CP A, A  1 Cycles:4  
  785.       Opcode@MainALU  OPFE, 8, Imm8_Read, Cmp_, EmptyMacro ;; CP A, Imm8  2 Cycles:8
  786.      
  787. PushWord_  macro  ;; -----------------------
  788. ;; source <- eax
  789.   mov cx, [YG_GP].SP_
  790.   sub cx, 2
  791.   mov [YG_GP].SP_, cx
  792.   push eax
  793.   push ecx
  794.   push [YG_GP].gameboy
  795.   call gameboy_mmu_write_w@12
  796. endm
  797.  
  798. PopWord_  macro  ;; -----------------------
  799.   mov cx, [YG_GP].SP_
  800.   push ecx
  801.   add cx, 2
  802.   mov [YG_GP].SP_, cx
  803.   push [YG_GP].gameboy
  804.   call gameboy_mmu_read_w@8
  805. endm
  806.  
  807. ;; ---
  808. Opcode@MainStackOperate  macro  Opcode, Cycles, ReadOrExt, Op, WriteOrExt
  809.   Opcode&:
  810.     ReadOrExt
  811.     Op
  812.     WriteOrExt
  813.     SetCyclesAndRet Cycles
  814. endm  
  815.  
  816.       Opcode@MainStackOperate  OPC1,12, PopWord_, EmptyMacro, BC_Write ;; POP BC  1 Cycles:12
  817.       Opcode@MainStackOperate  OPD1,12, PopWord_, EmptyMacro, DE_Write ;; POP DE  1 Cycles:12    
  818.       Opcode@MainStackOperate  OPE1,12, PopWord_, EmptyMacro, HL_Write ;; POP HL  1 Cycles:12
  819.       Opcode@MainStackOperate  OPF1,12, PopWord_, EmptyMacro, AF_Write ;; POP AF  1 Cycles:12  
  820.      
  821.       Opcode@MainStackOperate  OPC5,16, BC_Read, EmptyMacro, PushWord_ ;; PUSH BC  1 Cycles:16
  822.       Opcode@MainStackOperate  OPD5,16, DE_Read, EmptyMacro, PushWord_ ;; PUSH DE  1 Cycles:16    
  823.       Opcode@MainStackOperate  OPE5,16, HL_Read, EmptyMacro, PushWord_ ;; PUSH HL  1 Cycles:16
  824.       Opcode@MainStackOperate  OPF5,16, AF_Read, EmptyMacro, PushWord_ ;; PUSH AF  1 Cycles:16  
  825.  
  826. Opcode@Rst  macro  Opcode, Cycles, Vector
  827.   Opcode&:
  828.     mov ax, si
  829.     PushWord_
  830.     mov si, Vector
  831.     SetCyclesRetP Cycles
  832. endm  
  833.  
  834.       Opcode@Rst  OPC7,16, 000H ;; RST 00H  1 Cycles:16
  835.       Opcode@Rst  OPD7,16, 010H ;; RST 10H  1 Cycles:16    
  836.       Opcode@Rst  OPE7,16, 020H ;; RST 20H  1 Cycles:16
  837.       Opcode@Rst  OPF7,16, 030H ;; RST 30H  1 Cycles:16  
  838.       Opcode@Rst  OPCF,16, 008H ;; RST 08H  1 Cycles:16
  839.       Opcode@Rst  OPDF,16, 018H ;; RST 18H  1 Cycles:16    
  840.       Opcode@Rst  OPEF,16, 028H ;; RST 28H  1 Cycles:16
  841.       Opcode@Rst  OPFF,16, 038H ;; RST 38H  1 Cycles:16    
  842.      
  843. Opcode@JR    macro  Opcode, Flags, OpNOT
  844.    Opcode&:
  845.       mov eax, YG_PF
  846.       and eax, Flags
  847.       xor eax, OpNOT
  848.       jne @F
  849.       inc esi
  850.       SetCyclesRetP 8
  851.     @@:
  852.       Imm8_Read
  853.       movsx eax, al
  854.       add esi, eax
  855.       SetCyclesRetP 12
  856. endm
  857.       Opcode@JR  OP20,Z_FLAG, Z_FLAG ;; JR NZ
  858.       Opcode@JR  OP30,C_FLAG, C_FLAG ;; JR NC
  859.       Opcode@JR  OP28,Z_FLAG, 0 ;; JR Z
  860.       Opcode@JR  OP38,C_FLAG, 0 ;; JR C  
  861.       Opcode@JR  OP18,0, 1 ;; JR R8
  862.      
  863. Opcode@JP    macro  Opcode, Flags, OpNOT
  864.    Opcode&:
  865.       mov eax, YG_PF
  866.       and eax, Flags
  867.       xor eax, OpNOT
  868.       jne @F
  869.       add esi, 2
  870.       SetCyclesRetP 12
  871.     @@:
  872.       Imm16_Read
  873.       mov esi, eax
  874.       SetCyclesRetP 16
  875. endm      
  876.       Opcode@JP  OPC2,Z_FLAG, Z_FLAG ;; JP NZ
  877.       Opcode@JP  OPD2,C_FLAG, C_FLAG ;; JP NC
  878.       Opcode@JP  OPCA,Z_FLAG, 0 ;; JP Z
  879.       Opcode@JP  OPDA,C_FLAG, 0 ;; JP C  
  880.       Opcode@JP  OPC3,0, 1 ;; JP A16
  881.     OPE9:
  882.       mov si, [YG_GP].HL
  883.       mov [YG_GP].PC, ax
  884.       SetCyclesAndRet 4
  885.       ;; LD@RxHLToRxHL OPE9, 4, HL_Read, PC_Write ;; JP (HL), Same as LD PC HL, 1 Cycles:4  
  886.  
  887. Opcode@CALL    macro  Opcode, Flags, OpNOT
  888.    Opcode&:
  889.       mov eax, YG_PF
  890.       and eax, Flags
  891.       xor eax, OpNOT
  892.       jne @F
  893.       add esi, 2
  894.       SetCyclesRetP 12
  895.     @@:
  896.       lea eax, [YG_PC+2]
  897.       PushWord_
  898.       Imm16_Read
  899.       mov esi, eax
  900.       SetCyclesRetP 24
  901. endm
  902.       Opcode@CALL  OPC4,Z_FLAG, Z_FLAG ;; CALL NZ
  903.       Opcode@CALL  OPD4,C_FLAG, C_FLAG ;; CALL NC
  904.       Opcode@CALL  OPCC,Z_FLAG, 0 ;; CALL Z
  905.       Opcode@CALL  OPDC,C_FLAG, 0 ;; CALL C  
  906.       Opcode@CALL  OPCD,0, 1 ;; CALL  
  907.      
  908. Opcode@RET    macro  Opcode, Flags, OpNOT, RetHitCycles
  909.    Opcode&:
  910.       mov eax, YG_PF
  911.       and eax, Flags
  912.       xor eax, OpNOT
  913.       jne @F
  914.       SetCyclesRetP 8
  915.     @@:
  916.       PopWord_
  917.       mov YG_PC, eax
  918.       SetCyclesRetP RetHitCycles
  919. endm      
  920.  
  921. Opcode@RETI    macro  Opcode, Flags, OpNOT, RetHitCycles
  922.    Opcode&:
  923.       mov eax, YG_PF
  924.       and eax, Flags
  925.       xor eax, OpNOT
  926.       jne @F
  927.       SetCyclesRetP 8
  928.     @@:
  929.       PopWord_
  930.       mov YG_PC, eax
  931.       mov [YG_GP].IME, 1
  932.       SetCyclesRetP RetHitCycles
  933. endm
  934.  
  935.       Opcode@RET  OPC0,Z_FLAG, Z_FLAG, 20 ;; RET NZ
  936.       Opcode@RET  OPD0,C_FLAG, C_FLAG, 20 ;; RET NC
  937.       Opcode@RET  OPC8,Z_FLAG, 0, 20 ;; RET Z
  938.       Opcode@RET  OPD8,C_FLAG, 0, 20 ;; RET C  
  939.       Opcode@RET  OPC9,0, 1, 16 ;; RET  
  940.       Opcode@RETI OPD9,0, 1, 16 ;; RETI
  941.      
  942. ;;  MISC 8.
  943.       OP76:   ; Halt,  not backup PC in my source code ^_^
  944.         mov [YG_GP].halt, 1
  945.         SetCyclesAndRet 4    
  946.       OP10:   ; Stop, Check CGB speed mode
  947.         movzx eax, [YG_GP].key1
  948.         test eax, 1
  949.         je @F
  950.         xor eax, 080H ;; switch to "other" speed
  951.         and eax, 0FEH ;; reset LSB  see gb-programming-manual.pdf::2.6.2 CPU Operating Speed
  952.                       ;; for simplicity, I will not simulate the huge waste of time brought by handover.
  953.         mov [YG_GP].key1, al
  954.         SetCyclesAndRet 080000004H
  955.      @@:mov [YG_GP].stop, 1
  956.         add YG_PC, 1 ;; skip one byte (should is 00)
  957.       OP00:   ; NOP
  958.         SetCyclesAndRet 4          
  959.       OPF3:   ; DI
  960.         mov [YG_GP].IME, 0
  961.         SetCyclesAndRet 4
  962.       OPFB:   ; EI
  963.         mov [YG_GP].IME, 1
  964.         SetCyclesAndRet 4  
  965.       OP07:   ; RLCA
  966.         rol [YG_GP].A, 1
  967.         setc YG_PF_8
  968.         SetCyclesRetP 4
  969.       OP17:   ; RLA
  970.         shr YG_PF_8, 1
  971.         rcl [YG_GP].A, 1
  972.         setc YG_PF_8
  973.         SetCyclesRetP 4    
  974.       OP0F:   ; RRCA
  975.         ror [YG_GP].A, 1
  976.         setc YG_PF_8
  977.         SetCyclesRetP 4
  978.       OP1F:   ; RRA
  979.         shr YG_PF_8, 1
  980.         rcr [YG_GP].A, 1
  981.         setc YG_PF_8
  982.         SetCyclesRetP 4    
  983.       OP27:   ; DAA  
  984.         SetCyclesRetP 4    
  985.         mov al, [YG_GP].A
  986.         and YG_PF_8, N_FLAG
  987.         jne DAS_Proc
  988.         ;;  DAA.
  989.         daa
  990.         mov [YG_GP].A, al
  991.         setc YG_PF_8  ;; SETC
  992.         setz al
  993.         shl al, 6
  994.         or YG_PF_8, al
  995.         SetCyclesRetP 4        
  996.     DAS_Proc:
  997.         ;;  DAS
  998.         das    
  999.         mov [YG_GP].A, al
  1000.         setc YG_PF_8  ;; SETC
  1001.         setz al
  1002.         shl al, 6
  1003.         or YG_PF_8, al
  1004.         or YG_PF_8, N_FLAG
  1005.         SetCyclesRetP 4    
  1006.       OP37:   ; SCF
  1007.         and YG_PF_8, Z_FLAG
  1008.         or YG_PF_8, C_FLAG  
  1009.         SetCyclesRetP 4    
  1010.       OP2F:   ; CPL  
  1011.         not [YG_GP].A
  1012.         or YG_PF_8, N_FLAG
  1013.         or YG_PF_8, H_FLAG
  1014.         SetCyclesRetP 4  
  1015.       OP3F:   ; CCF
  1016.         and YG_PF_8, ZC_FLAG
  1017.         xor YG_PF_8, C_FLAG  
  1018.         SetCyclesRetP 4
  1019.          
  1020.       ;; rortoe shift with  
  1021.       RLC_ macro Cycles
  1022.         rol al, 1
  1023.         setc YG_PF_8
  1024.         test al, al
  1025.         setz dl
  1026.         shl dl, 6
  1027.         or YG_PF_8, dl    
  1028.       endm
  1029.       ;; rortoe shift with  
  1030.       RRC_ macro Cycles
  1031.         ror al, 1
  1032.         setc YG_PF_8
  1033.         test al, al
  1034.         setz dl
  1035.         shl dl, 6
  1036.         or YG_PF_8, dl    
  1037.       endm      
  1038.       ;; logic shift with carry
  1039.       RL_ macro Cycles
  1040.         shr YG_PF_8, 1
  1041.         rcl al, 1
  1042.         setc YG_PF_8
  1043.         test al, al
  1044.         setz dl
  1045.         shl dl, 6
  1046.         or YG_PF_8, dl    
  1047.       endm
  1048.       ;; logic shift with carry
  1049.       RR_ macro Cycles
  1050.         shr YG_PF_8, 1
  1051.         rcr al, 1
  1052.         setc YG_PF_8
  1053.         test al, al
  1054.         setz dl
  1055.         shl dl, 6
  1056.         or YG_PF_8, dl    
  1057.       endm      
  1058.       ;; logic shift    
  1059.       RL_N_ macro Cycles
  1060.         shl al, 1
  1061.         setc YG_PF_8
  1062.         test al, al
  1063.         setz dl
  1064.         shl dl, 6
  1065.         or YG_PF_8, dl    
  1066.       endm
  1067.       ;; logic shift  
  1068.       RR_N_ macro Cycles
  1069.         shr al, 1
  1070.         setc YG_PF_8
  1071.         test al, al
  1072.         setz dl
  1073.         shl dl, 6
  1074.         or YG_PF_8, dl    
  1075.       endm    
  1076.       ;; arith shift  save msb
  1077.       RRS_N_ macro Cycles
  1078.         sar al, 1
  1079.         setc YG_PF_8
  1080.         setz dl
  1081.         shl dl, 6
  1082.         or YG_PF_8, dl    
  1083.       endm    
  1084.       ;; swap byte-lo 4bit and byte-hi 4bit
  1085.       SWAP_ macro Cycles
  1086.         ror al, 4
  1087.         test al, al
  1088.         setz cl
  1089.         shl cl, 6
  1090.         mov YG_PF, ecx
  1091.       endm        
  1092.        
  1093.       ;;  Set
  1094.       Opcode@SetBit macro Opcode, Cycles,  ReadOrExt, BitOrder, WriteOrExt
  1095.         Opcode&:
  1096.           ReadOrExt
  1097.           mov ecx, 1
  1098.           shl ecx, BitOrder
  1099.           or eax, ecx
  1100.           WriteOrExt
  1101.           SetCyclesAndRet Cycles
  1102.       endm
  1103.      
  1104.       Opcode@ResBit macro Opcode, Cycles,  ReadOrExt, BitOrder, WriteOrExt
  1105.         Opcode&:
  1106.           ReadOrExt
  1107.           mov ecx, 1
  1108.           shl ecx, BitOrder
  1109.           not ecx
  1110.           and eax, ecx
  1111.           WriteOrExt
  1112.           SetCyclesAndRet Cycles
  1113.       endm        
  1114.          
  1115.       Opcode@TestBit macro Opcode, Cycles,  ReadOrExt, BitOrder
  1116.         Opcode&:
  1117.           ReadOrExt
  1118.           and YG_PF, C_FLAG
  1119.           or YG_PF, H_FLAG
  1120.           mov ecx, 1
  1121.           shl ecx, BitOrder
  1122.           test al, cl
  1123.           setz al
  1124.           shl eax, 6
  1125.           or YG_PF, eax
  1126.           SetCyclesRetP Cycles
  1127.       endm      
  1128.        
  1129.       OPCB: ;; ---------------------------------- Perfix CB -----------------------------------------------------------------------------
  1130.         Imm8_Read
  1131.         and eax, 255
  1132.         jmp dword ptr[CBTAB+eax*4]
  1133.        
  1134.         ;; --- Include OP, imm8 and ADD Word Register.
  1135.         Opcode@MainALUExt  macro  Opcode, Cycles, ReadOrExt, Op, WriteOrExt
  1136.           Opcode&:
  1137.             ReadOrExt
  1138.             Op
  1139.             WriteOrExt
  1140.             SetCyclesRetP Cycles
  1141.         endm  
  1142.        
  1143.         Opcode@MainALUExt  CB00, 8, B_Read, RLC_, B_Write      ;; RLC B 2 Cycles:8
  1144.         Opcode@MainALUExt  CB01, 8, C_Read, RLC_, C_Write      ;; RLC C 2 Cycles:8
  1145.         Opcode@MainALUExt  CB02, 8, D_Read, RLC_, D_Write      ;; RLC D 2 Cycles:8
  1146.         Opcode@MainALUExt  CB03, 8, E_Read, RLC_, E_Write      ;; RLC E 2 Cycles:8    
  1147.         Opcode@MainALUExt  CB04, 8, H_Read, RLC_, H_Write      ;; RLC H 2 Cycles:8
  1148.         Opcode@MainALUExt  CB05, 8, L_Read, RLC_, L_Write      ;; RLC L 2 Cycles:8        
  1149.         Opcode@MainALUExt  CB06,16, xHL_Read, RLC_, xHL_Write      ;; RLC xHL 2 Cycles:16
  1150.         Opcode@MainALUExt  CB07, 8, A_Read, RLC_, A_Write      ;; RLC A 2 Cycles:8        
  1151.        
  1152.         Opcode@MainALUExt  CB08, 8, B_Read, RRC_, B_Write      ;; RRC B 2 Cycles:8
  1153.         Opcode@MainALUExt  CB09, 8, C_Read, RRC_, C_Write      ;; RRC C 2 Cycles:8
  1154.         Opcode@MainALUExt  CB0A, 8, D_Read, RRC_, D_Write      ;; RRC D 2 Cycles:8
  1155.         Opcode@MainALUExt  CB0B, 8, E_Read, RRC_, E_Write      ;; RRC E 2 Cycles:8    
  1156.         Opcode@MainALUExt  CB0C, 8, H_Read, RRC_, H_Write      ;; RRC H 2 Cycles:8
  1157.         Opcode@MainALUExt  CB0D, 8, L_Read, RRC_, L_Write      ;; RRC L 2 Cycles:8        
  1158.         Opcode@MainALUExt  CB0E,16, xHL_Read, RRC_, xHL_Write      ;; RRC xHL 2 Cycles:16
  1159.         Opcode@MainALUExt  CB0F, 8, A_Read, RRC_, A_Write      ;; RRC A 2 Cycles:8    
  1160.        
  1161.         Opcode@MainALUExt  CB10, 8, B_Read, RL_, B_Write      ;; RL B 2 Cycles:8
  1162.         Opcode@MainALUExt  CB11, 8, C_Read, RL_, C_Write      ;; RL C 2 Cycles:8
  1163.         Opcode@MainALUExt  CB12, 8, D_Read, RL_, D_Write      ;; RL D 2 Cycles:8
  1164.         Opcode@MainALUExt  CB13, 8, E_Read, RL_, E_Write      ;; RL E 2 Cycles:8    
  1165.         Opcode@MainALUExt  CB14, 8, H_Read, RL_, H_Write      ;; RL H 2 Cycles:8
  1166.         Opcode@MainALUExt  CB15, 8, L_Read, RL_, L_Write      ;; RL L 2 Cycles:8        
  1167.         Opcode@MainALUExt  CB16,16, xHL_Read, RL_, xHL_Write      ;; RL xHL 2 Cycles:16
  1168.         Opcode@MainALUExt  CB17, 8, A_Read, RL_, A_Write      ;; RL A 2 Cycles:8        
  1169.        
  1170.         Opcode@MainALUExt  CB18, 8, B_Read, RR_, B_Write      ;; RR B 2 Cycles:8
  1171.         Opcode@MainALUExt  CB19, 8, C_Read, RR_, C_Write      ;; RR C 2 Cycles:8
  1172.         Opcode@MainALUExt  CB1A, 8, D_Read, RR_, D_Write      ;; RR D 2 Cycles:8
  1173.         Opcode@MainALUExt  CB1B, 8, E_Read, RR_, E_Write      ;; RR E 2 Cycles:8    
  1174.         Opcode@MainALUExt  CB1C, 8, H_Read, RR_, H_Write      ;; RR H 2 Cycles:8
  1175.         Opcode@MainALUExt  CB1D, 8, L_Read, RR_, L_Write      ;; RR L 2 Cycles:8        
  1176.         Opcode@MainALUExt  CB1E,16, xHL_Read, RR_, xHL_Write      ;; RR xHL 2 Cycles:16
  1177.         Opcode@MainALUExt  CB1F, 8, A_Read, RR_, A_Write      ;; RR A 2 Cycles:8            
  1178.        
  1179.         Opcode@MainALUExt  CB20, 8, B_Read, RL_N_, B_Write      ;; SLA B 2 Cycles:8
  1180.         Opcode@MainALUExt  CB21, 8, C_Read, RL_N_, C_Write      ;; SLA C 2 Cycles:8
  1181.         Opcode@MainALUExt  CB22, 8, D_Read, RL_N_, D_Write      ;; SLA D 2 Cycles:8
  1182.         Opcode@MainALUExt  CB23, 8, E_Read, RL_N_, E_Write      ;; SLA E 2 Cycles:8    
  1183.         Opcode@MainALUExt  CB24, 8, H_Read, RL_N_, H_Write      ;; SLA H 2 Cycles:8
  1184.         Opcode@MainALUExt  CB25, 8, L_Read, RL_N_, L_Write      ;; SLA L 2 Cycles:8        
  1185.         Opcode@MainALUExt  CB26,16, xHL_Read, RL_N_, xHL_Write      ;; SLA xHL 2 Cycles:16
  1186.         Opcode@MainALUExt  CB27, 8, A_Read, RL_N_, A_Write      ;; SLA A 2 Cycles:8        
  1187.        
  1188.         Opcode@MainALUExt  CB28, 8, B_Read, RRS_N_, B_Write      ;; SRA B 2 Cycles:8
  1189.         Opcode@MainALUExt  CB29, 8, C_Read, RRS_N_, C_Write      ;; SRA C 2 Cycles:8
  1190.         Opcode@MainALUExt  CB2A, 8, D_Read, RRS_N_, D_Write      ;; SRA D 2 Cycles:8
  1191.         Opcode@MainALUExt  CB2B, 8, E_Read, RRS_N_, E_Write      ;; SRA E 2 Cycles:8    
  1192.         Opcode@MainALUExt  CB2C, 8, H_Read, RRS_N_, H_Write      ;; SRA H 2 Cycles:8
  1193.         Opcode@MainALUExt  CB2D, 8, L_Read, RRS_N_, L_Write      ;; SRA L 2 Cycles:8        
  1194.         Opcode@MainALUExt  CB2E,16, xHL_Read, RRS_N_, xHL_Write      ;; SRA xHL 2 Cycles:16
  1195.         Opcode@MainALUExt  CB2F, 8, A_Read, RRS_N_, A_Write      ;; SRA A 2 Cycles:8      
  1196.        
  1197.         Opcode@MainALUExt  CB30, 8, B_Read, SWAP_, B_Write      ;; SWAP B 2 Cycles:8
  1198.         Opcode@MainALUExt  CB31, 8, C_Read, SWAP_, C_Write      ;; SWAP C 2 Cycles:8
  1199.         Opcode@MainALUExt  CB32, 8, D_Read, SWAP_, D_Write      ;; SWAP D 2 Cycles:8
  1200.         Opcode@MainALUExt  CB33, 8, E_Read, SWAP_, E_Write      ;; SWAP E 2 Cycles:8    
  1201.         Opcode@MainALUExt  CB34, 8, H_Read, SWAP_, H_Write      ;; SWAP H 2 Cycles:8
  1202.         Opcode@MainALUExt  CB35, 8, L_Read, SWAP_, L_Write      ;; SWAP L 2 Cycles:8        
  1203.         Opcode@MainALUExt  CB36,16, xHL_Read, SWAP_, xHL_Write      ;; SWAP xHL 2 Cycles:16
  1204.         Opcode@MainALUExt  CB37, 8, A_Read, SWAP_, A_Write      ;; SWAP A 2 Cycles:8        
  1205.        
  1206.         Opcode@MainALUExt  CB38, 8, B_Read, RR_N_, B_Write      ;; SRL B 2 Cycles:8
  1207.         Opcode@MainALUExt  CB39, 8, C_Read, RR_N_, C_Write      ;; SRL C 2 Cycles:8
  1208.         Opcode@MainALUExt  CB3A, 8, D_Read, RR_N_, D_Write      ;; SRL D 2 Cycles:8
  1209.         Opcode@MainALUExt  CB3B, 8, E_Read, RR_N_, E_Write      ;; SRL E 2 Cycles:8    
  1210.         Opcode@MainALUExt  CB3C, 8, H_Read, RR_N_, H_Write      ;; SRL H 2 Cycles:8
  1211.         Opcode@MainALUExt  CB3D, 8, L_Read, RR_N_, L_Write      ;; SRL L 2 Cycles:8        
  1212.         Opcode@MainALUExt  CB3E,16, xHL_Read, RR_N_, xHL_Write      ;; SRL xHL 2 Cycles:16
  1213.         Opcode@MainALUExt  CB3F, 8, A_Read, RR_N_, A_Write      ;; SRL A 2 Cycles:8        
  1214.        
  1215.         Opcode@TestBit CB40, 8,  B_Read, 0 ;; BIT B, 0 Cycles:8
  1216.         Opcode@TestBit CB41, 8,  C_Read, 0 ;; BIT C, 0 Cycles:8        
  1217.         Opcode@TestBit CB42, 8,  D_Read, 0 ;; BIT D, 0 Cycles:8        
  1218.         Opcode@TestBit CB43, 8,  E_Read, 0 ;; BIT E, 0 Cycles:8    
  1219.         Opcode@TestBit CB44, 8,  H_Read, 0 ;; BIT H, 0 Cycles:8
  1220.         Opcode@TestBit CB45, 8,  L_Read, 0 ;; BIT L, 0 Cycles:8        
  1221.         Opcode@TestBit CB46,16,  xHL_Read, 0 ;; BIT xHL, 0 Cycles:16      
  1222.         Opcode@TestBit CB47, 8,  A_Read, 0 ;; BIT A, 0 Cycles:8        
  1223.      
  1224.         Opcode@TestBit CB48, 8,  B_Read, 1 ;; BIT B, 1 Cycles:8
  1225.         Opcode@TestBit CB49, 8,  C_Read, 1 ;; BIT C, 1 Cycles:8        
  1226.         Opcode@TestBit CB4A, 8,  D_Read, 1 ;; BIT D, 1 Cycles:8        
  1227.         Opcode@TestBit CB4B, 8,  E_Read, 1 ;; BIT E, 1 Cycles:8    
  1228.         Opcode@TestBit CB4C, 8,  H_Read, 1 ;; BIT H, 1 Cycles:8
  1229.         Opcode@TestBit CB4D, 8,  L_Read, 1 ;; BIT L, 1 Cycles:8        
  1230.         Opcode@TestBit CB4E,16,  xHL_Read, 1 ;; BIT xHL, 1 Cycles:16      
  1231.         Opcode@TestBit CB4F, 8,  A_Read, 1 ;; BIT A, 1 Cycles:8
  1232.  
  1233.         Opcode@TestBit CB50, 8,  B_Read, 2 ;; BIT B, 2 Cycles:8
  1234.         Opcode@TestBit CB51, 8,  C_Read, 2 ;; BIT C, 2 Cycles:8        
  1235.         Opcode@TestBit CB52, 8,  D_Read, 2 ;; BIT D, 2 Cycles:8        
  1236.         Opcode@TestBit CB53, 8,  E_Read, 2 ;; BIT E, 2 Cycles:8    
  1237.         Opcode@TestBit CB54, 8,  H_Read, 2 ;; BIT H, 2 Cycles:8
  1238.         Opcode@TestBit CB55, 8,  L_Read, 2 ;; BIT L, 2 Cycles:8        
  1239.         Opcode@TestBit CB56,16,  xHL_Read, 2 ;; BIT xHL, 2 Cycles:16      
  1240.         Opcode@TestBit CB57, 8,  A_Read, 2 ;; BIT A, 2 Cycles:8        
  1241.      
  1242.         Opcode@TestBit CB58, 8,  B_Read, 3 ;; BIT B, 3 Cycles:8
  1243.         Opcode@TestBit CB59, 8,  C_Read, 3 ;; BIT C, 3 Cycles:8        
  1244.         Opcode@TestBit CB5A, 8,  D_Read, 3 ;; BIT D, 3 Cycles:8        
  1245.         Opcode@TestBit CB5B, 8,  E_Read, 3 ;; BIT E, 3 Cycles:8    
  1246.         Opcode@TestBit CB5C, 8,  H_Read, 3 ;; BIT H, 3 Cycles:8
  1247.         Opcode@TestBit CB5D, 8,  L_Read, 3 ;; BIT L, 3 Cycles:8        
  1248.         Opcode@TestBit CB5E,16,  xHL_Read, 3 ;; BIT xHL, 3 Cycles:16      
  1249.         Opcode@TestBit CB5F, 8,  A_Read, 3 ;; BIT A, 3 Cycles:8
  1250.  
  1251.         Opcode@TestBit CB60, 8,  B_Read, 4 ;; BIT B, 4 Cycles:8
  1252.         Opcode@TestBit CB61, 8,  C_Read, 4 ;; BIT C, 4 Cycles:8        
  1253.         Opcode@TestBit CB62, 8,  D_Read, 4 ;; BIT D, 4 Cycles:8        
  1254.         Opcode@TestBit CB63, 8,  E_Read, 4 ;; BIT E, 4 Cycles:8    
  1255.         Opcode@TestBit CB64, 8,  H_Read, 4 ;; BIT H, 4 Cycles:8
  1256.         Opcode@TestBit CB65, 8,  L_Read, 4 ;; BIT L, 4 Cycles:8        
  1257.         Opcode@TestBit CB66,16,  xHL_Read, 4 ;; BITxHLD, 4 Cycles:16      
  1258.         Opcode@TestBit CB67, 8,  A_Read, 4 ;; BIT A, 4 Cycles:8        
  1259.      
  1260.         Opcode@TestBit CB68, 8,  B_Read, 5 ;; BIT B, 5 Cycles:8
  1261.         Opcode@TestBit CB69, 8,  C_Read, 5 ;; BIT C, 5 Cycles:8        
  1262.         Opcode@TestBit CB6A, 8,  D_Read, 5 ;; BIT D, 5 Cycles:8        
  1263.         Opcode@TestBit CB6B, 8,  E_Read, 5 ;; BIT E, 5 Cycles:8    
  1264.         Opcode@TestBit CB6C, 8,  H_Read, 5 ;; BIT H, 5 Cycles:8
  1265.         Opcode@TestBit CB6D, 8,  L_Read, 5 ;; BIT L, 5 Cycles:8        
  1266.         Opcode@TestBit CB6E,16,  xHL_Read, 5 ;; BIT xHL, 5 Cycles:16      
  1267.         Opcode@TestBit CB6F, 8,  A_Read, 5 ;; BIT A, 5 Cycles:8
  1268.        
  1269.         Opcode@TestBit CB70, 8,  B_Read, 6 ;; BIT B, 6 Cycles:8
  1270.         Opcode@TestBit CB71, 8,  C_Read, 6 ;; BIT C, 6 Cycles:8        
  1271.         Opcode@TestBit CB72, 8,  D_Read, 6 ;; BIT D, 6 Cycles:8        
  1272.         Opcode@TestBit CB73, 8,  E_Read, 6 ;; BIT E, 6 Cycles:8    
  1273.         Opcode@TestBit CB74, 8,  H_Read, 6 ;; BIT H, 6 Cycles:8
  1274.         Opcode@TestBit CB75, 8,  L_Read, 6 ;; BIT L, 6 Cycles:8        
  1275.         Opcode@TestBit CB76,16,  xHL_Read, 6 ;; BIT xHL, 6 Cycles:16      
  1276.         Opcode@TestBit CB77, 8,  A_Read, 6 ;; BIT A, 6 Cycles:8        
  1277.      
  1278.         Opcode@TestBit CB78, 8,  B_Read, 7 ;; BIT B, 7 Cycles:8
  1279.         Opcode@TestBit CB79, 8,  C_Read, 7 ;; BIT C, 7 Cycles:8        
  1280.         Opcode@TestBit CB7A, 8,  D_Read, 7 ;; BIT D, 7 Cycles:8        
  1281.         Opcode@TestBit CB7B, 8,  E_Read, 7 ;; BIT E, 7 Cycles:8    
  1282.         Opcode@TestBit CB7C, 8,  H_Read, 7 ;; BIT H, 7 Cycles:8
  1283.         Opcode@TestBit CB7D, 8,  L_Read, 7 ;; BIT L, 7 Cycles:8        
  1284.         Opcode@TestBit CB7E,16,  xHL_Read, 7 ;; BIT xHL, 7 Cycles:16      
  1285.         Opcode@TestBit CB7F, 8,  A_Read, 7 ;; BIT A, 7 Cycles:8
  1286.        
  1287.         Opcode@ResBit CB80, 8,  B_Read, 0, B_Write ;; RES B, 0 Cycles:8
  1288.         Opcode@ResBit CB81, 8,  C_Read, 0, C_Write ;; RES C, 0 Cycles:8        
  1289.         Opcode@ResBit CB82, 8,  D_Read, 0, D_Write ;; RES D, 0 Cycles:8        
  1290.         Opcode@ResBit CB83, 8,  E_Read, 0, E_Write ;; RES E, 0 Cycles:8    
  1291.         Opcode@ResBit CB84, 8,  H_Read, 0, H_Write ;; RES H, 0 Cycles:8
  1292.         Opcode@ResBit CB85, 8,  L_Read, 0, L_Write ;; RES L, 0 Cycles:8        
  1293.         Opcode@ResBit CB86,16,  xHL_Read, 0, xHL_Write ;; RES xHL, 0 Cycles:16      
  1294.         Opcode@ResBit CB87, 8,  A_Read, 0, A_Write ;; RES A, 0 Cycles:8        
  1295.      
  1296.         Opcode@ResBit CB88, 8,  B_Read, 1, B_Write ;; RES B, 1 Cycles:8
  1297.         Opcode@ResBit CB89, 8,  C_Read, 1, C_Write ;; RES C, 1 Cycles:8        
  1298.         Opcode@ResBit CB8A, 8,  D_Read, 1, D_Write ;; RES D, 1 Cycles:8        
  1299.         Opcode@ResBit CB8B, 8,  E_Read, 1, E_Write ;; RES E, 1 Cycles:8    
  1300.         Opcode@ResBit CB8C, 8,  H_Read, 1, H_Write ;; RES H, 1 Cycles:8
  1301.         Opcode@ResBit CB8D, 8,  L_Read, 1, L_Write ;; RES L, 1 Cycles:8        
  1302.         Opcode@ResBit CB8E,16,  xHL_Read, 1, xHL_Write ;; RES xHL, 1 Cycles:16      
  1303.         Opcode@ResBit CB8F, 8,  A_Read, 1, A_Write ;; RES A, 1 Cycles:8
  1304.  
  1305.         Opcode@ResBit CB90, 8,  B_Read, 2, B_Write ;; RES B, 2 Cycles:8
  1306.         Opcode@ResBit CB91, 8,  C_Read, 2, C_Write ;; RES C, 2 Cycles:8        
  1307.         Opcode@ResBit CB92, 8,  D_Read, 2, D_Write ;; RES D, 2 Cycles:8        
  1308.         Opcode@ResBit CB93, 8,  E_Read, 2, E_Write ;; RES E, 2 Cycles:8    
  1309.         Opcode@ResBit CB94, 8,  H_Read, 2, H_Write ;; RES H, 2 Cycles:8
  1310.         Opcode@ResBit CB95, 8,  L_Read, 2, L_Write ;; RES L, 2 Cycles:8        
  1311.         Opcode@ResBit CB96,16,  xHL_Read, 2, xHL_Write ;; RES xHL, 2 Cycles:16      
  1312.         Opcode@ResBit CB97, 8,  A_Read, 2, A_Write ;; RES A, 2 Cycles:8        
  1313.      
  1314.         Opcode@ResBit CB98, 8,  B_Read, 3, B_Write ;; RES B, 3 Cycles:8
  1315.         Opcode@ResBit CB99, 8,  C_Read, 3, C_Write ;; RES C, 3 Cycles:8        
  1316.         Opcode@ResBit CB9A, 8,  D_Read, 3, D_Write ;; RES D, 3 Cycles:8        
  1317.         Opcode@ResBit CB9B, 8,  E_Read, 3, E_Write ;; RES E, 3 Cycles:8    
  1318.         Opcode@ResBit CB9C, 8,  H_Read, 3, H_Write ;; RES H, 3 Cycles:8
  1319.         Opcode@ResBit CB9D, 8,  L_Read, 3, L_Write ;; RES L, 3 Cycles:8        
  1320.         Opcode@ResBit CB9E,16,  xHL_Read, 3, xHL_Write ;; RES xHL, 3 Cycles:16      
  1321.         Opcode@ResBit CB9F, 8,  A_Read, 3, A_Write ;; RES A, 3 Cycles:8
  1322.  
  1323.         Opcode@ResBit CBA0, 8,  B_Read, 4, B_Write ;; RES B, 4 Cycles:8
  1324.         Opcode@ResBit CBA1, 8,  C_Read, 4, C_Write ;; RES C, 4 Cycles:8        
  1325.         Opcode@ResBit CBA2, 8,  D_Read, 4, D_Write ;; RES D, 4 Cycles:8        
  1326.         Opcode@ResBit CBA3, 8,  E_Read, 4, E_Write ;; RES E, 4 Cycles:8    
  1327.         Opcode@ResBit CBA4, 8,  H_Read, 4, H_Write ;; RES H, 4 Cycles:8
  1328.         Opcode@ResBit CBA5, 8,  L_Read, 4, L_Write ;; RES L, 4 Cycles:8        
  1329.         Opcode@ResBit CBA6,16,  xHL_Read, 4, xHL_Write ;; RES xHL, 4 Cycles:16      
  1330.         Opcode@ResBit CBA7, 8,  A_Read, 4, A_Write ;; RES A, 4 Cycles:8        
  1331.      
  1332.         Opcode@ResBit CBA8, 8,  B_Read, 5, B_Write ;; RES B, 5 Cycles:8
  1333.         Opcode@ResBit CBA9, 8,  C_Read, 5, C_Write ;; RES C, 5 Cycles:8        
  1334.         Opcode@ResBit CBAA, 8,  D_Read, 5, D_Write ;; RES D, 5 Cycles:8        
  1335.         Opcode@ResBit CBAB, 8,  E_Read, 5, E_Write ;; RES E, 5 Cycles:8    
  1336.         Opcode@ResBit CBAC, 8,  H_Read, 5, H_Write ;; RES H, 5 Cycles:8
  1337.         Opcode@ResBit CBAD, 8,  L_Read, 5, L_Write ;; RES L, 5 Cycles:8        
  1338.         Opcode@ResBit CBAE,16,  xHL_Read, 5, xHL_Write ;; RES xHL, 5 Cycles:16      
  1339.         Opcode@ResBit CBAF, 8,  A_Read, 5, A_Write ;; RES A, 5 Cycles:8
  1340.        
  1341.         Opcode@ResBit CBB0, 8,  B_Read, 6, B_Write ;; RES B, 6 Cycles:8
  1342.         Opcode@ResBit CBB1, 8,  C_Read, 6, C_Write ;; RES C, 6 Cycles:8        
  1343.         Opcode@ResBit CBB2, 8,  D_Read, 6, D_Write ;; RES D, 6 Cycles:8        
  1344.         Opcode@ResBit CBB3, 8,  E_Read, 6, E_Write ;; RES E, 6 Cycles:8    
  1345.         Opcode@ResBit CBB4, 8,  H_Read, 6, H_Write ;; RES H, 6 Cycles:8
  1346.         Opcode@ResBit CBB5, 8,  L_Read, 6, L_Write ;; RES L, 6 Cycles:8        
  1347.         Opcode@ResBit CBB6,16,  xHL_Read, 6, xHL_Write ;; RES xHL, 6 Cycles:16      
  1348.         Opcode@ResBit CBB7, 8,  A_Read, 6, A_Write ;; RES A, 6 Cycles:8        
  1349.      
  1350.         Opcode@ResBit CBB8, 8,  B_Read, 7, B_Write ;; RES B, 7 Cycles:8
  1351.         Opcode@ResBit CBB9, 8,  C_Read, 7, C_Write ;; RES C, 7 Cycles:8        
  1352.         Opcode@ResBit CBBA, 8,  D_Read, 7, D_Write ;; RES D, 7 Cycles:8        
  1353.         Opcode@ResBit CBBB, 8,  E_Read, 7, E_Write ;; RES E, 7 Cycles:8    
  1354.         Opcode@ResBit CBBC, 8,  H_Read, 7, H_Write ;; RES H, 7 Cycles:8
  1355.         Opcode@ResBit CBBD, 8,  L_Read, 7, L_Write ;; RES L, 7 Cycles:8        
  1356.         Opcode@ResBit CBBE,16,  xHL_Read, 7, xHL_Write ;; RES xHL, 7 Cycles:16      
  1357.         Opcode@ResBit CBBF, 8,  A_Read, 7, A_Write ;; RES A, 7 Cycles:8
  1358.  
  1359.         Opcode@SetBit CBC0, 8,  B_Read, 0, B_Write ;; SET B, 0 Cycles:8
  1360.         Opcode@SetBit CBC1, 8,  C_Read, 0, C_Write ;; SET C, 0 Cycles:8        
  1361.         Opcode@SetBit CBC2, 8,  D_Read, 0, D_Write ;; SET D, 0 Cycles:8        
  1362.         Opcode@SetBit CBC3, 8,  E_Read, 0, E_Write ;; SET E, 0 Cycles:8    
  1363.         Opcode@SetBit CBC4, 8,  H_Read, 0, H_Write ;; SET H, 0 Cycles:8
  1364.         Opcode@SetBit CBC5, 8,  L_Read, 0, L_Write ;; SET L, 0 Cycles:8        
  1365.         Opcode@SetBit CBC6,16,  xHL_Read, 0, xHL_Write ;; SET xHL, 0 Cycles:16      
  1366.         Opcode@SetBit CBC7, 8,  A_Read, 0, A_Write ;; SET A, 0 Cycles:8        
  1367.      
  1368.         Opcode@SetBit CBC8, 8,  B_Read, 1, B_Write ;; SET B, 1 Cycles:8
  1369.         Opcode@SetBit CBC9, 8,  C_Read, 1, C_Write ;; SET C, 1 Cycles:8        
  1370.         Opcode@SetBit CBCA, 8,  D_Read, 1, D_Write ;; SET D, 1 Cycles:8        
  1371.         Opcode@SetBit CBCB, 8,  E_Read, 1, E_Write ;; SET E, 1 Cycles:8    
  1372.         Opcode@SetBit CBCC, 8,  H_Read, 1, H_Write ;; SET H, 1 Cycles:8
  1373.         Opcode@SetBit CBCD, 8,  L_Read, 1, L_Write ;; SET L, 1 Cycles:8        
  1374.         Opcode@SetBit CBCE,16,  xHL_Read, 1, xHL_Write ;; SET xHL, 1 Cycles:16      
  1375.         Opcode@SetBit CBCF, 8,  A_Read, 1, A_Write ;; SET A, 1 Cycles:8
  1376.  
  1377.         Opcode@SetBit CBD0, 8,  B_Read, 2, B_Write ;; SET B, 2 Cycles:8
  1378.         Opcode@SetBit CBD1, 8,  C_Read, 2, C_Write ;; SET C, 2 Cycles:8        
  1379.         Opcode@SetBit CBD2, 8,  D_Read, 2, D_Write ;; SET D, 2 Cycles:8        
  1380.         Opcode@SetBit CBD3, 8,  E_Read, 2, E_Write ;; SET E, 2 Cycles:8    
  1381.         Opcode@SetBit CBD4, 8,  H_Read, 2, H_Write ;; SET H, 2 Cycles:8
  1382.         Opcode@SetBit CBD5, 8,  L_Read, 2, L_Write ;; SET L, 2 Cycles:8        
  1383.         Opcode@SetBit CBD6,16,  xHL_Read, 2, xHL_Write ;; SET xHL, 2 Cycles:16      
  1384.         Opcode@SetBit CBD7, 8,  A_Read, 2, A_Write ;; SET A, 2 Cycles:8        
  1385.      
  1386.         Opcode@SetBit CBD8, 8,  B_Read, 3, B_Write ;; SET B, 3 Cycles:8
  1387.         Opcode@SetBit CBD9, 8,  C_Read, 3, C_Write ;; SET C, 3 Cycles:8        
  1388.         Opcode@SetBit CBDA, 8,  D_Read, 3, D_Write ;; SET D, 3 Cycles:8        
  1389.         Opcode@SetBit CBDB, 8,  E_Read, 3, E_Write ;; SET E, 3 Cycles:8    
  1390.         Opcode@SetBit CBDC, 8,  H_Read, 3, H_Write ;; SET H, 3 Cycles:8
  1391.         Opcode@SetBit CBDD, 8,  L_Read, 3, L_Write ;; SET L, 3 Cycles:8        
  1392.         Opcode@SetBit CBDE,16,  xHL_Read, 3, xHL_Write ;; SET xHL, 3 Cycles:16      
  1393.         Opcode@SetBit CBDF, 8,  A_Read, 3, A_Write ;; SET A, 3 Cycles:8
  1394.  
  1395.         Opcode@SetBit CBE0, 8,  B_Read, 4, B_Write ;; SET B, 4 Cycles:8
  1396.         Opcode@SetBit CBE1, 8,  C_Read, 4, C_Write ;; SET C, 4 Cycles:8        
  1397.         Opcode@SetBit CBE2, 8,  D_Read, 4, D_Write ;; SET D, 4 Cycles:8        
  1398.         Opcode@SetBit CBE3, 8,  E_Read, 4, E_Write ;; SET E, 4 Cycles:8    
  1399.         Opcode@SetBit CBE4, 8,  H_Read, 4, H_Write ;; SET H, 4 Cycles:8
  1400.         Opcode@SetBit CBE5, 8,  L_Read, 4, L_Write ;; SET L, 4 Cycles:8        
  1401.         Opcode@SetBit CBE6,16,  xHL_Read, 4, xHL_Write ;; SET xHL, 4 Cycles:16      
  1402.         Opcode@SetBit CBE7, 8,  A_Read, 4, A_Write ;; SET A, 4 Cycles:8        
  1403.      
  1404.         Opcode@SetBit CBE8, 8,  B_Read, 5, B_Write ;; SET B, 5 Cycles:8
  1405.         Opcode@SetBit CBE9, 8,  C_Read, 5, C_Write ;; SET C, 5 Cycles:8        
  1406.         Opcode@SetBit CBEA, 8,  D_Read, 5, D_Write ;; SET D, 5 Cycles:8        
  1407.         Opcode@SetBit CBEB, 8,  E_Read, 5, E_Write ;; SET E, 5 Cycles:8    
  1408.         Opcode@SetBit CBEC, 8,  H_Read, 5, H_Write ;; SET H, 5 Cycles:8
  1409.         Opcode@SetBit CBED, 8,  L_Read, 5, L_Write ;; SET L, 5 Cycles:8        
  1410.         Opcode@SetBit CBEE,16,  xHL_Read, 5, xHL_Write ;; SET xHL, 5 Cycles:16      
  1411.         Opcode@SetBit CBEF, 8,  A_Read, 5, A_Write ;; SET A, 5 Cycles:8
  1412.        
  1413.         Opcode@SetBit CBF0, 8,  B_Read, 6, B_Write ;; SET B, 6 Cycles:8
  1414.         Opcode@SetBit CBF1, 8,  C_Read, 6, C_Write ;; SET C, 6 Cycles:8        
  1415.         Opcode@SetBit CBF2, 8,  D_Read, 6, D_Write ;; SET D, 6 Cycles:8        
  1416.         Opcode@SetBit CBF3, 8,  E_Read, 6, E_Write ;; SET E, 6 Cycles:8    
  1417.         Opcode@SetBit CBF4, 8,  H_Read, 6, H_Write ;; SET H, 6 Cycles:8
  1418.         Opcode@SetBit CBF5, 8,  L_Read, 6, L_Write ;; SET L, 6 Cycles:8        
  1419.         Opcode@SetBit CBF6,16,  xHL_Read, 6, xHL_Write ;; SET xHL, 6 Cycles:16      
  1420.         Opcode@SetBit CBF7, 8,  A_Read, 6, A_Write ;; SET A, 6 Cycles:8        
  1421.      
  1422.         Opcode@SetBit CBF8, 8,  B_Read, 7, B_Write ;; SET B, 7 Cycles:8
  1423.         Opcode@SetBit CBF9, 8,  C_Read, 7, C_Write ;; SET C, 7 Cycles:8        
  1424.         Opcode@SetBit CBFA, 8,  D_Read, 7, D_Write ;; SET D, 7 Cycles:8        
  1425.         Opcode@SetBit CBFB, 8,  E_Read, 7, E_Write ;; SET E, 7 Cycles:8    
  1426.         Opcode@SetBit CBFC, 8,  H_Read, 7, H_Write ;; SET H, 7 Cycles:8
  1427.         Opcode@SetBit CBFD, 8,  L_Read, 7, L_Write ;; SET L, 7 Cycles:8        
  1428.         Opcode@SetBit CBFE,16,  xHL_Read, 7, xHL_Write ;; SET xHL, 7 Cycles:16      
  1429.         Opcode@SetBit CBFF, 8,  A_Read, 7, A_Write ;; SET A, 7 Cycles:8        
  1430. V_EXIT:
  1431.       mov [YG_GP]._backup, 0
  1432.       pop esi
  1433.       pop edi
  1434.       pop ebx
  1435.       ret          
  1436. OPD3:
  1437. OPDB:
  1438. OPDD:
  1439. OPE3:
  1440. OPE4:
  1441. OPEB:
  1442. OPEC:
  1443. OPED:
  1444. OPF4:
  1445. OPFC:
  1446. OPFD: ud2
  1447.       align 16
  1448. OPTAB dd  OP00, OP01, OP02, OP03, OP04, OP05, OP06, OP07, OP08, OP09, OP0A, OP0B, OP0C, OP0D, OP0E, OP0F
  1449.       dd  OP10, OP11, OP12, OP13, OP14, OP15, OP16, OP17, OP18, OP19, OP1A, OP1B, OP1C, OP1D, OP1E, OP1F
  1450.       dd  OP20, OP21, OP22, OP23, OP24, OP25, OP26, OP27, OP28, OP29, OP2A, OP2B, OP2C, OP2D, OP2E, OP2F
  1451.       dd  OP30, OP31, OP32, OP33, OP34, OP35, OP36, OP37, OP38, OP39, OP3A, OP3B, OP3C, OP3D, OP3E, OP3F
  1452.       dd  OP40, OP41, OP42, OP43, OP44, OP45, OP46, OP47, OP48, OP49, OP4A, OP4B, OP4C, OP4D, OP4E, OP4F
  1453.       dd  OP50, OP51, OP52, OP53, OP54, OP55, OP56, OP57, OP58, OP59, OP5A, OP5B, OP5C, OP5D, OP5E, OP5F
  1454.       dd  OP60, OP61, OP62, OP63, OP64, OP65, OP66, OP67, OP68, OP69, OP6A, OP6B, OP6C, OP6D, OP6E, OP6F
  1455.       dd  OP70, OP71, OP72, OP73, OP74, OP75, OP76, OP77, OP78, OP79, OP7A, OP7B, OP7C, OP7D, OP7E, OP7F
  1456.       dd  OP80, OP81, OP82, OP83, OP84, OP85, OP86, OP87, OP88, OP89, OP8A, OP8B, OP8C, OP8D, OP8E, OP8F
  1457.       dd  OP90, OP91, OP92, OP93, OP94, OP95, OP96, OP97, OP98, OP99, OP9A, OP9B, OP9C, OP9D, OP9E, OP9F
  1458.       dd  OPA0, OPA1, OPA2, OPA3, OPA4, OPA5, OPA6, OPA7, OPA8, OPA9, OPAA, OPAB, OPAC, OPAD, OPAE, OPAF
  1459.       dd  OPB0, OPB1, OPB2, OPB3, OPB4, OPB5, OPB6, OPB7, OPB8, OPB9, OPBA, OPBB, OPBC, OPBD, OPBE, OPBF
  1460.       dd  OPC0, OPC1, OPC2, OPC3, OPC4, OPC5, OPC6, OPC7, OPC8, OPC9, OPCA, OPCB, OPCC, OPCD, OPCE, OPCF
  1461.       dd  OPD0, OPD1, OPD2, OPD3, OPD4, OPD5, OPD6, OPD7, OPD8, OPD9, OPDA, OPDB, OPDC, OPDD, OPDE, OPDF
  1462.       dd  OPE0, OPE1, OPE2, OPE3, OPE4, OPE5, OPE6, OPE7, OPE8, OPE9, OPEA, OPEB, OPEC, OPED, OPEE, OPEF
  1463.       dd  OPF0, OPF1, OPF2, OPF3, OPF4, OPF5, OPF6, OPF7, OPF8, OPF9, OPFA, OPFB, OPFC, OPFD, OPFE, OPFF
  1464.       align 16
  1465. CBTAB dd  CB00, CB01, CB02, CB03, CB04, CB05, CB06, CB07, CB08, CB09, CB0A, CB0B, CB0C, CB0D, CB0E, CB0F
  1466.       dd  CB10, CB11, CB12, CB13, CB14, CB15, CB16, CB17, CB18, CB19, CB1A, CB1B, CB1C, CB1D, CB1E, CB1F
  1467.       dd  CB20, CB21, CB22, CB23, CB24, CB25, CB26, CB27, CB28, CB29, CB2A, CB2B, CB2C, CB2D, CB2E, CB2F
  1468.       dd  CB30, CB31, CB32, CB33, CB34, CB35, CB36, CB37, CB38, CB39, CB3A, CB3B, CB3C, CB3D, CB3E, CB3F
  1469.       dd  CB40, CB41, CB42, CB43, CB44, CB45, CB46, CB47, CB48, CB49, CB4A, CB4B, CB4C, CB4D, CB4E, CB4F
  1470.       dd  CB50, CB51, CB52, CB53, CB54, CB55, CB56, CB57, CB58, CB59, CB5A, CB5B, CB5C, CB5D, CB5E, CB5F
  1471.       dd  CB60, CB61, CB62, CB63, CB64, CB65, CB66, CB67, CB68, CB69, CB6A, CB6B, CB6C, CB6D, CB6E, CB6F
  1472.       dd  CB70, CB71, CB72, CB73, CB74, CB75, CB76, CB77, CB78, CB79, CB7A, CB7B, CB7C, CB7D, CB7E, CB7F
  1473.       dd  CB80, CB81, CB82, CB83, CB84, CB85, CB86, CB87, CB88, CB89, CB8A, CB8B, CB8C, CB8D, CB8E, CB8F
  1474.       dd  CB90, CB91, CB92, CB93, CB94, CB95, CB96, CB97, CB98, CB99, CB9A, CB9B, CB9C, CB9D, CB9E, CB9F
  1475.       dd  CBA0, CBA1, CBA2, CBA3, CBA4, CBA5, CBA6, CBA7, CBA8, CBA9, CBAA, CBAB, CBAC, CBAD, CBAE, CBAF
  1476.       dd  CBB0, CBB1, CBB2, CBB3, CBB4, CBB5, CBB6, CBB7, CBB8, CBB9, CBBA, CBBB, CBBC, CBBD, CBBE, CBBF
  1477.       dd  CBC0, CBC1, CBC2, CBC3, CBC4, CBC5, CBC6, CBC7, CBC8, CBC9, CBCA, CBCB, CBCC, CBCD, CBCE, CBCF
  1478.       dd  CBD0, CBD1, CBD2, CBD3, CBD4, CBD5, CBD6, CBD7, CBD8, CBD9, CBDA, CBDB, CBDC, CBDD, CBDE, CBDF
  1479.       dd  CBE0, CBE1, CBE2, CBE3, CBE4, CBE5, CBE6, CBE7, CBE8, CBE9, CBEA, CBEB, CBEC, CBED, CBEE, CBEF
  1480.       dd  CBF0, CBF1, CBF2, CBF3, CBF4, CBF5, CBF6, CBF7, CBF8, CBF9, CBFA, CBFB, CBFC, CBFD, CBFE, CBFF
  1481.        
  1482. cpu_optick endp
  1483.  
  1484.   end
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