/dts-v1/;

/ {
	compatible = "rockchip,rk3328-box-avb\0rockchip,rk3328";
	interrupt-parent = <0x01>;
	#address-cells = <0x02>;
	#size-cells = <0x02>;
	model = "Rockchip RK3328 box";

	ddr_timing {
		compatible = "rockchip,ddr-timing";
		ddr3_speed_bin = <0x15>;
		ddr4_speed_bin = <0x0c>;
		pd_idle = <0x00>;
		sr_idle = <0x00>;
		sr_mc_gate_idle = <0x00>;
		srpd_lite_idle = <0x00>;
		standby_idle = <0x00>;
		auto_pd_dis_freq = <0x42a>;
		auto_sr_dis_freq = <0x320>;
		ddr3_dll_dis_freq = <0x12c>;
		ddr4_dll_dis_freq = <0x271>;
		phy_dll_dis_freq = <0x190>;
		ddr3_odt_dis_freq = <0x64>;
		phy_ddr3_odt_dis_freq = <0x64>;
		ddr3_drv = <0x28>;
		ddr3_odt = <0x78>;
		phy_ddr3_ca_drv = <0x1b>;
		phy_ddr3_ck_drv = <0x15>;
		phy_ddr3_dq_drv = <0x15>;
		phy_ddr3_odt = <0x02>;
		lpddr3_odt_dis_freq = <0x29a>;
		phy_lpddr3_odt_dis_freq = <0x29a>;
		lpddr3_drv = <0x28>;
		lpddr3_odt = <0xf0>;
		phy_lpddr3_ca_drv = <0x16>;
		phy_lpddr3_ck_drv = <0x13>;
		phy_lpddr3_dq_drv = <0x16>;
		phy_lpddr3_odt = <0x02>;
		lpddr4_odt_dis_freq = <0x320>;
		phy_lpddr4_odt_dis_freq = <0x320>;
		lpddr4_drv = <0x3c>;
		lpddr4_dq_odt = <0x28>;
		lpddr4_ca_odt = <0x28>;
		phy_lpddr4_ca_drv = <0x14>;
		phy_lpddr4_ck_cs_drv = <0x06>;
		phy_lpddr4_dq_drv = <0x06>;
		phy_lpddr4_odt = <0x10>;
		ddr4_odt_dis_freq = <0x29a>;
		phy_ddr4_odt_dis_freq = <0x29a>;
		ddr4_drv = <0x22>;
		ddr4_odt = <0xf0>;
		phy_ddr4_ca_drv = <0x16>;
		phy_ddr4_ck_drv = <0x13>;
		phy_ddr4_dq_drv = <0x16>;
		phy_ddr4_odt = <0x02>;
		ddr3a1_ddr4a9_de-skew = <0x02>;
		ddr3a0_ddr4a10_de-skew = <0x03>;
		ddr3a3_ddr4a6_de-skew = <0x03>;
		ddr3a2_ddr4a4_de-skew = <0x02>;
		ddr3a5_ddr4a8_de-skew = <0x03>;
		ddr3a4_ddr4a5_de-skew = <0x02>;
		ddr3a7_ddr4a11_de-skew = <0x03>;
		ddr3a6_ddr4a7_de-skew = <0x02>;
		ddr3a9_ddr4a0_de-skew = <0x02>;
		ddr3a8_ddr4a13_de-skew = <0x01>;
		ddr3a11_ddr4a3_de-skew = <0x02>;
		ddr3a10_ddr4cs0_de-skew = <0x02>;
		ddr3a13_ddr4a2_de-skew = <0x01>;
		ddr3a12_ddr4ba1_de-skew = <0x02>;
		ddr3a15_ddr4odt0_de-skew = <0x03>;
		ddr3a14_ddr4a1_de-skew = <0x02>;
		ddr3ba1_ddr4a15_de-skew = <0x02>;
		ddr3ba0_ddr4bg0_de-skew = <0x04>;
		ddr3ras_ddr4cke_de-skew = <0x04>;
		ddr3ba2_ddr4ba0_de-skew = <0x03>;
		ddr3we_ddr4bg1_de-skew = <0x02>;
		ddr3cas_ddr4a12_de-skew = <0x02>;
		ddr3ckn_ddr4ckn_de-skew = <0x0a>;
		ddr3ckp_ddr4ckp_de-skew = <0x0a>;
		ddr3cke_ddr4a16_de-skew = <0x02>;
		ddr3odt0_ddr4a14_de-skew = <0x04>;
		ddr3cs0_ddr4act_de-skew = <0x04>;
		ddr3reset_ddr4reset_de-skew = <0x07>;
		ddr3cs1_ddr4cs1_de-skew = <0x07>;
		ddr3odt1_ddr4odt1_de-skew = <0x07>;
		cs0_dm0_rx_de-skew = <0x0c>;
		cs0_dm0_tx_de-skew = <0x0a>;
		cs0_dq0_rx_de-skew = <0x0c>;
		cs0_dq0_tx_de-skew = <0x0a>;
		cs0_dq1_rx_de-skew = <0x0c>;
		cs0_dq1_tx_de-skew = <0x0a>;
		cs0_dq2_rx_de-skew = <0x0c>;
		cs0_dq2_tx_de-skew = <0x0a>;
		cs0_dq3_rx_de-skew = <0x0c>;
		cs0_dq3_tx_de-skew = <0x0a>;
		cs0_dq4_rx_de-skew = <0x0c>;
		cs0_dq4_tx_de-skew = <0x0a>;
		cs0_dq5_rx_de-skew = <0x0c>;
		cs0_dq5_tx_de-skew = <0x0a>;
		cs0_dq6_rx_de-skew = <0x0c>;
		cs0_dq6_tx_de-skew = <0x0a>;
		cs0_dq7_rx_de-skew = <0x0c>;
		cs0_dq7_tx_de-skew = <0x0a>;
		cs0_dqs0_rx_de-skew = <0x0a>;
		cs0_dqs0p_tx_de-skew = <0x0b>;
		cs0_dqs0n_tx_de-skew = <0x0b>;
		cs0_dm1_rx_de-skew = <0x0a>;
		cs0_dm1_tx_de-skew = <0x08>;
		cs0_dq8_rx_de-skew = <0x0a>;
		cs0_dq8_tx_de-skew = <0x08>;
		cs0_dq9_rx_de-skew = <0x0a>;
		cs0_dq9_tx_de-skew = <0x08>;
		cs0_dq10_rx_de-skew = <0x0a>;
		cs0_dq10_tx_de-skew = <0x08>;
		cs0_dq11_rx_de-skew = <0x0a>;
		cs0_dq11_tx_de-skew = <0x08>;
		cs0_dq12_rx_de-skew = <0x0a>;
		cs0_dq12_tx_de-skew = <0x08>;
		cs0_dq13_rx_de-skew = <0x0a>;
		cs0_dq13_tx_de-skew = <0x08>;
		cs0_dq14_rx_de-skew = <0x0a>;
		cs0_dq14_tx_de-skew = <0x08>;
		cs0_dq15_rx_de-skew = <0x0a>;
		cs0_dq15_tx_de-skew = <0x08>;
		cs0_dqs1_rx_de-skew = <0x09>;
		cs0_dqs1p_tx_de-skew = <0x08>;
		cs0_dqs1n_tx_de-skew = <0x08>;
		cs0_dm2_rx_de-skew = <0x0a>;
		cs0_dm2_tx_de-skew = <0x09>;
		cs0_dq16_rx_de-skew = <0x0a>;
		cs0_dq16_tx_de-skew = <0x09>;
		cs0_dq17_rx_de-skew = <0x0a>;
		cs0_dq17_tx_de-skew = <0x09>;
		cs0_dq18_rx_de-skew = <0x0a>;
		cs0_dq18_tx_de-skew = <0x09>;
		cs0_dq19_rx_de-skew = <0x0a>;
		cs0_dq19_tx_de-skew = <0x09>;
		cs0_dq20_rx_de-skew = <0x0a>;
		cs0_dq20_tx_de-skew = <0x09>;
		cs0_dq21_rx_de-skew = <0x0a>;
		cs0_dq21_tx_de-skew = <0x09>;
		cs0_dq22_rx_de-skew = <0x0a>;
		cs0_dq22_tx_de-skew = <0x09>;
		cs0_dq23_rx_de-skew = <0x0a>;
		cs0_dq23_tx_de-skew = <0x09>;
		cs0_dqs2_rx_de-skew = <0x09>;
		cs0_dqs2p_tx_de-skew = <0x09>;
		cs0_dqs2n_tx_de-skew = <0x09>;
		cs0_dm3_rx_de-skew = <0x07>;
		cs0_dm3_tx_de-skew = <0x07>;
		cs0_dq24_rx_de-skew = <0x07>;
		cs0_dq24_tx_de-skew = <0x07>;
		cs0_dq25_rx_de-skew = <0x07>;
		cs0_dq25_tx_de-skew = <0x07>;
		cs0_dq26_rx_de-skew = <0x07>;
		cs0_dq26_tx_de-skew = <0x07>;
		cs0_dq27_rx_de-skew = <0x07>;
		cs0_dq27_tx_de-skew = <0x07>;
		cs0_dq28_rx_de-skew = <0x07>;
		cs0_dq28_tx_de-skew = <0x07>;
		cs0_dq29_rx_de-skew = <0x07>;
		cs0_dq29_tx_de-skew = <0x07>;
		cs0_dq30_rx_de-skew = <0x07>;
		cs0_dq30_tx_de-skew = <0x07>;
		cs0_dq31_rx_de-skew = <0x07>;
		cs0_dq31_tx_de-skew = <0x07>;
		cs0_dqs3_rx_de-skew = <0x07>;
		cs0_dqs3p_tx_de-skew = <0x08>;
		cs0_dqs3n_tx_de-skew = <0x08>;
		cs1_dm0_rx_de-skew = <0x07>;
		cs1_dm0_tx_de-skew = <0x08>;
		cs1_dq0_rx_de-skew = <0x07>;
		cs1_dq0_tx_de-skew = <0x08>;
		cs1_dq1_rx_de-skew = <0x07>;
		cs1_dq1_tx_de-skew = <0x08>;
		cs1_dq2_rx_de-skew = <0x07>;
		cs1_dq2_tx_de-skew = <0x08>;
		cs1_dq3_rx_de-skew = <0x07>;
		cs1_dq3_tx_de-skew = <0x08>;
		cs1_dq4_rx_de-skew = <0x07>;
		cs1_dq4_tx_de-skew = <0x08>;
		cs1_dq5_rx_de-skew = <0x07>;
		cs1_dq5_tx_de-skew = <0x08>;
		cs1_dq6_rx_de-skew = <0x07>;
		cs1_dq6_tx_de-skew = <0x08>;
		cs1_dq7_rx_de-skew = <0x07>;
		cs1_dq7_tx_de-skew = <0x08>;
		cs1_dqs0_rx_de-skew = <0x06>;
		cs1_dqs0p_tx_de-skew = <0x09>;
		cs1_dqs0n_tx_de-skew = <0x09>;
		cs1_dm1_rx_de-skew = <0x07>;
		cs1_dm1_tx_de-skew = <0x07>;
		cs1_dq8_rx_de-skew = <0x07>;
		cs1_dq8_tx_de-skew = <0x08>;
		cs1_dq9_rx_de-skew = <0x07>;
		cs1_dq9_tx_de-skew = <0x07>;
		cs1_dq10_rx_de-skew = <0x07>;
		cs1_dq10_tx_de-skew = <0x08>;
		cs1_dq11_rx_de-skew = <0x07>;
		cs1_dq11_tx_de-skew = <0x07>;
		cs1_dq12_rx_de-skew = <0x07>;
		cs1_dq12_tx_de-skew = <0x08>;
		cs1_dq13_rx_de-skew = <0x07>;
		cs1_dq13_tx_de-skew = <0x07>;
		cs1_dq14_rx_de-skew = <0x07>;
		cs1_dq14_tx_de-skew = <0x08>;
		cs1_dq15_rx_de-skew = <0x07>;
		cs1_dq15_tx_de-skew = <0x07>;
		cs1_dqs1_rx_de-skew = <0x07>;
		cs1_dqs1p_tx_de-skew = <0x09>;
		cs1_dqs1n_tx_de-skew = <0x09>;
		cs1_dm2_rx_de-skew = <0x07>;
		cs1_dm2_tx_de-skew = <0x08>;
		cs1_dq16_rx_de-skew = <0x07>;
		cs1_dq16_tx_de-skew = <0x08>;
		cs1_dq17_rx_de-skew = <0x07>;
		cs1_dq17_tx_de-skew = <0x08>;
		cs1_dq18_rx_de-skew = <0x07>;
		cs1_dq18_tx_de-skew = <0x08>;
		cs1_dq19_rx_de-skew = <0x07>;
		cs1_dq19_tx_de-skew = <0x08>;
		cs1_dq20_rx_de-skew = <0x07>;
		cs1_dq20_tx_de-skew = <0x08>;
		cs1_dq21_rx_de-skew = <0x07>;
		cs1_dq21_tx_de-skew = <0x08>;
		cs1_dq22_rx_de-skew = <0x07>;
		cs1_dq22_tx_de-skew = <0x08>;
		cs1_dq23_rx_de-skew = <0x07>;
		cs1_dq23_tx_de-skew = <0x08>;
		cs1_dqs2_rx_de-skew = <0x06>;
		cs1_dqs2p_tx_de-skew = <0x09>;
		cs1_dqs2n_tx_de-skew = <0x09>;
		cs1_dm3_rx_de-skew = <0x07>;
		cs1_dm3_tx_de-skew = <0x07>;
		cs1_dq24_rx_de-skew = <0x07>;
		cs1_dq24_tx_de-skew = <0x08>;
		cs1_dq25_rx_de-skew = <0x07>;
		cs1_dq25_tx_de-skew = <0x07>;
		cs1_dq26_rx_de-skew = <0x07>;
		cs1_dq26_tx_de-skew = <0x07>;
		cs1_dq27_rx_de-skew = <0x07>;
		cs1_dq27_tx_de-skew = <0x07>;
		cs1_dq28_rx_de-skew = <0x07>;
		cs1_dq28_tx_de-skew = <0x07>;
		cs1_dq29_rx_de-skew = <0x07>;
		cs1_dq29_tx_de-skew = <0x07>;
		cs1_dq30_rx_de-skew = <0x07>;
		cs1_dq30_tx_de-skew = <0x07>;
		cs1_dq31_rx_de-skew = <0x07>;
		cs1_dq31_tx_de-skew = <0x07>;
		cs1_dqs3_rx_de-skew = <0x07>;
		cs1_dqs3p_tx_de-skew = <0x09>;
		cs1_dqs3n_tx_de-skew = <0x09>;
		phandle = <0x80>;
	};

	aliases {
		ethernet0 = "/ethernet@ff540000";
		ethernet1 = "/ethernet@ff550000";
		i2c0 = "/i2c@ff150000";
		i2c1 = "/i2c@ff160000";
		i2c2 = "/i2c@ff170000";
		i2c3 = "/i2c@ff180000";
		serial0 = "/serial@ff110000";
		serial1 = "/serial@ff120000";
		serial2 = "/serial@ff130000";
	};

	cpus {
		#address-cells = <0x02>;
		#size-cells = <0x00>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a53\0arm,armv8";
			reg = <0x00 0x00>;
			clocks = <0x02 0x06>;
			#cooling-cells = <0x02>;
			dynamic-power-coefficient = <0x78>;
			enable-method = "psci";
			next-level-cache = <0x03>;
			operating-points-v2 = <0x04>;
			cpu-supply = <0x05>;
			phandle = <0x07>;
		};

		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a53\0arm,armv8";
			reg = <0x00 0x01>;
			clocks = <0x02 0x06>;
			#cooling-cells = <0x02>;
			dynamic-power-coefficient = <0x78>;
			enable-method = "psci";
			next-level-cache = <0x03>;
			operating-points-v2 = <0x04>;
			phandle = <0x08>;
		};

		cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a53\0arm,armv8";
			reg = <0x00 0x02>;
			clocks = <0x02 0x06>;
			#cooling-cells = <0x02>;
			dynamic-power-coefficient = <0x78>;
			enable-method = "psci";
			next-level-cache = <0x03>;
			operating-points-v2 = <0x04>;
			phandle = <0x09>;
		};

		cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a53\0arm,armv8";
			reg = <0x00 0x03>;
			clocks = <0x02 0x06>;
			#cooling-cells = <0x02>;
			dynamic-power-coefficient = <0x78>;
			enable-method = "psci";
			next-level-cache = <0x03>;
			operating-points-v2 = <0x04>;
			phandle = <0x0a>;
		};

		l2-cache0 {
			compatible = "cache";
			phandle = <0x03>;
		};
	};

	cpu0-opp-table {
		compatible = "operating-points-v2";
		opp-shared;
		rockchip,leakage-voltage-sel = <0x01 0x0a 0x00 0x0b 0xfe 0x01>;
		nvmem-cells = <0x06>;
		nvmem-cell-names = "cpu_leakage";
		phandle = <0x04>;

		opp-408000000 {
			opp-hz = <0x00 0x18519600>;
			opp-microvolt = <0xe7ef0 0xe7ef0 0x14fb18>;
			opp-microvolt-L0 = <0xe7ef0 0xe7ef0 0x14fb18>;
			opp-microvolt-L1 = <0xe7ef0 0xe7ef0 0x14fb18>;
			clock-latency-ns = <0x9c40>;
			opp-suspend;
		};

		opp-600000000 {
			opp-hz = <0x00 0x23c34600>;
			opp-microvolt = <0xee098 0xee098 0x14fb18>;
			opp-microvolt-L0 = <0xee098 0xee098 0x14fb18>;
			opp-microvolt-L1 = <0xee098 0xee098 0x14fb18>;
			clock-latency-ns = <0x9c40>;
		};

		opp-816000000 {
			opp-hz = <0x00 0x30a32c00>;
			opp-microvolt = <0x118c30 0x118c30 0x14fb18>;
			opp-microvolt-L0 = <0x10c8e0 0x10c8e0 0x14fb18>;
			opp-microvolt-L1 = <0x100590 0x100590 0x14fb18>;
			clock-latency-ns = <0x9c40>;
		};

		opp-1008000000 {
			opp-hz = <0x00 0x3c14dc00>;
			opp-microvolt = <0x137478 0x137478 0x14fb18>;
			opp-microvolt-L0 = <0x1312d0 0x1312d0 0x14fb18>;
			opp-microvolt-L1 = <0x12b128 0x12b128 0x14fb18>;
			clock-latency-ns = <0x9c40>;
		};

		opp-1200000000 {
			opp-hz = <0x00 0x47868c00>;
			opp-microvolt = <0x149970 0x149970 0x14fb18>;
			opp-microvolt-L0 = <0x149970 0x149970 0x14fb18>;
			opp-microvolt-L1 = <0x13d620 0x13d620 0x14fb18>;
			clock-latency-ns = <0x9c40>;
		};

		opp-1296000000 {
			opp-hz = <0x00 0x4d3f6400>;
			opp-microvolt = <0x14fb18 0x14fb18 0x14fb18>;
			opp-microvolt-L0 = <0x14fb18 0x14fb18 0x14fb18>;
			opp-microvolt-L1 = <0x149970 0x149970 0x14fb18>;
			clock-latency-ns = <0x9c40>;
		};
	};

	amba {
		compatible = "simple-bus";
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;

		dmac@ff1f0000 {
			compatible = "arm,pl330\0arm,primecell";
			reg = <0x00 0xff1f0000 0x00 0x4000>;
			interrupts = <0x00 0x00 0x04 0x00 0x01 0x04>;
			clocks = <0x02 0x86>;
			clock-names = "apb_pclk";
			#dma-cells = <0x01>;
			peripherals-req-type-burst;
			phandle = <0x0d>;
		};
	};

	arm-pmu {
		compatible = "arm,cortex-a53-pmu";
		interrupts = <0x00 0x64 0x04 0x00 0x65 0x04 0x00 0x66 0x04 0x00 0x67 0x04>;
		interrupt-affinity = <0x07 0x08 0x09 0x0a>;
	};

	cpuinfo {
		compatible = "rockchip,cpuinfo";
		nvmem-cells = <0x0b 0x0c>;
		nvmem-cell-names = "id\0cpu-version";
	};

	firmware {

		optee {
			compatible = "linaro,optee-tz";
			method = "smc";
		};

		android {
			phandle = <0x9e>;
		};
	};

	psci {
		compatible = "arm,psci-1.0\0arm,psci-0.2";
		method = "smc";
	};

	rockchip-suspend {
		compatible = "rockchip,pm-rk3328";
		status = "okay";
		rockchip,sleep-mode-config = <0xc00>;
		rockchip,virtual-poweroff = <0x01>;
		phandle = <0x9f>;
	};

	rockchip-system-monitor {
		compatible = "rockchip,system-monitor";
		rockchip,thermal-zone = "soc-thermal";
		rockchip,polling-delay = <0xc8>;
		rockchip,video-4k-offline-cpus = [33 00];
		phandle = <0xa0>;
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08>;
	};

	xin24m {
		compatible = "fixed-clock";
		#clock-cells = <0x00>;
		clock-frequency = <0x16e3600>;
		clock-output-names = "xin24m";
		phandle = <0x62>;
	};

	i2s@ff000000 {
		compatible = "rockchip,rk3328-i2s\0rockchip,rk3066-i2s";
		reg = <0x00 0xff000000 0x00 0x1000>;
		interrupts = <0x00 0x1a 0x04>;
		clocks = <0x02 0x29 0x02 0x137>;
		clock-names = "i2s_clk\0i2s_hclk";
		dmas = <0x0d 0x0b 0x0d 0x0c>;
		dma-names = "tx\0rx";
		resets = <0x02 0x20 0x02 0x23>;
		reset-names = "reset-m\0reset-h";
		status = "okay";
		#sound-dai-cells = <0x00>;
		rockchip,bclk-fs = <0x80>;
		phandle = <0x92>;
	};

	i2s@ff010000 {
		compatible = "rockchip,rk3328-i2s\0rockchip,rk3066-i2s";
		reg = <0x00 0xff010000 0x00 0x1000>;
		interrupts = <0x00 0x1b 0x04>;
		clocks = <0x02 0x2a 0x02 0x138>;
		clock-names = "i2s_clk\0i2s_hclk";
		dmas = <0x0d 0x0e 0x0d 0x0f>;
		dma-names = "tx\0rx";
		resets = <0x02 0x21 0x02 0x24>;
		reset-names = "reset-m\0reset-h";
		status = "okay";
		#sound-dai-cells = <0x00>;
		phandle = <0x90>;
	};

	i2s@ff020000 {
		compatible = "rockchip,rk3328-i2s\0rockchip,rk3066-i2s";
		reg = <0x00 0xff020000 0x00 0x1000>;
		interrupts = <0x00 0x1c 0x04>;
		clocks = <0x02 0x2b 0x02 0x139>;
		clock-names = "i2s_clk\0i2s_hclk";
		dmas = <0x0d 0x00 0x0d 0x01>;
		dma-names = "tx\0rx";
		resets = <0x02 0x22 0x02 0x25>;
		reset-names = "reset-m\0reset-h";
		pinctrl-names = "default\0sleep";
		pinctrl-0 = <0x0e 0x0f 0x10 0x11 0x12 0x13>;
		pinctrl-1 = <0x14>;
		status = "disabled";
		phandle = <0xa1>;
	};

	spdif@ff030000 {
		compatible = "rockchip,rk3328-spdif";
		reg = <0x00 0xff030000 0x00 0x1000>;
		interrupts = <0x00 0x1d 0x04>;
		clocks = <0x02 0x2e 0x02 0x13a>;
		clock-names = "mclk\0hclk";
		dmas = <0x0d 0x0a>;
		dma-names = "tx";
		pinctrl-names = "default";
		pinctrl-0 = <0x15>;
		status = "okay";
		#sound-dai-cells = <0x00>;
		phandle = <0x94>;
	};

	pdm@ff040000 {
		compatible = "rockchip,pdm";
		reg = <0x00 0xff040000 0x00 0x1000>;
		clocks = <0x02 0x3d 0x02 0x152>;
		clock-names = "pdm_clk\0pdm_hclk";
		dmas = <0x0d 0x10>;
		dma-names = "rx";
		pinctrl-names = "default\0sleep";
		pinctrl-0 = <0x16 0x17 0x18 0x19 0x1a>;
		pinctrl-1 = <0x1b 0x1c 0x1d 0x1e 0x1f>;
		status = "disabled";
		phandle = <0xa2>;
	};

	tsp@ff050000 {
		compatible = "rockchip,rk3328-tsp";
		reg = <0x00 0xff050000 0x00 0x10000>;
		rockchip,grf = <0x20>;
		interrupts = <0x00 0x48 0x04>;
		interrupt-names = "irq_tsp";
		clocks = <0x02 0x5c 0x02 0x98 0x02 0x135>;
		clock-names = "clk_tsp\0aclk_tsp\0hclk_tsp";
		pinctrl-names = "default";
		pinctrl-0 = <0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2c>;
		status = "disabled";
		phandle = <0xa3>;
	};

	rng@ff060000 {
		compatible = "rockchip,cryptov1-rng";
		reg = <0x00 0xff060000 0x00 0x4000>;
		clocks = <0x02 0x3b 0x02 0x151>;
		clock-names = "clk_crypto\0hclk_crypto";
		assigned-clocks = <0x02 0x3b 0x02 0x151>;
		assigned-clock-rates = <0x8f0d180 0x5f5e100>;
		status = "disabled";
		phandle = <0xa4>;
	};

	syscon@ff100000 {
		compatible = "rockchip,rk3328-grf\0syscon\0simple-mfd";
		reg = <0x00 0xff100000 0x00 0x1000>;
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		phandle = <0x20>;

		io-domains {
			compatible = "rockchip,rk3328-io-voltage-domain";
			status = "okay";
			vccio1-supply = <0x2d>;
			vccio2-supply = <0x2e>;
			vccio3-supply = <0x2d>;
			vccio4-supply = <0x2e>;
			vccio5-supply = <0x2d>;
			vccio6-supply = <0x2d>;
			pmuio-supply = <0x2d>;
			phandle = <0xa5>;
		};

		power-controller {
			compatible = "rockchip,rk3328-power-controller";
			#power-domain-cells = <0x01>;
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			status = "okay";
			phandle = <0x4e>;

			pd_hevc@6 {
				reg = <0x06>;
			};

			pd_video@5 {
				reg = <0x05>;
				clocks = <0x02 0x8b 0x02 0x142 0x02 0x41 0x02 0x42>;
				pm_qos = <0x2f 0x30>;
			};

			pd_vpu@8 {
				reg = <0x08>;
				clocks = <0x02 0x8f 0x02 0x146>;
				pm_qos = <0x31>;
			};
		};

		reboot-mode {
			compatible = "syscon-reboot-mode";
			offset = <0x5c8>;
			mode-normal = <0x5242c300>;
			mode-recovery = <0x5242c303>;
			mode-bootloader = <0x5242c309>;
			mode-loader = <0x5242c301>;
			phandle = <0xa6>;
		};
	};

	serial@ff110000 {
		compatible = "rockchip,rk3328-uart\0snps,dw-apb-uart";
		reg = <0x00 0xff110000 0x00 0x100>;
		interrupts = <0x00 0x37 0x04>;
		clocks = <0x02 0x26 0x02 0xd2>;
		clock-names = "baudclk\0apb_pclk";
		dmas = <0x0d 0x02 0x0d 0x03>;
		dma-names = "!tx\0!rx";
		pinctrl-names = "default";
		pinctrl-0 = <0x32 0x33>;
		reg-io-width = <0x04>;
		reg-shift = <0x02>;
		status = "okay";
		phandle = <0xa7>;
	};

	serial@ff120000 {
		compatible = "rockchip,rk3328-uart\0snps,dw-apb-uart";
		reg = <0x00 0xff120000 0x00 0x100>;
		interrupts = <0x00 0x38 0x04>;
		clocks = <0x02 0x27 0x02 0xd3>;
		clock-names = "baudclk\0apb_pclk";
		dmas = <0x0d 0x04 0x0d 0x05>;
		dma-names = "!tx\0!rx";
		pinctrl-names = "default";
		pinctrl-0 = <0x34 0x35 0x36>;
		reg-io-width = <0x04>;
		reg-shift = <0x02>;
		status = "disabled";
		phandle = <0xa8>;
	};

	serial@ff130000 {
		compatible = "rockchip,rk3328-uart\0snps,dw-apb-uart";
		reg = <0x00 0xff130000 0x00 0x100>;
		interrupts = <0x00 0x39 0x04>;
		clocks = <0x02 0x28 0x02 0xd4>;
		clock-names = "baudclk\0apb_pclk";
		dmas = <0x0d 0x06 0x0d 0x07>;
		dma-names = "!tx\0!rx";
		pinctrl-names = "default";
		pinctrl-0 = <0x37>;
		reg-io-width = <0x04>;
		reg-shift = <0x02>;
		status = "disabled";
		phandle = <0xa9>;
	};

	i2c@ff150000 {
		compatible = "rockchip,rk3328-i2c\0rockchip,rk3399-i2c";
		reg = <0x00 0xff150000 0x00 0x1000>;
		interrupts = <0x00 0x24 0x04>;
		#address-cells = <0x01>;
		#size-cells = <0x00>;
		clocks = <0x02 0x37 0x02 0xcd>;
		clock-names = "i2c\0pclk";
		pinctrl-names = "default";
		pinctrl-0 = <0x38>;
		status = "disabled";
		phandle = <0xaa>;
	};

	i2c@ff160000 {
		compatible = "rockchip,rk3328-i2c\0rockchip,rk3399-i2c";
		reg = <0x00 0xff160000 0x00 0x1000>;
		interrupts = <0x00 0x25 0x04>;
		#address-cells = <0x01>;
		#size-cells = <0x00>;
		clocks = <0x02 0x38 0x02 0xce>;
		clock-names = "i2c\0pclk";
		pinctrl-names = "default";
		pinctrl-0 = <0x39>;
		status = "disabled";
		phandle = <0xab>;
	};

	i2c@ff170000 {
		compatible = "rockchip,rk3328-i2c\0rockchip,rk3399-i2c";
		reg = <0x00 0xff170000 0x00 0x1000>;
		interrupts = <0x00 0x26 0x04>;
		#address-cells = <0x01>;
		#size-cells = <0x00>;
		clocks = <0x02 0x39 0x02 0xcf>;
		clock-names = "i2c\0pclk";
		pinctrl-names = "default";
		pinctrl-0 = <0x3a>;
		status = "disabled";
		phandle = <0xac>;
	};

	i2c@ff180000 {
		compatible = "rockchip,rk3328-i2c\0rockchip,rk3399-i2c";
		reg = <0x00 0xff180000 0x00 0x1000>;
		interrupts = <0x00 0x27 0x04>;
		#address-cells = <0x01>;
		#size-cells = <0x00>;
		clocks = <0x02 0x3a 0x02 0xd0>;
		clock-names = "i2c\0pclk";
		pinctrl-names = "default";
		pinctrl-0 = <0x3b>;
		status = "disabled";
		phandle = <0xad>;
	};

	spi@ff190000 {
		compatible = "rockchip,rk3328-spi\0rockchip,rk3066-spi";
		reg = <0x00 0xff190000 0x00 0x1000>;
		interrupts = <0x00 0x31 0x04>;
		#address-cells = <0x01>;
		#size-cells = <0x00>;
		clocks = <0x02 0x20 0x02 0xd1>;
		clock-names = "spiclk\0apb_pclk";
		dmas = <0x0d 0x08 0x0d 0x09>;
		dma-names = "tx\0rx";
		pinctrl-names = "default";
		pinctrl-0 = <0x3c 0x3d 0x3e 0x3f>;
		status = "disabled";
		phandle = <0xae>;
	};

	watchdog@ff1a0000 {
		compatible = "snps,dw-wdt";
		reg = <0x00 0xff1a0000 0x00 0x100>;
		interrupts = <0x00 0x28 0x04>;
		clocks = <0x02 0xd8>;
		status = "disabled";
		phandle = <0xaf>;
	};

	pwm@ff1b0000 {
		compatible = "rockchip,rk3328-pwm";
		reg = <0x00 0xff1b0000 0x00 0x10>;
		clocks = <0x02 0x3c 0x02 0xd6>;
		clock-names = "pwm\0pclk";
		pinctrl-names = "active";
		pinctrl-0 = <0x40>;
		#pwm-cells = <0x03>;
		status = "okay";
		phandle = <0x9a>;
	};

	pwm@ff1b0010 {
		compatible = "rockchip,rk3328-pwm";
		reg = <0x00 0xff1b0010 0x00 0x10>;
		clocks = <0x02 0x3c 0x02 0xd6>;
		clock-names = "pwm\0pclk";
		pinctrl-names = "active";
		pinctrl-0 = <0x41>;
		#pwm-cells = <0x03>;
		status = "okay";
		phandle = <0x9b>;
	};

	pwm@ff1b0020 {
		compatible = "rockchip,rk3328-pwm";
		reg = <0x00 0xff1b0020 0x00 0x10>;
		clocks = <0x02 0x3c 0x02 0xd6>;
		clock-names = "pwm\0pclk";
		pinctrl-names = "active";
		pinctrl-0 = <0x42>;
		#pwm-cells = <0x03>;
		status = "disabled";
		phandle = <0xb0>;
	};

	pwm@ff1b0030 {
		compatible = "rockchip,remotectl-pwm";
		reg = <0x00 0xff1b0030 0x00 0x10>;
		interrupts = <0x00 0x32 0x04>;
		clocks = <0x02 0x3c 0x02 0xd6>;
		clock-names = "pwm\0pclk";
		pinctrl-names = "default";
		pinctrl-0 = <0x43>;
		#pwm-cells = <0x03>;
		status = "okay";
		remote_pwm_id = <0x03>;
		handle_cpu_id = <0x01>;
		remote_support_psci = <0x01>;
		phandle = <0xb1>;

		ir_key1 {
			rockchip,usercode = <0x4040>;
			rockchip,key_table = <0xf2 0xe8 0xbd 0x9e 0xf4 0x67 0xf1 0x6c 0xef 0x69 0xee 0x6a 0xe5 0x66 0xe7 0x73 0xe8 0x72 0xb2 0x74 0xbc 0x71 0xba 0x8b 0xb8 0x184 0xfe 0x02 0xfd 0x03 0xfc 0x04 0xfb 0x05 0xfa 0x06 0xf9 0x07 0xf8 0x08 0xf7 0x09 0xf6 0x0a 0xff 0x0b 0xf3 0x0e>;
		};

		ir_key2 {
			rockchip,usercode = <0xff00>;
			rockchip,key_table = <0xf9 0x66 0xbf 0x9e 0xfb 0x8b 0xaa 0xe8 0xb9 0x67 0xe9 0x6c 0xb8 0x69 0xea 0x6a 0xeb 0x72 0xef 0x73 0xf7 0x71 0xe7 0x74 0xfc 0x74 0xa9 0x72 0xa8 0xa4 0xe0 0x72 0xa5 0x72 0xab 0xb7 0xb7 0x184 0xe8 0x184 0xf8 0xb8 0xaf 0xb9 0xed 0x72 0xee 0xba 0xb3 0x72 0xf1 0x72 0xf2 0x72 0xf3 0xd9 0xb4 0x72 0xa4 0x8d 0xbe 0xd9>;
		};

		ir_key3 {
			rockchip,usercode = <0x1dcc>;
			rockchip,key_table = <0xee 0xe8 0xf0 0x9e 0xf8 0x67 0xbb 0x6c 0xef 0x69 0xed 0x6a 0xfc 0x66 0xf1 0x73 0xfd 0x72 0xb7 0xd9 0xff 0x74 0xf3 0x71 0xbf 0x8b 0xf9 0x191 0xf5 0x192 0xb3 0x184 0xbe 0x02 0xba 0x03 0xb2 0x04 0xbd 0x05 0xf9 0x06 0xb1 0x07 0xfc 0x08 0xf8 0x09 0xb0 0x0a 0xb6 0x0b 0xb5 0x0e>;
		};

		ir_key4 {
			rockchip,usercode = <0xfe01>;
			rockchip,key_table = <0xec 0xe8 0xe6 0x9e 0xe9 0x67 0xe5 0x6c 0xae 0x69 0xaf 0x6a 0xee 0x66 0xe7 0x73 0xef 0x72 0xbf 0x74 0xbe 0x71 0xb3 0x8b 0xff 0x184 0xb1 0x02 0xf2 0x03 0xf3 0x04 0xb5 0x05 0xf6 0x06 0xf7 0x07 0xb9 0x08 0xfa 0x09 0xfb 0x0a 0xfe 0x0b 0xbd 0x0e 0xbc 0xb7 0xf0 0xba 0xb4 0x19c 0xb0 0x197>;
		};

		ir_key5 {
			rockchip,usercode = <0x7f80>;
			rockchip,key_table = <0xec 0xe8 0xd8 0x9e 0xc7 0x67 0xbf 0x6c 0xc8 0x69 0xc6 0x6a 0x8c 0x66 0x78 0x73 0x76 0x72 0x7e 0x74 0x7c 0x8b 0xb7 0x184>;
		};
	};

	thermal-zones {

		soc-thermal {
			polling-delay-passive = <0xfa>;
			polling-delay = <0xfa0>;
			sustainable-power = <0x4b0>;
			thermal-sensors = <0x44 0x00>;
			phandle = <0xb2>;

			trips {

				trip-point0 {
					temperature = <0x13880>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0xb3>;
				};

				trip-point1 {
					temperature = <0x14c08>;
					hysteresis = <0x7d0>;
					type = "passive";
					phandle = <0x45>;
				};

				soc-crit {
					temperature = <0x1c138>;
					hysteresis = <0x7d0>;
					type = "critical";
					phandle = <0xb4>;
				};
			};

			cooling-maps {

				map0 {
					trip = <0x45>;
					cooling-device = <0x07 0xffffffff 0xffffffff>;
					contribution = <0x1000>;
				};

				map1 {
					trip = <0x45>;
					cooling-device = <0x46 0xffffffff 0xffffffff>;
					contribution = <0x1000>;
				};
			};
		};
	};

	tsadc@ff250000 {
		compatible = "rockchip,rk3328-tsadc";
		reg = <0x00 0xff250000 0x00 0x100>;
		interrupts = <0x00 0x3a 0x04>;
		assigned-clocks = <0x02 0x24>;
		assigned-clock-rates = <0xc350>;
		clocks = <0x02 0x24 0x02 0xd5>;
		clock-names = "tsadc\0apb_pclk";
		pinctrl-names = "gpio\0otpout";
		pinctrl-0 = <0x47>;
		pinctrl-1 = <0x48>;
		resets = <0x02 0x42>;
		reset-names = "tsadc-apb";
		rockchip,grf = <0x20>;
		rockchip,hw-tshut-temp = <0x1d4c0>;
		#thermal-sensor-cells = <0x01>;
		status = "okay";
		phandle = <0x44>;
	};

	efuse@ff260000 {
		compatible = "rockchip,rk3328-efuse";
		reg = <0x00 0xff260000 0x00 0x50>;
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		clocks = <0x02 0x3e>;
		clock-names = "pclk_efuse";
		rockchip,efuse-size = <0x20>;
		phandle = <0xb5>;

		id@7 {
			reg = <0x07 0x10>;
			phandle = <0x0b>;
		};

		cpu-leakage@17 {
			reg = <0x17 0x01>;
			phandle = <0x06>;
		};

		logic-leakage@19 {
			reg = <0x19 0x01>;
			phandle = <0x4b>;
		};

		cpu-version@1a {
			reg = <0x1a 0x01>;
			bits = <0x03 0x03>;
			phandle = <0x0c>;
		};
	};

	adc@ff280000 {
		compatible = "rockchip,rk3328-saradc\0rockchip,rk3399-saradc";
		reg = <0x00 0xff280000 0x00 0x100>;
		interrupts = <0x00 0x50 0x04>;
		#io-channel-cells = <0x01>;
		clocks = <0x02 0x25 0x02 0xea>;
		clock-names = "saradc\0apb_pclk";
		resets = <0x02 0x56>;
		reset-names = "saradc-apb";
		status = "disabled";
		phandle = <0xb6>;
	};

	gpu@ff300000 {
		compatible = "arm,mali-450";
		reg = <0x00 0xff300000 0x00 0x40000>;
		interrupts = <0x00 0x5a 0x04 0x00 0x57 0x04 0x00 0x5d 0x04 0x00 0x58 0x04 0x00 0x59 0x04 0x00 0x5b 0x04 0x00 0x5c 0x04>;
		interrupt-names = "Mali_GP_IRQ\0Mali_GP_MMU_IRQ\0IRQPP\0Mali_PP0_IRQ\0Mali_PP0_MMU_IRQ\0Mali_PP1_IRQ\0Mali_PP1_MMU_IRQ";
		clocks = <0x02 0x87>;
		clock-names = "clk_mali";
		#cooling-cells = <0x02>;
		operating-points-v2 = <0x49>;
		status = "okay";
		mali-supply = <0x4a>;
		phandle = <0x46>;

		power_model {
			compatible = "arm,mali-simple-power-model";
			voltage = <0x384>;
			frequency = <0x1f4>;
			static-power = <0x12c>;
			dynamic-power = <0x18c>;
			ts = <0x7d00 0x125c 0xffffffb0 0x02>;
			thermal-zone = "soc-thermal";
			phandle = <0xb7>;
		};
	};

	gpu-opp-table {
		compatible = "operating-points-v2";
		rockchip,leakage-voltage-sel = <0x01 0x0a 0x00 0x0b 0xfe 0x01>;
		nvmem-cells = <0x4b>;
		nvmem-cell-names = "gpu_leakage";
		phandle = <0x49>;

		opp-200000000 {
			opp-hz = <0x00 0xbebc200>;
			opp-microvolt = <0x118c30>;
			opp-microvolt-L0 = <0x118c30>;
			opp-microvolt-L1 = <0x118c30>;
		};

		opp-300000000 {
			opp-hz = <0x00 0x11e1a300>;
			opp-microvolt = <0x118c30>;
			opp-microvolt-L0 = <0x118c30>;
			opp-microvolt-L1 = <0x118c30>;
		};

		opp-400000000 {
			opp-hz = <0x00 0x17d78400>;
			opp-microvolt = <0x118c30>;
			opp-microvolt-L0 = <0x118c30>;
			opp-microvolt-L1 = <0x118c30>;
		};

		opp-500000000 {
			opp-hz = <0x00 0x1dcd6500>;
			opp-microvolt = <0x118c30>;
			opp-microvolt-L0 = <0x118c30>;
			opp-microvolt-L1 = <0x118c30>;
		};
	};

	mpp-srv {
		compatible = "rockchip,mpp-service";
		rockchip,taskqueue-count = <0x03>;
		rockchip,resetgroup-count = <0x04>;
		rockchip,grf = <0x20>;
		rockchip,grf-offset = <0x40c>;
		rockchip,grf-values = <0x8000000 0x8000800>;
		rockchip,grf-names = "grf_vepu2\0grf_vepu22";
		status = "okay";
		phandle = <0x4d>;
	};

	vepu22@ff330000 {
		compatible = "rockchip,hevc-encoder-v22";
		reg = <0x00 0xff330000 0x00 0x200>;
		interrupts = <0x00 0x5f 0x04>;
		clocks = <0x02 0x93 0x02 0xdd 0x02 0x44 0x02 0x43 0x02 0x8c 0x02 0x82>;
		clock-names = "aclk_h265\0pclk_h265\0clk_core\0clk_dsp\0aclk_venc\0aclk_axi2sram";
		iommus = <0x4c>;
		rockchip,srv = <0x4d>;
		rockchip,taskqueue-node = <0x02>;
		rockchip,resetgroup-node = <0x02>;
		power-domains = <0x4e 0x06>;
		status = "okay";
		phandle = <0xb8>;
	};

	iommu@ff330200 {
		compatible = "rockchip,iommu";
		reg = <0x00 0xff330200 0x00 0x100>;
		interrupts = <0x00 0x60 0x04>;
		interrupt-names = "vepu22_mmu";
		clocks = <0x02 0x93 0x02 0xdd>;
		clock-names = "aclk\0iface";
		power-domains = <0x4e 0x06>;
		#iommu-cells = <0x00>;
		status = "okay";
		phandle = <0x4c>;
	};

	vepu@ff340000 {
		compatible = "rockchip,vpu-encoder-v2";
		reg = <0x00 0xff340000 0x00 0x400>;
		interrupts = <0x00 0x61 0x04>;
		clocks = <0x02 0x94 0x02 0x14a>;
		clock-names = "aclk_vcodec\0hclk_vcodec";
		resets = <0x02 0xb6 0x02 0xb7>;
		reset-names = "video_a\0video_h";
		iommus = <0x4f>;
		rockchip,srv = <0x4d>;
		rockchip,taskqueue-node = <0x00>;
		rockchip,resetgroup-node = <0x03>;
		power-domains = <0x4e 0x06>;
		status = "okay";
		phandle = <0xb9>;
	};

	iommu@ff340800 {
		compatible = "rockchip,iommu";
		reg = <0x00 0xff340800 0x00 0x40>;
		interrupts = <0x00 0x62 0x04>;
		interrupt-names = "vepu_mmu";
		clocks = <0x02 0x94 0x02 0x14a>;
		clock-names = "aclk\0iface";
		power-domains = <0x4e 0x06>;
		#iommu-cells = <0x00>;
		status = "okay";
		phandle = <0x4f>;
	};

	vdpu@ff350000 {
		compatible = "rockchip,vpu-decoder-v2";
		reg = <0x00 0xff350400 0x00 0x400>;
		interrupts = <0x00 0x09 0x04>;
		interrupt-names = "irq_dec";
		clocks = <0x02 0x8f 0x02 0x146>;
		clock-names = "aclk_vcodec\0hclk_vcodec";
		resets = <0x02 0xa0 0x02 0xa2>;
		reset-names = "shared_video_a\0shared_video_h";
		iommus = <0x50>;
		power-domains = <0x4e 0x08>;
		rockchip,srv = <0x4d>;
		rockchip,taskqueue-node = <0x00>;
		rockchip,resetgroup-node = <0x00>;
		status = "okay";
		phandle = <0xba>;
	};

	iommu@ff350800 {
		compatible = "rockchip,iommu";
		reg = <0x00 0xff350800 0x00 0x40>;
		interrupts = <0x00 0x0b 0x04>;
		interrupt-names = "vpu_mmu";
		clock-names = "aclk\0iface";
		clocks = <0x02 0x8f 0x02 0x146>;
		power-domains = <0x4e 0x08>;
		#iommu-cells = <0x00>;
		status = "okay";
		phandle = <0x50>;
	};

	avsd_plus@ff351000 {
		compatible = "rockchip,avs-plus-decoder";
		reg = <0x00 0xff351000 0x00 0x200>;
		interrupts = <0x00 0x09 0x04>;
		interrupt-names = "irq_dec";
		clocks = <0x02 0x8f 0x02 0x146>;
		clock-names = "aclk_vcodec\0hclk_vcodec";
		resets = <0x02 0xa0 0x02 0xa2>;
		reset-names = "shared_video_a\0shared_video_h";
		iommus = <0x50>;
		power-domains = <0x4e 0x08>;
		rockchip,srv = <0x4d>;
		rockchip,taskqueue-node = <0x00>;
		rockchip,resetgroup-node = <0x00>;
		status = "okay";
		phandle = <0xbb>;
	};

	rkvdec@ff36000 {
		compatible = "rockchip,rkv-decoder-rk3328";
		reg = <0x00 0xff360000 0x00 0x400>;
		interrupts = <0x00 0x07 0x04>;
		interrupt-names = "irq_dec";
		clocks = <0x02 0x8b 0x02 0x142 0x02 0x41 0x02 0x42>;
		clock-names = "aclk_vcodec\0hclk_vcodec\0clk_cabac\0clk_core";
		resets = <0x02 0xa4 0x02 0xa6 0x02 0xa5 0x02 0xa7 0x02 0xa9 0x02 0xa8>;
		reset-names = "video_a\0video_h\0niu_a\0niu_h\0video_cabac\0video_core";
		iommus = <0x51>;
		rockchip,srv = <0x4d>;
		rockchip,taskqueue-node = <0x01>;
		rockchip,resetgroup-node = <0x01>;
		power-domains = <0x4e 0x05>;
		operating-points-v2 = <0x52>;
		#cooling-cells = <0x02>;
		devfreq = <0x53>;
		status = "okay";
		vcodec-supply = <0x4a>;
		phandle = <0xbc>;

		vcodec_power_model {
			compatible = "vcodec_power_model";
			dynamic-power-coefficient = <0x78>;
			static-power-coefficient = <0xc8>;
			ts = <0x7d00 0x125c 0xffffffb0 0x02>;
			thermal-zone = "soc-thermal";
			phandle = <0xbd>;
		};
	};

	rkvdec-opp-table {
		compatible = "operating-points-v2";
		rockchip,leakage-voltage-sel = <0x01 0x0a 0x00 0x0b 0xfe 0x01>;
		nvmem-cells = <0x4b>;
		nvmem-cell-names = "rkvdec_leakage";
		phandle = <0x52>;

		opp-100000000 {
			opp-hz = <0x00 0x5f5e100>;
			opp-microvolt = <0xee098>;
			opp-microvolt-L0 = <0xee098>;
			opp-microvolt-L1 = <0xe7ef0>;
		};

		opp-200000000 {
			opp-hz = <0x00 0xbebc200>;
			opp-microvolt = <0xee098>;
			opp-microvolt-L0 = <0xee098>;
			opp-microvolt-L1 = <0xe7ef0>;
		};

		opp-500000000 {
			opp-hz = <0x00 0x1dcd6500>;
			opp-microvolt = <0x106738>;
			opp-microvolt-L0 = <0x106738>;
			opp-microvolt-L1 = <0x100590>;
		};
	};

	iommu@ff360480 {
		compatible = "rockchip,iommu";
		reg = <0x00 0xff360480 0x00 0x40 0x00 0xff3604c0 0x00 0x40>;
		interrupts = <0x00 0x4a 0x04>;
		interrupt-names = "rkvdec_mmu";
		clocks = <0x02 0x8b 0x02 0x142>;
		clock-names = "aclk\0iface";
		power-domains = <0x4e 0x05>;
		#iommu-cells = <0x00>;
		status = "okay";
		phandle = <0x51>;
	};

	vop@ff370000 {
		compatible = "rockchip,rk3328-vop";
		reg = <0x00 0xff370000 0x00 0x3efc>;
		interrupts = <0x00 0x20 0x04>;
		clocks = <0x02 0x91 0x02 0x78 0x02 0x13b>;
		clock-names = "aclk_vop\0dclk_vop\0hclk_vop";
		assigned-clocks = <0x02 0x78>;
		assigned-clock-parents = <0x02 0x7a>;
		resets = <0x02 0x85 0x02 0x86 0x02 0x87>;
		reset-names = "axi\0ahb\0dclk";
		iommus = <0x54>;
		status = "okay";
		phandle = <0xbe>;

		port {
			#address-cells = <0x01>;
			#size-cells = <0x00>;
			phandle = <0x5f>;

			endpoint@0 {
				reg = <0x00>;
				remote-endpoint = <0x55>;
				phandle = <0x5d>;
			};

			endpoint@1 {
				reg = <0x01>;
				remote-endpoint = <0x56>;
				phandle = <0x5e>;
			};
		};
	};

	iommu@ff373f00 {
		compatible = "rockchip,iommu";
		reg = <0x00 0xff373f00 0x00 0x100>;
		interrupts = <0x00 0x20 0x04>;
		interrupt-names = "vop_mmu";
		clocks = <0x02 0x91 0x02 0x13b>;
		clock-names = "aclk\0iface";
		#iommu-cells = <0x00>;
		status = "okay";
		phandle = <0x54>;
	};

	rga@ff3900000 {
		compatible = "rockchip,rga2";
		dev_mode = <0x01>;
		reg = <0x00 0xff390000 0x00 0x1000>;
		interrupts = <0x00 0x21 0x04>;
		clocks = <0x02 0x9a 0x02 0x154 0x02 0x45>;
		clock-names = "aclk_rga\0hclk_rga\0clk_rga";
		dma-coherent;
		status = "okay";
		phandle = <0xbf>;
	};

	iep@ff3a0000 {
		compatible = "rockchip,iep";
		iommu_enabled = <0x01>;
		iommus = <0x57>;
		reg = <0x00 0xff3a0000 0x00 0x800>;
		interrupts = <0x00 0x1f 0x04>;
		clocks = <0x02 0x9b 0x02 0x153>;
		clock-names = "aclk_iep\0hclk_iep";
		power-domains = <0x4e 0x05>;
		allocator = <0x01>;
		version = <0x02>;
		status = "okay";
		phandle = <0xc0>;
	};

	iommu@ff3a0800 {
		compatible = "rockchip,iommu";
		reg = <0x00 0xff3a0800 0x00 0x40>;
		interrupts = <0x00 0x1f 0x04>;
		interrupt-names = "iep_mmu";
		clocks = <0x02 0x9b 0x02 0x153>;
		clock-names = "aclk\0iface";
		power-domains = <0x4e 0x05>;
		#iommu-cells = <0x00>;
		status = "okay";
		phandle = <0x57>;
	};

	hdmi@ff3c0000 {
		compatible = "rockchip,rk3328-dw-hdmi";
		reg = <0x00 0xff3c0000 0x00 0x20000>;
		reg-io-width = <0x04>;
		interrupts = <0x00 0x23 0x04 0x00 0x47 0x04>;
		clocks = <0x02 0xe7 0x02 0x46 0x02 0x1e 0x02 0x147>;
		clock-names = "iahb\0isfr\0cec\0hclk_vio";
		phys = <0x58>;
		phy-names = "hdmi";
		pinctrl-names = "default\0gpio";
		pinctrl-0 = <0x59 0x5a 0x5b>;
		pinctrl-1 = <0x5c>;
		resets = <0x02 0x8f 0x02 0x51>;
		reset-names = "hdmi\0hdmiphy";
		rockchip,grf = <0x20>;
		max-tmdsclk = <0x5aa32>;
		status = "okay";
		#sound-dai-cells = <0x00>;
		ddc-i2c-scl-high-time-ns = <0x2599>;
		ddc-i2c-scl-low-time-ns = <0x2710>;
		phandle = <0x93>;

		ports {

			port {
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				phandle = <0xc1>;

				endpoint@0 {
					reg = <0x00>;
					remote-endpoint = <0x5d>;
					phandle = <0x55>;
				};
			};
		};
	};

	tve@ff373e00 {
		compatible = "rockchip,rk3328-tve";
		reg = <0x00 0xff373e00 0x00 0x100 0x00 0xff420000 0x00 0x10000>;
		rockchip,saturation = <0x376749>;
		rockchip,brightcontrast = <0xa305>;
		rockchip,adjtiming = <0xb6c00880>;
		rockchip,lumafilter0 = <0x1ff0000>;
		rockchip,lumafilter1 = <0xf40200fe>;
		rockchip,lumafilter2 = <0xf332d70c>;
		rockchip,daclevel = <0x22>;
		rockchip,dac1level = <0x07>;
		status = "okay";
		phandle = <0xc2>;

		ports {

			port {
				#address-cells = <0x01>;
				#size-cells = <0x00>;
				phandle = <0xc3>;

				endpoint@0 {
					reg = <0x00>;
					remote-endpoint = <0x5e>;
					phandle = <0x56>;
				};
			};
		};
	};

	display-subsystem {
		compatible = "rockchip,display-subsystem";
		ports = <0x5f>;
		status = "okay";
		logo-memory-region = <0x60>;
		secure-memory-region = <0x61>;
		phandle = <0xc4>;

		route {

			route-hdmi {
				status = "okay";
				logo,uboot = "logo.bmp";
				logo,kernel = "logo_kernel.bmp";
				logo,mode = "fullscreen";
				charge_logo,mode = "fullscreen";
				connect = <0x5d>;
				phandle = <0xc5>;
			};

			route-tve {
				status = "okay";
				logo,uboot = "logo.bmp";
				logo,kernel = "logo_kernel.bmp";
				logo,mode = "fullscreen";
				charge_logo,mode = "fullscreen";
				connect = <0x5e>;
				phandle = <0xc6>;
			};
		};
	};

	codec@ff410000 {
		compatible = "rockchip,rk3328-codec";
		reg = <0x00 0xff410000 0x00 0x1000>;
		rockchip,grf = <0x20>;
		clocks = <0x02 0xeb 0x02 0x2a>;
		clock-names = "pclk\0mclk";
		status = "okay";
		#sound-dai-cells = <0x00>;
		phandle = <0x91>;
	};

	hdmiphy@ff430000 {
		compatible = "rockchip,rk3328-hdmi-phy";
		reg = <0x00 0xff430000 0x00 0x10000>;
		interrupts = <0x00 0x53 0x04>;
		#phy-cells = <0x00>;
		clocks = <0x02 0xe4 0x62>;
		clock-names = "sysclk\0refclk";
		#clock-cells = <0x00>;
		clock-output-names = "hdmi_phy";
		status = "okay";
		rockchip,phy-table = <0x9d5b340 0x07 0x0a 0x0a 0x0a 0x00 0x00 0x08 0x08 0x08 0x00 0xac 0xcc 0xcc 0xcc 0x1443fd00 0x0b 0x0d 0x0d 0x0d 0x07 0x15 0x08 0x08 0x08 0x3f 0xac 0xcc 0xcd 0xdd 0x2367b880 0x10 0x1a 0x1a 0x1a 0x07 0x15 0x08 0x08 0x08 0x00 0xac 0xcc 0xcc 0xcc>;
		phandle = <0x58>;
	};

	clock-controller@ff440000 {
		compatible = "rockchip,rk3328-cru\0rockchip,cru\0syscon";
		reg = <0x00 0xff440000 0x00 0x1000>;
		rockchip,grf = <0x20>;
		#clock-cells = <0x01>;
		#reset-cells = <0x01>;
		assigned-clocks = <0x02 0x78 0x02 0x3d 0x02 0x1e 0x02 0x26 0x02 0x27 0x02 0x28 0x02 0x88 0x02 0x89 0x02 0x85 0x02 0x8a 0x02 0x8c 0x02 0x8d 0x02 0x41 0x02 0x42 0x02 0x44 0x02 0x43 0x02 0x22 0x02 0x5c 0x02 0x35 0x02 0x06 0x02 0x04 0x02 0x03 0x02 0x88 0x02 0x148 0x02 0xd8 0x02 0x89 0x02 0x134 0x02 0xe6 0x02 0x1e 0x02 0x91>;
		assigned-clock-parents = <0x02 0x7a 0x02 0x01 0x02 0x04 0x62 0x62 0x62>;
		assigned-clock-rates = <0x00 0x3a98000 0x00 0x16e3600 0x16e3600 0x16e3600 0xe4e1c0 0xe4e1c0 0x5f5e100 0x5f5e100 0x2faf080 0x5f5e100 0x5f5e100 0x5f5e100 0x2faf080 0x2faf080 0x2faf080 0x2faf080 0x16e3600 0x23c34600 0x1d4c0000 0x47868c00 0x8f0d180 0x47868c0 0x47868c0 0x8f0d180 0x47868c0 0x47868c0 0x8000 0x17d78400>;
		phandle = <0x02>;
	};

	syscon@ff450000 {
		compatible = "rockchip,rk3328-usb2phy-grf\0syscon\0simple-mfd";
		reg = <0x00 0xff450000 0x00 0x10000>;
		#address-cells = <0x01>;
		#size-cells = <0x01>;
		phandle = <0xc7>;

		usb2-phy@100 {
			compatible = "rockchip,rk3328-usb2phy";
			reg = <0x100 0x10>;
			clocks = <0x62>;
			clock-names = "phyclk";
			clock-output-names = "usb480m_phy";
			#clock-cells = <0x00>;
			assigned-clocks = <0x02 0x7b>;
			assigned-clock-parents = <0x63>;
			status = "okay";
			phandle = <0x63>;

			otg-port {
				#phy-cells = <0x00>;
				interrupts = <0x00 0x3b 0x04 0x00 0x3c 0x04 0x00 0x3d 0x04>;
				interrupt-names = "otg-bvalid\0otg-id\0linestate";
				status = "okay";
				vbus-supply = <0x64>;
				phandle = <0x7a>;
			};

			host-port {
				#phy-cells = <0x00>;
				interrupts = <0x00 0x3e 0x04>;
				interrupt-names = "linestate";
				status = "okay";
				phandle = <0x7b>;
			};
		};
	};

	syscon@ff460000 {
		compatible = "rockchip,usb3phy-grf\0syscon";
		reg = <0x00 0xff460000 0x00 0x1000>;
		phandle = <0x65>;
	};

	usb3-phy@ff470000 {
		compatible = "rockchip,rk3328-u3phy";
		reg = <0x00 0xff470000 0x00 0x00>;
		rockchip,u3phygrf = <0x65>;
		rockchip,grf = <0x20>;
		interrupts = <0x00 0x4d 0x04>;
		interrupt-names = "linestate";
		clocks = <0x02 0xe0 0x02 0xe1>;
		clock-names = "u3phy-otg\0u3phy-pipe";
		resets = <0x02 0x7d 0x02 0x7e 0x02 0x7f 0x02 0x7c 0x02 0x9e 0x02 0x9f>;
		reset-names = "u3phy-u2-por\0u3phy-u3-por\0u3phy-pipe-mac\0u3phy-utmi-mac\0u3phy-utmi-apb\0u3phy-pipe-apb";
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;
		status = "okay";
		vbus-supply = <0x66>;
		phandle = <0xc8>;

		utmi@ff470000 {
			reg = <0x00 0xff470000 0x00 0x8000>;
			#phy-cells = <0x00>;
			status = "okay";
			phandle = <0x7c>;
		};

		pipe@ff478000 {
			reg = <0x00 0xff478000 0x00 0x8000>;
			#phy-cells = <0x00>;
			status = "okay";
			phandle = <0x7d>;
		};
	};

	dwmmc@ff500000 {
		compatible = "rockchip,rk3328-dw-mshc\0rockchip,rk3288-dw-mshc";
		reg = <0x00 0xff500000 0x00 0x4000>;
		interrupts = <0x00 0x0c 0x04>;
		clocks = <0x02 0x13d 0x02 0x21 0x02 0x4a 0x02 0x4e>;
		clock-names = "biu\0ciu\0ciu-drive\0ciu-sample";
		fifo-depth = <0x100>;
		max-frequency = <0x8f0d180>;
		status = "okay";
		bus-width = <0x04>;
		cap-mmc-highspeed;
		cap-sd-highspeed;
		card-detect-delay = <0x320>;
		disable-wp;
		num-slots = <0x01>;
		pinctrl-names = "default";
		pinctrl-0 = <0x67 0x68 0x69 0x6a>;
		supports-sd;
		vmmc-supply = <0x6b>;
		phandle = <0xc9>;
	};

	dwmmc@ff510000 {
		compatible = "rockchip,rk3328-dw-mshc\0rockchip,rk3288-dw-mshc";
		reg = <0x00 0xff510000 0x00 0x4000>;
		interrupts = <0x00 0x0d 0x04>;
		clocks = <0x02 0x13e 0x02 0x22 0x02 0x4b 0x02 0x4f>;
		clock-names = "biu\0ciu\0ciu-drive\0ciu-sample";
		fifo-depth = <0x100>;
		max-frequency = <0x7735940>;
		status = "okay";
		bus-width = <0x04>;
		cap-sd-highspeed;
		cap-sdio-irq;
		disable-wp;
		keep-power-in-suspend;
		mmc-pwrseq = <0x6c>;
		non-removable;
		num-slots = <0x01>;
		pinctrl-names = "default";
		pinctrl-0 = <0x6d 0x6e 0x6f>;
		supports-sdio;
		sd-uhs-sdr104;
		phandle = <0xca>;
	};

	dwmmc@ff520000 {
		compatible = "rockchip,rk3328-dw-mshc\0rockchip,rk3288-dw-mshc";
		reg = <0x00 0xff520000 0x00 0x4000>;
		interrupts = <0x00 0x0e 0x04>;
		clocks = <0x02 0x13f 0x02 0x23 0x02 0x4c 0x02 0x50>;
		clock-names = "biu\0ciu\0ciu-drive\0ciu-sample";
		fifo-depth = <0x100>;
		max-frequency = <0x8f0d180>;
		status = "okay";
		bus-width = <0x08>;
		cap-mmc-highspeed;
		mmc-hs200-1_8v;
		supports-emmc;
		disable-wp;
		non-removable;
		num-slots = <0x01>;
		pinctrl-names = "default";
		pinctrl-0 = <0x70 0x71 0x72>;
		phandle = <0xcb>;
	};

	ethernet@ff540000 {
		compatible = "rockchip,rk3328-gmac";
		reg = <0x00 0xff540000 0x00 0x10000>;
		interrupts = <0x00 0x18 0x04>;
		interrupt-names = "macirq";
		clocks = <0x02 0x64 0x02 0x57 0x02 0x58 0x02 0x5a 0x02 0x59 0x02 0x96 0x02 0xdf>;
		clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0clk_mac_refout\0aclk_mac\0pclk_mac";
		resets = <0x02 0x63>;
		reset-names = "stmmaceth";
		rockchip,grf = <0x20>;
		status = "disabled";
		phy-supply = <0x73>;
		phy-mode = "rgmii";
		clock_in_out = "input";
		snps,reset-gpio = <0x74 0x12 0x01>;
		snps,reset-active-low;
		snps,reset-delays-us = <0x00 0x2710 0xc350>;
		assigned-clocks = <0x02 0x64 0x02 0x66>;
		assigned-clock-parents = <0x75 0x75>;
		pinctrl-names = "default";
		pinctrl-0 = <0x76>;
		tx_delay = <0x26>;
		rx_delay = <0x11>;
		phandle = <0xcc>;
	};

	ethernet@ff550000 {
		compatible = "rockchip,rk3328-gmac";
		reg = <0x00 0xff550000 0x00 0x10000>;
		rockchip,grf = <0x20>;
		interrupts = <0x00 0x15 0x04>;
		interrupt-names = "macirq";
		clocks = <0x02 0x54 0x02 0x53 0x02 0x53 0x02 0x55 0x02 0x95 0x02 0xde 0x02 0x56>;
		clock-names = "stmmaceth\0mac_clk_rx\0mac_clk_tx\0clk_mac_ref\0aclk_mac\0pclk_mac\0clk_macphy";
		resets = <0x02 0x62 0x02 0x64>;
		reset-names = "stmmaceth\0mac-phy";
		phy-mode = "rmii";
		phy-handle = <0x77>;
		status = "okay";
		phy-supply = <0x73>;
		clock_in_out = "output";
		assigned-clocks = <0x02 0x65>;
		assigned-clock-rate = <0x2faf080>;
		assigned-clock-parents = <0x02 0x54>;
		phandle = <0xcd>;

		mdio {
			compatible = "snps,dwmac-mdio";
			#address-cells = <0x01>;
			#size-cells = <0x00>;

			phy@0 {
				compatible = "ethernet-phy-id1234.d400\0ethernet-phy-ieee802.3-c22";
				reg = <0x00>;
				clocks = <0x02 0x56>;
				resets = <0x02 0x64>;
				pinctrl-names = "default";
				pinctrl-0 = <0x78 0x79>;
				phy-is-integrated;
				phandle = <0x77>;
			};
		};
	};

	usb@ff580000 {
		compatible = "rockchip,rk3328-usb\0rockchip,rk3066-usb\0snps,dwc2";
		reg = <0x00 0xff580000 0x00 0x40000>;
		interrupts = <0x00 0x17 0x04>;
		clocks = <0x02 0x14d>;
		clock-names = "otg";
		dr_mode = "host";
		g-np-tx-fifo-size = <0x10>;
		g-rx-fifo-size = <0x118>;
		g-tx-fifo-size = <0x100 0x80 0x80 0x40 0x20 0x10>;
		g-use-dma;
		phys = <0x7a>;
		phy-names = "usb2-phy";
		status = "okay";
		phandle = <0xce>;
	};

	usb@ff5c0000 {
		compatible = "generic-ehci";
		reg = <0x00 0xff5c0000 0x00 0x10000>;
		interrupts = <0x00 0x10 0x04>;
		clocks = <0x02 0x14e 0x63>;
		clock-names = "usbhost\0utmi";
		phys = <0x7b>;
		phy-names = "usb";
		status = "okay";
		phandle = <0xcf>;
	};

	usb@ff5d0000 {
		compatible = "generic-ohci";
		reg = <0x00 0xff5d0000 0x00 0x10000>;
		interrupts = <0x00 0x11 0x04>;
		clocks = <0x02 0x14e 0x63>;
		clock-names = "usbhost\0utmi";
		phys = <0x7b>;
		phy-names = "usb";
		status = "okay";
		phandle = <0xd0>;
	};

	dwmmc@ff5f0000 {
		compatible = "rockchip,rk3328-dw-mshc\0rockchip,rk3288-dw-mshc";
		reg = <0x00 0xff5f0000 0x00 0x4000>;
		clock-freq-min-max = <0x61a80 0x8f0d180>;
		clocks = <0x02 0x140 0x02 0x1f 0x02 0x4d 0x02 0x51>;
		clock-names = "biu\0ciu\0ciu-drv\0ciu-sample";
		fifo-depth = <0x100>;
		interrupts = <0x00 0x04 0x04>;
		status = "disabled";
		phandle = <0xd1>;
	};

	usb@ff600000 {
		compatible = "rockchip,rk3328-dwc3";
		clocks = <0x02 0x60 0x02 0x61 0x02 0x84>;
		clock-names = "ref_clk\0suspend_clk\0bus_clk";
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;
		status = "okay";
		phandle = <0xd2>;

		dwc3@ff600000 {
			compatible = "snps,dwc3";
			reg = <0x00 0xff600000 0x00 0x100000>;
			interrupts = <0x00 0x43 0x04>;
			dr_mode = "host";
			phys = <0x7c 0x7d>;
			phy-names = "usb2-phy\0usb3-phy";
			phy_type = "utmi_wide";
			snps,dis_enblslpm_quirk;
			snps,dis-u2-freeclk-exists-quirk;
			snps,dis_u2_susphy_quirk;
			snps,dis-u3-autosuspend-quirk;
			snps,dis_u3_susphy_quirk;
			snps,dis-del-phy-power-chg-quirk;
			snps,tx-ipgap-linecheck-dis-quirk;
			status = "okay";
			phandle = <0xd3>;
		};
	};

	qos@ff750000 {
		compatible = "syscon";
		reg = <0x00 0xff750000 0x00 0x20>;
		phandle = <0x2f>;
	};

	qos@ff750080 {
		compatible = "syscon";
		reg = <0x00 0xff750080 0x00 0x20>;
		phandle = <0x30>;
	};

	qos@ff778000 {
		compatible = "syscon";
		reg = <0x00 0xff778000 0x00 0x20>;
		phandle = <0x31>;
	};

	dfi@ff790000 {
		reg = <0x00 0xff790000 0x00 0x400>;
		compatible = "rockchip,rk3328-dfi";
		rockchip,grf = <0x20>;
		status = "okay";
		phandle = <0x7e>;
	};

	dmc {
		compatible = "rockchip,rk3328-dmc";
		devfreq-events = <0x7e>;
		clocks = <0x02 0x40>;
		clock-names = "dmc_clk";
		operating-points-v2 = <0x7f>;
		ddr_timing = <0x80>;
		upthreshold = <0x28>;
		downdifferential = <0x14>;
		system-status-freq = <0x01 0xa2990>;
		auto-min-freq = <0xa2990>;
		auto-freq-en = <0x00>;
		#cooling-cells = <0x02>;
		status = "okay";
		center-supply = <0x4a>;
		phandle = <0x53>;

		ddr_power_model {
			compatible = "ddr_power_model";
			dynamic-power-coefficient = <0x78>;
			static-power-coefficient = <0xc8>;
			ts = <0x7d00 0x125c 0xffffffb0 0x02>;
			thermal-zone = "soc-thermal";
			phandle = <0xd4>;
		};
	};

	dmc-opp-table {
		compatible = "operating-points-v2";
		rockchip,leakage-voltage-sel = <0x01 0x0a 0x00 0x0b 0xfe 0x01>;
		nvmem-cells = <0x4b>;
		nvmem-cell-names = "ddr_leakage";
		phandle = <0x7f>;

		opp-400000000 {
			opp-hz = <0x00 0x17d78400>;
			opp-microvolt = <0xe7ef0>;
			opp-microvolt-L0 = <0xe7ef0>;
			opp-microvolt-L1 = <0xe7ef0>;
			status = "disabled";
		};

		opp-600000000 {
			opp-hz = <0x00 0x23c34600>;
			opp-microvolt = <0x118c30>;
			opp-microvolt-L0 = <0x118c30>;
			opp-microvolt-L1 = <0x118c30>;
			status = "okay";
		};

		opp-786000000 {
			opp-hz = <0x00 0x2ed96880>;
			opp-microvolt = <0x118c30>;
			opp-microvolt-L0 = <0x118c30>;
			opp-microvolt-L1 = <0x118c30>;
		};

		opp-800000000 {
			opp-hz = <0x00 0x2faf0800>;
			opp-microvolt = <0x118c30>;
			opp-microvolt-L0 = <0x118c30>;
			opp-microvolt-L1 = <0x118c30>;
		};

		opp-850000000 {
			opp-hz = <0x00 0x32a9f880>;
			opp-microvolt = <0x106738>;
			opp-microvolt-L0 = <0x106738>;
			opp-microvolt-L1 = <0x100590>;
			status = "disabled";
		};

		opp-933000000 {
			opp-hz = <0x00 0x379c7340>;
			opp-microvolt = <0x112a88>;
			opp-microvolt-L0 = <0x112a88>;
			opp-microvolt-L1 = <0x10c8e0>;
			status = "disabled";
		};

		opp-1066000000 {
			opp-hz = <0x00 0x3f89de80>;
			opp-microvolt = <0x11edd8>;
			opp-microvolt-L0 = <0x11edd8>;
			opp-microvolt-L1 = <0x118c30>;
			status = "disabled";
		};

		opp-666000000 {
			opp-hz = <0x00 0x27b25a80>;
			opp-microvolt = <0x118c30>;
			opp-microvolt-L0 = <0x118c30>;
			opp-microvolt-L1 = <0x118c30>;
		};
	};

	interrupt-controller@ff811000 {
		compatible = "arm,gic-400";
		#interrupt-cells = <0x03>;
		#address-cells = <0x00>;
		interrupt-controller;
		reg = <0x00 0xff811000 0x00 0x1000 0x00 0xff812000 0x00 0x2000 0x00 0xff814000 0x00 0x2000 0x00 0xff816000 0x00 0x2000>;
		interrupts = <0x01 0x09 0xf04>;
		phandle = <0x01>;
	};

	pinctrl {
		compatible = "rockchip,rk3328-pinctrl";
		rockchip,grf = <0x20>;
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;
		pinctrl-names = "default";
		pinctrl-0 = <0x81>;
		phandle = <0xd5>;

		gpio0@ff210000 {
			compatible = "rockchip,gpio-bank";
			reg = <0x00 0xff210000 0x00 0x100>;
			interrupts = <0x00 0x33 0x04>;
			clocks = <0x02 0xc8>;
			gpio-controller;
			#gpio-cells = <0x02>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0x96>;
		};

		gpio1@ff220000 {
			compatible = "rockchip,gpio-bank";
			reg = <0x00 0xff220000 0x00 0x100>;
			interrupts = <0x00 0x34 0x04>;
			clocks = <0x02 0xc9>;
			gpio-controller;
			#gpio-cells = <0x02>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0x74>;
		};

		gpio2@ff230000 {
			compatible = "rockchip,gpio-bank";
			reg = <0x00 0xff230000 0x00 0x100>;
			interrupts = <0x00 0x35 0x04>;
			clocks = <0x02 0xca>;
			gpio-controller;
			#gpio-cells = <0x02>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0x8d>;
		};

		gpio3@ff240000 {
			compatible = "rockchip,gpio-bank";
			reg = <0x00 0xff240000 0x00 0x100>;
			interrupts = <0x00 0x36 0x04>;
			clocks = <0x02 0xcb>;
			gpio-controller;
			#gpio-cells = <0x02>;
			interrupt-controller;
			#interrupt-cells = <0x02>;
			phandle = <0xd6>;
		};

		pcfg-pull-up {
			bias-pull-up;
			phandle = <0x84>;
		};

		pcfg-pull-down {
			bias-pull-down;
			phandle = <0x8c>;
		};

		pcfg-pull-none {
			bias-disable;
			phandle = <0x82>;
		};

		pcfg-pull-none-2ma {
			bias-disable;
			drive-strength = <0x02>;
			phandle = <0x8b>;
		};

		pcfg-pull-up-2ma {
			bias-pull-up;
			drive-strength = <0x02>;
			phandle = <0xd7>;
		};

		pcfg-pull-up-4ma {
			bias-pull-up;
			drive-strength = <0x04>;
			phandle = <0x85>;
		};

		pcfg-pull-none-4ma {
			bias-disable;
			drive-strength = <0x04>;
			phandle = <0x88>;
		};

		pcfg-pull-down-4ma {
			bias-pull-down;
			drive-strength = <0x04>;
			phandle = <0xd8>;
		};

		pcfg-pull-none-8ma {
			bias-disable;
			drive-strength = <0x08>;
			phandle = <0x86>;
		};

		pcfg-pull-up-8ma {
			bias-pull-up;
			drive-strength = <0x08>;
			phandle = <0x87>;
		};

		pcfg-pull-none-12ma {
			bias-disable;
			drive-strength = <0x0c>;
			phandle = <0x89>;
		};

		pcfg-pull-up-12ma {
			bias-pull-up;
			drive-strength = <0x0c>;
			phandle = <0x8a>;
		};

		pcfg-output-high {
			output-high;
			phandle = <0xd9>;
		};

		pcfg-output-low {
			output-low;
			phandle = <0xda>;
		};

		pcfg-input-high {
			bias-pull-up;
			input-enable;
			phandle = <0x83>;
		};

		pcfg-input {
			input-enable;
			phandle = <0xdb>;
		};

		i2c0 {

			i2c0-xfer {
				rockchip,pins = <0x02 0x18 0x01 0x82 0x02 0x19 0x01 0x82>;
				phandle = <0x38>;
			};
		};

		i2c1 {

			i2c1-xfer {
				rockchip,pins = <0x02 0x04 0x02 0x82 0x02 0x05 0x02 0x82>;
				phandle = <0x39>;
			};
		};

		i2c2 {

			i2c2-xfer {
				rockchip,pins = <0x02 0x0d 0x01 0x82 0x02 0x0e 0x01 0x82>;
				phandle = <0x3a>;
			};
		};

		i2c3 {

			i2c3-xfer {
				rockchip,pins = <0x00 0x05 0x02 0x82 0x00 0x06 0x02 0x82>;
				phandle = <0x3b>;
			};

			i2c3-gpio {
				rockchip,pins = <0x00 0x05 0x00 0x82 0x00 0x06 0x00 0x82>;
				phandle = <0x5c>;
			};
		};

		tsp {

			tsp-d0 {
				rockchip,pins = <0x03 0x04 0x01 0x82>;
				phandle = <0x21>;
			};

			tsp-d1 {
				rockchip,pins = <0x03 0x05 0x01 0x82>;
				phandle = <0x22>;
			};

			tsp-d2 {
				rockchip,pins = <0x03 0x06 0x01 0x82>;
				phandle = <0x23>;
			};

			tsp-d3 {
				rockchip,pins = <0x03 0x07 0x01 0x82>;
				phandle = <0x24>;
			};

			tsp-d4 {
				rockchip,pins = <0x03 0x08 0x01 0x82>;
				phandle = <0x25>;
			};

			tsp-d5 {
				rockchip,pins = <0x02 0x10 0x03 0x82>;
				phandle = <0x26>;
			};

			tsp-d6 {
				rockchip,pins = <0x02 0x11 0x03 0x82>;
				phandle = <0x27>;
			};

			tsp-d7 {
				rockchip,pins = <0x02 0x12 0x03 0x82>;
				phandle = <0x28>;
			};

			tsp-sync {
				rockchip,pins = <0x02 0x0f 0x03 0x82>;
				phandle = <0x29>;
			};

			tsp-clk {
				rockchip,pins = <0x03 0x02 0x01 0x82>;
				phandle = <0x2a>;
			};

			tsp-fail {
				rockchip,pins = <0x03 0x01 0x01 0x82>;
				phandle = <0x2b>;
			};

			tsp-valid {
				rockchip,pins = <0x03 0x00 0x01 0x82>;
				phandle = <0x2c>;
			};
		};

		hdmi_i2c {

			hdmii2c-xfer {
				rockchip,pins = <0x00 0x05 0x01 0x82 0x00 0x06 0x01 0x82>;
				phandle = <0x5a>;
			};
		};

		pdm-0 {

			pdmm0-clk {
				rockchip,pins = <0x02 0x12 0x02 0x82>;
				phandle = <0x16>;
			};

			pdmm0-fsync {
				rockchip,pins = <0x02 0x17 0x02 0x82>;
				phandle = <0xdc>;
			};

			pdmm0-sdi0 {
				rockchip,pins = <0x02 0x13 0x02 0x82>;
				phandle = <0x17>;
			};

			pdmm0-sdi1 {
				rockchip,pins = <0x02 0x14 0x02 0x82>;
				phandle = <0x18>;
			};

			pdmm0-sdi2 {
				rockchip,pins = <0x02 0x15 0x02 0x82>;
				phandle = <0x19>;
			};

			pdmm0-sdi3 {
				rockchip,pins = <0x02 0x16 0x02 0x82>;
				phandle = <0x1a>;
			};

			pdmm0-clk-sleep {
				rockchip,pins = <0x02 0x12 0x00 0x83>;
				phandle = <0x1b>;
			};

			pdmm0-sdi0-sleep {
				rockchip,pins = <0x02 0x13 0x00 0x83>;
				phandle = <0x1c>;
			};

			pdmm0-sdi1-sleep {
				rockchip,pins = <0x02 0x14 0x00 0x83>;
				phandle = <0x1d>;
			};

			pdmm0-sdi2-sleep {
				rockchip,pins = <0x02 0x15 0x00 0x83>;
				phandle = <0x1e>;
			};

			pdmm0-sdi3-sleep {
				rockchip,pins = <0x02 0x16 0x00 0x83>;
				phandle = <0x1f>;
			};

			pdmm0-fsync-sleep {
				rockchip,pins = <0x02 0x17 0x00 0x83>;
				phandle = <0xdd>;
			};
		};

		tsadc {

			otp-gpio {
				rockchip,pins = <0x02 0x0d 0x00 0x82>;
				phandle = <0x47>;
			};

			otp-out {
				rockchip,pins = <0x02 0x0d 0x01 0x82>;
				phandle = <0x48>;
			};
		};

		uart0 {

			uart0-xfer {
				rockchip,pins = <0x01 0x09 0x01 0x84 0x01 0x08 0x01 0x82>;
				phandle = <0x32>;
			};

			uart0-cts {
				rockchip,pins = <0x01 0x0b 0x01 0x82>;
				phandle = <0x33>;
			};

			uart0-rts {
				rockchip,pins = <0x01 0x0a 0x01 0x82>;
				phandle = <0x9c>;
			};

			uart0-rts-gpio {
				rockchip,pins = <0x01 0x0a 0x00 0x82>;
				phandle = <0xde>;
			};
		};

		uart1 {

			uart1-xfer {
				rockchip,pins = <0x03 0x04 0x04 0x84 0x03 0x06 0x04 0x82>;
				phandle = <0x34>;
			};

			uart1-cts {
				rockchip,pins = <0x03 0x07 0x04 0x82>;
				phandle = <0x35>;
			};

			uart1-rts {
				rockchip,pins = <0x03 0x05 0x04 0x82>;
				phandle = <0x36>;
			};

			uart1-rts-gpio {
				rockchip,pins = <0x03 0x05 0x00 0x82>;
				phandle = <0xdf>;
			};
		};

		uart2-0 {

			uart2m0-xfer {
				rockchip,pins = <0x01 0x00 0x02 0x84 0x01 0x01 0x02 0x82>;
				phandle = <0xe0>;
			};
		};

		uart2-1 {

			uart2m1-xfer {
				rockchip,pins = <0x02 0x00 0x01 0x84 0x02 0x01 0x01 0x84>;
				phandle = <0x37>;
			};
		};

		spi0-0 {

			spi0m0-clk {
				rockchip,pins = <0x02 0x08 0x01 0x84>;
				phandle = <0xe1>;
			};

			spi0m0-cs0 {
				rockchip,pins = <0x02 0x0b 0x01 0x84>;
				phandle = <0xe2>;
			};

			spi0m0-tx {
				rockchip,pins = <0x02 0x09 0x01 0x84>;
				phandle = <0xe3>;
			};

			spi0m0-rx {
				rockchip,pins = <0x02 0x0a 0x01 0x84>;
				phandle = <0xe4>;
			};

			spi0m0-cs1 {
				rockchip,pins = <0x02 0x0c 0x01 0x84>;
				phandle = <0xe5>;
			};
		};

		spi0-1 {

			spi0m1-clk {
				rockchip,pins = <0x03 0x17 0x02 0x84>;
				phandle = <0xe6>;
			};

			spi0m1-cs0 {
				rockchip,pins = <0x03 0x1a 0x02 0x84>;
				phandle = <0xe7>;
			};

			spi0m1-tx {
				rockchip,pins = <0x03 0x19 0x02 0x84>;
				phandle = <0xe8>;
			};

			spi0m1-rx {
				rockchip,pins = <0x03 0x18 0x02 0x84>;
				phandle = <0xe9>;
			};

			spi0m1-cs1 {
				rockchip,pins = <0x03 0x1b 0x02 0x84>;
				phandle = <0xea>;
			};
		};

		spi0-2 {

			spi0m2-clk {
				rockchip,pins = <0x03 0x00 0x04 0x84>;
				phandle = <0x3c>;
			};

			spi0m2-cs0 {
				rockchip,pins = <0x03 0x08 0x03 0x84>;
				phandle = <0x3f>;
			};

			spi0m2-tx {
				rockchip,pins = <0x03 0x01 0x04 0x84>;
				phandle = <0x3d>;
			};

			spi0m2-rx {
				rockchip,pins = <0x03 0x02 0x04 0x84>;
				phandle = <0x3e>;
			};
		};

		i2s1 {

			i2s1-mclk {
				rockchip,pins = <0x02 0x0f 0x01 0x82>;
				phandle = <0xeb>;
			};

			i2s1-sclk {
				rockchip,pins = <0x02 0x12 0x01 0x82>;
				phandle = <0xec>;
			};

			i2s1-lrckrx {
				rockchip,pins = <0x02 0x10 0x01 0x82>;
				phandle = <0xed>;
			};

			i2s1-lrcktx {
				rockchip,pins = <0x02 0x11 0x01 0x82>;
				phandle = <0xee>;
			};

			i2s1-sdi {
				rockchip,pins = <0x02 0x13 0x01 0x82>;
				phandle = <0xef>;
			};

			i2s1-sdo {
				rockchip,pins = <0x02 0x17 0x01 0x82>;
				phandle = <0xf0>;
			};

			i2s1-sdio1 {
				rockchip,pins = <0x02 0x14 0x01 0x82>;
				phandle = <0xf1>;
			};

			i2s1-sdio2 {
				rockchip,pins = <0x02 0x15 0x01 0x82>;
				phandle = <0xf2>;
			};

			i2s1-sdio3 {
				rockchip,pins = <0x02 0x16 0x01 0x82>;
				phandle = <0xf3>;
			};

			i2s1-sleep {
				rockchip,pins = <0x02 0x0f 0x00 0x83 0x02 0x10 0x00 0x83 0x02 0x11 0x00 0x83 0x02 0x12 0x00 0x83 0x02 0x13 0x00 0x83 0x02 0x14 0x00 0x83 0x02 0x15 0x00 0x83 0x02 0x16 0x00 0x83 0x02 0x17 0x00 0x83>;
				phandle = <0xf4>;
			};
		};

		i2s2-0 {

			i2s2m0-mclk {
				rockchip,pins = <0x01 0x15 0x01 0x82>;
				phandle = <0x0e>;
			};

			i2s2m0-sclk {
				rockchip,pins = <0x01 0x16 0x01 0x82>;
				phandle = <0x0f>;
			};

			i2s2m0-lrckrx {
				rockchip,pins = <0x01 0x1a 0x01 0x82>;
				phandle = <0x11>;
			};

			i2s2m0-lrcktx {
				rockchip,pins = <0x01 0x17 0x01 0x82>;
				phandle = <0x10>;
			};

			i2s2m0-sdi {
				rockchip,pins = <0x01 0x18 0x01 0x82>;
				phandle = <0x13>;
			};

			i2s2m0-sdo {
				rockchip,pins = <0x01 0x19 0x01 0x82>;
				phandle = <0x12>;
			};

			i2s2m0-sleep {
				rockchip,pins = <0x01 0x15 0x00 0x83 0x01 0x16 0x00 0x83 0x01 0x1a 0x00 0x83 0x01 0x17 0x00 0x83 0x01 0x18 0x00 0x83 0x01 0x19 0x00 0x83>;
				phandle = <0x14>;
			};
		};

		i2s2-1 {

			i2s2m1-mclk {
				rockchip,pins = <0x01 0x15 0x01 0x82>;
				phandle = <0xf5>;
			};

			i2s2m1-sclk {
				rockchip,pins = <0x03 0x00 0x06 0x82>;
				phandle = <0xf6>;
			};

			i2sm1-lrckrx {
				rockchip,pins = <0x03 0x08 0x06 0x82>;
				phandle = <0xf7>;
			};

			i2s2m1-lrcktx {
				rockchip,pins = <0x03 0x08 0x04 0x82>;
				phandle = <0xf8>;
			};

			i2s2m1-sdi {
				rockchip,pins = <0x03 0x02 0x06 0x82>;
				phandle = <0xf9>;
			};

			i2s2m1-sdo {
				rockchip,pins = <0x03 0x01 0x06 0x82>;
				phandle = <0xfa>;
			};

			i2s2m1-sleep {
				rockchip,pins = <0x01 0x15 0x00 0x83 0x03 0x00 0x00 0x83 0x03 0x08 0x00 0x83 0x03 0x02 0x00 0x83 0x03 0x01 0x00 0x83>;
				phandle = <0xfb>;
			};
		};

		spdif-0 {

			spdifm0-tx {
				rockchip,pins = <0x00 0x1b 0x01 0x82>;
				phandle = <0x15>;
			};
		};

		spdif-1 {

			spdifm1-tx {
				rockchip,pins = <0x02 0x11 0x02 0x82>;
				phandle = <0xfc>;
			};
		};

		spdif-2 {

			spdifm2-tx {
				rockchip,pins = <0x00 0x02 0x02 0x82>;
				phandle = <0xfd>;
			};
		};

		sdmmc0-0 {

			sdmmc0m0-pwren {
				rockchip,pins = <0x02 0x07 0x01 0x85>;
				phandle = <0xfe>;
			};

			sdmmc0m0-gpio {
				rockchip,pins = <0x02 0x07 0x00 0x85>;
				phandle = <0xff>;
			};
		};

		sdmmc0-1 {

			sdmmc0m1-pwren {
				rockchip,pins = <0x00 0x1e 0x03 0x85>;
				phandle = <0x100>;
			};

			sdmmc0m1-gpio {
				rockchip,pins = <0x00 0x1e 0x00 0x85>;
				phandle = <0x99>;
			};
		};

		sdmmc0 {

			sdmmc0-clk {
				rockchip,pins = <0x01 0x06 0x01 0x86>;
				phandle = <0x67>;
			};

			sdmmc0-cmd {
				rockchip,pins = <0x01 0x04 0x01 0x87>;
				phandle = <0x68>;
			};

			sdmmc0-dectn {
				rockchip,pins = <0x01 0x05 0x01 0x85>;
				phandle = <0x69>;
			};

			sdmmc0-wrprt {
				rockchip,pins = <0x01 0x07 0x01 0x85>;
				phandle = <0x101>;
			};

			sdmmc0-bus1 {
				rockchip,pins = <0x01 0x00 0x01 0x87>;
				phandle = <0x102>;
			};

			sdmmc0-bus4 {
				rockchip,pins = <0x01 0x00 0x01 0x87 0x01 0x01 0x01 0x87 0x01 0x02 0x01 0x87 0x01 0x03 0x01 0x87>;
				phandle = <0x6a>;
			};

			sdmmc0-gpio {
				rockchip,pins = <0x01 0x06 0x00 0x85 0x01 0x04 0x00 0x85 0x01 0x05 0x00 0x85 0x01 0x07 0x00 0x85 0x01 0x03 0x00 0x85 0x01 0x02 0x00 0x85 0x01 0x01 0x00 0x85 0x01 0x00 0x00 0x85>;
				phandle = <0x103>;
			};
		};

		sdmmc0ext {

			sdmmc0ext-clk {
				rockchip,pins = <0x03 0x02 0x03 0x88>;
				phandle = <0x104>;
			};

			sdmmc0ext-cmd {
				rockchip,pins = <0x03 0x00 0x03 0x85>;
				phandle = <0x105>;
			};

			sdmmc0ext-wrprt {
				rockchip,pins = <0x03 0x03 0x03 0x85>;
				phandle = <0x106>;
			};

			sdmmc0ext-dectn {
				rockchip,pins = <0x03 0x01 0x03 0x85>;
				phandle = <0x107>;
			};

			sdmmc0ext-bus1 {
				rockchip,pins = <0x03 0x04 0x03 0x85>;
				phandle = <0x108>;
			};

			sdmmc0ext-bus4 {
				rockchip,pins = <0x03 0x04 0x03 0x85 0x03 0x05 0x03 0x85 0x03 0x06 0x03 0x85 0x03 0x07 0x03 0x85>;
				phandle = <0x109>;
			};

			sdmmc0ext-gpio {
				rockchip,pins = <0x03 0x00 0x00 0x85 0x03 0x01 0x00 0x85 0x03 0x02 0x00 0x85 0x03 0x03 0x00 0x85 0x03 0x04 0x00 0x85 0x03 0x05 0x00 0x85 0x03 0x06 0x00 0x85 0x03 0x07 0x00 0x85>;
				phandle = <0x10a>;
			};
		};

		sdmmc1 {

			sdmmc1-clk {
				rockchip,pins = <0x01 0x0c 0x01 0x86>;
				phandle = <0x6f>;
			};

			sdmmc1-cmd {
				rockchip,pins = <0x01 0x0d 0x01 0x87>;
				phandle = <0x6e>;
			};

			sdmmc1-pwren {
				rockchip,pins = <0x01 0x12 0x01 0x87>;
				phandle = <0x10b>;
			};

			sdmmc1-wrprt {
				rockchip,pins = <0x01 0x14 0x01 0x87>;
				phandle = <0x10c>;
			};

			sdmmc1-dectn {
				rockchip,pins = <0x01 0x13 0x01 0x87>;
				phandle = <0x10d>;
			};

			sdmmc1-bus1 {
				rockchip,pins = <0x01 0x0e 0x01 0x87>;
				phandle = <0x10e>;
			};

			sdmmc1-bus4 {
				rockchip,pins = <0x01 0x0e 0x01 0x87 0x01 0x0f 0x01 0x87 0x01 0x10 0x01 0x87 0x01 0x11 0x01 0x87>;
				phandle = <0x6d>;
			};

			sdmmc1-gpio {
				rockchip,pins = <0x01 0x0c 0x00 0x85 0x01 0x0d 0x00 0x85 0x01 0x0e 0x00 0x85 0x01 0x0f 0x00 0x85 0x01 0x10 0x00 0x85 0x01 0x11 0x00 0x85 0x01 0x12 0x00 0x85 0x01 0x13 0x00 0x85 0x01 0x14 0x00 0x85>;
				phandle = <0x10f>;
			};
		};

		emmc {

			emmc-clk {
				rockchip,pins = <0x03 0x15 0x02 0x89>;
				phandle = <0x70>;
			};

			emmc-cmd {
				rockchip,pins = <0x03 0x13 0x02 0x8a>;
				phandle = <0x71>;
			};

			emmc-pwren {
				rockchip,pins = <0x03 0x16 0x02 0x82>;
				phandle = <0x110>;
			};

			emmc-rstnout {
				rockchip,pins = <0x03 0x14 0x02 0x82>;
				phandle = <0x111>;
			};

			emmc-bus1 {
				rockchip,pins = <0x00 0x07 0x02 0x8a>;
				phandle = <0x112>;
			};

			emmc-bus4 {
				rockchip,pins = <0x00 0x07 0x02 0x8a 0x02 0x1c 0x02 0x8a 0x02 0x1d 0x02 0x8a 0x02 0x1e 0x02 0x8a>;
				phandle = <0x113>;
			};

			emmc-bus8 {
				rockchip,pins = <0x00 0x07 0x02 0x8a 0x02 0x1c 0x02 0x8a 0x02 0x1d 0x02 0x8a 0x02 0x1e 0x02 0x8a 0x02 0x1f 0x02 0x8a 0x03 0x10 0x02 0x8a 0x03 0x11 0x02 0x8a 0x03 0x12 0x02 0x8a>;
				phandle = <0x72>;
			};
		};

		pwm0 {

			pwm0-pin {
				rockchip,pins = <0x02 0x04 0x01 0x82>;
				phandle = <0x114>;
			};

			pwm0-pin-pull-up {
				rockchip,pins = <0x02 0x04 0x01 0x84>;
				phandle = <0x40>;
			};
		};

		pwm1 {

			pwm1-pin {
				rockchip,pins = <0x02 0x05 0x01 0x82>;
				phandle = <0x115>;
			};

			pwm1-pin-pull-up {
				rockchip,pins = <0x02 0x05 0x01 0x84>;
				phandle = <0x41>;
			};
		};

		pwm2 {

			pwm2-pin {
				rockchip,pins = <0x02 0x06 0x01 0x82>;
				phandle = <0x42>;
			};
		};

		pwmir {

			pwmir-pin {
				rockchip,pins = <0x02 0x02 0x01 0x82>;
				phandle = <0x43>;
			};
		};

		gmac-1 {

			rgmiim1-pins {
				rockchip,pins = <0x01 0x0c 0x02 0x86 0x01 0x0d 0x02 0x88 0x01 0x13 0x02 0x88 0x01 0x19 0x02 0x86 0x01 0x15 0x02 0x88 0x01 0x16 0x02 0x88 0x01 0x17 0x02 0x88 0x01 0x0a 0x02 0x88 0x01 0x0b 0x02 0x88 0x01 0x08 0x02 0x86 0x01 0x09 0x02 0x86 0x01 0x0e 0x02 0x88 0x01 0x0f 0x02 0x88 0x01 0x10 0x02 0x86 0x01 0x11 0x02 0x86 0x00 0x08 0x01 0x86 0x00 0x0c 0x01 0x86 0x00 0x18 0x01 0x88 0x00 0x10 0x01 0x86 0x00 0x11 0x01 0x86 0x00 0x17 0x01 0x86 0x00 0x16 0x01 0x86>;
				phandle = <0x76>;
			};

			rmiim1-pins {
				rockchip,pins = <0x01 0x13 0x02 0x8b 0x01 0x19 0x02 0x89 0x01 0x15 0x02 0x8b 0x01 0x18 0x02 0x8b 0x01 0x16 0x02 0x8b 0x01 0x17 0x02 0x8b 0x01 0x0a 0x02 0x8b 0x01 0x0b 0x02 0x8b 0x01 0x08 0x02 0x89 0x01 0x09 0x02 0x89 0x00 0x0b 0x01 0x82 0x00 0x0c 0x01 0x82 0x00 0x18 0x01 0x82 0x00 0x13 0x01 0x82 0x00 0x10 0x01 0x82 0x00 0x11 0x01 0x82>;
				phandle = <0x116>;
			};
		};

		gmac2phy {

			fephyled-speed100 {
				rockchip,pins = <0x00 0x1f 0x01 0x82>;
				phandle = <0x117>;
			};

			fephyled-speed10 {
				rockchip,pins = <0x00 0x1e 0x01 0x82>;
				phandle = <0x118>;
			};

			fephyled-duplex {
				rockchip,pins = <0x00 0x1e 0x02 0x82>;
				phandle = <0x119>;
			};

			fephyled-rxm0 {
				rockchip,pins = <0x00 0x1d 0x01 0x82>;
				phandle = <0x11a>;
			};

			fephyled-txm0 {
				rockchip,pins = <0x00 0x1d 0x02 0x82>;
				phandle = <0x11b>;
			};

			fephyled-linkm0 {
				rockchip,pins = <0x00 0x1c 0x01 0x82>;
				phandle = <0x11c>;
			};

			fephyled-rxm1 {
				rockchip,pins = <0x02 0x19 0x02 0x82>;
				phandle = <0x78>;
			};

			fephyled-txm1 {
				rockchip,pins = <0x02 0x19 0x03 0x82>;
				phandle = <0x11d>;
			};

			fephyled-linkm1 {
				rockchip,pins = <0x02 0x18 0x02 0x82>;
				phandle = <0x79>;
			};
		};

		tsadc_pin {

			tsadc-int {
				rockchip,pins = <0x02 0x0d 0x02 0x82>;
				phandle = <0x11e>;
			};

			tsadc-gpio {
				rockchip,pins = <0x02 0x0d 0x00 0x82>;
				phandle = <0x11f>;
			};
		};

		hdmi_pin {

			hdmi-cec {
				rockchip,pins = <0x00 0x03 0x01 0x82>;
				phandle = <0x59>;
			};

			hdmi-hpd {
				rockchip,pins = <0x00 0x04 0x01 0x8c>;
				phandle = <0x5b>;
			};
		};

		cif-0 {

			dvp-d2d9-m0 {
				rockchip,pins = <0x03 0x04 0x02 0x82 0x03 0x05 0x02 0x82 0x03 0x06 0x02 0x82 0x03 0x07 0x02 0x82 0x03 0x08 0x02 0x82 0x03 0x09 0x02 0x82 0x03 0x0a 0x02 0x82 0x03 0x0b 0x02 0x82 0x03 0x01 0x02 0x82 0x03 0x00 0x02 0x82 0x03 0x03 0x02 0x82 0x03 0x02 0x02 0x82>;
				phandle = <0x120>;
			};
		};

		cif-1 {

			dvp-d2d9-m1 {
				rockchip,pins = <0x03 0x04 0x02 0x82 0x03 0x05 0x02 0x82 0x03 0x06 0x02 0x82 0x03 0x07 0x02 0x82 0x03 0x08 0x02 0x82 0x02 0x10 0x04 0x82 0x02 0x11 0x04 0x82 0x02 0x12 0x04 0x82 0x03 0x01 0x02 0x82 0x03 0x00 0x02 0x82 0x02 0x0f 0x04 0x82 0x03 0x02 0x02 0x82>;
				phandle = <0x121>;
			};
		};

		leds {

			led-ctl {
				rockchip,pins = <0x02 0x17 0x00 0x82>;
				phandle = <0x8e>;
			};
		};

		sdio-pwrseq {

			wifi-enable-h {
				rockchip,pins = <0x01 0x12 0x00 0x82>;
				phandle = <0x8f>;
			};
		};

		usb {

			host-vbus-drv {
				rockchip,pins = <0x00 0x00 0x00 0x82>;
				phandle = <0x97>;
			};

			otg-vbus-drv {
				rockchip,pins = <0x00 0x02 0x00 0x82>;
				phandle = <0x98>;
			};
		};

		wireless-bluetooth {

			uart0-gpios {
				rockchip,pins = <0x01 0x0a 0x00 0x82>;
				phandle = <0x9d>;
			};
		};

		clk_32k {

			clk-32k-out {
				rockchip,pins = <0x01 0x1c 0x01 0x82>;
				phandle = <0x81>;
			};
		};
	};

	chosen {
		bootargs = "earlycon=uart8250,mmio32,0xff130000 swiotlb=1 kpti=0 coherent_pool=1m";
		phandle = <0x122>;
	};

	fiq-debugger {
		compatible = "rockchip,fiq-debugger";
		rockchip,serial-id = <0x02>;
		rockchip,signal-irq = <0x9f>;
		rockchip,wake-irq = <0x00>;
		rockchip,irq-mode-enable = <0x00>;
		rockchip,baudrate = <0x16e360>;
		pinctrl-names = "default";
		pinctrl-0 = <0x37>;
		interrupts = <0x00 0x7f 0x08>;
		status = "okay";
	};

	reserved-memory {
		#address-cells = <0x02>;
		#size-cells = <0x02>;
		ranges;

		drm-logo@00000000 {
			compatible = "rockchip,drm-logo";
			reg = <0x00 0x00 0x00 0x00>;
			phandle = <0x60>;
		};

		ramoops@110000 {
			compatible = "ramoops";
			reg = <0x00 0x110000 0x00 0xf0000>;
			record-size = <0x20000>;
			console-size = <0x80000>;
			ftrace-size = <0x00>;
			pmsg-size = <0x50000>;
			phandle = <0x123>;
		};

		secure-memory@20000000 {
			compatible = "rockchip,secure-memory";
			reg = <0x00 0x20000000 0x00 0x00>;
			phandle = <0x61>;
		};

		linux,cma {
			compatible = "shared-dma-pool";
			reusable;
			size = <0x00 0x2000000>;
			linux,cma-default;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";
		phandle = <0x124>;

		work {
			gpios = <0x8d 0x17 0x00>;
			label = "power";
			pinctrl-names = "default";
			pinctrl-0 = <0x8e>;
			default-state = "off";
		};
	};

	external-gmac-clock {
		compatible = "fixed-clock";
		clock-frequency = <0x7735940>;
		clock-output-names = "gmac_clkin";
		#clock-cells = <0x00>;
		phandle = <0x75>;
	};

	sdio-pwrseq {
		compatible = "mmc-pwrseq-simple";
		pinctrl-names = "default";
		pinctrl-0 = <0x8f>;
		reset-gpios = <0x74 0x12 0x01>;
		phandle = <0x6c>;
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,format = "i2s";
		simple-audio-card,mclk-fs = <0x100>;
		simple-audio-card,name = "rockchip-rk3328";

		simple-audio-card,cpu {
			sound-dai = <0x90>;
		};

		simple-audio-card,codec {
			sound-dai = <0x91>;
		};
	};

	hdmi-sound {
		compatible = "simple-audio-card";
		simple-audio-card,format = "i2s";
		simple-audio-card,mclk-fs = <0x80>;
		simple-audio-card,name = "rockchip-hdmi";

		simple-audio-card,cpu {
			sound-dai = <0x92>;
		};

		simple-audio-card,codec {
			sound-dai = <0x93>;
		};
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <0x01>;
		#size-cells = <0x00>;

		regulator@0 {
			compatible = "regulator-fixed";
			regulator-name = "vccio_1v8";
			regulator-min-microvolt = <0x1b7740>;
			regulator-max-microvolt = <0x1b7740>;
			regulator-always-on;
			phandle = <0x2e>;
		};

		regulator@1 {
			compatible = "regulator-fixed";
			regulator-name = "vccio_3v3";
			regulator-min-microvolt = <0x325aa0>;
			regulator-max-microvolt = <0x325aa0>;
			regulator-always-on;
			phandle = <0x2d>;
		};
	};

	rtc-fake {
		compatible = "rtc-fake";
		status = "okay";
	};

	spdif-sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "rockchip-spdif";

		simple-audio-card,cpu {
			sound-dai = <0x94>;
		};

		simple-audio-card,codec {
			sound-dai = <0x95>;
		};
	};

	spdif-out {
		compatible = "linux,spdif-dit";
		#sound-dai-cells = <0x00>;
		phandle = <0x95>;
	};

	host-vbus-regulator {
		compatible = "regulator-fixed";
		gpio = <0x96 0x00 0x00>;
		pinctrl-names = "default";
		pinctrl-0 = <0x97>;
		regulator-name = "vcc_host_vbus";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		enable-active-high;
		phandle = <0x66>;
	};

	otg-vbus-regulator {
		compatible = "regulator-fixed";
		gpio = <0x96 0x02 0x00>;
		pinctrl-names = "default";
		pinctrl-0 = <0x98>;
		regulator-name = "vcc_otg_vbus";
		regulator-min-microvolt = <0x4c4b40>;
		regulator-max-microvolt = <0x4c4b40>;
		enable-active-high;
		phandle = <0x64>;
	};

	vcc-phy-regulator {
		compatible = "regulator-fixed";
		regulator-name = "vcc_phy";
		regulator-always-on;
		regulator-boot-on;
		phandle = <0x73>;
	};

	sdmmc-regulator {
		compatible = "regulator-fixed";
		gpio = <0x96 0x1e 0x01>;
		pinctrl-names = "default";
		pinctrl-0 = <0x99>;
		regulator-name = "vcc_sd";
		regulator-min-microvolt = <0x325aa0>;
		regulator-max-microvolt = <0x325aa0>;
		vin-supply = <0x2d>;
		phandle = <0x6b>;
	};

	vdd-center {
		compatible = "pwm-regulator";
		rockchip,pwm_id = <0x00>;
		rockchip,pwm_voltage = <0x1312d0>;
		pwms = <0x9a 0x00 0x1388 0x01>;
		regulator-name = "vcc_arm";
		regulator-min-microvolt = <0xe7ef0>;
		regulator-max-microvolt = <0x155cc0>;
		regulator-always-on;
		regulator-boot-on;
		phandle = <0x05>;
	};

	vdd-log {
		compatible = "pwm-regulator";
		rockchip,pwm_id = <0x01>;
		rockchip,pwm_voltage = <0x10c8e0>;
		pwms = <0x9b 0x00 0x1388 0x01>;
		regulator-name = "vcc_log";
		regulator-min-microvolt = <0xdbba0>;
		regulator-max-microvolt = <0x13d620>;
		regulator-always-on;
		regulator-boot-on;
		phandle = <0x4a>;
	};

	wireless-bluetooth {
		compatible = "bluetooth-platdata";
		uart_rts_gpios = <0x74 0x0a 0x01>;
		pinctrl-names = "default\0rts_gpio";
		pinctrl-0 = <0x9c>;
		pinctrl-1 = <0x9d>;
		BT,power_gpio = <0x74 0x15 0x00>;
		BT,wake_host_irq = <0x74 0x1a 0x00>;
		status = "okay";
	};

	wireless-wlan {
		compatible = "wlan-platdata";
		rockchip,grf = <0x20>;
		wifi_chip_type = "ap6330";
		sdio_vref = <0x708>;
		WIFI,host_wake_irq = <0x74 0x13 0x00>;
		status = "okay";
	};

	fd628_dev {
		compatible = "fd628_dev";
		fd628_gpio_clk = <0x8d 0x16 0x00>;
		fd628_gpio_dat = <0x8d 0x15 0x00>;
		status = "okay";
	};

	dummy-battery {
		compatible = "amlogic, dummy-battery";
		status = "okay";
		phandle = <0x125>;
	};

	dummy-charger {
		compatible = "amlogic, dummy-charger";
		status = "okay";
		phandle = <0x126>;
	};

	__symbols__ {
		ddr_timing = "/ddr_timing";
		cpu0 = "/cpus/cpu@0";
		cpu1 = "/cpus/cpu@1";
		cpu2 = "/cpus/cpu@2";
		cpu3 = "/cpus/cpu@3";
		l2 = "/cpus/l2-cache0";
		cpu0_opp_table = "/cpu0-opp-table";
		dmac = "/amba/dmac@ff1f0000";
		firmware_android = "/firmware/android";
		rockchip_suspend = "/rockchip-suspend";
		rockchip_system_monitor = "/rockchip-system-monitor";
		xin24m = "/xin24m";
		i2s0 = "/i2s@ff000000";
		i2s1 = "/i2s@ff010000";
		i2s2 = "/i2s@ff020000";
		spdif = "/spdif@ff030000";
		pdm = "/pdm@ff040000";
		tsp = "/tsp@ff050000";
		rng = "/rng@ff060000";
		grf = "/syscon@ff100000";
		io_domains = "/syscon@ff100000/io-domains";
		power = "/syscon@ff100000/power-controller";
		reboot_mode = "/syscon@ff100000/reboot-mode";
		uart0 = "/serial@ff110000";
		uart1 = "/serial@ff120000";
		uart2 = "/serial@ff130000";
		i2c0 = "/i2c@ff150000";
		i2c1 = "/i2c@ff160000";
		i2c2 = "/i2c@ff170000";
		i2c3 = "/i2c@ff180000";
		spi0 = "/spi@ff190000";
		wdt = "/watchdog@ff1a0000";
		pwm0 = "/pwm@ff1b0000";
		pwm1 = "/pwm@ff1b0010";
		pwm2 = "/pwm@ff1b0020";
		pwm3 = "/pwm@ff1b0030";
		soc_thermal = "/thermal-zones/soc-thermal";
		threshold = "/thermal-zones/soc-thermal/trips/trip-point0";
		target = "/thermal-zones/soc-thermal/trips/trip-point1";
		soc_crit = "/thermal-zones/soc-thermal/trips/soc-crit";
		tsadc = "/tsadc@ff250000";
		efuse = "/efuse@ff260000";
		efuse_id = "/efuse@ff260000/id@7";
		cpu_leakage = "/efuse@ff260000/cpu-leakage@17";
		logic_leakage = "/efuse@ff260000/logic-leakage@19";
		efuse_cpu_version = "/efuse@ff260000/cpu-version@1a";
		saradc = "/adc@ff280000";
		gpu = "/gpu@ff300000";
		gpu_power_model = "/gpu@ff300000/power_model";
		gpu_opp_table = "/gpu-opp-table";
		mpp_srv = "/mpp-srv";
		vepu22 = "/vepu22@ff330000";
		vepu22_mmu = "/iommu@ff330200";
		vepu = "/vepu@ff340000";
		vepu_mmu = "/iommu@ff340800";
		vdpu = "/vdpu@ff350000";
		vpu_mmu = "/iommu@ff350800";
		avsd = "/avsd_plus@ff351000";
		rkvdec = "/rkvdec@ff36000";
		vcodec_power_model = "/rkvdec@ff36000/vcodec_power_model";
		rkvdec_opp_table = "/rkvdec-opp-table";
		rkvdec_mmu = "/iommu@ff360480";
		vop = "/vop@ff370000";
		vop_out = "/vop@ff370000/port";
		vop_out_hdmi = "/vop@ff370000/port/endpoint@0";
		vop_out_tve = "/vop@ff370000/port/endpoint@1";
		vop_mmu = "/iommu@ff373f00";
		rga = "/rga@ff3900000";
		iep = "/iep@ff3a0000";
		iep_mmu = "/iommu@ff3a0800";
		hdmi = "/hdmi@ff3c0000";
		hdmi_in = "/hdmi@ff3c0000/ports/port";
		hdmi_in_vop = "/hdmi@ff3c0000/ports/port/endpoint@0";
		tve = "/tve@ff373e00";
		tve_in = "/tve@ff373e00/ports/port";
		tve_in_vop = "/tve@ff373e00/ports/port/endpoint@0";
		display_subsystem = "/display-subsystem";
		route_hdmi = "/display-subsystem/route/route-hdmi";
		route_tve = "/display-subsystem/route/route-tve";
		codec = "/codec@ff410000";
		hdmiphy = "/hdmiphy@ff430000";
		cru = "/clock-controller@ff440000";
		usb2phy_grf = "/syscon@ff450000";
		u2phy = "/syscon@ff450000/usb2-phy@100";
		u2phy_otg = "/syscon@ff450000/usb2-phy@100/otg-port";
		u2phy_host = "/syscon@ff450000/usb2-phy@100/host-port";
		usb3phy_grf = "/syscon@ff460000";
		u3phy = "/usb3-phy@ff470000";
		u3phy_utmi = "/usb3-phy@ff470000/utmi@ff470000";
		u3phy_pipe = "/usb3-phy@ff470000/pipe@ff478000";
		sdmmc = "/dwmmc@ff500000";
		sdio = "/dwmmc@ff510000";
		emmc = "/dwmmc@ff520000";
		gmac2io = "/ethernet@ff540000";
		gmac2phy = "/ethernet@ff550000";
		phy = "/ethernet@ff550000/mdio/phy@0";
		usb20_otg = "/usb@ff580000";
		usb_host0_ehci = "/usb@ff5c0000";
		usb_host0_ohci = "/usb@ff5d0000";
		sdmmc_ext = "/dwmmc@ff5f0000";
		usbdrd3 = "/usb@ff600000";
		usbdrd_dwc3 = "/usb@ff600000/dwc3@ff600000";
		qos_rkvdec_r = "/qos@ff750000";
		qos_rkvdec_w = "/qos@ff750080";
		qos_vpu = "/qos@ff778000";
		dfi = "/dfi@ff790000";
		dmc = "/dmc";
		ddr_power_model = "/dmc/ddr_power_model";
		dmc_opp_table = "/dmc-opp-table";
		gic = "/interrupt-controller@ff811000";
		pinctrl = "/pinctrl";
		gpio0 = "/pinctrl/gpio0@ff210000";
		gpio1 = "/pinctrl/gpio1@ff220000";
		gpio2 = "/pinctrl/gpio2@ff230000";
		gpio3 = "/pinctrl/gpio3@ff240000";
		pcfg_pull_up = "/pinctrl/pcfg-pull-up";
		pcfg_pull_down = "/pinctrl/pcfg-pull-down";
		pcfg_pull_none = "/pinctrl/pcfg-pull-none";
		pcfg_pull_none_2ma = "/pinctrl/pcfg-pull-none-2ma";
		pcfg_pull_up_2ma = "/pinctrl/pcfg-pull-up-2ma";
		pcfg_pull_up_4ma = "/pinctrl/pcfg-pull-up-4ma";
		pcfg_pull_none_4ma = "/pinctrl/pcfg-pull-none-4ma";
		pcfg_pull_down_4ma = "/pinctrl/pcfg-pull-down-4ma";
		pcfg_pull_none_8ma = "/pinctrl/pcfg-pull-none-8ma";
		pcfg_pull_up_8ma = "/pinctrl/pcfg-pull-up-8ma";
		pcfg_pull_none_12ma = "/pinctrl/pcfg-pull-none-12ma";
		pcfg_pull_up_12ma = "/pinctrl/pcfg-pull-up-12ma";
		pcfg_output_high = "/pinctrl/pcfg-output-high";
		pcfg_output_low = "/pinctrl/pcfg-output-low";
		pcfg_input_high = "/pinctrl/pcfg-input-high";
		pcfg_input = "/pinctrl/pcfg-input";
		i2c0_xfer = "/pinctrl/i2c0/i2c0-xfer";
		i2c1_xfer = "/pinctrl/i2c1/i2c1-xfer";
		i2c2_xfer = "/pinctrl/i2c2/i2c2-xfer";
		i2c3_xfer = "/pinctrl/i2c3/i2c3-xfer";
		i2c3_gpio = "/pinctrl/i2c3/i2c3-gpio";
		tsp_d0 = "/pinctrl/tsp/tsp-d0";
		tsp_d1 = "/pinctrl/tsp/tsp-d1";
		tsp_d2 = "/pinctrl/tsp/tsp-d2";
		tsp_d3 = "/pinctrl/tsp/tsp-d3";
		tsp_d4 = "/pinctrl/tsp/tsp-d4";
		tsp_d5 = "/pinctrl/tsp/tsp-d5";
		tsp_d6 = "/pinctrl/tsp/tsp-d6";
		tsp_d7 = "/pinctrl/tsp/tsp-d7";
		tsp_sync = "/pinctrl/tsp/tsp-sync";
		tsp_clk = "/pinctrl/tsp/tsp-clk";
		tsp_fail = "/pinctrl/tsp/tsp-fail";
		tsp_valid = "/pinctrl/tsp/tsp-valid";
		hdmii2c_xfer = "/pinctrl/hdmi_i2c/hdmii2c-xfer";
		pdmm0_clk = "/pinctrl/pdm-0/pdmm0-clk";
		pdmm0_fsync = "/pinctrl/pdm-0/pdmm0-fsync";
		pdmm0_sdi0 = "/pinctrl/pdm-0/pdmm0-sdi0";
		pdmm0_sdi1 = "/pinctrl/pdm-0/pdmm0-sdi1";
		pdmm0_sdi2 = "/pinctrl/pdm-0/pdmm0-sdi2";
		pdmm0_sdi3 = "/pinctrl/pdm-0/pdmm0-sdi3";
		pdmm0_clk_sleep = "/pinctrl/pdm-0/pdmm0-clk-sleep";
		pdmm0_sdi0_sleep = "/pinctrl/pdm-0/pdmm0-sdi0-sleep";
		pdmm0_sdi1_sleep = "/pinctrl/pdm-0/pdmm0-sdi1-sleep";
		pdmm0_sdi2_sleep = "/pinctrl/pdm-0/pdmm0-sdi2-sleep";
		pdmm0_sdi3_sleep = "/pinctrl/pdm-0/pdmm0-sdi3-sleep";
		pdmm0_fsync_sleep = "/pinctrl/pdm-0/pdmm0-fsync-sleep";
		otp_gpio = "/pinctrl/tsadc/otp-gpio";
		otp_out = "/pinctrl/tsadc/otp-out";
		uart0_xfer = "/pinctrl/uart0/uart0-xfer";
		uart0_cts = "/pinctrl/uart0/uart0-cts";
		uart0_rts = "/pinctrl/uart0/uart0-rts";
		uart0_rts_gpio = "/pinctrl/uart0/uart0-rts-gpio";
		uart1_xfer = "/pinctrl/uart1/uart1-xfer";
		uart1_cts = "/pinctrl/uart1/uart1-cts";
		uart1_rts = "/pinctrl/uart1/uart1-rts";
		uart1_rts_gpio = "/pinctrl/uart1/uart1-rts-gpio";
		uart2m0_xfer = "/pinctrl/uart2-0/uart2m0-xfer";
		uart2m1_xfer = "/pinctrl/uart2-1/uart2m1-xfer";
		spi0m0_clk = "/pinctrl/spi0-0/spi0m0-clk";
		spi0m0_cs0 = "/pinctrl/spi0-0/spi0m0-cs0";
		spi0m0_tx = "/pinctrl/spi0-0/spi0m0-tx";
		spi0m0_rx = "/pinctrl/spi0-0/spi0m0-rx";
		spi0m0_cs1 = "/pinctrl/spi0-0/spi0m0-cs1";
		spi0m1_clk = "/pinctrl/spi0-1/spi0m1-clk";
		spi0m1_cs0 = "/pinctrl/spi0-1/spi0m1-cs0";
		spi0m1_tx = "/pinctrl/spi0-1/spi0m1-tx";
		spi0m1_rx = "/pinctrl/spi0-1/spi0m1-rx";
		spi0m1_cs1 = "/pinctrl/spi0-1/spi0m1-cs1";
		spi0m2_clk = "/pinctrl/spi0-2/spi0m2-clk";
		spi0m2_cs0 = "/pinctrl/spi0-2/spi0m2-cs0";
		spi0m2_tx = "/pinctrl/spi0-2/spi0m2-tx";
		spi0m2_rx = "/pinctrl/spi0-2/spi0m2-rx";
		i2s1_mclk = "/pinctrl/i2s1/i2s1-mclk";
		i2s1_sclk = "/pinctrl/i2s1/i2s1-sclk";
		i2s1_lrckrx = "/pinctrl/i2s1/i2s1-lrckrx";
		i2s1_lrcktx = "/pinctrl/i2s1/i2s1-lrcktx";
		i2s1_sdi = "/pinctrl/i2s1/i2s1-sdi";
		i2s1_sdo = "/pinctrl/i2s1/i2s1-sdo";
		i2s1_sdio1 = "/pinctrl/i2s1/i2s1-sdio1";
		i2s1_sdio2 = "/pinctrl/i2s1/i2s1-sdio2";
		i2s1_sdio3 = "/pinctrl/i2s1/i2s1-sdio3";
		i2s1_sleep = "/pinctrl/i2s1/i2s1-sleep";
		i2s2m0_mclk = "/pinctrl/i2s2-0/i2s2m0-mclk";
		i2s2m0_sclk = "/pinctrl/i2s2-0/i2s2m0-sclk";
		i2s2m0_lrckrx = "/pinctrl/i2s2-0/i2s2m0-lrckrx";
		i2s2m0_lrcktx = "/pinctrl/i2s2-0/i2s2m0-lrcktx";
		i2s2m0_sdi = "/pinctrl/i2s2-0/i2s2m0-sdi";
		i2s2m0_sdo = "/pinctrl/i2s2-0/i2s2m0-sdo";
		i2s2m0_sleep = "/pinctrl/i2s2-0/i2s2m0-sleep";
		i2s2m1_mclk = "/pinctrl/i2s2-1/i2s2m1-mclk";
		i2s2m1_sclk = "/pinctrl/i2s2-1/i2s2m1-sclk";
		i2s2m1_lrckrx = "/pinctrl/i2s2-1/i2sm1-lrckrx";
		i2s2m1_lrcktx = "/pinctrl/i2s2-1/i2s2m1-lrcktx";
		i2s2m1_sdi = "/pinctrl/i2s2-1/i2s2m1-sdi";
		i2s2m1_sdo = "/pinctrl/i2s2-1/i2s2m1-sdo";
		i2s2m1_sleep = "/pinctrl/i2s2-1/i2s2m1-sleep";
		spdifm0_tx = "/pinctrl/spdif-0/spdifm0-tx";
		spdifm1_tx = "/pinctrl/spdif-1/spdifm1-tx";
		spdifm2_tx = "/pinctrl/spdif-2/spdifm2-tx";
		sdmmc0m0_pwren = "/pinctrl/sdmmc0-0/sdmmc0m0-pwren";
		sdmmc0m0_gpio = "/pinctrl/sdmmc0-0/sdmmc0m0-gpio";
		sdmmc0m1_pwren = "/pinctrl/sdmmc0-1/sdmmc0m1-pwren";
		sdmmc0m1_gpio = "/pinctrl/sdmmc0-1/sdmmc0m1-gpio";
		sdmmc0_clk = "/pinctrl/sdmmc0/sdmmc0-clk";
		sdmmc0_cmd = "/pinctrl/sdmmc0/sdmmc0-cmd";
		sdmmc0_dectn = "/pinctrl/sdmmc0/sdmmc0-dectn";
		sdmmc0_wrprt = "/pinctrl/sdmmc0/sdmmc0-wrprt";
		sdmmc0_bus1 = "/pinctrl/sdmmc0/sdmmc0-bus1";
		sdmmc0_bus4 = "/pinctrl/sdmmc0/sdmmc0-bus4";
		sdmmc0_gpio = "/pinctrl/sdmmc0/sdmmc0-gpio";
		sdmmc0ext_clk = "/pinctrl/sdmmc0ext/sdmmc0ext-clk";
		sdmmc0ext_cmd = "/pinctrl/sdmmc0ext/sdmmc0ext-cmd";
		sdmmc0ext_wrprt = "/pinctrl/sdmmc0ext/sdmmc0ext-wrprt";
		sdmmc0ext_dectn = "/pinctrl/sdmmc0ext/sdmmc0ext-dectn";
		sdmmc0ext_bus1 = "/pinctrl/sdmmc0ext/sdmmc0ext-bus1";
		sdmmc0ext_bus4 = "/pinctrl/sdmmc0ext/sdmmc0ext-bus4";
		sdmmc0ext_gpio = "/pinctrl/sdmmc0ext/sdmmc0ext-gpio";
		sdmmc1_clk = "/pinctrl/sdmmc1/sdmmc1-clk";
		sdmmc1_cmd = "/pinctrl/sdmmc1/sdmmc1-cmd";
		sdmmc1_pwren = "/pinctrl/sdmmc1/sdmmc1-pwren";
		sdmmc1_wrprt = "/pinctrl/sdmmc1/sdmmc1-wrprt";
		sdmmc1_dectn = "/pinctrl/sdmmc1/sdmmc1-dectn";
		sdmmc1_bus1 = "/pinctrl/sdmmc1/sdmmc1-bus1";
		sdmmc1_bus4 = "/pinctrl/sdmmc1/sdmmc1-bus4";
		sdmmc1_gpio = "/pinctrl/sdmmc1/sdmmc1-gpio";
		emmc_clk = "/pinctrl/emmc/emmc-clk";
		emmc_cmd = "/pinctrl/emmc/emmc-cmd";
		emmc_pwren = "/pinctrl/emmc/emmc-pwren";
		emmc_rstnout = "/pinctrl/emmc/emmc-rstnout";
		emmc_bus1 = "/pinctrl/emmc/emmc-bus1";
		emmc_bus4 = "/pinctrl/emmc/emmc-bus4";
		emmc_bus8 = "/pinctrl/emmc/emmc-bus8";
		pwm0_pin = "/pinctrl/pwm0/pwm0-pin";
		pwm0_pin_pull_up = "/pinctrl/pwm0/pwm0-pin-pull-up";
		pwm1_pin = "/pinctrl/pwm1/pwm1-pin";
		pwm1_pin_pull_up = "/pinctrl/pwm1/pwm1-pin-pull-up";
		pwm2_pin = "/pinctrl/pwm2/pwm2-pin";
		pwmir_pin = "/pinctrl/pwmir/pwmir-pin";
		rgmiim1_pins = "/pinctrl/gmac-1/rgmiim1-pins";
		rmiim1_pins = "/pinctrl/gmac-1/rmiim1-pins";
		fephyled_speed100 = "/pinctrl/gmac2phy/fephyled-speed100";
		fephyled_speed10 = "/pinctrl/gmac2phy/fephyled-speed10";
		fephyled_duplex = "/pinctrl/gmac2phy/fephyled-duplex";
		fephyled_rxm0 = "/pinctrl/gmac2phy/fephyled-rxm0";
		fephyled_txm0 = "/pinctrl/gmac2phy/fephyled-txm0";
		fephyled_linkm0 = "/pinctrl/gmac2phy/fephyled-linkm0";
		fephyled_rxm1 = "/pinctrl/gmac2phy/fephyled-rxm1";
		fephyled_txm1 = "/pinctrl/gmac2phy/fephyled-txm1";
		fephyled_linkm1 = "/pinctrl/gmac2phy/fephyled-linkm1";
		tsadc_int = "/pinctrl/tsadc_pin/tsadc-int";
		tsadc_gpio = "/pinctrl/tsadc_pin/tsadc-gpio";
		hdmi_cec = "/pinctrl/hdmi_pin/hdmi-cec";
		hdmi_hpd = "/pinctrl/hdmi_pin/hdmi-hpd";
		dvp_d2d9_m0 = "/pinctrl/cif-0/dvp-d2d9-m0";
		dvp_d2d9_m1 = "/pinctrl/cif-1/dvp-d2d9-m1";
		pwr_led_ctl = "/pinctrl/leds/led-ctl";
		wifi_enable_h = "/pinctrl/sdio-pwrseq/wifi-enable-h";
		host_vbus_drv = "/pinctrl/usb/host-vbus-drv";
		otg_vbus_drv = "/pinctrl/usb/otg-vbus-drv";
		uart0_gpios = "/pinctrl/wireless-bluetooth/uart0-gpios";
		clk_32k_out = "/pinctrl/clk_32k/clk-32k-out";
		chosen = "/chosen";
		drm_logo = "/reserved-memory/drm-logo@00000000";
		ramoops = "/reserved-memory/ramoops@110000";
		secure_memory = "/reserved-memory/secure-memory@20000000";
		leds = "/gpio-leds";
		gmac_clkin = "/external-gmac-clock";
		sdio_pwrseq = "/sdio-pwrseq";
		vccio_1v8_reg = "/regulators/regulator@0";
		vccio_3v3_reg = "/regulators/regulator@1";
		spdif_out = "/spdif-out";
		vcc_host_vbus = "/host-vbus-regulator";
		vcc_otg_vbus = "/otg-vbus-regulator";
		vcc_phy = "/vcc-phy-regulator";
		vcc_sd = "/sdmmc-regulator";
		vdd_arm = "/vdd-center";
		vdd_logic = "/vdd-log";
		amlogic_battery = "/dummy-battery";
		amlogic_charger = "/dummy-charger";
	};
};