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benoitm974

H9 X3 dts S905X3 SM1 tvbox 2GB

benoitm974
Jan 16th, 2021
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  1. /dts-v1/;
  2.  
  3. / {
  4. compatible = "amlogic, g12a";
  5. model = "Amlogic";
  6. interrupt-parent = <0x01>;
  7. #address-cells = <0x01>;
  8. #size-cells = <0x01>;
  9. amlogic-dt-id = "sm1_ac213_2g";
  10.  
  11. codec_mm {
  12. compatible = "amlogic, codec, mm";
  13. dev_name = "codec_mm";
  14. status = "okay";
  15. memory-region = <0x65 0x66>;
  16. };
  17.  
  18. codec_io {
  19. compatible = "amlogic, codec_io";
  20. ranges;
  21. status = "okay";
  22. #address-cells = <0x01>;
  23. #size-cells = <0x01>;
  24. phandle = <0xf4>;
  25.  
  26. io_efuse_base {
  27. reg = <0xff630000 0x2000>;
  28. };
  29.  
  30. io_cbus_base {
  31. reg = <0xffd00000 0x100000>;
  32. };
  33.  
  34. io_dmc_base {
  35. reg = <0xff638000 0x2000>;
  36. };
  37.  
  38. io_vcbus_base {
  39. reg = <0xff900000 0x40000>;
  40. };
  41.  
  42. io_hiubus_base {
  43. reg = <0xff63c000 0x2000>;
  44. };
  45.  
  46. io_aobus_base {
  47. reg = <0xff800000 0x10000>;
  48. };
  49.  
  50. io_dos_base {
  51. reg = <0xff620000 0x10000>;
  52. };
  53. };
  54.  
  55. cpu_iomap {
  56. compatible = "amlogic, iomap";
  57. ranges;
  58. #address-cells = <0x01>;
  59. #size-cells = <0x01>;
  60.  
  61. io_apb_base {
  62. reg = <0xffe01000 0x7f000>;
  63. };
  64.  
  65. io_cbus_base {
  66. reg = <0xffd00000 0x26fff>;
  67. };
  68.  
  69. io_vapb_base {
  70. reg = <0xff900000 0x50000>;
  71. };
  72.  
  73. io_aobus_base {
  74. reg = <0xff800000 0xb000>;
  75. };
  76.  
  77. io_hiu_base {
  78. reg = <0xff63c000 0x2000>;
  79. };
  80. };
  81.  
  82. aml_dma {
  83. compatible = "amlogic,aml_txlx_dma";
  84. interrupts = <0x00 0xb4 0x01>;
  85. reg = <0xff63e000 0x48>;
  86.  
  87. aml_sha {
  88. compatible = "amlogic,sha_dma";
  89. dev_name = "aml_sha_dma";
  90. status = "okay";
  91. };
  92.  
  93. aml_aes {
  94. compatible = "amlogic,aes_g12a_dma";
  95. dev_name = "aml_aes_dma";
  96. status = "okay";
  97. };
  98. };
  99.  
  100. vcodec_dec {
  101. compatible = "amlogic, vcodec-dec";
  102. dev_name = "aml-vcodec-dec";
  103. status = "okay";
  104. };
  105.  
  106. bt-dev {
  107. compatible = "amlogic, bt-dev";
  108. dev_name = "bt-dev";
  109. status = "okay";
  110. gpio_reset = <0x17 0x53 0x00>;
  111. };
  112.  
  113. amvenc_avc {
  114. compatible = "amlogic, amvenc_avc";
  115. dev_name = "amvenc_avc";
  116. status = "okay";
  117. interrupts = <0x00 0x2d 0x01>;
  118. interrupt-names = "mailbox_2";
  119. };
  120.  
  121. reserved-memory {
  122. ranges;
  123. #address-cells = <0x01>;
  124. #size-cells = <0x01>;
  125.  
  126. linux,vdin1_cma {
  127. reusable;
  128. compatible = "shared-dma-pool";
  129. alignment = <0x400000>;
  130. size = <0x4000000>;
  131. phandle = <0x39>;
  132. };
  133.  
  134. linux,ion-dev {
  135. reusable;
  136. compatible = "shared-dma-pool";
  137. alignment = <0x400000>;
  138. alloc-ranges = <0x30000000 0x50000000>;
  139. size = <0x8000000>;
  140. phandle = <0x1b>;
  141. };
  142.  
  143. linux,vm0_cma {
  144. reusable;
  145. compatible = "shared-dma-pool";
  146. alignment = <0x400000>;
  147. size = <0x2000000>;
  148. phandle = <0x100>;
  149. };
  150.  
  151. ramoops@0x07400000 {
  152. compatible = "ramoops";
  153. record-size = <0x8000>;
  154. console-size = <0x8000>;
  155. ftrace-size = <0x40000>;
  156. reg = <0x7400000 0x100000>;
  157. };
  158.  
  159. linux,meson-fb {
  160. reusable;
  161. compatible = "shared-dma-pool";
  162. alignment = <0x400000>;
  163. alloc-ranges = <0x7f800000 0x800000>;
  164. size = <0x800000>;
  165. phandle = <0x3a>;
  166. };
  167.  
  168. linux,ppmgr {
  169. compatible = "shared-dma-pool";
  170. size = <0x00>;
  171. phandle = <0x68>;
  172. };
  173.  
  174. linux,secos {
  175. compatible = "amlogic, aml_secos_memory";
  176. status = "disable";
  177. no-map;
  178. phandle = <0xff>;
  179. reg = <0x5300000 0x2000000>;
  180. };
  181.  
  182. linux,di_cma {
  183. reusable;
  184. compatible = "shared-dma-pool";
  185. alignment = <0x400000>;
  186. size = <0x2800000>;
  187. phandle = <0x69>;
  188. };
  189.  
  190. linux,codec_mm_cma {
  191. reusable;
  192. compatible = "shared-dma-pool";
  193. alignment = <0x400000>;
  194. alloc-ranges = <0x30000000 0x50000000>;
  195. size = <0x13400000>;
  196. phandle = <0x65>;
  197. linux,contiguous-region;
  198. };
  199.  
  200. linux,secmon {
  201. reusable;
  202. compatible = "shared-dma-pool";
  203. alignment = <0x400000>;
  204. alloc-ranges = <0x5000000 0x400000>;
  205. size = <0x400000>;
  206. phandle = <0x0f>;
  207. };
  208.  
  209. linux,codec_mm_reserved {
  210. compatible = "amlogic, codec-mm-reserved";
  211. alignment = <0x100000>;
  212. size = <0x00>;
  213. phandle = <0x66>;
  214. };
  215. };
  216.  
  217. galcore {
  218. compatible = "amlogic, galcore";
  219. clocks = <0x02 0xe8 0x02 0xe7>;
  220. nn_efuse = <0xff63003c 0x20>;
  221. dev_name = "galcore";
  222. clock-names = "cts_vipnanoq_axi_clk_composite\0cts_vipnanoq_core_clk_composite";
  223. status = "okay";
  224. interrupts = <0x00 0xba 0x04>;
  225. reg = <0xff100000 0x800 0xff000000 0x400000 0xff63c118 0x00 0xff63c11c 0x00 0xffd01088 0x00>;
  226. interrupt-names = "galcore";
  227. };
  228.  
  229. amlvecm {
  230. compatible = "amlogic, vecm";
  231. wb_en = <0x00>;
  232. dev_name = "aml_vecm";
  233. cm_en = <0x00>;
  234. status = "okay";
  235. gamma_en = <0x00>;
  236. tx_op_color_primary = <0x00>;
  237. };
  238.  
  239. dummy {
  240. compatible = "amlogic, aml_dummy_codec";
  241. #sound-dai-cells = <0x00>;
  242. status = "okay";
  243. phandle = <0x81>;
  244. };
  245.  
  246. vout {
  247. compatible = "amlogic, vout";
  248. dev_name = "vout";
  249. status = "okay";
  250. };
  251.  
  252. dwc2_a@ff400000 {
  253. port-type = <0x01>;
  254. compatible = "amlogic, dwc2";
  255. port-config = <0x00>;
  256. clocks = <0x02 0x41 0x02 0x49>;
  257. port-speed = <0x00>;
  258. controller-type = <0x01>;
  259. clock-names = "usb_general\0usb1";
  260. clock-src = "usb0";
  261. status = "okay";
  262. interrupts = <0x00 0x1f 0x04>;
  263. port-id-mode = <0x01>;
  264. phandle = <0xcc>;
  265. phy-interface = <0x02>;
  266. device_name = "dwc2_a";
  267. phy-reg = <0xffe09000>;
  268. usb-fifo = <0x2d8>;
  269. reg = <0xff400000 0x40000>;
  270. cpu-type = "v2";
  271. port-id = <0x00>;
  272. port-dma = <0x00>;
  273. pl-periph-id = <0x00>;
  274. phy-reg-size = <0xa0>;
  275. };
  276.  
  277. watchdog@0xffd0f0d0 {
  278. compatible = "amlogic, meson-wdt";
  279. clocks = <0x15>;
  280. clock-names = "xtal";
  281. reset_watchdog_time = <0x02>;
  282. shutdown_timeout = <0x0a>;
  283. status = "okay";
  284. suspend_timeout = <0x06>;
  285. default_timeout = <0x0a>;
  286. phandle = <0xcd>;
  287. firmware_timeout = <0x06>;
  288. reg = <0xffd0f0d0 0x10>;
  289. reset_watchdog_method = <0x01>;
  290. };
  291.  
  292. bl_pwm_conf {
  293. phandle = <0x60>;
  294.  
  295. pwm_channel_0 {
  296. pwm_port_index = <0x05>;
  297. pwms = <0x61 0x01 0x7558 0x00>;
  298. };
  299. };
  300.  
  301. cpufreq-meson {
  302. compatible = "amlogic, cpufreq-meson";
  303. status = "okay";
  304. pinctrl-0 = <0x91>;
  305. pinctrl-names = "default";
  306. };
  307.  
  308. audio_data {
  309. compatible = "amlogic, audio_data";
  310. query_licence_cmd = <0x82000050>;
  311. status = "okay";
  312. phandle = <0xca>;
  313. };
  314.  
  315. defendkey {
  316. compatible = "amlogic, defendkey";
  317. status = "okay";
  318. mem_size = <0x00 0x100000>;
  319. phandle = <0xfb>;
  320. reg = <0xff630218 0x04>;
  321. };
  322.  
  323. wifi_pwm_conf {
  324. phandle = <0x64>;
  325.  
  326. pwm_channel2_conf {
  327. times = <0x0c>;
  328. duty-cycle = <0x3b92>;
  329. pwms = <0x61 0x02 0x7724 0x00>;
  330. };
  331.  
  332. pwm_channel1_conf {
  333. times = <0x0a>;
  334. duty-cycle = <0x3ba6>;
  335. pwms = <0x61 0x00 0x774d 0x00>;
  336. };
  337. };
  338.  
  339. wifi {
  340. pwm_config = <0x64>;
  341. compatible = "amlogic, aml_wifi";
  342. interrupt_pin = <0x17 0x49 0x00>;
  343. dev_name = "aml_wifi";
  344. status = "okay";
  345. dhd_static_buf;
  346. pinctrl-0 = <0x63>;
  347. power_on_pin = <0x17 0x48 0x00>;
  348. pinctrl-names = "default";
  349. irq_trigger_type = "GPIO_IRQ_LOW";
  350. };
  351.  
  352. dmc_monitor {
  353. compatible = "amlogic, dmc_monitor";
  354. status = "okay";
  355. interrupts = <0x00 0x33 0x01>;
  356. reg_base = <0xff639000>;
  357. };
  358.  
  359. meson-irblaster {
  360. compatible = "amlogic, meson_irblaster";
  361. status = "okay";
  362. interrupts = <0x00 0xc6 0x01>;
  363. phandle = <0xf6>;
  364. reg = <0xff80014c 0x10 0xff800040 0x04>;
  365. pinctrl-0 = <0x3b>;
  366. pinctrl-names = "default";
  367. };
  368.  
  369. meson-amvideom {
  370. compatible = "amlogic, amvideom";
  371. dev_name = "amvideom";
  372. status = "okay";
  373. interrupts = <0x00 0x03 0x01>;
  374. interrupt-names = "vsync";
  375. };
  376.  
  377. aml_pm {
  378. compatible = "amlogic, pm";
  379. status = "okay";
  380. device_name = "aml_pm";
  381. debug_reg = <0xff8000a8>;
  382. exit_reg = <0xff80023c>;
  383. };
  384.  
  385. serial@ffd24000 {
  386. compatible = "amlogic, meson-uart";
  387. clocks = <0x15 0x02 0x2e>;
  388. fifosize = <0x80>;
  389. clock-names = "clk_uart\0clk_gate";
  390. status = "okay";
  391. interrupts = <0x00 0x1a 0x01>;
  392. phandle = <0xeb>;
  393. reg = <0xffd24000 0x18>;
  394. pinctrl-0 = <0x2f>;
  395. pinctrl-names = "default";
  396. };
  397.  
  398. cpu_ver_name {
  399. compatible = "amlogic, cpu-major-id-sm1";
  400. };
  401.  
  402. linux,picdec {
  403. reusable;
  404. compatible = "shared-dma-pool";
  405. alignment = <0x00>;
  406. size = <0x00>;
  407. phandle = <0x67>;
  408. linux,contiguous-region;
  409. };
  410.  
  411. secmon {
  412. compatible = "amlogic, secmon";
  413. in_base_func = <0x82000020>;
  414. out_base_func = <0x82000021>;
  415. reserve_mem_size = <0x300000>;
  416. memory-region = <0x0f>;
  417. };
  418.  
  419. __symbols__ {
  420. phot = "/thermal-zones/soc_thermal/trips/trip-point@2";
  421. i2c3 = "/soc/cbus@ffd00000/i2c@1c000";
  422. sd_emmc_c = "/emmc@ffe07000";
  423. meson_cooldev = "/meson-cooldev@0";
  424. pwm_d_pins2 = "/pinctrl@ff634480/pwm_d_pins2";
  425. pwm_a_pins = "/pinctrl@ff634480/pwm_a";
  426. vddcpu0 = "/pwmao_d-regulator";
  427. pdmin = "/pinctrl@ff634480/pdmin";
  428. key_2 = "/efusekey/key_2";
  429. dvfs500_cfg = "/bifrost/dvfs500_cfg";
  430. dvfs666_cfg = "/bifrost/dvfs666_cfg";
  431. uart_C = "/serial@ffd22000";
  432. usb3_phy_v2 = "/usb3phy@ffe09080";
  433. codec_io = "/codec_io";
  434. spicc1_pins = "/pinctrl@ff634480/spicc1_pins";
  435. keysn_15 = "/unifykey/key_15";
  436. i2c1_master_pins1 = "/pinctrl@ff634480/i2c1_pins1";
  437. logo = "/partitions/logo";
  438. keysn_6 = "/unifykey/key_6";
  439. vendor = "/partitions/vendor";
  440. ao_to_sd_uart_pins = "/pinctrl@ff634480/ao_to_sd_uart_pins";
  441. sdio_x_clr_pins = "/pinctrl@ff634480/sdio_x_clr_pins";
  442. emmc_conf_pull_up = "/pinctrl@ff634480/emmc_conf_pull_up";
  443. dvfs285_cfg = "/bifrost/dvfs285_cfg";
  444. param = "/partitions/param";
  445. dvfs800_cfg = "/bifrost/dvfs800_cfg";
  446. loopbackb = "/soc/audiobus@0xFF660000/loopback@1";
  447. map_3 = "/custom_maps/map_3";
  448. pdm = "/soc/audiobus@0xFF660000/pdm";
  449. secmon_reserved = "/reserved-memory/linux,secmon";
  450. i2c1 = "/soc/cbus@ffd00000/i2c@1e000";
  451. sd_emmc_a = "/sdio@ffe03000";
  452. pwm_c_pins3 = "/pinctrl@ff634480/pwm_c_pins3";
  453. sdio_x_all_pins = "/pinctrl@ff634480/sdio_x_all_pins";
  454. key_0 = "/efusekey/key_0";
  455. power_ctrl = "/power_ctrl@ff8000e8";
  456. logo_reserved = "/reserved-memory/linux,meson-fb";
  457. sdio_clk_cmd_pins = "/pinctrl@ff634480/sdio_clk_cmd_pins";
  458. bl_pwm_conf = "/bl_pwm_conf";
  459. uart_A = "/serial@ffd24000";
  460. ao_uart_pins = "/pinctrl@ff800014/ao_uart";
  461. ao_i2c_master_pins1 = "/pinctrl@ff800014/ao_i2c_pins1";
  462. cam_dvp_pins = "/pinctrl@ff634480/cam_dvp_pins";
  463. tdmout_b = "/pinctrl@ff634480/tdmout_b";
  464. gpu = "/bifrost";
  465. keysn_13 = "/unifykey/key_13";
  466. tdmccodec = "/auge_sound/aml-audio-card,dai-link@2/codec";
  467. spdifout = "/pinctrl@ff634480/spdifout";
  468. audio_data = "/audio_data";
  469. keysn_4 = "/unifykey/key_4";
  470. pwm_ef = "/soc/cbus@ffd00000/pwm@19000";
  471. dcritical = "/thermal-zones/ddr_thermal/trips/trip-point@3";
  472. pwm_ao_a_hiz_pins = "/pinctrl@ff800014/pwm_ao_a_hiz";
  473. i2c2_master_pins3 = "/pinctrl@ff634480/i2c2_pins3";
  474. defendkey = "/defendkey";
  475. external_eth_pins = "/pinctrl@ff634480/external_eth_pins";
  476. wifi_pwm_conf = "/wifi_pwm_conf";
  477. map_1 = "/custom_maps/map_1";
  478. uart_AO_B = "/soc/aobus@ff800000/serial@4000";
  479. sd_to_ao_uart_clr_pins = "/pinctrl@ff800014/sd_to_ao_uart_clr_pins";
  480. jtag_apee_pins = "/pinctrl@ff634480/jtag_apee_pin";
  481. a_uart_pins = "/pinctrl@ff634480/a_uart";
  482. periphs = "/soc/periphs@ff634400";
  483. internal_gpio_pins = "/pinctrl@ff634480/internal_gpio_pins";
  484. pinctrl_aobus = "/pinctrl@ff800014";
  485. pswitch_on = "/thermal-zones/soc_thermal/trips/trip-point@0";
  486. dtbo = "/partitions/dtbo";
  487. usb2_phy_v2 = "/usb2phy@ffe09000";
  488. gpio = "/pinctrl@ff634480/banks@ff6346c0";
  489. pwm_c_pins1 = "/pinctrl@ff634480/pwm_c_pins1";
  490. pwm_ao_d_pins2 = "/pinctrl@ff800014/pwm_ao_d_pins2";
  491. emmc_conf_pull_done = "/pinctrl@ff634480/emmc_conf_pull_done";
  492. ion_cma_reserved = "/reserved-memory/linux,ion-dev";
  493. misc = "/partitions/misc";
  494. tee = "/partitions/tee";
  495. dvfs250_cfg = "/bifrost/dvfs250_cfg";
  496. keysn_11 = "/unifykey/key_11";
  497. clkc_b = "/soc/hiubus@ff63c000/clock-controller@1";
  498. pwm_f_pins1 = "/pinctrl@ff634480/pwm_f_pins1";
  499. codec_mm_reserved = "/reserved-memory/linux,codec_mm_reserved";
  500. keysn_2 = "/unifykey/key_2";
  501. i2c2_master_pins1 = "/pinctrl@ff634480/i2c2_pins1";
  502. gpufreq_cool0 = "/meson-cooldev@0/gpufreq_cool0";
  503. eecec_a = "/pinctrl@ff634480/ee_ceca";
  504. spicc0 = "/soc/cbus@ffd00000/spi@13000";
  505. vad = "/soc/audiobus@0xFF660000/vad";
  506. jtag_apao_pins = "/pinctrl@ff800014/jtag_apao_pin";
  507. secos_reserved = "/reserved-memory/linux,secos";
  508. system = "/partitions/system";
  509. tdmbcodec = "/auge_sound/aml-audio-card,dai-link@1/codec";
  510. asrca = "/soc/audiobus@0xFF660000/resample@0";
  511. pwm_b_pins2 = "/pinctrl@ff634480/pwm_b_pins2";
  512. irblaster_pins = "/pinctrl@ff800014/irblaster_pin";
  513. i2c0_master_pins2 = "/pinctrl@ff634480/i2c0_pins2";
  514. pwm_cd = "/soc/cbus@ffd00000/pwm@1a000";
  515. pcontrol = "/thermal-zones/soc_thermal/trips/trip-point@1";
  516. dvfs850_cfg = "/bifrost/dvfs850_cfg";
  517. cbus = "/soc/cbus@ffd00000";
  518. dhot = "/thermal-zones/ddr_thermal/trips/trip-point@2";
  519. keysn_0 = "/unifykey/key_0";
  520. codec_mm_cma = "/reserved-memory/linux,codec_mm_cma";
  521. p_tsensor = "/p_tsensor@ff634594";
  522. efusekey = "/efusekey";
  523. gic = "/interrupt-controller@2c001000";
  524. tdmb = "/soc/audiobus@0xFF660000/tdm@1";
  525. audiolocker = "/locker";
  526. aocec_a = "/pinctrl@ff800014/ao_ceca";
  527. pdm_codec = "/dummy";
  528. remote_pins = "/pinctrl@ff800014/remote_pin";
  529. cri_data = "/partitions/cri_data";
  530. di_cma_reserved = "/reserved-memory/linux,di_cma";
  531. vpu = "/vpu";
  532. picdec_cma_reserved = "/linux,picdec";
  533. product = "/partitions/product";
  534. metadata = "/partitions/metadata";
  535. pwm_ao_c_pins1 = "/pinctrl@ff800014/pwm_ao_c_pins1";
  536. earc = "/soc/audiobus@0xFF660000/earc";
  537. nand_cs_pins = "/pinctrl@ff634480/nand_cs";
  538. pwm_e_pins = "/pinctrl@ff634480/pwm_e";
  539. ddr_thermal = "/thermal-zones/ddr_thermal";
  540. vdin0 = "/vdin0";
  541. i2c_AO = "/soc/aobus@ff800000/i2c@5000";
  542. tdmin_c = "/pinctrl@ff634480/tdmin_c";
  543. keysn_9 = "/unifykey/key_9";
  544. tdmacpu = "/auge_sound/aml-audio-card,dai-link@0/cpu";
  545. gen_clk_ee_z = "/pinctrl@ff634480/gen_clk_ee_z";
  546. spdifa = "/soc/audiobus@0xFF660000/spdif@0";
  547. CPU2 = "/cpus/cpu@2";
  548. tdmacodec = "/auge_sound/aml-audio-card,dai-link@0/codec";
  549. partitions = "/partitions";
  550. pinctrl_periphs = "/pinctrl@ff634480";
  551. sd_clr_all_pins = "/pinctrl@ff634480/sd_clr_all_pins";
  552. pwm_ab = "/soc/cbus@ffd00000/pwm@1b000";
  553. nandnormal = "/nfc@0/nandnormal";
  554. cpufreq_cool0 = "/meson-cooldev@0/cpufreq_cool0";
  555. nand = "/nfc@0";
  556. lcd = "/lcd";
  557. i2c3_master_pins1 = "/pinctrl@ff634480/i2c3_pins1";
  558. key_3 = "/efusekey/key_3";
  559. bootloader = "/nfc@0/bootloader";
  560. aobus = "/soc/aobus@ff800000";
  561. custom_maps = "/custom_maps";
  562. pcie_A = "/pcieA@fc000000";
  563. clkc = "/soc/hiubus@ff63c000/clock-controller@0";
  564. all_nand_pins = "/pinctrl@ff634480/all_nand_pins";
  565. tdmc_mclk = "/pinctrl@ff634480/tdmc_mclk";
  566. pwm_ao_b_pins = "/pinctrl@ff800014/pwm_ao_b";
  567. i2c1_master_pins2 = "/pinctrl@ff634480/i2c1_pins2";
  568. tdmin_a = "/pinctrl@ff634480/tdmin_a";
  569. keysn_7 = "/unifykey/key_7";
  570. vend_data = "/amhdmitx/vend_data";
  571. sd_all_pins = "/pinctrl@ff634480/sd_all_pins";
  572. wdt = "/watchdog@0xffd0f0d0";
  573. ao_i2c_slave_pins = "/pinctrl@ff800014/ao_i2c_slave_pins";
  574. map_4 = "/custom_maps/map_4";
  575. vbmeta = "/partitions/vbmeta";
  576. CPU0 = "/cpus/cpu@0";
  577. tdmlb = "/soc/audiobus@0xFF660000/tdm@3";
  578. aocec = "/aocec";
  579. i2c2 = "/soc/cbus@ffd00000/i2c@1d000";
  580. sd_emmc_b = "/sd@ffe05000";
  581. pwm_d_pins1 = "/pinctrl@ff634480/pwm_d_pins1";
  582. cpu_opp_table0 = "/cpu_opp_table0";
  583. i2c_AO_slave = "/soc/aobus@ff800000/i2c_slave@6000";
  584. audiobus = "/soc/audiobus@0xFF660000";
  585. key_1 = "/efusekey/key_1";
  586. nand_partitions = "/nfc@0/nand_partition";
  587. b_uart_pins = "/pinctrl@ff634480/b_uart";
  588. dummy_codec = "/dummy";
  589. uart_B = "/serial@ffd23000";
  590. dvb_s_ts0_pins = "/pinctrl@ff800014/dvb_s_ts0_pins";
  591. ao_i2c_master_pins2 = "/pinctrl@ff800014/ao_i2c_pins2";
  592. odm = "/partitions/odm";
  593. tdmout_c = "/pinctrl@ff634480/tdmout_c";
  594. keysn_14 = "/unifykey/key_14";
  595. dswitch_on = "/thermal-zones/ddr_thermal/trips/trip-point@0";
  596. keysn_5 = "/unifykey/key_5";
  597. spicc0_pins_x = "/pinctrl@ff634480/spicc0_pins_x";
  598. dcontrol = "/thermal-zones/ddr_thermal/trips/trip-point@1";
  599. internal_eth_pins = "/pinctrl@ff634480/internal_eth_pins";
  600. dvfs125_cfg = "/bifrost/clk125_cfg";
  601. loopbacka = "/soc/audiobus@0xFF660000/loopback@0";
  602. map_2 = "/custom_maps/map_2";
  603. sdio_x_en_pins = "/pinctrl@ff634480/sdio_x_en_pins";
  604. hdmitx_ddc = "/pinctrl@ff634480/hdmitx_ddc";
  605. gpio_intc = "/soc/cbus@ffd00000/interrupt-controller@f080";
  606. vdin1_cma_reserved = "/reserved-memory/linux,vdin1_cma";
  607. cache = "/partitions/cache";
  608. i2c0 = "/soc/cbus@ffd00000/i2c@1f000";
  609. pwm_c_pins2 = "/pinctrl@ff634480/pwm_c_pins2";
  610. pwm_ao_d_pins3 = "/pinctrl@ff800014/pwm_ao_d_pins3";
  611. sd_clk_cmd_pins = "/pinctrl@ff634480/sd_clk_cmd_pins";
  612. tdmb_mclk = "/pinctrl@ff634480/tdmb_mclk";
  613. pwm_ao_a_pins = "/pinctrl@ff800014/pwm_ao_a";
  614. vm0_cma_reserved = "/reserved-memory/linux,vm0_cma";
  615. ad82584f_62 = "/soc/cbus@ffd00000/i2c@1c000/ad82584f_62@62";
  616. d_tsensor = "/d_tsensor@ff800228";
  617. sd_to_ao_uart_pins = "/pinctrl@ff800014/sd_to_ao_uart_pins";
  618. spdifin = "/pinctrl@ff634480/spdifin";
  619. dvfs400_cfg = "/bifrost/dvfs400_cfg";
  620. remote = "/rc@0xff808040";
  621. cluster0 = "/cpus/cpu-map/cluster0";
  622. CPU_SLEEP_0 = "/cpus/idle-states/cpu-sleep-0";
  623. amlogic_codec = "/t9015";
  624. tdmout_a = "/pinctrl@ff634480/tdmout_a";
  625. keysn_12 = "/unifykey/key_12";
  626. pwm_f_pins2 = "/pinctrl@ff634480/pwm_f_pins2";
  627. hiubus = "/soc/hiubus@ff63c000";
  628. sd_1bit_pins = "/pinctrl@ff634480/sd_1bit_pins";
  629. keysn_3 = "/unifykey/key_3";
  630. i2c2_master_pins2 = "/pinctrl@ff634480/i2c2_pins2";
  631. spicc0_pins_c = "/pinctrl@ff634480/spicc0_pins_c";
  632. eecec_b = "/pinctrl@ff634480/ee_cecb";
  633. ppmgr_reserved = "/reserved-memory/linux,ppmgr";
  634. spicc1 = "/soc/cbus@ffd00000/spi@15000";
  635. map_0 = "/custom_maps/map_0";
  636. dwc2_a = "/dwc2_a@ff400000";
  637. pwm_ao_d_pins1 = "/pinctrl@ff800014/pwm_ao_d_pins1";
  638. gpucore_cool0 = "/meson-cooldev@0/gpucore_cool0";
  639. aed = "/soc/audiobus@0xFF660000/effect";
  640. amhdmitx = "/amhdmitx";
  641. i2c0_master_pins3 = "/pinctrl@ff634480/i2c0_pins3";
  642. soc_thermal = "/thermal-zones/soc_thermal";
  643. gpio_ao = "/pinctrl@ff800014/ao-bank@ff800014";
  644. data = "/partitions/data";
  645. pwm_ao_c_hiz_pins = "/pinctrl@ff800014/pwm_ao_c_hiz";
  646. clkaudio = "/soc/audiobus@0xFF660000/audio_clocks";
  647. xtal = "/xtal-clk";
  648. keysn_10 = "/unifykey/key_10";
  649. keysn_1 = "/unifykey/key_1";
  650. pwm_AO_cd = "/soc/aobus@ff800000/pwm@2000";
  651. tdmc = "/soc/audiobus@0xFF660000/tdm@2";
  652. uart_AO = "/soc/aobus@ff800000/serial@3000";
  653. aocec_b = "/pinctrl@ff800014/ao_cecb";
  654. audio_effect = "/eqdrc";
  655. pwm_b_pins1 = "/pinctrl@ff634480/pwm_b_pins1";
  656. pwm_ao_c_pins2 = "/pinctrl@ff800014/pwm_ao_c_pins2";
  657. ethmac = "/ethernet@ff3f0000";
  658. pcritical = "/thermal-zones/soc_thermal/trips/trip-point@3";
  659. i2c0_master_pins1 = "/pinctrl@ff634480/i2c0_pins1";
  660. vdin1 = "/vdin1";
  661. aoclkc = "/soc/aobus@ff800000/clock-controller@0";
  662. canvas = "/canvas";
  663. cpus = "/cpus";
  664. recovery = "/partitions/recovery";
  665. spdifb = "/soc/audiobus@0xFF660000/spdif@1";
  666. saradc = "/saradc";
  667. sdio_all_pins = "/pinctrl@ff634480/sdio_all_pins";
  668. sd_clr_noall_pins = "/pinctrl@ff634480/sd_clr_noall_pins";
  669. CPU3 = "/cpus/cpu@3";
  670. bl_pwm_off_pins = "/pinctrl@ff634480/bl_pwm_off_pin";
  671. boot = "/partitions/boot";
  672. tdma = "/soc/audiobus@0xFF660000/tdm@0";
  673. i2c3_master_pins2 = "/pinctrl@ff634480/i2c3_pins2";
  674. sdio_x_clk_cmd_pins = "/pinctrl@ff634480/sdio_x_clk_cmd_pins";
  675. efuse = "/efuse";
  676. dwc3 = "/dwc3@ff500000";
  677. irblaster = "/meson-irblaster";
  678. ao_b_uart_pins = "/pinctrl@ff800014/ao_b_uart";
  679. mailbox = "/mhu@c883c400";
  680. cpucore_cool0 = "/meson-cooldev@0/cpucore_cool0";
  681. c_uart_pins = "/pinctrl@ff634480/c_uart";
  682. pwm_AO_ab = "/soc/aobus@ff800000/pwm@7000";
  683. i2c1_master_pins3 = "/pinctrl@ff634480/i2c1_pins3";
  684. tdmin_b = "/pinctrl@ff634480/tdmin_b";
  685. keysn_8 = "/unifykey/key_8";
  686. rsv = "/partitions/rsv";
  687. hdmitx_hpd = "/pinctrl@ff634480/hdmitx_hpd";
  688. emmc_clk_cmd_pins = "/pinctrl@ff634480/emmc_clk_cmd_pins";
  689. clk12_24_z_pins = "/pinctrl@ff634480/clk12_24_z_pins";
  690. meson_fb = "/fb";
  691. CPU1 = "/cpus/cpu@1";
  692. hdmitx_hpd_gpio = "/pinctrl@ff634480/hdmitx_hpd_gpio";
  693. };
  694.  
  695. ddr_bandwidth {
  696. compatible = "amlogic, ddr-bandwidth";
  697. status = "okay";
  698. interrupts = <0x00 0x34 0x01>;
  699. reg = <0xff638000 0x100 0xff638c00 0x100>;
  700. interrupt-names = "ddr_bandwidth";
  701. };
  702.  
  703. arm_pmu {
  704. compatible = "arm,cortex-a15-pmu";
  705. max-wait-cnt = <0x2710>;
  706. cpumasks = <0x0f>;
  707. interrupts = <0x00 0x89 0x04>;
  708. reg = <0xff634680 0x04>;
  709. relax-timer-ns = <0x989680>;
  710. };
  711.  
  712. soc {
  713. compatible = "simple-bus";
  714. ranges;
  715. #address-cells = <0x01>;
  716. #size-cells = <0x01>;
  717.  
  718. aobus@ff800000 {
  719. compatible = "simple-bus";
  720. ranges = <0x00 0xff800000 0xb000>;
  721. #address-cells = <0x01>;
  722. #size-cells = <0x01>;
  723. phandle = <0xda>;
  724. reg = <0xff800000 0xb000>;
  725.  
  726. pwm@2000 {
  727. compatible = "amlogic,g12a-ao-pwm";
  728. clocks = <0x15 0x15 0x15 0x15>;
  729. clock-names = "clkin0\0clkin1\0clkin2\0clkin3";
  730. status = "okay";
  731. phandle = <0x4c>;
  732. reg = <0x2000 0x20>;
  733. #pwm-cells = <0x03>;
  734. };
  735.  
  736. i2c@5000 {
  737. compatible = "amlogic,meson-g12a-i2c";
  738. clocks = <0x02 0x2a>;
  739. clock-names = "clk_i2c";
  740. status = "disabled";
  741. #address-cells = <0x01>;
  742. interrupts = <0x00 0xc3 0x01 0x00 0xc9 0x01>;
  743. #size-cells = <0x00>;
  744. phandle = <0xdd>;
  745. reg = <0x5000 0x20>;
  746. };
  747.  
  748. clock-controller@0 {
  749. compatible = "amlogic,sm1-aoclkc";
  750. #clock-cells = <0x01>;
  751. phandle = <0xdb>;
  752. reg = <0x00 0x3dc>;
  753. };
  754.  
  755. pwm@7000 {
  756. compatible = "amlogic,g12a-ao-pwm";
  757. clocks = <0x15 0x15 0x15 0x15>;
  758. clock-names = "clkin0\0clkin1\0clkin2\0clkin3";
  759. status = "disabled";
  760. phandle = <0xdc>;
  761. reg = <0x7000 0x20>;
  762. #pwm-cells = <0x03>;
  763. };
  764.  
  765. cpu_version {
  766. reg = <0x220 0x04>;
  767. };
  768.  
  769. serial@4000 {
  770. compatible = "amlogic, meson-uart";
  771. clocks = <0x15>;
  772. fifosize = <0x40>;
  773. clock-names = "clk_uart";
  774. status = "disabled";
  775. interrupts = <0x00 0xc5 0x01>;
  776. phandle = <0xe0>;
  777. reg = <0x4000 0x18>;
  778. pinctrl-0 = <0x1a>;
  779. pinctrl-names = "default";
  780. };
  781.  
  782. i2c_slave@6000 {
  783. compatible = "amlogic, meson-i2c-slave";
  784. status = "disabled";
  785. interrupts = <0x00 0xc2 0x01>;
  786. phandle = <0xde>;
  787. reg = <0x6000 0x20>;
  788. pinctrl-0 = <0x19>;
  789. pinctrl-names = "default";
  790. };
  791.  
  792. serial@3000 {
  793. compatible = "amlogic, meson-uart";
  794. clocks = <0x15>;
  795. xtal_tick_en = <0x02>;
  796. fifosize = <0x40>;
  797. clock-names = "clk_uart";
  798. status = "okay";
  799. interrupts = <0x00 0xc1 0x01>;
  800. phandle = <0xdf>;
  801. reg = <0x3000 0x18>;
  802. support-sysrq = <0x00>;
  803. pinctrl-names = "default";
  804. };
  805. };
  806.  
  807. periphs@ff634400 {
  808. compatible = "simple-bus";
  809. ranges = <0x00 0xff634400 0x400>;
  810. #address-cells = <0x01>;
  811. #size-cells = <0x01>;
  812. phandle = <0xe1>;
  813. reg = <0xff634400 0x400>;
  814. };
  815.  
  816. audiobus@0xFF660000 {
  817. compatible = "amlogic, audio-controller\0simple-bus";
  818. ranges = <0x00 0xff660000 0x4000>;
  819. #address-cells = <0x01>;
  820. #size-cells = <0x01>;
  821. phandle = <0xe4>;
  822. reg = <0xff660000 0x4000>;
  823.  
  824. tdm@0 {
  825. dai-tdm-clk-sel = <0x00>;
  826. compatible = "amlogic, sm1-snd-tdma";
  827. clocks = <0x1c 0x24 0x02 0x0c>;
  828. #sound-dai-cells = <0x00>;
  829. clock-names = "mclk\0clk_srcpll";
  830. dai-tdm-oe-lane-slot-mask-out = <0x01 0x00>;
  831. dai-tdm-lane-slot-mask-in = <0x00 0x01>;
  832. status = "okay";
  833. phandle = <0x80>;
  834. pinctrl-0 = <0x1d 0x1e>;
  835. pinctrl-names = "tdm_pins";
  836. };
  837.  
  838. pdm {
  839. compatible = "amlogic, sm1-snd-pdm";
  840. clocks = <0x1c 0x01 0x02 0x03 0x02 0x0f 0x1c 0x2f 0x1c 0x30>;
  841. #sound-dai-cells = <0x00>;
  842. clock-names = "gate\0sysclk_srcpll\0dclk_srcpll\0pdm_dclk\0pdm_sysclk";
  843. status = "okay";
  844. phandle = <0x85>;
  845. filter_mode = <0x01>;
  846. pinctrl-0 = <0x27>;
  847. pinctrl-names = "pdm_pins";
  848. };
  849.  
  850. spdif@1 {
  851. compatible = "amlogic, sm1-snd-spdif-b";
  852. clocks = <0x02 0x0c 0x1c 0x15 0x1c 0x31>;
  853. #sound-dai-cells = <0x00>;
  854. clock-names = "sysclk\0gate_spdifout\0clk_spdifout";
  855. status = "okay";
  856. phandle = <0x87>;
  857. };
  858.  
  859. ddr_manager {
  860. compatible = "amlogic, sm1-audio-ddr-manager";
  861. interrupts = <0x00 0x94 0x01 0x00 0x95 0x01 0x00 0x96 0x01 0x00 0x31 0x01 0x00 0x98 0x01 0x00 0x99 0x01 0x00 0x9a 0x01 0x00 0x32 0x01>;
  862. interrupt-names = "toddr_a\0toddr_b\0toddr_c\0toddr_d\0frddr_a\0frddr_b\0frddr_c\0frddr_d";
  863. };
  864.  
  865. vad {
  866. compatible = "amlogic, snd-vad";
  867. clocks = <0x1c 0x1b 0x02 0x05 0x1c 0x35>;
  868. #sound-dai-cells = <0x00>;
  869. clock-names = "gate\0pll\0clk";
  870. status = "okay";
  871. interrupts = <0x00 0x9b 0x01 0x00 0x30 0x01>;
  872. phandle = <0xe7>;
  873. src = <0x04>;
  874. interrupt-names = "irq_wakeup\0irq_frame_sync";
  875. level = <0x01>;
  876. };
  877.  
  878. effect {
  879. eqdrc_module = <0x01>;
  880. compatible = "amlogic, snd-effect-v3";
  881. clocks = <0x1c 0x16 0x02 0x05 0x1c 0x34>;
  882. #sound-dai-cells = <0x00>;
  883. clock-names = "gate\0srcpll\0eqdrc";
  884. lane_mask = <0x01>;
  885. status = "okay";
  886. phandle = <0xe9>;
  887. channel_mask = <0x03>;
  888. };
  889.  
  890. loopback@1 {
  891. datalb-lane-mask-in = <0x01 0x00 0x00 0x00>;
  892. compatible = "amlogic, sm1-loopbackb";
  893. clocks = <0x1c 0x01 0x02 0x03 0x02 0x0f 0x1c 0x2f 0x1c 0x30 0x02 0x0c 0x1c 0x24>;
  894. datain_chmask = <0x0f>;
  895. #sound-dai-cells = <0x00>;
  896. clock-names = "pdm_gate\0pdm_sysclk_srcpll\0pdm_dclk_srcpll\0pdm_dclk\0pdm_sysclk\0tdminlb_mpll\0tdminlb_mclk";
  897. datain_src = <0x04>;
  898. datain_chnum = <0x04>;
  899. status = "disabled";
  900. phandle = <0xe8>;
  901. mclk-fs = <0x100>;
  902. datalb_chnum = <0x02>;
  903. datain-lane-mask-in = <0x01 0x00 0x01 0x00>;
  904. datalb_src = <0x01>;
  905. datalb_chmask = <0x03>;
  906. };
  907.  
  908. resample@0 {
  909. compatible = "amlogic, sm1-resample";
  910. clocks = <0x02 0x0f 0x1c 0x29 0x1c 0x2c>;
  911. clock-names = "resample_pll\0resample_src\0resample_clk";
  912. status = "okay";
  913. phandle = <0xe6>;
  914. resample_module = <0x04>;
  915. };
  916.  
  917. earc {
  918. compatible = "amlogic, sm1-snd-earc";
  919. clocks = <0x1c 0x23 0x1c 0x38 0x1c 0x39 0x02 0x05 0x02 0x03>;
  920. #sound-dai-cells = <0x00>;
  921. clock-names = "rx_gate\0rx_cmdc\0rx_dmac\0rx_cmdc_srcpll\0rx_dmac_srcpll";
  922. status = "okay";
  923. interrupts = <0x00 0x58 0x01 0x00 0x57 0x01>;
  924. phandle = <0x88>;
  925. interrupt-names = "rx_cmdc\0rx_dmac";
  926. };
  927.  
  928. tdm@3 {
  929. dai-tdm-clk-sel = <0x01>;
  930. compatible = "amlogic, sm1-snd-tdmlb";
  931. clocks = <0x1c 0x25 0x02 0x0d>;
  932. #sound-dai-cells = <0x00>;
  933. clock-names = "mclk\0clk_srcpll";
  934. lb-src-sel = <0x01>;
  935. status = "disabled";
  936. phandle = <0xe5>;
  937. dai-tdm-lane-lb-slot-mask-in = <0x01 0x00 0x00 0x00>;
  938. };
  939.  
  940. tdm@1 {
  941. dai-tdm-clk-sel = <0x01>;
  942. compatible = "amlogic, sm1-snd-tdmb";
  943. clocks = <0x1c 0x25 0x02 0x0d 0x02 0x0c 0x1c 0x2b>;
  944. #sound-dai-cells = <0x00>;
  945. dai-tdm-lane-slot-mask-out = <0x01 0x00 0x00 0x00>;
  946. clock-names = "mclk\0clk_srcpll\0samesource_srcpll\0samesource_clk";
  947. samesource_sel = <0x03>;
  948. dai-tdm-lane-slot-mask-in = <0x00 0x01 0x00 0x00>;
  949. status = "okay";
  950. phandle = <0x82>;
  951. clk_tuning_enable = <0x01>;
  952. pinctrl-0 = <0x1f 0x20 0x21>;
  953. start_clk_enable = <0x01>;
  954. pinctrl-names = "tdm_pins";
  955. mclk_pad = <0x00>;
  956. };
  957.  
  958. audio_clocks {
  959. compatible = "amlogic, sm1-audio-clocks";
  960. #clock-cells = <0x01>;
  961. phandle = <0x1c>;
  962. reg = <0x00 0xb0>;
  963. };
  964.  
  965. spdif@0 {
  966. compatible = "amlogic, sm1-snd-spdif-a";
  967. clocks = <0x02 0x0c 0x02 0x04 0x1c 0x10 0x1c 0x11 0x1c 0x2a 0x1c 0x2b>;
  968. #sound-dai-cells = <0x00>;
  969. clock-names = "sysclk\0fixed_clk\0gate_spdifin\0gate_spdifout\0clk_spdifin\0clk_spdifout";
  970. status = "okay";
  971. interrupts = <0x00 0x97 0x01>;
  972. phandle = <0x86>;
  973. clk_tuning_enable = <0x01>;
  974. pinctrl-0 = <0x25 0x26>;
  975. interrupt-names = "irq_spdifin";
  976. pinctrl-names = "spdif_pins";
  977. };
  978.  
  979. loopback@0 {
  980. datalb-lane-mask-in = <0x01 0x00 0x00 0x00>;
  981. compatible = "amlogic, sm1-loopbacka";
  982. clocks = <0x1c 0x01 0x02 0x03 0x02 0x0f 0x1c 0x2f 0x1c 0x30 0x02 0x0c 0x1c 0x24>;
  983. datain_chmask = <0x03>;
  984. #sound-dai-cells = <0x00>;
  985. clock-names = "pdm_gate\0pdm_sysclk_srcpll\0pdm_dclk_srcpll\0pdm_dclk\0pdm_sysclk\0tdminlb_mpll\0tdminlb_mclk";
  986. datain_src = <0x04>;
  987. datain_chnum = <0x02>;
  988. status = "okay";
  989. phandle = <0x89>;
  990. mclk-fs = <0x100>;
  991. datalb_chnum = <0x02>;
  992. datain-lane-mask-in = <0x01 0x00 0x00 0x00>;
  993. datalb_src = <0x01>;
  994. datalb_chmask = <0x03>;
  995. };
  996.  
  997. tdm@2 {
  998. dai-tdm-clk-sel = <0x02>;
  999. compatible = "amlogic, sm1-snd-tdmc";
  1000. clocks = <0x1c 0x26 0x02 0x0e>;
  1001. #dai-tdm-lane-oe-slot-mask-in = <0x00 0x00 0x00 0x00>;
  1002. #sound-dai-cells = <0x00>;
  1003. clock-names = "mclk\0clk_srcpll";
  1004. #dai-tdm-lane-slot-mask-out = <0x01 0x00 0x01 0x01>;
  1005. dai-tdm-lane-slot-mask-in = <0x01 0x00 0x00 0x00>;
  1006. status = "okay";
  1007. phandle = <0x84>;
  1008. #dai-tdm-lane-oe-slot-mask-out = <0x01 0x00 0x00 0x00>;
  1009. pinctrl-0 = <0x22 0x23 0x24>;
  1010. pinctrl-names = "tdm_pins";
  1011. mclk_pad = <0x00>;
  1012. };
  1013. };
  1014.  
  1015. ion_dev {
  1016. compatible = "amlogic, ion_dev";
  1017. memory-region = <0x1b>;
  1018. };
  1019.  
  1020. cbus@ffd00000 {
  1021. compatible = "simple-bus";
  1022. ranges = <0x00 0xffd00000 0x26000>;
  1023. #address-cells = <0x01>;
  1024. #size-cells = <0x01>;
  1025. phandle = <0xd0>;
  1026. reg = <0xffd00000 0x26000>;
  1027.  
  1028. pwm@1b000 {
  1029. compatible = "amlogic,g12a-ee-pwm";
  1030. clocks = <0x15 0x15 0x15 0x15>;
  1031. clock-names = "clkin0\0clkin1\0clkin2\0clkin3";
  1032. status = "disabled";
  1033. phandle = <0xd2>;
  1034. reg = <0x1b000 0x20>;
  1035. #pwm-cells = <0x03>;
  1036. };
  1037.  
  1038. i2c@1d000 {
  1039. compatible = "amlogic,meson-g12a-i2c";
  1040. clocks = <0x02 0x2a>;
  1041. clock-names = "clk_i2c";
  1042. status = "disabled";
  1043. #address-cells = <0x01>;
  1044. interrupts = <0x00 0xd7 0x01 0x00 0x5e 0x01>;
  1045. #size-cells = <0x00>;
  1046. phandle = <0xd6>;
  1047. reg = <0x1d000 0x20>;
  1048. };
  1049.  
  1050. pwm@1a000 {
  1051. compatible = "amlogic,g12a-ee-pwm";
  1052. clocks = <0x15 0x15 0x15 0x15>;
  1053. clock-names = "clkin0\0clkin1\0clkin2\0clkin3";
  1054. status = "disabled";
  1055. phandle = <0xd3>;
  1056. reg = <0x1a000 0x20>;
  1057. #pwm-cells = <0x03>;
  1058. };
  1059.  
  1060. spi@13000 {
  1061. compatible = "amlogic,meson-g12a-spicc";
  1062. clocks = <0x02 0x29 0x02 0xd1>;
  1063. clock-names = "core\0comp";
  1064. status = "disabled";
  1065. #address-cells = <0x01>;
  1066. interrupts = <0x00 0x51 0x04>;
  1067. #size-cells = <0x00>;
  1068. phandle = <0xd8>;
  1069. reg = <0x13000 0x44>;
  1070. };
  1071.  
  1072. i2c@1f000 {
  1073. compatible = "amlogic,meson-g12a-i2c";
  1074. clocks = <0x02 0x2a>;
  1075. clock-names = "clk_i2c";
  1076. status = "okay";
  1077. #address-cells = <0x01>;
  1078. interrupts = <0x00 0x15 0x01 0x00 0x5b 0x01>;
  1079. #size-cells = <0x00>;
  1080. phandle = <0xd4>;
  1081. reg = <0x1f000 0x20>;
  1082. clock-frequency = <0x61a80>;
  1083. pinctrl-0 = <0x16>;
  1084. pinctrl-names = "default";
  1085.  
  1086. gt9xx@5d {
  1087. reset-gpio = <0x17 0x0a 0x00>;
  1088. compatible = "goodix,gt9xx";
  1089. status = "disabled";
  1090. reg = <0x5d>;
  1091. irq-gpio = <0x17 0x04 0x00>;
  1092. };
  1093.  
  1094. ftxx@38 {
  1095. reset-gpio = <0x17 0x0a 0x00>;
  1096. compatible = "focaltech,fts";
  1097. x_max = <0x258>;
  1098. y_max = <0x400>;
  1099. status = "disabled";
  1100. reg = <0x38>;
  1101. irq-gpio = <0x17 0x04 0x00>;
  1102. max-touch-number = <0x0a>;
  1103. };
  1104. };
  1105.  
  1106. i2c@1c000 {
  1107. compatible = "amlogic,meson-g12a-i2c";
  1108. clocks = <0x02 0x2a>;
  1109. clock-names = "clk_i2c";
  1110. status = "okay";
  1111. #address-cells = <0x01>;
  1112. interrupts = <0x00 0x27 0x01 0x00 0x5f 0x01>;
  1113. #size-cells = <0x00>;
  1114. phandle = <0x6a>;
  1115. reg = <0x1c000 0x20>;
  1116. clock-frequency = <0x186a0>;
  1117. pinctrl-0 = <0x18>;
  1118. pinctrl-names = "default";
  1119.  
  1120. bl_extern_i2c {
  1121. compatible = "bl_extern, i2c";
  1122. dev_name = "lp8556";
  1123. status = "disabled";
  1124. reg = <0x2c>;
  1125. };
  1126.  
  1127. ad82584f_62@62 {
  1128. compatible = "ESMT, ad82584f";
  1129. #sound-dai-cells = <0x00>;
  1130. reset_pin = <0x17 0x37 0x00>;
  1131. status = "disabled";
  1132. phandle = <0xd7>;
  1133. no_mclk;
  1134. reg = <0x31>;
  1135. };
  1136. };
  1137.  
  1138. meson_clk_msr {
  1139. compatible = "amlogic, sm1-measure";
  1140. ringctrl = <0xff6345fc>;
  1141. reg = <0x18004 0x04 0x1800c 0x04>;
  1142. };
  1143.  
  1144. interrupt-controller@f080 {
  1145. compatible = "amlogic,meson-gpio-intc\0amlogic,meson-sm1-gpio-intc";
  1146. status = "okay";
  1147. #interrupt-cells = <0x02>;
  1148. phandle = <0xd1>;
  1149. reg = <0xf080 0x10>;
  1150. amlogic,channel-interrupts = <0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47>;
  1151. interrupt-controller;
  1152. };
  1153.  
  1154. spi@15000 {
  1155. compatible = "amlogic,meson-g12a-spicc";
  1156. clocks = <0x02 0x2f 0x02 0xd5>;
  1157. clock-names = "core\0comp";
  1158. status = "disabled";
  1159. #address-cells = <0x01>;
  1160. interrupts = <0x00 0x5a 0x04>;
  1161. #size-cells = <0x00>;
  1162. phandle = <0xd9>;
  1163. reg = <0x15000 0x44>;
  1164. };
  1165.  
  1166. i2c@1e000 {
  1167. compatible = "amlogic,meson-g12a-i2c";
  1168. clocks = <0x02 0x2a>;
  1169. clock-names = "clk_i2c";
  1170. status = "disabled";
  1171. #address-cells = <0x01>;
  1172. interrupts = <0x00 0xd6 0x01 0x00 0x5c 0x01>;
  1173. #size-cells = <0x00>;
  1174. phandle = <0xd5>;
  1175. reg = <0x1e000 0x20>;
  1176. };
  1177.  
  1178. pwm@19000 {
  1179. compatible = "amlogic,g12a-ee-pwm";
  1180. clocks = <0x15 0x15 0x15 0x15>;
  1181. clock-names = "clkin0\0clkin1\0clkin2\0clkin3";
  1182. status = "okay";
  1183. phandle = <0x61>;
  1184. reg = <0x19000 0x20>;
  1185. #pwm-cells = <0x03>;
  1186. };
  1187. };
  1188.  
  1189. hiubus@ff63c000 {
  1190. compatible = "simple-bus";
  1191. ranges = <0x00 0xff63c000 0x2000>;
  1192. #address-cells = <0x01>;
  1193. #size-cells = <0x01>;
  1194. phandle = <0xe2>;
  1195. reg = <0xff63c000 0x2000>;
  1196.  
  1197. clock-controller@0 {
  1198. compatible = "amlogic,sm1-clkc-1";
  1199. #clock-cells = <0x01>;
  1200. phandle = <0x02>;
  1201. reg = <0x00 0x3dc>;
  1202. };
  1203.  
  1204. clock-controller@1 {
  1205. compatible = "amlogic,sm1-clkc-2";
  1206. own-dsu-clk;
  1207. #clock-cells = <0x01>;
  1208. phandle = <0xe3>;
  1209. reg = <0x00 0x3dc>;
  1210. };
  1211. };
  1212. };
  1213.  
  1214. aml_snd_iomap {
  1215. compatible = "amlogic, snd-iomap";
  1216. ranges;
  1217. status = "okay";
  1218. #address-cells = <0x01>;
  1219. #size-cells = <0x01>;
  1220.  
  1221. earcrx_dmac_base {
  1222. reg = <0xff663c00 0x20>;
  1223. };
  1224.  
  1225. reset_base {
  1226. reg = <0xffd01000 0x1000>;
  1227. };
  1228.  
  1229. pdm_bus {
  1230. reg = <0xff661000 0x400>;
  1231. };
  1232.  
  1233. earcrx_cdmc_base {
  1234. reg = <0xff663800 0x30>;
  1235. };
  1236.  
  1237. vad_base {
  1238. reg = <0xff661800 0x400>;
  1239. };
  1240.  
  1241. eqdrc_base {
  1242. reg = <0xff662000 0x1000>;
  1243. };
  1244.  
  1245. audiolocker_base {
  1246. reg = <0xff661400 0x400>;
  1247. };
  1248.  
  1249. earcrx_top_base {
  1250. reg = <0xff663e00 0x10>;
  1251. };
  1252.  
  1253. audiobus_base {
  1254. reg = <0xff660000 0x1000>;
  1255. };
  1256. };
  1257.  
  1258. vdec {
  1259. compatible = "amlogic, vdec";
  1260. dev_name = "vdec.0";
  1261. status = "okay";
  1262. interrupts = <0x00 0x03 0x01 0x00 0x17 0x01 0x00 0x20 0x01 0x00 0x2b 0x01 0x00 0x2c 0x01 0x00 0x2d 0x01>;
  1263. interrupt-names = "vsync\0demux\0parser\0mailbox_0\0mailbox_1\0mailbox_2";
  1264. };
  1265.  
  1266. efusekey {
  1267. key3 = <0x7f>;
  1268. keynum = <0x04>;
  1269. key1 = <0x7d>;
  1270. key2 = <0x7e>;
  1271. phandle = <0x4d>;
  1272. key0 = <0x7c>;
  1273.  
  1274. key_2 {
  1275. offset = <0x0c>;
  1276. keyname = "mac_wifi";
  1277. size = <0x06>;
  1278. phandle = <0x7e>;
  1279. };
  1280.  
  1281. key_0 {
  1282. offset = <0x00>;
  1283. keyname = "mac";
  1284. size = <0x06>;
  1285. phandle = <0x7c>;
  1286. };
  1287.  
  1288. key_3 {
  1289. offset = <0x12>;
  1290. keyname = "usid";
  1291. size = <0x10>;
  1292. phandle = <0x7f>;
  1293. };
  1294.  
  1295. key_1 {
  1296. offset = <0x06>;
  1297. keyname = "mac_bt";
  1298. size = <0x06>;
  1299. phandle = <0x7d>;
  1300. };
  1301. };
  1302.  
  1303. bifrost {
  1304. compatible = "arm,malit60x\0arm,malit6xx\0arm,mali-midgard";
  1305. clocks = <0x02 0x83 0x02 0x07>;
  1306. sc_mpp = <0x01>;
  1307. clock-names = "gpu_mux\0gp0_pll";
  1308. tbl = <0x03 0x04 0x05 0x06 0x07 0x07>;
  1309. interrupt-parent = <0x01>;
  1310. interrupts = <0x00 0xa0 0x04 0x00 0xa1 0x04 0x00 0xa2 0x04>;
  1311. phandle = <0x92>;
  1312. reg = <0xffe40000 0x4000 0xffd01000 0x1000 0xff800000 0x1000 0xff63c000 0x1000 0xffd01000 0x1000>;
  1313. #cooling-cells = <0x02>;
  1314. interrupt-names = "GPU\0MMU\0JOB";
  1315. num_of_pp = <0x02>;
  1316.  
  1317. dvfs500_cfg {
  1318. clk_reg = <0xa00>;
  1319. voltage = <0x47e>;
  1320. threshold = <0xb4 0xdc>;
  1321. clk_parent = "fclk_div4";
  1322. clkp_freq = <0x1dcd6500>;
  1323. keep_count = <0x05>;
  1324. clk_freq = <0x1dcd6500>;
  1325. phandle = <0x05>;
  1326. };
  1327.  
  1328. dvfs666_cfg {
  1329. clk_reg = <0x800>;
  1330. voltage = <0x47e>;
  1331. threshold = <0xd2 0xec>;
  1332. clk_parent = "fclk_div3";
  1333. clkp_freq = <0x27bc86aa>;
  1334. keep_count = <0x05>;
  1335. clk_freq = <0x27bc86aa>;
  1336. phandle = <0x06>;
  1337. };
  1338.  
  1339. dvfs285_cfg {
  1340. clk_reg = <0xe00>;
  1341. voltage = <0x47e>;
  1342. threshold = <0x64 0xbe>;
  1343. clk_parent = "fclk_div7";
  1344. clkp_freq = <0x1107a76d>;
  1345. keep_count = <0x05>;
  1346. clk_freq = <0x1107a76d>;
  1347. phandle = <0x03>;
  1348. };
  1349.  
  1350. dvfs800_cfg {
  1351. clk_reg = <0x600>;
  1352. voltage = <0x47e>;
  1353. threshold = <0xe6 0xff>;
  1354. clk_parent = "fclk_div2p5";
  1355. clkp_freq = <0x2faf0800>;
  1356. keep_count = <0x05>;
  1357. clk_freq = <0x2faf0800>;
  1358. phandle = <0x95>;
  1359. };
  1360.  
  1361. clk125_cfg {
  1362. clk_reg = <0xa03>;
  1363. voltage = <0x47e>;
  1364. threshold = <0x1e 0x78>;
  1365. clk_parent = "fclk_div4";
  1366. clkp_freq = <0x1dcd6500>;
  1367. keep_count = <0x05>;
  1368. clk_freq = <0x7735940>;
  1369. phandle = <0x93>;
  1370. };
  1371.  
  1372. dvfs250_cfg {
  1373. clk_reg = <0xa01>;
  1374. voltage = <0x47e>;
  1375. threshold = <0x50 0xaa>;
  1376. clk_parent = "fclk_div4";
  1377. clkp_freq = <0x1dcd6500>;
  1378. keep_count = <0x05>;
  1379. clk_freq = <0xee6b280>;
  1380. phandle = <0x94>;
  1381. };
  1382.  
  1383. dvfs850_cfg {
  1384. clk_reg = <0x200>;
  1385. voltage = <0x47e>;
  1386. threshold = <0xe6 0xff>;
  1387. clk_parent = "gp0_pll";
  1388. clkp_freq = <0x326cef80>;
  1389. keep_count = <0x05>;
  1390. clk_freq = <0x326cef80>;
  1391. phandle = <0x07>;
  1392. };
  1393.  
  1394. dvfs400_cfg {
  1395. clk_reg = <0xc00>;
  1396. voltage = <0x47e>;
  1397. threshold = <0x98 0xcf>;
  1398. clk_parent = "fclk_div5";
  1399. clkp_freq = <0x17d78400>;
  1400. keep_count = <0x05>;
  1401. clk_freq = <0x17d78400>;
  1402. phandle = <0x04>;
  1403. };
  1404. };
  1405.  
  1406. ionvideo {
  1407. compatible = "amlogic, ionvideo";
  1408. dev_name = "ionvideo";
  1409. status = "okay";
  1410. };
  1411.  
  1412. vpu {
  1413. compatible = "amlogic, vpu-sm1";
  1414. clocks = <0x02 0x95 0x02 0x4c 0x02 0x87 0x02 0x8b 0x02 0x8c>;
  1415. dev_name = "vpu";
  1416. clock-names = "vapb_clk\0vpu_intr_gate\0vpu_clk0\0vpu_clk1\0vpu_clk";
  1417. status = "okay";
  1418. clk_level = <0x07>;
  1419. phandle = <0x98>;
  1420. };
  1421.  
  1422. aml_reboot {
  1423. compatible = "aml, reboot";
  1424. sys_reset = <0x84000009>;
  1425. sys_poweroff = <0x84000008>;
  1426. };
  1427.  
  1428. eqdrc {
  1429. eqdrc_module = <0x01>;
  1430. lane_mask = <0x01>;
  1431. phandle = <0x101>;
  1432. channel_mask = <0x03>;
  1433. };
  1434.  
  1435. psci {
  1436. compatible = "arm,psci-0.2";
  1437. method = "smc";
  1438. };
  1439.  
  1440. unifykey {
  1441. unifykey-index-10 = <0x76>;
  1442. compatible = "amlogic, unifykey";
  1443. unifykey-index-7 = <0x73>;
  1444. unifykey-index-5 = <0x71>;
  1445. unifykey-index-15 = <0x7b>;
  1446. unifykey-index-3 = <0x6f>;
  1447. unifykey-num = <0x10>;
  1448. unifykey-index-13 = <0x79>;
  1449. unifykey-index-1 = <0x6d>;
  1450. unifykey-index-11 = <0x77>;
  1451. status = "ok";
  1452. unifykey-index-8 = <0x74>;
  1453. unifykey-index-6 = <0x72>;
  1454. unifykey-index-4 = <0x70>;
  1455. unifykey-index-14 = <0x7a>;
  1456. unifykey-index-2 = <0x6e>;
  1457. unifykey-index-12 = <0x78>;
  1458. unifykey-index-0 = <0x6c>;
  1459. unifykey-index-9 = <0x75>;
  1460.  
  1461. key_14 {
  1462. key-device = "secure";
  1463. key-name = "attestationkeybox";
  1464. key-permit = "read\0write\0del";
  1465. phandle = <0x7a>;
  1466. };
  1467.  
  1468. key_2 {
  1469. key-device = "secure";
  1470. key-type = "sha1";
  1471. key-name = "hdcp";
  1472. key-permit = "read\0write\0del";
  1473. phandle = <0x6e>;
  1474. };
  1475.  
  1476. key_12 {
  1477. key-device = "secure";
  1478. key-name = "prpubkeybox";
  1479. key-permit = "read\0write\0del";
  1480. phandle = <0x78>;
  1481. };
  1482.  
  1483. key_0 {
  1484. key-device = "normal";
  1485. key-name = "usid";
  1486. key-permit = "read\0write\0del";
  1487. phandle = <0x6c>;
  1488. };
  1489.  
  1490. key_9 {
  1491. key-device = "normal";
  1492. key-name = "deviceid";
  1493. key-permit = "read\0write\0del";
  1494. phandle = <0x75>;
  1495. };
  1496.  
  1497. key_10 {
  1498. key-device = "secure";
  1499. key-name = "hdcp22_fw_private";
  1500. key-permit = "read\0write\0del";
  1501. phandle = <0x76>;
  1502. };
  1503.  
  1504. key_7 {
  1505. key-device = "normal";
  1506. key-name = "hdcp2_rx";
  1507. key-permit = "read\0write\0del";
  1508. phandle = <0x73>;
  1509. };
  1510.  
  1511. key_5 {
  1512. key-device = "normal";
  1513. key-type = "mac";
  1514. key-name = "mac_wifi";
  1515. key-permit = "read\0write\0del";
  1516. phandle = <0x71>;
  1517. };
  1518.  
  1519. key_15 {
  1520. key-device = "secure";
  1521. key-name = "netflix_mgkid";
  1522. key-permit = "read\0write\0del";
  1523. phandle = <0x7b>;
  1524. };
  1525.  
  1526. key_3 {
  1527. key-device = "efuse";
  1528. key-name = "secure_boot_set";
  1529. key-permit = "write";
  1530. phandle = <0x6f>;
  1531. };
  1532.  
  1533. key_13 {
  1534. key-device = "secure";
  1535. key-name = "prprivkeybox";
  1536. key-permit = "read\0write\0del";
  1537. phandle = <0x79>;
  1538. };
  1539.  
  1540. key_1 {
  1541. key-device = "normal";
  1542. key-name = "mac";
  1543. key-permit = "read\0write\0del";
  1544. phandle = <0x6d>;
  1545. };
  1546.  
  1547. key_11 {
  1548. key-device = "secure";
  1549. key-name = "PlayReadykeybox25";
  1550. key-permit = "read\0write\0del";
  1551. phandle = <0x77>;
  1552. };
  1553.  
  1554. key_8 {
  1555. key-device = "secure";
  1556. key-name = "widevinekeybox";
  1557. key-permit = "read\0write\0del";
  1558. phandle = <0x74>;
  1559. };
  1560.  
  1561. key_6 {
  1562. key-device = "normal";
  1563. key-name = "hdcp2_tx";
  1564. key-permit = "read\0write\0del";
  1565. phandle = <0x72>;
  1566. };
  1567.  
  1568. key_4 {
  1569. key-device = "normal";
  1570. key-type = "mac";
  1571. key-name = "mac_bt";
  1572. key-permit = "read\0write\0del";
  1573. phandle = <0x70>;
  1574. };
  1575. };
  1576.  
  1577. vdin0 {
  1578. compatible = "amlogic, vdin";
  1579. tv_bit_mode = <0x15>;
  1580. dev_name = "vdin0";
  1581. flag_cma = <0x00>;
  1582. status = "okay";
  1583. interrupts = <0x00 0x53 0x01>;
  1584. phandle = <0xf1>;
  1585. rdma-irq = <0x02>;
  1586. vdin_id = <0x00>;
  1587. reserve-iomap = "true";
  1588. };
  1589.  
  1590. firmware {
  1591.  
  1592. android {
  1593. compatible = "android,firmware";
  1594.  
  1595. fstab {
  1596. compatible = "android,fstab";
  1597.  
  1598. vendor {
  1599. compatible = "android,vendor";
  1600. dev = "/dev/block/vendor";
  1601. type = "ext4";
  1602. fsmgr_flags = "wait";
  1603. mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
  1604. };
  1605.  
  1606. product {
  1607. compatible = "android,product";
  1608. dev = "/dev/block/product";
  1609. type = "ext4";
  1610. fsmgr_flags = "wait";
  1611. mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
  1612. };
  1613.  
  1614. odm {
  1615. compatible = "android,odm";
  1616. dev = "/dev/block/odm";
  1617. type = "ext4";
  1618. fsmgr_flags = "wait";
  1619. mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
  1620. };
  1621. };
  1622.  
  1623. vbmeta {
  1624. compatible = "android,vbmeta";
  1625. parts = "vbmeta,boot,system,vendor";
  1626. by_name_prefix = "/dev/block";
  1627. };
  1628. };
  1629. };
  1630.  
  1631. pcieA@fc000000 {
  1632. pcie-ctrl-a-rst-bit = <0x0c>;
  1633. reset-gpio = <0x17 0x49 0x00>;
  1634. compatible = "amlogic, amlogic-pcie-v2\0snps,dw-pcie";
  1635. clocks = <0x02 0x18 0x02 0x3f 0x02 0x42>;
  1636. gpio-type = <0x02>;
  1637. reg-names = "elbi\0cfg\0config\0phy\0reset";
  1638. device_type = "pci";
  1639. num-lanes = <0x01>;
  1640. clock-names = "pcie_refpll\0pcie\0pcie_phy";
  1641. pcie-hhi-mem-pd-shift = <0x1a>;
  1642. interrupt-map-mask = <0x00 0x00 0x00 0x00>;
  1643. ranges = <0x81000000 0x00 0x00 0xfc600000 0x00 0x100000 0x82000000 0xfc700000 0x00 0xfc700000 0x00 0x1900000>;
  1644. pcie-apb-rst-bit = <0x0f>;
  1645. status = "disable";
  1646. #interrupt-cells = <0x01>;
  1647. bus-range = <0x00 0xff>;
  1648. #address-cells = <0x03>;
  1649. interrupts = <0x00 0xdd 0x00>;
  1650. pcie-ctrl-iso-shift = <0x12>;
  1651. interrupt-map = <0x00 0x00 0x00 0x00 0x01 0x00 0xdf 0x01>;
  1652. pcie-num = <0x01>;
  1653. pcie-ctrl-sleep-shift = <0x12>;
  1654. #size-cells = <0x02>;
  1655. pcie-hhi-mem-pd-mask = <0x0f>;
  1656. phandle = <0xee>;
  1657. pcie-phy-rst-bit = <0x0e>;
  1658. reg = <0xfc000000 0x400000 0xff648000 0x2000 0xfc400000 0x200000 0xff646000 0x2000 0xffd01080 0x10>;
  1659. pwr-ctl = <0x01>;
  1660. };
  1661.  
  1662. rc@0xff808040 {
  1663. map = <0x29>;
  1664. compatible = "amlogic, aml_remote";
  1665. dev_name = "meson-remote";
  1666. led_blink = <0x00>;
  1667. max_frame_time = <0xc8>;
  1668. led_blink_frq = <0x64>;
  1669. status = "okay";
  1670. interrupts = <0x00 0xc4 0x01>;
  1671. phandle = <0xea>;
  1672. reg = <0xff808040 0x44 0xff808000 0x20>;
  1673. pinctrl-0 = <0x28>;
  1674. protocol = <0x01>;
  1675. pinctrl-names = "default";
  1676. };
  1677.  
  1678. pinctrl@ff800014 {
  1679. compatible = "amlogic,meson-g12a-aobus-pinctrl";
  1680. ranges;
  1681. #address-cells = <0x01>;
  1682. #size-cells = <0x01>;
  1683. phandle = <0x9a>;
  1684.  
  1685. pwm_ao_b {
  1686. phandle = <0xa0>;
  1687.  
  1688. mux {
  1689. groups = "pwm_ao_b";
  1690. function = "pwm_ao_b";
  1691. };
  1692. };
  1693.  
  1694. remote_pin {
  1695. phandle = <0x28>;
  1696.  
  1697. mux {
  1698. groups = "remote_input_ao";
  1699. function = "remote_input_ao";
  1700. };
  1701. };
  1702.  
  1703. ao_i2c_pins1 {
  1704. phandle = <0x9c>;
  1705.  
  1706. mux {
  1707. drive-strength = <0x02>;
  1708. groups = "i2c_ao_sck\0i2c_ao_sda";
  1709. function = "i2c_ao";
  1710. };
  1711. };
  1712.  
  1713. ao_cecb {
  1714. phandle = <0xa7>;
  1715.  
  1716. mux {
  1717. groups = "cec_ao_b";
  1718. function = "cec_ao";
  1719. };
  1720. };
  1721.  
  1722. sd_to_ao_uart_clr_pins {
  1723. phandle = <0x42>;
  1724.  
  1725. mux {
  1726. groups = "GPIOAO_0\0GPIOAO_1";
  1727. function = "gpio_aobus";
  1728. };
  1729. };
  1730.  
  1731. pwm_ao_d_pins2 {
  1732. phandle = <0xa5>;
  1733.  
  1734. mux {
  1735. groups = "pwm_ao_d_10";
  1736. function = "pwm_ao_d";
  1737. };
  1738. };
  1739.  
  1740. pwm_ao_c_pins1 {
  1741. phandle = <0xa1>;
  1742.  
  1743. mux {
  1744. groups = "pwm_ao_c_4";
  1745. function = "pwm_ao_c";
  1746. };
  1747. };
  1748.  
  1749. jtag_apao_pin {
  1750. phandle = <0xa8>;
  1751.  
  1752. mux {
  1753. groups = "jtag_a_tdi\0jtag_a_tdo\0jtag_a_clk\0jtag_a_tms";
  1754. function = "jtag_a";
  1755. };
  1756. };
  1757.  
  1758. pwm_ao_c_hiz {
  1759. phandle = <0xa3>;
  1760.  
  1761. mux {
  1762. groups = "pwm_ao_c_hiz_4";
  1763. function = "pwm_ao_c";
  1764. };
  1765. };
  1766.  
  1767. ao_i2c_pins2 {
  1768. phandle = <0x9d>;
  1769.  
  1770. mux {
  1771. drive-strength = <0x02>;
  1772. groups = "i2c_ao_sck_e\0i2c_ao_sda_e";
  1773. function = "i2c_ao";
  1774. };
  1775. };
  1776.  
  1777. ao_i2c_slave_pins {
  1778. phandle = <0x19>;
  1779.  
  1780. mux {
  1781. groups = "i2c_ao_slave_sck\0i2c_ao_slave_sda";
  1782. function = "i2c_ao_slave";
  1783. };
  1784. };
  1785.  
  1786. ao_uart {
  1787. phandle = <0x9b>;
  1788.  
  1789. mux {
  1790. groups = "uart_ao_tx_a\0uart_ao_rx_a";
  1791. function = "uart_ao_a";
  1792. };
  1793. };
  1794.  
  1795. pwm_ao_a {
  1796. phandle = <0x9e>;
  1797.  
  1798. mux {
  1799. groups = "pwm_ao_a";
  1800. function = "pwm_ao_a";
  1801. };
  1802. };
  1803.  
  1804. dvb_s_ts0_pins {
  1805. phandle = <0x6b>;
  1806.  
  1807. tsin_a {
  1808. groups = "tsin_a_sop_ao\0tsin_a_valid_ao\0tsin_a_clk_ao\0tsin_a_din0_ao";
  1809. function = "tsin_a_ao";
  1810. };
  1811. };
  1812.  
  1813. ao-bank@ff800014 {
  1814. reg-names = "mux\0gpio\0drive-strength";
  1815. gpio-controller;
  1816. phandle = <0x62>;
  1817. reg = <0xff800014 0x08 0xff800024 0x14 0xff80001c 0x08>;
  1818. #gpio-cells = <0x02>;
  1819. };
  1820.  
  1821. pwm_ao_d_pins3 {
  1822. phandle = <0x91>;
  1823.  
  1824. mux {
  1825. groups = "pwm_ao_d_e";
  1826. function = "pwm_ao_d";
  1827. };
  1828. };
  1829.  
  1830. ao_b_uart {
  1831. phandle = <0x1a>;
  1832.  
  1833. mux {
  1834. groups = "uart_ao_tx_b_2\0uart_ao_rx_b_3";
  1835. function = "uart_ao_b";
  1836. };
  1837. };
  1838.  
  1839. sd_to_ao_uart_pins {
  1840. phandle = <0x44>;
  1841.  
  1842. mux {
  1843. groups = "uart_ao_tx_a\0uart_ao_rx_a";
  1844. function = "uart_ao_a";
  1845. input-enable;
  1846. bias-pull-up;
  1847. };
  1848. };
  1849.  
  1850. ao_ceca {
  1851. phandle = <0xa6>;
  1852.  
  1853. mux {
  1854. groups = "cec_ao_a";
  1855. function = "cec_ao";
  1856. };
  1857. };
  1858.  
  1859. pwm_ao_d_pins1 {
  1860. phandle = <0xa4>;
  1861.  
  1862. mux {
  1863. groups = "pwm_ao_d_5";
  1864. function = "pwm_ao_d";
  1865. };
  1866. };
  1867.  
  1868. irblaster_pin {
  1869. phandle = <0x3b>;
  1870.  
  1871. mux {
  1872. groups = "remote_out_ao";
  1873. function = "remote_out_ao";
  1874. };
  1875. };
  1876.  
  1877. pwm_ao_c_pins2 {
  1878. phandle = <0xa2>;
  1879.  
  1880. mux {
  1881. groups = "pwm_ao_c_6";
  1882. function = "pwm_ao_c";
  1883. };
  1884. };
  1885.  
  1886. pwm_ao_a_hiz {
  1887. phandle = <0x9f>;
  1888.  
  1889. mux {
  1890. groups = "pwm_ao_a_hiz";
  1891. function = "pwm_ao_a";
  1892. };
  1893. };
  1894. };
  1895.  
  1896. partitions {
  1897. part-7 = <0x55>;
  1898. parts = <0x11>;
  1899. part-5 = <0x53>;
  1900. part-16 = <0x5e>;
  1901. part-3 = <0x51>;
  1902. part-14 = <0x5c>;
  1903. part-1 = <0x4f>;
  1904. part-12 = <0x5a>;
  1905. part-10 = <0x58>;
  1906. part-8 = <0x56>;
  1907. part-6 = <0x54>;
  1908. phandle = <0xfd>;
  1909. part-4 = <0x52>;
  1910. part-15 = <0x5d>;
  1911. part-2 = <0x50>;
  1912. part-13 = <0x5b>;
  1913. part-0 = <0x4e>;
  1914. part-11 = <0x59>;
  1915. part-9 = <0x57>;
  1916.  
  1917. logo {
  1918. pname = "logo";
  1919. mask = <0x01>;
  1920. size = <0x00 0x800000>;
  1921. phandle = <0x4e>;
  1922. };
  1923.  
  1924. vendor {
  1925. pname = "vendor";
  1926. mask = <0x01>;
  1927. size = <0x00 0x32000000>;
  1928. phandle = <0x59>;
  1929. };
  1930.  
  1931. param {
  1932. pname = "param";
  1933. mask = <0x02>;
  1934. size = <0x00 0x1000000>;
  1935. phandle = <0x53>;
  1936. };
  1937.  
  1938. dtbo {
  1939. pname = "dtbo";
  1940. mask = <0x01>;
  1941. size = <0x00 0x800000>;
  1942. phandle = <0x51>;
  1943. };
  1944.  
  1945. misc {
  1946. pname = "misc";
  1947. mask = <0x01>;
  1948. size = <0x00 0x800000>;
  1949. phandle = <0x50>;
  1950. };
  1951.  
  1952. tee {
  1953. pname = "tee";
  1954. mask = <0x01>;
  1955. size = <0x00 0x2000000>;
  1956. phandle = <0x58>;
  1957. };
  1958.  
  1959. system {
  1960. pname = "system";
  1961. mask = <0x01>;
  1962. size = <0x00 0x50000000>;
  1963. phandle = <0x5b>;
  1964. };
  1965.  
  1966. cri_data {
  1967. pname = "cri_data";
  1968. mask = <0x02>;
  1969. size = <0x00 0x800000>;
  1970. phandle = <0x52>;
  1971. };
  1972.  
  1973. product {
  1974. pname = "product";
  1975. mask = <0x01>;
  1976. size = <0x00 0x8000000>;
  1977. phandle = <0x5c>;
  1978. };
  1979.  
  1980. metadata {
  1981. pname = "metadata";
  1982. mask = <0x01>;
  1983. size = <0x00 0x1000000>;
  1984. phandle = <0x56>;
  1985. };
  1986.  
  1987. vbmeta {
  1988. pname = "vbmeta";
  1989. mask = <0x01>;
  1990. size = <0x00 0x200000>;
  1991. phandle = <0x57>;
  1992. };
  1993.  
  1994. odm {
  1995. pname = "odm";
  1996. mask = <0x01>;
  1997. size = <0x00 0x8000000>;
  1998. phandle = <0x5a>;
  1999. };
  2000.  
  2001. cache {
  2002. pname = "cache";
  2003. mask = <0x02>;
  2004. size = <0x00 0x46000000>;
  2005. phandle = <0x5d>;
  2006. };
  2007.  
  2008. data {
  2009. pname = "data";
  2010. mask = <0x04>;
  2011. size = <0xffffffff 0xffffffff>;
  2012. phandle = <0x5e>;
  2013. };
  2014.  
  2015. recovery {
  2016. pname = "recovery";
  2017. mask = <0x01>;
  2018. size = <0x00 0x1800000>;
  2019. phandle = <0x4f>;
  2020. };
  2021.  
  2022. boot {
  2023. pname = "boot";
  2024. mask = <0x01>;
  2025. size = <0x00 0x1000000>;
  2026. phandle = <0x54>;
  2027. };
  2028.  
  2029. rsv {
  2030. pname = "rsv";
  2031. mask = <0x01>;
  2032. size = <0x00 0x1000000>;
  2033. phandle = <0x55>;
  2034. };
  2035. };
  2036.  
  2037. xtal-clk {
  2038. compatible = "fixed-clock";
  2039. #clock-cells = <0x00>;
  2040. phandle = <0x15>;
  2041. clock-output-names = "xtal";
  2042. clock-frequency = <0x16e3600>;
  2043. };
  2044.  
  2045. lcd {
  2046. compatible = "amlogic, lcd-sm1";
  2047. clocks = <0x02 0x24 0x02 0x31 0x02 0x9a 0x02 0x5d 0x02 0x5f 0x02 0x07>;
  2048. dev_name = "lcd";
  2049. mode = "tablet";
  2050. clock-names = "dsi_host_gate\0dsi_phy_gate\0dsi_meas\0encl_top_gate\0encl_int_gate\0gp0_pll";
  2051. pinctrl_version = <0x02>;
  2052. key_valid = <0x00>;
  2053. status = "okay";
  2054. interrupts = <0x00 0x03 0x01 0x00 0x38 0x01>;
  2055. phandle = <0xfe>;
  2056. reg = <0xffd07000 0x400 0xff644000 0x200>;
  2057. lcd_cpu-gpios = <0x17 0x15 0x00 0x17 0x18 0x00>;
  2058. lcd_cpu_gpio_names = "GPIOH_4\0GPIOH_7";
  2059. interrupt-names = "vsync\0vsync2";
  2060.  
  2061. lcd_1 {
  2062. backlight_index = <0x00>;
  2063. dsi_init_off = <0xff 0xff>;
  2064. mipi_attr = <0x04 0x190 0x00 0x01 0x00 0x02 0x00 0x00>;
  2065. interface = "mipi";
  2066. clk_attr = <0x00 0x00 0x01 0x2f24d90>;
  2067. model_name = "P070ACB_FT";
  2068. basic_setting = <0x258 0x400 0x302 0x42e 0x08 0x03 0x05>;
  2069. power_on_step = <0x00 0x01 0x00 0xc8 0x02 0x00 0x00 0x00 0xff 0x00 0x00 0x00>;
  2070. power_off_step = <0x02 0x00 0x00 0x00 0x00 0x00 0x00 0x14 0x00 0x01 0x01 0x64 0xff 0x00 0x00 0x00>;
  2071. lcd_timing = <0x0a 0x50 0x00 0x06 0x14 0x00>;
  2072. extern_init = <0x05>;
  2073. dsi_init_on = <0xff 0x0a 0xf0 0x03 0x00 0x01 0x1e 0xf0 0x03 0x00 0x00 0x0a 0xf0 0x03 0x00 0x01 0x1e 0xfc 0x02 0x04 0x03 0xff 0xff>;
  2074. };
  2075.  
  2076. lcd_0 {
  2077. backlight_index = <0x00>;
  2078. dsi_init_off = <0x05 0x01 0x28 0xff 0x0a 0x05 0x01 0x10 0xff 0x0a 0xff 0xff>;
  2079. mipi_attr = <0x04 0x226 0x00 0x01 0x00 0x02 0x01 0x00>;
  2080. interface = "mipi";
  2081. clk_attr = <0x00 0x00 0x01 0x3dd6dc0>;
  2082. model_name = "B080XAN01";
  2083. basic_setting = <0x300 0x400 0x3b4 0x474 0x08 0x77 0x9f>;
  2084. power_on_step = <0x00 0x01 0x00 0x64 0x00 0x00 0x00 0x0a 0x00 0x00 0x01 0x14 0x02 0x00 0x00 0x00 0xff 0x00 0x00 0x00>;
  2085. power_off_step = <0x02 0x00 0x00 0x32 0x00 0x00 0x00 0x0a 0x00 0x01 0x01 0x64 0xff 0x00 0x00 0x00>;
  2086. lcd_timing = <0x40 0x38 0x00 0x32 0x1e 0x00>;
  2087. extern_init = <0xff>;
  2088. dsi_init_on = <0x05 0x01 0x11 0xff 0x14 0x05 0x01 0x29 0xff 0x14 0xff 0xff>;
  2089. };
  2090.  
  2091. lcd_7 {
  2092. backlight_index = <0x00>;
  2093. dsi_init_off = <0xff 0xff>;
  2094. mipi_attr = <0x04 0x3e8 0x00 0x01 0x00 0x02 0x01 0x00>;
  2095. interface = "mipi";
  2096. clk_attr = <0x00 0x00 0x01 0x31466a0>;
  2097. model_name = "EK79007";
  2098. basic_setting = <0x400 0x258 0x54a 0x27c 0x08 0x77 0x50>;
  2099. power_on_step = <0x00 0x00 0x01 0x0a 0x00 0x01 0x00 0x64 0x00 0x00 0x00 0xc8 0x00 0x01 0x01 0x64 0x02 0x00 0x00 0x64 0xff 0x00 0x00 0x00>;
  2100. power_off_step = <0x02 0x00 0x00 0x00 0x00 0x01 0x00 0x64 0x00 0x00 0x01 0x64 0xff 0x00 0x00 0x00>;
  2101. lcd_timing = <0x0a 0xa0 0x00 0x01 0x17 0x00>;
  2102. extern_init = <0x06>;
  2103. dsi_init_on = <0xff 0xff>;
  2104. };
  2105. };
  2106.  
  2107. vdac {
  2108. compatible = "amlogic, vdac-sm1";
  2109. status = "okay";
  2110. };
  2111.  
  2112. pwmao_d-regulator {
  2113. compatible = "pwm-regulator";
  2114. status = "okay";
  2115. voltage-table = <0xf9060 0x00 0xf6950 0x03 0xf4240 0x06 0xf1b30 0x0a 0xef420 0x0d 0xecd10 0x10 0xea600 0x14 0xe7ef0 0x17 0xe57e0 0x1a 0xe30d0 0x1e 0xe09c0 0x21 0xde2b0 0x24 0xdbba0 0x28 0xd9490 0x2b 0xd6d80 0x2e 0xd4670 0x32 0xd1f60 0x35 0xcf850 0x38 0xcd140 0x3c 0xcaa30 0x3f 0xc8320 0x43 0xc5c10 0x46 0xc3500 0x49 0xc0df0 0x4c 0xbe6e0 0x50 0xbbfd0 0x53 0xb98c0 0x56 0xb71b0 0x5a 0xb4aa0 0x5d 0xb2390 0x60 0xafc80 0x64>;
  2116. phandle = <0x0e>;
  2117. regulator-min-microvolt = <0xafc80>;
  2118. regulator-max-microvolt = <0xf9060>;
  2119. max-duty-cycle = <0x4e2>;
  2120. regulator-always-on;
  2121. pwms = <0x4c 0x01 0x4e2 0x00>;
  2122. regulator-name = "vddcpu0";
  2123. };
  2124.  
  2125. aliases {
  2126. i2c3 = "/soc/cbus@ffd00000/i2c@1c000";
  2127. i2c1 = "/soc/cbus@ffd00000/i2c@1e000";
  2128. tsensor0 = "/p_tsensor@ff634594";
  2129. serial3 = "/serial@ffd22000";
  2130. serial1 = "/serial@ffd24000";
  2131. i2c4 = "/soc/aobus@ff800000/i2c@5000";
  2132. i2c2 = "/soc/cbus@ffd00000/i2c@1d000";
  2133. i2c0 = "/soc/cbus@ffd00000/i2c@1f000";
  2134. tsensor1 = "/d_tsensor@ff800228";
  2135. serial4 = "/soc/aobus@ff800000/serial@4000";
  2136. serial2 = "/serial@ffd23000";
  2137. serial0 = "/soc/aobus@ff800000/serial@3000";
  2138. };
  2139.  
  2140. chosen {
  2141. bootargs = "init=/init console=ttyS0,115200 no_console_suspend earlyprintk=aml-uart,0xff803000 ramoops.pstore_en=1 ramoops.record_size=0x8000 ramoops.console_size=0x4000 otg_device=0 reboot_mode_android=normal logo=osd0,loaded,0x3d800000 vout=1080p60hz,enable panel_type=lcd_1 hdmitx=,444,8bit hdmimode=1080p60hz frac_rate_policy=1 hdmi_read_edid=1 cvbsmode=576cvbs osd_reverse=0 video_reverse=0 irq_check_en=0 androidboot.selinux=permissive androidboot.firstboot=0 jtag=disable androidboot.hardware=amlogic androidboot.serialno=1234567890 mac=48:01:0C:05:00:B1 androidboot.mac=48:01:0C:05:00:B1 ro rootwait skip_initramfs androidboot.dtbo_idx=0 --cmdline root=/dev/mmcblk0p18 buildvariant=userdebug";
  2142. };
  2143.  
  2144. custom_maps {
  2145. map4 = <0x2e>;
  2146. map2 = <0x2c>;
  2147. map0 = <0x2a>;
  2148. phandle = <0x29>;
  2149. mapnum = <0x05>;
  2150. map3 = <0x2d>;
  2151. map1 = <0x2b>;
  2152.  
  2153. map_3 {
  2154. release_delay = <0x50>;
  2155. keymap = <0x47000b 0x130002 0x100003 0x110004 0xf0005 0xc0006 0xd0007 0xb0008 0x80009 0x9000a 0x5c0061 0x51003d 0x50003e 0x40003f 0x4d0040 0x430041 0x170042 0x43 0x10044 0x160057 0x49000e 0x60082 0x140083 0x440067 0x1d006c 0x1c0069 0x48006a 0x53007d 0x450068 0x19006d 0x520077 0x5007a 0x59007b 0x1b0078 0x40079 0x1a0074 0xa000f 0xe0071 0x1f0066 0x1e0084 0x70085 0x120086 0x540087 0x20088 0x4f001e 0x420030 0x5d002e 0x4c0020 0x580089 0x55008c>;
  2156. customcode = <0xfb04>;
  2157. mapname = "amlogic-remote-4";
  2158. size = <0x32>;
  2159. phandle = <0x2d>;
  2160. };
  2161.  
  2162. map_1 {
  2163. release_delay = <0x50>;
  2164. keymap = <0x400074 0x410071 0xf016a 0x100072 0x180073 0x110066 0x19009e 0x160067 0x1a006c 0x510069 0x50006a 0x13001c 0x4c008b 0x4e0002 0xd0003 0xc0004 0x4a0005 0x90006 0x80007 0x460008 0x50009 0x4000a 0x430175 0x1000b 0x42000e 0x184>;
  2165. customcode = <0xfe01>;
  2166. mapname = "amlogic-remote-2";
  2167. size = <0x1a>;
  2168. phandle = <0x2b>;
  2169. fn_key_scancode = <0x00>;
  2170. };
  2171.  
  2172. map_4 {
  2173. release_delay = <0x50>;
  2174. cursor_right_scancode = <0x07>;
  2175. keymap = <0x1c0074 0x4b0042 0x4f003c 0x1003d 0x5f003e 0x5d0073 0x5c0072 0x420066 0xa009e 0x1a0067 0x48006c 0x470069 0x7006a 0x6001c 0x18008b 0x540002 0x160003 0x150004 0x500005 0x120006 0x110007 0x4c0008 0xe0009 0xd000a 0x41003f 0xc000b 0x10000e 0x30184>;
  2176. customcode = <0xdf00>;
  2177. mapname = "amlogic-remote-5";
  2178. cursor_up_scancode = <0x1a>;
  2179. cursor_down_scancode = <0x48>;
  2180. cursor_left_scancode = <0x47>;
  2181. size = <0x1c>;
  2182. phandle = <0x2e>;
  2183. fn_key_scancode = <0x03>;
  2184. cursor_ok_scancode = <0x06>;
  2185. };
  2186.  
  2187. map_2 {
  2188. release_delay = <0x50>;
  2189. keymap = <0xca0067 0xd2006c 0x990069 0xc1006a 0xce0061 0x450074 0xc50085 0x800071 0xd0000f 0xd6007d 0x950066 0xdd0068 0x8c006d 0x890083 0x9c0082 0x9a0078 0xcd0079>;
  2190. customcode = <0xbd02>;
  2191. mapname = "amlogic-remote-3";
  2192. size = <0x11>;
  2193. phandle = <0x2c>;
  2194. };
  2195.  
  2196. map_0 {
  2197. release_delay = <0x50>;
  2198. cursor_right_scancode = <0x11>;
  2199. keymap = <0x4d0074 0x430071 0x5300e2 0x5b0179 0x570096 0x54016a 0x1c0072 0x1e019c 0x1f0197 0x150073 0x1a0066 0x42009e 0x45008b 0xb0067 0xe006c 0x100069 0x11006a 0xd001c 0x10002 0x20003 0x30004 0x40005 0x50006 0x60007 0x70008 0x80009 0x9000a 0xf0175 0x0b 0xc000e 0x440184>;
  2200. customcode = <0x4040>;
  2201. mapname = "amlogic-remote-1";
  2202. cursor_up_scancode = <0x0b>;
  2203. cursor_down_scancode = <0x0e>;
  2204. cursor_left_scancode = <0x10>;
  2205. size = <0x1f>;
  2206. phandle = <0x2a>;
  2207. fn_key_scancode = <0x44>;
  2208. cursor_ok_scancode = <0x0d>;
  2209. };
  2210. };
  2211.  
  2212. rng {
  2213. quality = [03 e8];
  2214. compatible = "amlogic,meson-rng";
  2215. status = "okay";
  2216. #address-cells = <0x01>;
  2217. #size-cells = <0x01>;
  2218. reg = <0xff630218 0x04>;
  2219. };
  2220.  
  2221. bl_extern {
  2222. compatible = "amlogic, bl_extern";
  2223. dev_name = "bl_extern";
  2224. i2c_bus = "i2c_bus_3";
  2225. status = "disabled";
  2226.  
  2227. extern_1 {
  2228. type = <0x02>;
  2229. index = <0x01>;
  2230. dim_max_min = <0xff 0x0a>;
  2231. extern_name = "mipi_lt070me05";
  2232. };
  2233.  
  2234. extern_0 {
  2235. i2c_address = <0x2c>;
  2236. type = <0x00>;
  2237. index = <0x00>;
  2238. dim_max_min = <0xff 0x0a>;
  2239. extern_name = "i2c_lp8556";
  2240. };
  2241. };
  2242.  
  2243. d_tsensor@ff800228 {
  2244. compatible = "amlogic, r1p1-tsensor";
  2245. clocks = <0x02 0xd6>;
  2246. cal_d = <0x24c3>;
  2247. #thermal-sensor-cells = <0x01>;
  2248. clock-names = "ts_comp";
  2249. cal_b = <0x1a8>;
  2250. rtemp = <0x1c138>;
  2251. status = "okay";
  2252. interrupts = <0x00 0x24 0x00>;
  2253. phandle = <0x90>;
  2254. device_name = "meson-dthermal";
  2255. reg = <0xff634c00 0x50 0xff800230 0x04>;
  2256. cal_type = <0x01>;
  2257. cal_c = <0xc57>;
  2258. cal_a = <0x144>;
  2259. };
  2260.  
  2261. dummy-battery {
  2262. compatible = "amlogic, dummy-battery";
  2263. status = "okay";
  2264. };
  2265.  
  2266. fb {
  2267. mem_alloc = <0x00>;
  2268. compatible = "amlogic, meson-sm1";
  2269. clocks = <0x02 0xc9>;
  2270. dev_name = "meson-fb";
  2271. clock-names = "vpu_clkc";
  2272. status = "okay";
  2273. interrupts = <0x00 0x03 0x01 0x00 0x38 0x01 0x00 0x59 0x01>;
  2274. display_size_default = <0x780 0x438 0x780 0x870 0x20>;
  2275. memory-region = <0x3a>;
  2276. mem_size = <0x800000 0x1980000 0x100000 0x100000 0x800000>;
  2277. scale_mode = <0x01>;
  2278. phandle = <0xf5>;
  2279. pxp_mode = <0x00>;
  2280. display_mode_default = "1080p60hz";
  2281. interrupt-names = "viu-vsync\0viu2-vsync\0rdma";
  2282. logo_addr = "0x7f800000";
  2283. };
  2284.  
  2285. cvbsout {
  2286. compatible = "amlogic, cvbsout-sm1";
  2287. clocks = <0x02 0x55 0x02 0x4e 0x02 0x4f 0x02 0x57>;
  2288. dev_name = "cvbsout";
  2289. performance = <0x1bf0 0x09 0x1b56 0x333 0x1b12 0x8080 0x1b05 0xfd 0x1c59 0xf850 0xffff 0x00>;
  2290. performance_revB_telecom = <0x1bf0 0x09 0x1b56 0x546 0x1b12 0x8080 0x1b05 0x09 0x1c59 0xf850 0xffff 0x00>;
  2291. clock-names = "venci_top_gate\0venci_0_gate\0venci_1_gate\0vdac_clk_gate";
  2292. status = "okay";
  2293. performance_sarft = <0x1bf0 0x09 0x1b56 0x333 0x1b12 0x00 0x1b05 0x09 0x1c59 0xfc48 0xffff 0x00>;
  2294. clk_path = <0x00>;
  2295. };
  2296.  
  2297. aocec {
  2298. compatible = "amlogic, aocec-sm1";
  2299. vendor_name = "Amlogic";
  2300. arc_port_mask = <0x02>;
  2301. reg-names = "ao_exit\0ao\0periphs";
  2302. ee_cec;
  2303. pinctrl-1 = <0x38>;
  2304. product_desc = "SM1";
  2305. status = "okay";
  2306. interrupts = <0x00 0xcb 0x01 0x00 0xc7 0x01>;
  2307. phandle = <0xf0>;
  2308. port_num = <0x01>;
  2309. cec_osd_string = "AML_MBOX";
  2310. cec_version = <0x05>;
  2311. pinctrl-2 = <0x38>;
  2312. vendor_id = <0x00>;
  2313. device_name = "aocec";
  2314. reg = <0xff80023c 0x04 0xff800000 0x400 0xff634400 0x70>;
  2315. pinctrl-0 = <0x37>;
  2316. interrupt-names = "hdmi_aocecb\0hdmi_aocec";
  2317. pinctrl-names = "default\0hdmitx_aocecb\0cec_pin_sleep";
  2318. };
  2319.  
  2320. cpu_opp_table0 {
  2321. compatible = "operating-points-v2";
  2322. phandle = <0x0d>;
  2323. opp-shared;
  2324.  
  2325. opp06 {
  2326. opp-microvolt = <0xbe6e0>;
  2327. opp-hz = <0x00 0x53af5700>;
  2328. };
  2329.  
  2330. opp04 {
  2331. opp-microvolt = <0xb4aa0>;
  2332. opp-hz = <0x00 0x3b9aca00>;
  2333. };
  2334.  
  2335. opp02 {
  2336. opp-microvolt = <0xb2390>;
  2337. opp-hz = <0x00 0x1dcd6500>;
  2338. };
  2339.  
  2340. opp10 {
  2341. opp-microvolt = <0xe7ef0>;
  2342. opp-hz = <0x00 0x6b49d200>;
  2343. };
  2344.  
  2345. opp00 {
  2346. opp-microvolt = <0xb2390>;
  2347. opp-hz = <0x00 0x5f5e100>;
  2348. };
  2349.  
  2350. opp09 {
  2351. opp-microvolt = <0xdbba0>;
  2352. opp-hz = <0x00 0x6590fa00>;
  2353. };
  2354.  
  2355. opp07 {
  2356. opp-microvolt = <0xc5c10>;
  2357. opp-hz = <0x00 0x59682f00>;
  2358. };
  2359.  
  2360. opp05 {
  2361. opp-microvolt = <0xb71b0>;
  2362. opp-hz = <0x00 0x47868c00>;
  2363. };
  2364.  
  2365. opp03 {
  2366. opp-microvolt = <0xb2390>;
  2367. opp-hz = <0x00 0x27c19cc0>;
  2368. };
  2369.  
  2370. opp11 {
  2371. opp-microvolt = <0xf6950>;
  2372. opp-hz = <0x00 0x71b9c500>;
  2373. };
  2374.  
  2375. opp01 {
  2376. opp-microvolt = <0xb2390>;
  2377. opp-hz = <0x00 0xee6b280>;
  2378. };
  2379.  
  2380. opp08 {
  2381. opp-microvolt = <0xcf850>;
  2382. opp-hz = <0x00 0x5fd82200>;
  2383. };
  2384. };
  2385.  
  2386. usb3phy@ffe09080 {
  2387. u3-ctrl-iso-shift = <0x12>;
  2388. compatible = "amlogic, amlogic-new-usb3-v2";
  2389. clocks = <0x02 0x18>;
  2390. usb2-phy-reg-size = <0x80>;
  2391. usb2-phy-reg = <0xffe09000>;
  2392. clock-names = "pcie_refpll";
  2393. portnum = <0x01>;
  2394. status = "okay";
  2395. interrupts = <0x00 0x10 0x04>;
  2396. phandle = <0x14>;
  2397. phy-reg = <0xff646000>;
  2398. u3-hhi-mem-pd-shift = <0x1a>;
  2399. reg = <0xffe09080 0x20 0xffd01008 0x100>;
  2400. pwr-ctl = <0x01>;
  2401. otg = <0x00>;
  2402. u3-hhi-mem-pd-mask = <0x0f>;
  2403. u3-ctrl-sleep-shift = <0x12>;
  2404. phy-reg-size = <0x2000>;
  2405. };
  2406.  
  2407. thermal-zones {
  2408.  
  2409. ddr_thermal {
  2410. thermal-sensors = <0x90 0x01>;
  2411. polling-delay = <0x7d0>;
  2412. polling-delay-passive = <0x3e8>;
  2413. phandle = <0x10c>;
  2414. sustainable-power = <0x582>;
  2415.  
  2416. trips {
  2417.  
  2418. trip-point@3 {
  2419. hysteresis = <0x3e8>;
  2420. temperature = <0x1adb0>;
  2421. type = "critical";
  2422. phandle = <0x110>;
  2423. };
  2424.  
  2425. trip-point@1 {
  2426. hysteresis = <0x1388>;
  2427. temperature = <0x124f8>;
  2428. type = "passive";
  2429. phandle = <0x10e>;
  2430. };
  2431.  
  2432. trip-point@2 {
  2433. hysteresis = <0x1388>;
  2434. temperature = <0x14c08>;
  2435. type = "hot";
  2436. phandle = <0x10f>;
  2437. };
  2438.  
  2439. trip-point@0 {
  2440. hysteresis = <0x1388>;
  2441. temperature = <0xea60>;
  2442. type = "passive";
  2443. phandle = <0x10d>;
  2444. };
  2445. };
  2446. };
  2447.  
  2448. soc_thermal {
  2449. thermal-sensors = <0x8a 0x00>;
  2450. polling-delay = <0x3e8>;
  2451. polling-delay-passive = <0x64>;
  2452. phandle = <0x108>;
  2453. sustainable-power = <0x582>;
  2454.  
  2455. trips {
  2456.  
  2457. trip-point@3 {
  2458. hysteresis = <0x3e8>;
  2459. temperature = <0x1adb0>;
  2460. type = "critical";
  2461. phandle = <0x10b>;
  2462. };
  2463.  
  2464. trip-point@1 {
  2465. hysteresis = <0x1388>;
  2466. temperature = <0x124f8>;
  2467. type = "passive";
  2468. phandle = <0x8b>;
  2469. };
  2470.  
  2471. trip-point@2 {
  2472. hysteresis = <0x1388>;
  2473. temperature = <0x14c08>;
  2474. type = "hot";
  2475. phandle = <0x10a>;
  2476. };
  2477.  
  2478. trip-point@0 {
  2479. hysteresis = <0x1388>;
  2480. temperature = <0xea60>;
  2481. type = "passive";
  2482. phandle = <0x109>;
  2483. };
  2484. };
  2485.  
  2486. cooling-maps {
  2487.  
  2488. cpufreq_cooling_map {
  2489. trip = <0x8b>;
  2490. contribution = <0x400>;
  2491. cooling-device = <0x8c 0x00 0x04>;
  2492. };
  2493.  
  2494. gpucore_cooling_map {
  2495. trip = <0x8b>;
  2496. contribution = <0x400>;
  2497. cooling-device = <0x8f 0x00 0x02>;
  2498. };
  2499.  
  2500. cpucore_cooling_map {
  2501. trip = <0x8b>;
  2502. contribution = <0x400>;
  2503. cooling-device = <0x8d 0x00 0x03>;
  2504. };
  2505.  
  2506. gpufreq_cooling_map {
  2507. trip = <0x8b>;
  2508. contribution = <0x400>;
  2509. cooling-device = <0x8e 0x00 0x04>;
  2510. };
  2511. };
  2512. };
  2513. };
  2514.  
  2515. hx-spec {
  2516. ddr_size = <0x761>;
  2517. };
  2518.  
  2519. mhu@c883c400 {
  2520. compatible = "amlogic, meson_mhu";
  2521. #mbox-cells = <0x01>;
  2522. interrupts = <0x00 0xd1 0x01 0x00 0xd2 0x01>;
  2523. mbox-names = "cpu_to_scp_low\0cpu_to_scp_high";
  2524. mboxes = <0x10 0x00 0x10 0x01>;
  2525. phandle = <0x10>;
  2526. reg = <0xff63c400 0x4c 0xfffe7000 0x800>;
  2527. };
  2528.  
  2529. usb2phy@ffe09000 {
  2530. pll-setting-5 = <0x8000fff>;
  2531. compatible = "amlogic, amlogic-new-usb2-v2";
  2532. version = <0x02>;
  2533. pll-setting-3 = <0xac5f69e5>;
  2534. u2-hhi-mem-pd-shift = <0x1e>;
  2535. u2-hhi-mem-pd-mask = <0x03>;
  2536. pll-setting-1 = <0x9400414>;
  2537. u2-ctrl-sleep-shift = <0x11>;
  2538. pll-setting-8 = <0xe000c>;
  2539. u2-ctrl-iso-shift = <0x11>;
  2540. portnum = <0x02>;
  2541. pll-setting-6 = <0x78000>;
  2542. status = "okay";
  2543. pll-setting-4 = <0xfe18>;
  2544. phandle = <0x13>;
  2545. pll-setting-2 = <0x927e0000>;
  2546. reg = <0xffe09000 0x80 0xffd01008 0x100 0xff636000 0x2000 0xff63a000 0x2000>;
  2547. pwr-ctl = <0x01>;
  2548. pll-setting-7 = <0xe0004>;
  2549. };
  2550.  
  2551. p_tsensor@ff634594 {
  2552. compatible = "amlogic, r1p1-tsensor";
  2553. clocks = <0x02 0xd6>;
  2554. cal_d = <0x24c3>;
  2555. #thermal-sensor-cells = <0x01>;
  2556. clock-names = "ts_comp";
  2557. cal_b = <0x1a8>;
  2558. rtemp = <0x1c138>;
  2559. status = "okay";
  2560. interrupts = <0x00 0x23 0x00>;
  2561. phandle = <0x8a>;
  2562. device_name = "meson-pthermal";
  2563. reg = <0xff634800 0x50 0xff800268 0x04>;
  2564. cal_type = <0x01>;
  2565. cal_c = <0xc57>;
  2566. cal_a = <0x144>;
  2567. };
  2568.  
  2569. rdma {
  2570. compatible = "amlogic, meson, rdma";
  2571. dev_name = "amlogic-rdma";
  2572. status = "okay";
  2573. interrupts = <0x00 0x59 0x01>;
  2574. interrupt-names = "rdma";
  2575. };
  2576.  
  2577. lcd_extern {
  2578. compatible = "amlogic, lcd_extern";
  2579. dev_name = "lcd_extern";
  2580. i2c_bus = "i2c_bus_0";
  2581. key_valid = <0x00>;
  2582. status = "okay";
  2583.  
  2584. extern_1 {
  2585. cmd_size = <0xff>;
  2586. type = <0x02>;
  2587. status = "okay";
  2588. init_off = <0x05 0x01 0x28 0xff 0x0a 0x05 0x01 0x10 0xff 0x96 0xff 0xff>;
  2589. index = <0x01>;
  2590. extern_name = "mipi_default";
  2591. init_on = <0x23 0x02 0xe0 0x00 0x23 0x02 0xe1 0x93 0x23 0x02 0xe2 0x65 0x23 0x02 0xe3 0xf8 0x23 0x02 0x80 0x03 0x23 0x02 0xe0 0x01 0x23 0x02 0x0c 0x74 0x23 0x02 0x17 0x00 0x23 0x02 0x18 0xef 0x23 0x02 0x19 0x00 0x23 0x02 0x1a 0x00 0x23 0x02 0x1b 0xef 0x23 0x02 0x1c 0x00 0x23 0x02 0x1f 0x70 0x23 0x02 0x20 0x2d 0x23 0x02 0x21 0x2d 0x23 0x02 0x22 0x7e 0x23 0x02 0x26 0xf3 0x23 0x02 0x37 0x09 0x23 0x02 0x38 0x04 0x23 0x02 0x39 0x00 0x23 0x02 0x3a 0x01 0x23 0x02 0x3c 0x90 0x23 0x02 0x3d 0xff 0x23 0x02 0x3e 0xff 0x23 0x02 0x3f 0xff 0x23 0x02 0x40 0x02 0x23 0x02 0x41 0x80 0x23 0x02 0x42 0x99 0x23 0x02 0x43 0x14 0x23 0x02 0x44 0x19 0x23 0x02 0x45 0x5a 0x23 0x02 0x4b 0x04 0x23 0x02 0x55 0x02 0x23 0x02 0x56 0x01 0x23 0x02 0x57 0x69 0x23 0x02 0x58 0x0a 0x23 0x02 0x59 0x0a 0x23 0x02 0x5a 0x2e 0x23 0x02 0x5b 0x19 0x23 0x02 0x5c 0x15 0x23 0x02 0x5d 0x77 0x23 0x02 0x5e 0x56 0x23 0x02 0x5f 0x45 0x23 0x02 0x60 0x38 0x23 0x02 0x61 0x35 0x23 0x02 0x62 0x27 0x23 0x02 0x63 0x2d 0x23 0x02 0x64 0x18 0x23 0x02 0x65 0x33 0x23 0x02 0x66 0x34 0x23 0x02 0x67 0x35 0x23 0x02 0x68 0x56 0x23 0x02 0x69 0x45 0x23 0x02 0x6a 0x4f 0x23 0x02 0x6b 0x42 0x23 0x02 0x6c 0x40 0x23 0x02 0x6d 0x34 0x23 0x02 0x6e 0x25 0x23 0x02 0x6f 0x02 0x23 0x02 0x70 0x77 0x23 0x02 0x71 0x56 0x23 0x02 0x72 0x45 0x23 0x02 0x73 0x38 0x23 0x02 0x74 0x35 0x23 0x02 0x75 0x27 0x23 0x02 0x76 0x2d 0x23 0x02 0x77 0x18 0x23 0x02 0x78 0x33 0x23 0x02 0x79 0x34 0x23 0x02 0x7a 0x35 0x23 0x02 0x7b 0x56 0x23 0x02 0x7c 0x45 0x23 0x02 0x7d 0x4f 0x23 0x02 0x7e 0x42 0x23 0x02 0x7f 0x40 0x23 0x02 0x80 0x34 0x23 0x02 0x81 0x25 0x23 0x02 0x82 0x02 0x23 0x02 0xe0 0x02 0x23 0x02 0x00 0x53 0x23 0x02 0x01 0x55 0x23 0x02 0x02 0x55 0x23 0x02 0x03 0x51 0x23 0x02 0x04 0x77 0x23 0x02 0x05 0x57 0x23 0x02 0x06 0x1f 0x23 0x02 0x07 0x4f 0x23 0x02 0x08 0x4d 0x23 0x02 0x09 0x1f 0x23 0x02 0x0a 0x4b 0x23 0x02 0x0b 0x49 0x23 0x02 0x0c 0x1f 0x23 0x02 0x0d 0x47 0x23 0x02 0x0e 0x45 0x23 0x02 0x0f 0x41 0x23 0x02 0x10 0x1f 0x23 0x02 0x11 0x1f 0x23 0x02 0x12 0x1f 0x23 0x02 0x13 0x55 0x23 0x02 0x14 0x1f 0x23 0x02 0x15 0x1f 0x23 0x02 0x16 0x52 0x23 0x02 0x17 0x55 0x23 0x02 0x18 0x55 0x23 0x02 0x19 0x50 0x23 0x02 0x1a 0x77 0x23 0x02 0x1b 0x57 0x23 0x02 0x1c 0x1f 0x23 0x02 0x1d 0x4e 0x23 0x02 0x1e 0x4c 0x23 0x02 0x1f 0x1f 0x23 0x02 0x20 0x4a 0x23 0x02 0x21 0x48 0x23 0x02 0x22 0x1f 0x23 0x02 0x23 0x46 0x23 0x02 0x24 0x44 0x23 0x02 0x25 0x40 0x23 0x02 0x26 0x1f 0x23 0x02 0x27 0x1f 0x23 0x02 0x28 0x1f 0x23 0x02 0x29 0x1f 0x23 0x02 0x2a 0x1f 0x23 0x02 0x2b 0x55 0x23 0x02 0x2c 0x12 0x23 0x02 0x2d 0x15 0x23 0x02 0x2e 0x15 0x23 0x02 0x2f 0x00 0x23 0x02 0x30 0x37 0x23 0x02 0x31 0x17 0x23 0x02 0x32 0x1f 0x23 0x02 0x33 0x08 0x23 0x02 0x34 0x0a 0x23 0x02 0x35 0x1f 0x23 0x02 0x36 0x0c 0x23 0x02 0x37 0x0e 0x23 0x02 0x38 0x1f 0x23 0x02 0x39 0x04 0x23 0x02 0x3a 0x06 0x23 0x02 0x3b 0x10 0x23 0x02 0x3c 0x1f 0x23 0x02 0x3d 0x1f 0x23 0x02 0x3e 0x1f 0x23 0x02 0x3f 0x15 0x23 0x02 0x40 0x1f 0x23 0x02 0x41 0x1f 0x23 0x02 0x42 0x13 0x23 0x02 0x43 0x15 0x23 0x02 0x44 0x15 0x23 0x02 0x45 0x01 0x23 0x02 0x46 0x37 0x23 0x02 0x47 0x17 0x23 0x02 0x48 0x1f 0x23 0x02 0x49 0x09 0x23 0x02 0x4a 0x0b 0x23 0x02 0x4b 0x1f 0x23 0x02 0x4c 0x0d 0x23 0x02 0x4d 0x0f 0x23 0x02 0x4e 0x1f 0x23 0x02 0x4f 0x05 0x23 0x02 0x50 0x07 0x23 0x02 0x51 0x11 0x23 0x02 0x52 0x1f 0x23 0x02 0x53 0x1f 0x23 0x02 0x54 0x1f 0x23 0x02 0x55 0x1f 0x23 0x02 0x56 0x1f 0x23 0x02 0x57 0x15 0x23 0x02 0x58 0x40 0x23 0x02 0x59 0x00 0x23 0x02 0x5a 0x00 0x23 0x02 0x5b 0x10 0x23 0x02 0x5c 0x14 0x23 0x02 0x5d 0x40 0x23 0x02 0x5e 0x01 0x23 0x02 0x5f 0x02 0x23 0x02 0x60 0x40 0x23 0x02 0x61 0x03 0x23 0x02 0x62 0x04 0x23 0x02 0x63 0x7a 0x23 0x02 0x64 0x7a 0x23 0x02 0x65 0x74 0x23 0x02 0x66 0x16 0x23 0x02 0x67 0xb4 0x23 0x02 0x68 0x16 0x23 0x02 0x69 0x7a 0x23 0x02 0x6a 0x7a 0x23 0x02 0x6b 0x0c 0x23 0x02 0x6c 0x00 0x23 0x02 0x6d 0x04 0x23 0x02 0x6e 0x04 0x23 0x02 0x6f 0x88 0x23 0x02 0x70 0x00 0x23 0x02 0x71 0x00 0x23 0x02 0x72 0x06 0x23 0x02 0x73 0x7b 0x23 0x02 0x74 0x00 0x23 0x02 0x75 0xbc 0x23 0x02 0x76 0x00 0x23 0x02 0x77 0x04 0x23 0x02 0x78 0x2c 0x23 0x02 0x79 0x00 0x23 0x02 0x7a 0x00 0x23 0x02 0x7b 0x00 0x23 0x02 0x7c 0x00 0x23 0x02 0x7d 0x03 0x23 0x02 0x7e 0x7b 0x23 0x02 0xe0 0x04 0x23 0x02 0x09 0x11 0x23 0x02 0x0e 0x48 0x23 0x02 0x2b 0x2b 0x23 0x02 0x2e 0x44 0x23 0x02 0xe0 0x00 0x23 0x02 0xe6 0x02 0x23 0x02 0xe7 0x0c 0x05 0x01 0x11 0xff 0x78 0x05 0x01 0x29 0x05 0x01 0x35 0xff 0x14 0xff 0xff>;
  2592. };
  2593.  
  2594. extern_6 {
  2595. cmd_size = <0xff>;
  2596. type = <0x02>;
  2597. status = "okay";
  2598. init_off = <0xff 0xc8 0xff 0xff>;
  2599. index = <0x06>;
  2600. extern_name = "mipi_default";
  2601. init_on = <0x15 0x02 0x80 0xac 0x15 0x02 0x81 0xb8 0x15 0x02 0x82 0x09 0x15 0x02 0x83 0x78 0x15 0x02 0x84 0x7f 0x15 0x02 0x85 0xbb 0x15 0x02 0x86 0x70 0xff 0x28 0xff 0xff>;
  2602. };
  2603.  
  2604. extern_0 {
  2605. cmd_size = <0xff>;
  2606. type = <0x02>;
  2607. status = "okay";
  2608. init_off = <0x05 0x01 0x28 0xff 0x0a 0x05 0x01 0x10 0xff 0x96 0xff 0xff>;
  2609. index = <0x00>;
  2610. extern_name = "mipi_default";
  2611. init_on = <0xff 0x0a 0x05 0x01 0x11 0xff 0x78 0x05 0x01 0x29 0xff 0xff>;
  2612. };
  2613. };
  2614.  
  2615. fd650 {
  2616. compatible = "fdhisi,fd650";
  2617. scl-gpio = <0x62 0x06 0x00>;
  2618. sda-gpio = <0x62 0x07 0x00>;
  2619. status = "okay";
  2620. };
  2621.  
  2622. serial@ffd23000 {
  2623. compatible = "amlogic, meson-uart";
  2624. clocks = <0x15 0x02 0x3c>;
  2625. fifosize = <0x40>;
  2626. clock-names = "clk_uart\0clk_gate";
  2627. status = "disabled";
  2628. interrupts = <0x00 0x4b 0x01>;
  2629. phandle = <0xec>;
  2630. reg = <0xffd23000 0x18>;
  2631. pinctrl-0 = <0x30>;
  2632. pinctrl-names = "default";
  2633. };
  2634.  
  2635. sd@ffe05000 {
  2636. cap-mmc-highspeed;
  2637. pinctrl-5 = <0x3f 0x44>;
  2638. compatible = "amlogic, meson-mmc-sm1";
  2639. clocks = <0x02 0x34 0x02 0x6e 0x02 0x02 0x02 0x05 0x15>;
  2640. pinctrl-3 = <0x42 0x40 0x43>;
  2641. cap-sd-highspeed;
  2642. pinctrl-1 = <0x40>;
  2643. clock-names = "core\0clkin0\0clkin1\0clkin2\0xtal";
  2644. pinctrl-8 = <0x42 0x43>;
  2645. pinctrl-6 = <0x42 0x43>;
  2646. status = "okay";
  2647. interrupts = <0x00 0xbe 0x01>;
  2648. disable-wp;
  2649. bus-width = <0x04>;
  2650. pinctrl-4 = <0x42 0x41 0x43>;
  2651. phandle = <0xf8>;
  2652. pinctrl-2 = <0x41>;
  2653. reg = <0xffe05000 0x800>;
  2654. pinctrl-0 = <0x3f>;
  2655. max-frequency = <0x5f5e100>;
  2656. pinctrl-7 = <0x3f 0x44>;
  2657. pinctrl-names = "sd_all_pins\0sd_clk_cmd_pins\0sd_1bit_pins\0sd_clk_cmd_uart_pins\0sd_1bit_uart_pins\0sd_to_ao_uart_pins\0ao_to_sd_uart_pins\0sd_to_ao_jtag_pins\0ao_to_sd_jtag_pins";
  2658.  
  2659. sd {
  2660. max_req_size = <0x20000>;
  2661. jtag_pin = <0x17 0x2a 0x00>;
  2662. gpio_dat3 = <0x17 0x2d 0x00>;
  2663. f_min = <0x61a80>;
  2664. card_type = <0x05>;
  2665. f_max = <0x2faf080>;
  2666. ocr_avail = <0x200080>;
  2667. pinname = "sd";
  2668. gpio_cd = <0x17 0x30 0x00>;
  2669. caps = "MMC_CAP_4_BIT_DATA\0MMC_CAP_MMC_HIGHSPEED\0MMC_CAP_SD_HIGHSPEED";
  2670. };
  2671. };
  2672.  
  2673. timer {
  2674. compatible = "arm,armv7-timer";
  2675. interrupts = <0x01 0x0d 0xff08 0x01 0x0e 0xff08 0x01 0x0b 0xff08 0x01 0x0a 0xff08>;
  2676. };
  2677.  
  2678. amdolby_vision {
  2679. compatible = "amlogic, dolby_vision_sm1";
  2680. dev_name = "aml_amdolby_vision_driver";
  2681. status = "okay";
  2682. tv_mode = <0x00>;
  2683. };
  2684.  
  2685. ethernet@ff3f0000 {
  2686. analog_val = <0x20200000 0xc000 0x23>;
  2687. pll_val = <0x9c0040a 0x927e0000 0xac5f49e5>;
  2688. compatible = "amlogic, g12a-eth-dwmac\0snps,dwmac";
  2689. clocks = <0x02 0x38>;
  2690. reg-names = "eth_base\0eth_cfg\0eth_pll";
  2691. internal_phy = <0x01>;
  2692. pinctrl-1 = <0x12>;
  2693. clock-names = "ethclk81";
  2694. status = "okay";
  2695. interrupts = <0x00 0x08 0x01>;
  2696. phandle = <0x99>;
  2697. mc_val = <0x4be04>;
  2698. reg = <0xff3f0000 0x10000 0xff634540 0x08 0xff64c000 0xa0>;
  2699. pinctrl-0 = <0x11>;
  2700. interrupt-names = "macirq";
  2701. pinctrl-names = "internal_eth_pins\0internal_gpio_pins";
  2702. };
  2703.  
  2704. cpu_info {
  2705. compatible = "amlogic, cpuinfo";
  2706. cpuinfo_cmd = <0x82000044>;
  2707. status = "okay";
  2708. };
  2709.  
  2710. dummy-charger {
  2711. compatible = "amlogic, dummy-charger";
  2712. status = "okay";
  2713. };
  2714.  
  2715. sdio@ffe03000 {
  2716. cap-mmc-highspeed;
  2717. compatible = "amlogic, meson-mmc-sm1";
  2718. clocks = <0x02 0x33 0x02 0x6a 0x02 0x02 0x02 0x05 0x15>;
  2719. cap-sd-highspeed;
  2720. pinctrl-1 = <0x46>;
  2721. clock-names = "core\0clkin0\0clkin1\0clkin2\0xtal";
  2722. status = "okay";
  2723. interrupts = <0x00 0xbd 0x04>;
  2724. disable-wp;
  2725. bus-width = <0x04>;
  2726. phandle = <0xf9>;
  2727. reg = <0xffe03000 0x800>;
  2728. pinctrl-0 = <0x45>;
  2729. max-frequency = <0x5f5e100>;
  2730. pinctrl-names = "sdio_all_pins\0sdio_clk_cmd_pins";
  2731.  
  2732. sdio {
  2733. max_req_size = <0x20000>;
  2734. f_min = <0x61a80>;
  2735. card_type = <0x03>;
  2736. f_max = <0x5f5e100>;
  2737. ocr_avail = <0x200080>;
  2738. pinname = "sdio";
  2739. caps = "MMC_CAP_4_BIT_DATA\0MMC_CAP_MMC_HIGHSPEED\0MMC_CAP_SD_HIGHSPEED\0MMC_CAP_NONREMOVABLE\0MMC_CAP_UHS_SDR12\0MMC_CAP_UHS_SDR25\0MMC_CAP_UHS_SDR50\0MMC_CAP_UHS_SDR104\0MMC_PM_KEEP_POWER\0MMC_CAP_SDIO_IRQ";
  2740. };
  2741. };
  2742.  
  2743. deinterlace {
  2744. compatible = "amlogic, deinterlace";
  2745. clocks = <0x02 0x9b 0x02 0x9c>;
  2746. nr10bit-support = <0x01>;
  2747. nrds-enable = <0x01>;
  2748. flag_cma = <0x01>;
  2749. clock-range = <0x14e 0x29b>;
  2750. pps-enable = <0x01>;
  2751. clock-names = "vpu_clkb_tmp_composite\0vpu_clkb_composite";
  2752. post-wr-support = <0x01>;
  2753. status = "okay";
  2754. interrupts = <0x00 0x2e 0x01 0x00 0x28 0x01>;
  2755. memory-region = <0x69>;
  2756. interrupt-names = "pre_irq\0post_irq";
  2757. buffer-size = <0x3e2c40>;
  2758. };
  2759.  
  2760. amhdmitx {
  2761. compatible = "amlogic, amhdmitx";
  2762. clocks = <0x02 0x55 0x02 0x4e 0x02 0x4f 0x02 0x95 0x02 0x8c>;
  2763. dev_name = "amhdmitx";
  2764. pinctrl-1 = <0x35 0x36>;
  2765. clock-names = "venci_top_gate\0venci_0_gate\0venci_1_gate\0hdmi_vapb_clk\0hdmi_vpu_clk";
  2766. status = "okay";
  2767. vend-data = <0x32>;
  2768. interrupts = <0x00 0x39 0x01>;
  2769. phandle = <0xef>;
  2770. pinctrl-0 = <0x33 0x34>;
  2771. ic_type = <0x0c>;
  2772. interrupt-names = "hdmitx_hpd";
  2773. pinctrl-names = "default\0hdmitx_i2c";
  2774.  
  2775. vend_data {
  2776. vendor_name = "Amlogic";
  2777. phandle = <0x32>;
  2778. vendor_id = <0x00>;
  2779. };
  2780. };
  2781.  
  2782. meson-cooldev@0 {
  2783. compatible = "amlogic, meson-cooldev";
  2784. status = "okay";
  2785. phandle = <0x107>;
  2786. device_name = "mcooldev";
  2787.  
  2788. gpufreq_cool0 {
  2789. phandle = <0x8e>;
  2790. #cooling-cells = <0x02>;
  2791. };
  2792.  
  2793. cpufreq_cool0 {
  2794. phandle = <0x8c>;
  2795. #cooling-cells = <0x02>;
  2796. };
  2797.  
  2798. gpucore_cool0 {
  2799. phandle = <0x8f>;
  2800. #cooling-cells = <0x02>;
  2801. };
  2802.  
  2803. cooling_devices {
  2804.  
  2805. cpucore_cool_cluster0 {
  2806. node_name = "cpucore_cool0";
  2807. device_type = "cpucore";
  2808. dyn_coeff = <0x00>;
  2809. cluster_id = <0x00>;
  2810. min_state = <0x01>;
  2811. };
  2812.  
  2813. gpufreq_cool {
  2814. node_name = "gpufreq_cool0";
  2815. device_type = "gpufreq";
  2816. dyn_coeff = <0xd7>;
  2817. cluster_id = <0x00>;
  2818. gpu_pp = <0x02>;
  2819. min_state = <0x190>;
  2820. };
  2821.  
  2822. cpufreq_cool_cluster0 {
  2823. node_name = "cpufreq_cool0";
  2824. device_type = "cpufreq";
  2825. dyn_coeff = <0x7d>;
  2826. cluster_id = <0x00>;
  2827. min_state = <0xf4240>;
  2828. };
  2829.  
  2830. gpucore_cool {
  2831. node_name = "gpucore_cool0";
  2832. device_type = "gpucore";
  2833. dyn_coeff = <0x00>;
  2834. cluster_id = <0x00>;
  2835. min_state = <0x01>;
  2836. };
  2837. };
  2838.  
  2839. cpucore_cool0 {
  2840. phandle = <0x8d>;
  2841. #cooling-cells = <0x02>;
  2842. };
  2843. };
  2844.  
  2845. ram-dump {
  2846. compatible = "amlogic, ram_dump";
  2847. reg-names = "PREG_STICKY_REG8";
  2848. status = "okay";
  2849. reg = <0xff6345e0 0x04>;
  2850. };
  2851.  
  2852. dwc3@ff500000 {
  2853. usb-phy = <0x13 0x14>;
  2854. compatible = "synopsys, dwc3";
  2855. clocks = <0x02 0x41>;
  2856. clock-names = "dwc_general";
  2857. clock-src = "usb3.0";
  2858. status = "okay";
  2859. interrupts = <0x00 0x1e 0x04>;
  2860. phandle = <0xcb>;
  2861. reg = <0xff500000 0x100000>;
  2862. cpu-type = "gxl";
  2863. };
  2864.  
  2865. hevc_enc {
  2866. compatible = "cnm, HevcEnc";
  2867. dev_name = "HevcEnc";
  2868. ranges;
  2869. status = "okay";
  2870. #address-cells = <0x01>;
  2871. interrupts = <0x00 0xbb 0x01>;
  2872. #size-cells = <0x01>;
  2873. interrupt-names = "wave420l_irq";
  2874.  
  2875. io_reg_base {
  2876. reg = <0xff610000 0x4000>;
  2877. };
  2878. };
  2879.  
  2880. mesonstream {
  2881. compatible = "amlogic, codec, streambuf";
  2882. clocks = <0x02 0x40 0x02 0x39 0x02 0x43 0x02 0x22 0x02 0x0b 0x02 0xa5 0x02 0xae 0x02 0xb7 0x02 0xc0>;
  2883. dev_name = "mesonstream";
  2884. clock-names = "parser_top\0demux\0ahbarb0\0vdec\0clk_81\0clk_vdec_mux\0clk_hcodec_mux\0clk_hevc_mux\0clk_hevcb_mux";
  2885. status = "okay";
  2886. };
  2887.  
  2888. auge_sound {
  2889. compatible = "amlogic, g12a-sound-card";
  2890. aml-audio-card,name = "AML-AUGESOUND";
  2891. avout_mute-gpios = <0x62 0x02 0x00>;
  2892.  
  2893. aml-audio-card,dai-link@0 {
  2894. suffix-name = "alsaPORT-pcm";
  2895. frame-master = <0x80>;
  2896. bitclock-master = <0x80>;
  2897. mclk-fs = <0x200>;
  2898. format = "dsp_a";
  2899.  
  2900. cpu {
  2901. dai-tdm-slot-width = <0x20>;
  2902. system-clock-frequency = <0x1770000>;
  2903. dai-tdm-slot-tx-mask = <0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01>;
  2904. phandle = <0x102>;
  2905. sound-dai = <0x80>;
  2906. dai-tdm-slot-rx-mask = <0x01 0x01 0x01 0x01 0x01 0x01 0x01 0x01>;
  2907. dai-tdm-slot-num = <0x08>;
  2908. };
  2909.  
  2910. codec {
  2911. phandle = <0x103>;
  2912. sound-dai = <0x81 0x81>;
  2913. };
  2914. };
  2915.  
  2916. aml-audio-card,dai-link@7 {
  2917. continuous-clock;
  2918. suffix-name = "alsaPORT-loopback";
  2919. mclk-fs = <0x100>;
  2920.  
  2921. cpu {
  2922. system-clock-frequency = <0xbb8000>;
  2923. sound-dai = <0x89>;
  2924. };
  2925.  
  2926. codec {
  2927. sound-dai = <0x81>;
  2928. };
  2929. };
  2930.  
  2931. aml-audio-card,dai-link@5 {
  2932. continuous-clock;
  2933. suffix-name = "alsaPORT-spdifb";
  2934. mclk-fs = <0x80>;
  2935.  
  2936. cpu {
  2937. system-clock-frequency = <0x5dc000>;
  2938. sound-dai = <0x87>;
  2939. };
  2940.  
  2941. codec {
  2942. sound-dai = <0x81>;
  2943. };
  2944. };
  2945.  
  2946. aml-audio-card,dai-link@3 {
  2947. suffix-name = "alsaPORT-pdm";
  2948. mclk-fs = <0x40>;
  2949.  
  2950. cpu {
  2951. sound-dai = <0x85>;
  2952. };
  2953.  
  2954. codec {
  2955. sound-dai = <0x81>;
  2956. };
  2957. };
  2958.  
  2959. aml-audio-card,dai-link@1 {
  2960. suffix-name = "alsaPORT-i2s";
  2961. frame-master = <0x82>;
  2962. bitclock-master = <0x82>;
  2963. mclk-fs = <0x100>;
  2964. format = "i2s";
  2965.  
  2966. cpu {
  2967. dai-tdm-slot-width = <0x20>;
  2968. system-clock-frequency = <0xbb8000>;
  2969. dai-tdm-slot-tx-mask = <0x01 0x01>;
  2970. sound-dai = <0x82>;
  2971. dai-tdm-slot-rx-mask = <0x01 0x01>;
  2972. dai-tdm-slot-num = <0x02>;
  2973. };
  2974.  
  2975. codec {
  2976. phandle = <0x104>;
  2977. sound-dai = <0x81 0x81 0x83>;
  2978. };
  2979. };
  2980.  
  2981. aml-audio-card,dai-link@6 {
  2982. suffix-name = "alsaPORT-earc";
  2983. mclk-fs = <0x100>;
  2984.  
  2985. cpu {
  2986. system-clock-frequency = <0xbb8000>;
  2987. sound-dai = <0x88>;
  2988. };
  2989.  
  2990. codec {
  2991. sound-dai = <0x81>;
  2992. };
  2993. };
  2994.  
  2995. aml-audio-card,dai-link@4 {
  2996. suffix-name = "alsaPORT-spdif";
  2997. mclk-fs = <0x80>;
  2998.  
  2999. cpu {
  3000. system-clock-frequency = <0x5dc000>;
  3001. sound-dai = <0x86>;
  3002. };
  3003.  
  3004. codec {
  3005. sound-dai = <0x81>;
  3006. };
  3007. };
  3008.  
  3009. aml-audio-card,dai-link@2 {
  3010. frame-master = <0x84>;
  3011. bitclock-master = <0x84>;
  3012. mclk-fs = <0x100>;
  3013. format = "i2s";
  3014.  
  3015. cpu {
  3016. dai-tdm-slot-width = <0x20>;
  3017. system-clock-frequency = <0xbb8000>;
  3018. dai-tdm-slot-tx-mask = <0x01 0x01>;
  3019. sound-dai = <0x84>;
  3020. dai-tdm-slot-rx-mask = <0x01 0x01>;
  3021. dai-tdm-slot-num = <0x02>;
  3022. };
  3023.  
  3024. codec {
  3025. phandle = <0x105>;
  3026. sound-dai = <0x81>;
  3027. };
  3028. };
  3029. };
  3030.  
  3031. picdec {
  3032. compatible = "amlogic, picdec";
  3033. dev_name = "picdec";
  3034. status = "okay";
  3035. memory-region = <0x67>;
  3036. };
  3037.  
  3038. gpioleds {
  3039. compatible = "gpio-leds";
  3040. status = "okay";
  3041.  
  3042. sys_led {
  3043. gpios = <0x62 0x0b 0x01>;
  3044. label = "sys_led";
  3045. default-state = "on";
  3046. };
  3047. };
  3048.  
  3049. interrupt-controller@2c001000 {
  3050. compatible = "arm,cortex-a15-gic\0arm,cortex-a9-gic";
  3051. #interrupt-cells = <0x03>;
  3052. #address-cells = <0x00>;
  3053. interrupts = <0x01 0x09 0xf04>;
  3054. phandle = <0x01>;
  3055. reg = <0xffc01000 0x1000 0xffc02000 0x100>;
  3056. interrupt-controller;
  3057. };
  3058.  
  3059. securitykey {
  3060. compatible = "aml, securitykey";
  3061. storage_status = <0x82000065>;
  3062. storage_tell = <0x82000063>;
  3063. storage_remove = <0x82000068>;
  3064. storage_list = <0x82000067>;
  3065. storage_size_func = <0x82000027>;
  3066. storage_set_enctype = <0x8200006a>;
  3067. storage_version = <0x8200006c>;
  3068. storage_block_func = <0x82000025>;
  3069. storage_in_func = <0x82000023>;
  3070. storage_out_func = <0x82000024>;
  3071. storage_read = <0x82000061>;
  3072. storage_write = <0x82000062>;
  3073. storage_query = <0x82000060>;
  3074. storage_verify = <0x82000064>;
  3075. storage_get_enctype = <0x8200006b>;
  3076. };
  3077.  
  3078. nfc@0 {
  3079. compatible = "amlogic, aml_mtd_nand";
  3080. clocks = <0x02 0x35 0x02 0x72>;
  3081. dev_name = "mtdnand";
  3082. plat-names = "bootloader\0nandnormal";
  3083. pinctrl-1 = <0x47>;
  3084. plat-part-0 = <0x49>;
  3085. clock-names = "core\0clkin";
  3086. nand_clk_ctrl = <0xffe07000>;
  3087. status = "disabled";
  3088. interrupts = <0x00 0x22 0x01>;
  3089. phandle = <0xfa>;
  3090. pinctrl-2 = <0x48>;
  3091. reg = <0xffe07800 0x200>;
  3092. plat-part-1 = <0x4a>;
  3093. pinctrl-0 = <0x47>;
  3094. device_id = <0x00>;
  3095. fip_size = <0x200000>;
  3096. plat-num = <0x02>;
  3097. bl_mode = <0x01>;
  3098. fip_copies = <0x04>;
  3099. pinctrl-names = "nand_rb_mod\0nand_norb_mod\0nand_cs_only";
  3100.  
  3101. nandnormal {
  3102. t_rhoh = <0x0f>;
  3103. plane_mode = "twoplane";
  3104. rb_detect = <0x01>;
  3105. partition = <0x4b>;
  3106. t_rea = <0x14>;
  3107. phandle = <0x4a>;
  3108. busy_pad = "rb0";
  3109. part_num = <0x03>;
  3110. timming_mode = "mode5";
  3111. chip_num = <0x02>;
  3112. enable_pad = "ce0";
  3113. bch_mode = "bch8_1k";
  3114. };
  3115.  
  3116. bootloader {
  3117. t_rhoh = <0x0f>;
  3118. rb_detect = <0x01>;
  3119. t_rea = <0x14>;
  3120. phandle = <0x49>;
  3121. busy_pad = "rb0";
  3122. part_num = <0x00>;
  3123. timming_mode = "mode5";
  3124. chip_num = <0x01>;
  3125. enable_pad = "ce0";
  3126. bch_mode = "bch8_1k";
  3127. };
  3128.  
  3129. nand_partition {
  3130. phandle = <0x4b>;
  3131.  
  3132. logo {
  3133. offset = <0x00 0x00>;
  3134. size = <0x00 0x200000>;
  3135. };
  3136.  
  3137. system {
  3138. offset = <0x00 0x00>;
  3139. size = <0x00 0x4000000>;
  3140. };
  3141.  
  3142. tpl {
  3143. offset = <0x00 0x00>;
  3144. size = <0x00 0x00>;
  3145. };
  3146.  
  3147. data {
  3148. offset = <0xffffffff 0xffffffff>;
  3149. size = <0x00 0x00>;
  3150. };
  3151.  
  3152. recovery {
  3153. offset = <0x00 0x00>;
  3154. size = <0x00 0x1000000>;
  3155. };
  3156.  
  3157. boot {
  3158. offset = <0x00 0x00>;
  3159. size = <0x00 0x1000000>;
  3160. };
  3161. };
  3162. };
  3163.  
  3164. vdin1 {
  3165. compatible = "amlogic, vdin";
  3166. tv_bit_mode = <0x01>;
  3167. dev_name = "vdin1";
  3168. flag_cma = <0x00>;
  3169. status = "okay";
  3170. interrupts = <0x00 0x55 0x01>;
  3171. memory-region = <0x39>;
  3172. phandle = <0xf2>;
  3173. rdma-irq = <0x04>;
  3174. vdin_id = <0x01>;
  3175. reserve-iomap = "true";
  3176. };
  3177.  
  3178. canvas {
  3179. compatible = "amlogic, meson, canvas";
  3180. dev_name = "amlogic-canvas";
  3181. status = "okay";
  3182. phandle = <0xf3>;
  3183. reg = <0xff638000 0x2000>;
  3184. };
  3185.  
  3186. locker {
  3187. compatible = "amlogic, audiolocker";
  3188. clocks = <0x1c 0x2d 0x1c 0x2e 0x1c 0x27 0x1c 0x28 0x02 0x0d 0x02 0x0e>;
  3189. clock-names = "lock_out\0lock_in\0out_src\0in_src\0out_calc\0in_ref";
  3190. status = "disabled";
  3191. interrupts = <0x00 0x01 0x01>;
  3192. phandle = <0x106>;
  3193. dividor = <0x31>;
  3194. interrupt-names = "irq";
  3195. frequency = <0x2ebae40>;
  3196. };
  3197.  
  3198. cpus {
  3199. #address-cells = <0x01>;
  3200. #size-cells = <0x00>;
  3201. phandle = <0x96>;
  3202.  
  3203. cpu@3 {
  3204. compatible = "arm,cortex-a53\0arm,armv8";
  3205. clocks = <0x02 0x17 0x02 0x16 0x02 0x00 0x02 0xf8 0x02 0xf7>;
  3206. cpu-idle-states = <0x0c>;
  3207. device_type = "cpu";
  3208. clock-names = "core_clk\0low_freq_clk_parent\0high_freq_clk_parent\0dsu_clk\0dsu_pre_parent";
  3209. voltage-tolerance = <0x00>;
  3210. enable-method = "psci";
  3211. cpu-supply = <0x0e>;
  3212. phandle = <0x0b>;
  3213. operating-points-v2 = <0x0d>;
  3214. reg = <0x03>;
  3215. clock-latency = <0xc350>;
  3216. };
  3217.  
  3218. idle-states {
  3219. entry-method = "arm,psci-0.2";
  3220.  
  3221. cpu-sleep-0 {
  3222. compatible = "arm,idle-state";
  3223. arm,psci-suspend-param = <0x10000>;
  3224. phandle = <0x0c>;
  3225. exit-latency-us = <0x1388>;
  3226. entry-latency-us = <0xfa0>;
  3227. local-timer-stop;
  3228. min-residency-us = <0x2710>;
  3229. };
  3230. };
  3231.  
  3232. cpu@1 {
  3233. compatible = "arm,cortex-a53\0arm,armv8";
  3234. clocks = <0x02 0x17 0x02 0x16 0x02 0x00 0x02 0xf8 0x02 0xf7>;
  3235. cpu-idle-states = <0x0c>;
  3236. device_type = "cpu";
  3237. clock-names = "core_clk\0low_freq_clk_parent\0high_freq_clk_parent\0dsu_clk\0dsu_pre_parent";
  3238. voltage-tolerance = <0x00>;
  3239. enable-method = "psci";
  3240. cpu-supply = <0x0e>;
  3241. phandle = <0x09>;
  3242. operating-points-v2 = <0x0d>;
  3243. reg = <0x01>;
  3244. clock-latency = <0xc350>;
  3245. };
  3246.  
  3247. cpu-map {
  3248.  
  3249. cluster0 {
  3250. phandle = <0x97>;
  3251.  
  3252. core0 {
  3253. cpu = <0x08>;
  3254. };
  3255.  
  3256. core3 {
  3257. cpu = <0x0b>;
  3258. };
  3259.  
  3260. core1 {
  3261. cpu = <0x09>;
  3262. };
  3263.  
  3264. core2 {
  3265. cpu = <0x0a>;
  3266. };
  3267. };
  3268. };
  3269.  
  3270. cpu@2 {
  3271. compatible = "arm,cortex-a53\0arm,armv8";
  3272. clocks = <0x02 0x17 0x02 0x16 0x02 0x00 0x02 0xf8 0x02 0xf7>;
  3273. cpu-idle-states = <0x0c>;
  3274. device_type = "cpu";
  3275. clock-names = "core_clk\0low_freq_clk_parent\0high_freq_clk_parent\0dsu_clk\0dsu_pre_parent";
  3276. voltage-tolerance = <0x00>;
  3277. enable-method = "psci";
  3278. cpu-supply = <0x0e>;
  3279. phandle = <0x0a>;
  3280. operating-points-v2 = <0x0d>;
  3281. reg = <0x02>;
  3282. clock-latency = <0xc350>;
  3283. };
  3284.  
  3285. cpu@0 {
  3286. compatible = "arm,cortex-a53\0arm,armv8";
  3287. clocks = <0x02 0x17 0x02 0x16 0x02 0x00 0x02 0xf8 0x02 0xf7>;
  3288. cpu-idle-states = <0x0c>;
  3289. device_type = "cpu";
  3290. clock-names = "core_clk\0low_freq_clk_parent\0high_freq_clk_parent\0dsu_clk\0dsu_pre_parent";
  3291. voltage-tolerance = <0x00>;
  3292. enable-method = "psci";
  3293. cpu-supply = <0x0e>;
  3294. phandle = <0x08>;
  3295. operating-points-v2 = <0x0d>;
  3296. reg = <0x00>;
  3297. clock-latency = <0xc350>;
  3298. };
  3299. };
  3300.  
  3301. saradc {
  3302. compatible = "amlogic,meson-g12a-saradc";
  3303. clocks = <0x15 0x02 0x105>;
  3304. #io-channel-cells = <0x01>;
  3305. clock-names = "xtal\0saradc_clk";
  3306. status = "disabled";
  3307. interrupts = <0x00 0xc8 0x01>;
  3308. phandle = <0xce>;
  3309. reg = <0xff809000 0x48>;
  3310. };
  3311.  
  3312. power_ctrl@ff8000e8 {
  3313. compatible = "amlogic, sm1-powerctrl";
  3314. phandle = <0xcf>;
  3315. reg = <0xff8000e8 0x10 0xff63c100 0x10>;
  3316. };
  3317.  
  3318. t9015 {
  3319. tocodec_inout = <0x01>;
  3320. compatible = "amlogic, aml_codec_T9015";
  3321. #sound-dai-cells = <0x00>;
  3322. ch0_sel = <0x00>;
  3323. status = "okay";
  3324. ch1_sel = <0x01>;
  3325. phandle = <0x83>;
  3326. reg = <0xff632000 0x2000>;
  3327. tdmout_index = <0x01>;
  3328. is_auge_used = <0x01>;
  3329. };
  3330.  
  3331. backlight {
  3332. compatible = "amlogic, backlight-sm1";
  3333. dev_name = "backlight";
  3334. bl_pwm_config = <0x60>;
  3335. bl-gpios = <0x17 0x16 0x00>;
  3336. pinctrl_version = <0x02>;
  3337. key_valid = <0x00>;
  3338. status = "okay";
  3339. pinctrl-0 = <0x5f>;
  3340. bl_gpio_names = "GPIOH_5";
  3341. pinctrl-names = "pwm_on";
  3342.  
  3343. backlight_0 {
  3344. bl_ctrl_method = <0x01>;
  3345. bl_pwm_attr = <0x01 0x61a8 0x64 0x19>;
  3346. bl_pwm_en_sequence_reverse = <0x00>;
  3347. bl_pwm_power = <0x00 0x00 0x0a 0x0a>;
  3348. bl_pwm_port = "PWM_F";
  3349. bl_name = "backlight_pwm";
  3350. index = <0x00>;
  3351. bl_level_default_uboot_kernel = <0x64 0x64>;
  3352. bl_level_attr = <0xff 0x0a 0x80 0x80>;
  3353. };
  3354.  
  3355. backlight_1 {
  3356. bl_extern_index = <0x00>;
  3357. bl_ctrl_method = <0x04>;
  3358. bl_name = "bl_extern";
  3359. index = <0x01>;
  3360. bl_level_default_uboot_kernel = <0x64 0x64>;
  3361. bl_level_attr = <0xff 0x0a 0x80 0x80>;
  3362. bl_power_attr = <0x01 0x01 0x00 0xc8 0xc8>;
  3363. };
  3364. };
  3365.  
  3366. dvb {
  3367. fe0_demod = "Avl6762";
  3368. compatible = "amlogic, dvb";
  3369. clocks = <0x02 0x39 0x02 0x43 0x02 0x40>;
  3370. fe0_reset_gpio = <0x17 0x0b 0x00>;
  3371. ts0 = "serial";
  3372. dev_name = "dvb";
  3373. ts0_control = <0x800>;
  3374. fe0_i2c_adap_id = <0x6a>;
  3375. clock-names = "demux\0ahbarb0\0parser_top";
  3376. ts0_invert = <0x00>;
  3377. interrupts = <0x00 0x17 0x01 0x00 0x05 0x01 0x00 0x15 0x01 0x00 0x13 0x01 0x00 0x19 0x01 0x00 0x12 0x01 0x00 0x18 0x01>;
  3378. fe0_ts = <0x00>;
  3379. pinctrl-0 = <0x6b>;
  3380. fe0_reset_value = <0x00>;
  3381. interrupt-names = "demux0_irq\0demux1_irq\0demux2_irq\0dvr0_irq\0dvr1_irq\0dvrfill0_fill\0dvrfill1_flush";
  3382. fe0_demod_i2c_addr = <0x14>;
  3383. fe0_mode = "external";
  3384. dtv_demod0_ant_poweron_value = <0x00>;
  3385. pinctrl-names = "s_ts0";
  3386. };
  3387.  
  3388. memory@00000000 {
  3389. device_type = "memory";
  3390. linux,usable-memory = <0x00 0x80000000>;
  3391. reg = <0x00 0x78000000>;
  3392. };
  3393.  
  3394. timer_bc {
  3395. clockevent-rating = <0x12c>;
  3396. compatible = "arm, meson-bc-timer";
  3397. bit_enable = <0x10>;
  3398. timer_name = "Meson TimerF";
  3399. clockevent-features = <0x23>;
  3400. bit_mode = <0x0c>;
  3401. interrupts = <0x00 0x3c 0x01>;
  3402. reg = <0xffd0f190 0x04 0xffd0f194 0x04>;
  3403. bit_resolution = <0x00>;
  3404. clockevent-shift = <0x14>;
  3405. };
  3406.  
  3407. efuse {
  3408. compatible = "amlogic, efuse";
  3409. clocks = <0x02 0x61>;
  3410. read_cmd = <0x82000030>;
  3411. get_max_cmd = <0x82000033>;
  3412. clock-names = "efuse_clk";
  3413. write_cmd = <0x82000031>;
  3414. status = "disabled";
  3415. key = <0x4d>;
  3416. phandle = <0xfc>;
  3417. };
  3418.  
  3419. ppmgr {
  3420. compatible = "amlogic, ppmgr";
  3421. dev_name = "ppmgr";
  3422. status = "okay";
  3423. memory-region = <0x68>;
  3424. };
  3425.  
  3426. pinctrl@ff634480 {
  3427. compatible = "amlogic,meson-g12a-periphs-pinctrl";
  3428. ranges;
  3429. #address-cells = <0x01>;
  3430. #size-cells = <0x01>;
  3431. phandle = <0xa9>;
  3432.  
  3433. pwm_d_pins2 {
  3434. phandle = <0xbf>;
  3435.  
  3436. mux {
  3437. groups = "pwm_d_x6";
  3438. function = "pwm_d";
  3439. };
  3440. };
  3441.  
  3442. pdmin {
  3443. phandle = <0x27>;
  3444.  
  3445. mux {
  3446. groups = "pdm_din0_z\0pdm_din1_z\0pdm_din2_z\0pdm_din3_z\0pdm_dclk_z";
  3447. function = "pdm";
  3448. };
  3449. };
  3450.  
  3451. spicc1_pins {
  3452. phandle = <0xc3>;
  3453.  
  3454. mux {
  3455. drive-strength = <0x01>;
  3456. groups = "spi1_mosi\0spi1_miso\0spi1_clk";
  3457. function = "spi1";
  3458. };
  3459. };
  3460.  
  3461. pwm_e {
  3462. phandle = <0x63>;
  3463.  
  3464. mux {
  3465. groups = "pwm_e";
  3466. function = "pwm_e";
  3467. };
  3468. };
  3469.  
  3470. ee_cecb {
  3471. phandle = <0x38>;
  3472.  
  3473. mux {
  3474. groups = "cec_ao_b_ee";
  3475. function = "cec_ao_ee";
  3476. };
  3477. };
  3478.  
  3479. ao_to_sd_uart_pins {
  3480. phandle = <0x43>;
  3481.  
  3482. mux {
  3483. groups = "uart_ao_tx_a_c3\0uart_ao_rx_a_c2";
  3484. function = "uart_ao_a_ee";
  3485. input-enable;
  3486. bias-pull-up;
  3487. };
  3488. };
  3489.  
  3490. sdio_x_clr_pins {
  3491. phandle = <0xaf>;
  3492.  
  3493. mux1 {
  3494. output-low;
  3495. groups = "GPIOX_4";
  3496. function = "gpio_periphs";
  3497. };
  3498.  
  3499. mux {
  3500. output-low;
  3501. groups = "GPIOV_0";
  3502. function = "gpio_periphs";
  3503. bias-pull-up;
  3504. };
  3505. };
  3506.  
  3507. emmc_conf_pull_up {
  3508. phandle = <0x3d>;
  3509.  
  3510. mux {
  3511. drive-strength = <0x03>;
  3512. groups = "emmc_nand_d7\0emmc_nand_d6\0emmc_nand_d5\0emmc_nand_d4\0emmc_nand_d3\0emmc_nand_d2\0emmc_nand_d1\0emmc_nand_d0\0emmc_clk\0emmc_cmd";
  3513. function = "emmc";
  3514. input-enable;
  3515. bias-pull-up;
  3516. };
  3517. };
  3518.  
  3519. i2c0_pins2 {
  3520. phandle = <0x16>;
  3521.  
  3522. mux {
  3523. drive-strength = <0x02>;
  3524. groups = "i2c0_sda_z0\0i2c0_sck_z1";
  3525. function = "i2c0";
  3526. };
  3527. };
  3528.  
  3529. pwm_c_pins3 {
  3530. phandle = <0xbd>;
  3531.  
  3532. mux {
  3533. groups = "pwm_c_x8";
  3534. function = "pwm_c";
  3535. };
  3536. };
  3537.  
  3538. sdio_x_all_pins {
  3539. phandle = <0xad>;
  3540.  
  3541. mux1 {
  3542. drive-strength = <0x03>;
  3543. groups = "GPIOX_4";
  3544. function = "gpio_periphs";
  3545. bias-pull-up;
  3546. output-high;
  3547. };
  3548.  
  3549. mux {
  3550. drive-strength = <0x03>;
  3551. groups = "GPIOX_0\0GPIOX_1\0GPIOX_2\0GPIOX_3\0GPIOX_5";
  3552. function = "gpio_periphs";
  3553. input-enable;
  3554. bias-pull-up;
  3555. };
  3556. };
  3557.  
  3558. sdio_clk_cmd_pins {
  3559. phandle = <0x46>;
  3560.  
  3561. mux {
  3562. drive-strength = <0x03>;
  3563. groups = "sdio_clk\0sdio_cmd";
  3564. function = "sdio";
  3565. input-enable;
  3566. bias-pull-up;
  3567. };
  3568. };
  3569.  
  3570. i2c3_pins2 {
  3571. phandle = <0x18>;
  3572.  
  3573. mux {
  3574. drive-strength = <0x02>;
  3575. groups = "i2c3_sda_a\0i2c3_sck_a";
  3576. function = "i2c3";
  3577. };
  3578. };
  3579.  
  3580. cam_dvp_pins {
  3581. phandle = <0xc9>;
  3582.  
  3583. mux {
  3584. groups = "bt656_a_vs\0bt656_a_hs\0bt656_a_clk\0bt656_a_din0\0bt656_a_din1\0bt656_a_din2\0bt656_a_din3\0bt656_a_din4\0bt656_a_din5\0bt656_a_din6\0bt656_a_din7";
  3585. function = "bt656";
  3586. };
  3587. };
  3588.  
  3589. tdmout_b {
  3590. phandle = <0x20>;
  3591.  
  3592. mux {
  3593. drive-strength = <0x02>;
  3594. groups = "tdmb_sclk\0tdmb_fs\0tdmb_dout0";
  3595. function = "tdmb_out";
  3596. };
  3597. };
  3598.  
  3599. spdifout {
  3600. phandle = <0x25>;
  3601.  
  3602. mux {
  3603. groups = "spdif_out_h";
  3604. function = "spdif_out";
  3605. };
  3606. };
  3607.  
  3608. external_eth_pins {
  3609. phandle = <0xc4>;
  3610.  
  3611. mux {
  3612. drive-strength = <0x03>;
  3613. groups = "eth_mdio\0eth_mdc\0eth_rgmii_rx_clk\0eth_rx_dv\0eth_rxd0\0eth_rxd1\0eth_rxd2_rgmii\0eth_rxd3_rgmii\0eth_rgmii_tx_clk\0eth_txen\0eth_txd0\0eth_txd1\0eth_txd2_rgmii\0eth_txd3_rgmii";
  3614. function = "eth";
  3615. };
  3616. };
  3617.  
  3618. internal_gpio_pins {
  3619. phandle = <0x12>;
  3620.  
  3621. mux {
  3622. bias-disable;
  3623. groups = "GPIOZ_14\0GPIOZ_15";
  3624. function = "gpio_periphs";
  3625. input-enable;
  3626. };
  3627. };
  3628.  
  3629. pwm_c_pins1 {
  3630. phandle = <0xbb>;
  3631.  
  3632. mux {
  3633. groups = "pwm_c_c4";
  3634. function = "pwm_c";
  3635. };
  3636. };
  3637.  
  3638. emmc_conf_pull_done {
  3639. phandle = <0x3e>;
  3640.  
  3641. mux {
  3642. drive-strength = <0x03>;
  3643. groups = "emmc_nand_ds";
  3644. function = "emmc";
  3645. bias-pull-down;
  3646. input-enable;
  3647. };
  3648. };
  3649.  
  3650. jtag_apee_pin {
  3651. phandle = <0xc5>;
  3652.  
  3653. mux {
  3654. groups = "jtag_b_tdi\0jtag_b_tdo\0jtag_b_clk\0jtag_b_tms";
  3655. function = "jtag_b";
  3656. };
  3657. };
  3658.  
  3659. i2c2_pins3 {
  3660. phandle = <0xb7>;
  3661.  
  3662. mux {
  3663. drive-strength = <0x02>;
  3664. groups = "i2c2_sda_z10\0i2c2_sck_z11";
  3665. function = "i2c2";
  3666. };
  3667. };
  3668.  
  3669. pwm_a {
  3670. phandle = <0xb8>;
  3671.  
  3672. mux {
  3673. groups = "pwm_a";
  3674. function = "pwm_a";
  3675. };
  3676. };
  3677.  
  3678. pwm_f_pins1 {
  3679. phandle = <0xc0>;
  3680.  
  3681. mux {
  3682. groups = "pwm_f_x";
  3683. function = "pwm_f";
  3684. };
  3685. };
  3686.  
  3687. pwm_b_pins2 {
  3688. phandle = <0xba>;
  3689.  
  3690. mux {
  3691. groups = "pwm_b_x19";
  3692. function = "pwm_b";
  3693. };
  3694. };
  3695.  
  3696. i2c2_pins1 {
  3697. phandle = <0xb5>;
  3698.  
  3699. mux {
  3700. drive-strength = <0x02>;
  3701. groups = "i2c2_sda_x\0i2c2_sck_x";
  3702. function = "i2c2";
  3703. };
  3704. };
  3705.  
  3706. bl_pwm_off_pin {
  3707. phandle = <0xc6>;
  3708.  
  3709. mux {
  3710. pins = "GPIOH_5";
  3711. function = "gpio_periphs";
  3712. output-high;
  3713. };
  3714. };
  3715.  
  3716. tdmin_c {
  3717. phandle = <0x24>;
  3718.  
  3719. mux {
  3720. groups = "tdmc_din0_a";
  3721. function = "tdmc_in";
  3722. };
  3723. };
  3724.  
  3725. gen_clk_ee_z {
  3726. phandle = <0xc8>;
  3727.  
  3728. mux {
  3729. drive-strength = <0x03>;
  3730. groups = "gen_clk_ee_z";
  3731. function = "gen_clk_ee";
  3732. };
  3733. };
  3734.  
  3735. i2c1_pins2 {
  3736. phandle = <0xb3>;
  3737.  
  3738. mux {
  3739. drive-strength = <0x02>;
  3740. groups = "i2c1_sda_h2\0i2c1_sck_h3";
  3741. function = "i2c1";
  3742. };
  3743. };
  3744.  
  3745. sd_clr_all_pins {
  3746. phandle = <0xaa>;
  3747.  
  3748. mux1 {
  3749. output-low;
  3750. groups = "GPIOC_4";
  3751. function = "gpio_periphs";
  3752. };
  3753.  
  3754. mux {
  3755. groups = "GPIOC_0\0GPIOC_1\0GPIOC_2\0GPIOC_3\0GPIOC_5";
  3756. function = "gpio_periphs";
  3757. output-high;
  3758. };
  3759. };
  3760.  
  3761. nand_cs {
  3762. phandle = <0x48>;
  3763.  
  3764. mux {
  3765. groups = "nand_ce0";
  3766. function = "nand";
  3767. };
  3768. };
  3769.  
  3770. all_nand_pins {
  3771. phandle = <0x47>;
  3772.  
  3773. mux {
  3774. groups = "emmc_nand_d0\0emmc_nand_d1\0emmc_nand_d2\0emmc_nand_d3\0emmc_nand_d4\0emmc_nand_d5\0emmc_nand_d6\0emmc_nand_d7\0nand_ce0\0nand_ale\0nand_cle\0nand_wen_clk\0nand_ren_wr\0nand_rb0";
  3775. function = "nand";
  3776. input-enable;
  3777. };
  3778. };
  3779.  
  3780. tdmc_mclk {
  3781. phandle = <0x22>;
  3782.  
  3783. mux {
  3784. groups = "mclk1_a";
  3785. function = "mclk1";
  3786. };
  3787. };
  3788.  
  3789. tdmin_a {
  3790. phandle = <0x1e>;
  3791.  
  3792. mux {
  3793. groups = "tdma_din1";
  3794. function = "tdma_in";
  3795. };
  3796. };
  3797.  
  3798. sd_all_pins {
  3799. phandle = <0x3f>;
  3800.  
  3801. mux1 {
  3802. drive-strength = <0x03>;
  3803. groups = "sdcard_clk_c";
  3804. function = "sdcard";
  3805. bias-pull-up;
  3806. output-high;
  3807. };
  3808.  
  3809. mux {
  3810. drive-strength = <0x03>;
  3811. groups = "sdcard_d0_c\0sdcard_d1_c\0sdcard_d2_c\0sdcard_d3_c\0sdcard_cmd_c";
  3812. function = "sdcard";
  3813. input-enable;
  3814. bias-pull-up;
  3815. };
  3816. };
  3817.  
  3818. i2c0_pins3 {
  3819. phandle = <0xb1>;
  3820.  
  3821. mux {
  3822. drive-strength = <0x02>;
  3823. groups = "i2c0_sda_z7\0i2c0_sck_z8";
  3824. function = "i2c0";
  3825. };
  3826. };
  3827.  
  3828. pwm_d_pins1 {
  3829. phandle = <0xbe>;
  3830.  
  3831. mux {
  3832. groups = "pwm_d_x3";
  3833. function = "pwm_d";
  3834. };
  3835. };
  3836.  
  3837. tdmout_c {
  3838. phandle = <0x23>;
  3839.  
  3840. mux {
  3841. groups = "tdmc_sclk_a\0tdmc_fs_a\0tdmc_dout0_a";
  3842. function = "tdmc_out";
  3843. };
  3844. };
  3845.  
  3846. ee_ceca {
  3847. phandle = <0x37>;
  3848.  
  3849. mux {
  3850. groups = "cec_ao_a_ee";
  3851. function = "cec_ao_ee";
  3852. };
  3853. };
  3854.  
  3855. spicc0_pins_x {
  3856. phandle = <0xc1>;
  3857.  
  3858. mux {
  3859. drive-strength = <0x01>;
  3860. groups = "spi0_mosi_x\0spi0_miso_x\0spi0_clk_x";
  3861. function = "spi0";
  3862. };
  3863. };
  3864.  
  3865. internal_eth_pins {
  3866. phandle = <0x11>;
  3867.  
  3868. mux {
  3869. groups = "eth_link_led\0eth_act_led";
  3870. function = "eth";
  3871. };
  3872. };
  3873.  
  3874. i2c0_pins1 {
  3875. phandle = <0xb0>;
  3876.  
  3877. mux {
  3878. drive-strength = <0x02>;
  3879. groups = "i2c0_sda_c\0i2c0_sck_c";
  3880. function = "i2c0";
  3881. };
  3882. };
  3883.  
  3884. sdio_x_en_pins {
  3885. phandle = <0xae>;
  3886.  
  3887. mux {
  3888. groups = "sdio_dummy";
  3889. function = "sdio";
  3890. bias-pull-up;
  3891. output-high;
  3892. };
  3893. };
  3894.  
  3895. hdmitx_ddc {
  3896. phandle = <0x34>;
  3897.  
  3898. mux {
  3899. bias-disable;
  3900. drive-strength = <0x03>;
  3901. groups = "hdmitx_sda\0hdmitx_sck";
  3902. function = "hdmitx";
  3903. };
  3904. };
  3905.  
  3906. pwm_c_pins2 {
  3907. phandle = <0xbc>;
  3908.  
  3909. mux {
  3910. groups = "pwm_c_x5";
  3911. function = "pwm_c";
  3912. };
  3913. };
  3914.  
  3915. sd_clk_cmd_pins {
  3916. phandle = <0x40>;
  3917.  
  3918. mux1 {
  3919. drive-strength = <0x03>;
  3920. groups = "sdcard_clk_c";
  3921. function = "sdcard";
  3922. bias-pull-up;
  3923. output-high;
  3924. };
  3925.  
  3926. mux {
  3927. drive-strength = <0x03>;
  3928. groups = "sdcard_cmd_c";
  3929. function = "sdcard";
  3930. input-enable;
  3931. bias-pull-up;
  3932. };
  3933. };
  3934.  
  3935. tdmb_mclk {
  3936. phandle = <0x1f>;
  3937.  
  3938. mux {
  3939. drive-strength = <0x02>;
  3940. groups = "mclk0_a";
  3941. function = "mclk0";
  3942. };
  3943. };
  3944.  
  3945. spdifin {
  3946. phandle = <0x26>;
  3947.  
  3948. mux {
  3949. groups = "spdif_in_h";
  3950. function = "spdif_in";
  3951. };
  3952. };
  3953.  
  3954. i2c3_pins1 {
  3955. phandle = <0x36>;
  3956.  
  3957. mux {
  3958. drive-strength = <0x02>;
  3959. groups = "i2c3_sda_h\0i2c3_sck_h";
  3960. function = "i2c3";
  3961. };
  3962. };
  3963.  
  3964. c_uart {
  3965. phandle = <0x31>;
  3966.  
  3967. mux {
  3968. groups = "uart_tx_c\0uart_rx_c";
  3969. function = "uart_c";
  3970. };
  3971. };
  3972.  
  3973. tdmout_a {
  3974. phandle = <0x1d>;
  3975.  
  3976. mux {
  3977. groups = "tdma_sclk\0tdma_fs\0tdma_dout0";
  3978. function = "tdma_out";
  3979. };
  3980. };
  3981.  
  3982. pwm_f_pins2 {
  3983. phandle = <0x5f>;
  3984.  
  3985. mux {
  3986. groups = "pwm_f_h";
  3987. function = "pwm_f";
  3988. };
  3989. };
  3990.  
  3991. sd_1bit_pins {
  3992. phandle = <0x41>;
  3993.  
  3994. mux1 {
  3995. drive-strength = <0x03>;
  3996. groups = "sdcard_clk_c";
  3997. function = "sdcard";
  3998. bias-pull-up;
  3999. output-high;
  4000. };
  4001.  
  4002. mux {
  4003. drive-strength = <0x03>;
  4004. groups = "sdcard_d0_c\0sdcard_cmd_c";
  4005. function = "sdcard";
  4006. input-enable;
  4007. bias-pull-up;
  4008. };
  4009. };
  4010.  
  4011. spicc0_pins_c {
  4012. phandle = <0xc2>;
  4013.  
  4014. mux {
  4015. drive-strength = <0x01>;
  4016. groups = "spi0_mosi_c\0spi0_miso_c\0spi0_ss0_c\0spi0_clk_c";
  4017. function = "spi0";
  4018. };
  4019. };
  4020.  
  4021. i2c2_pins2 {
  4022. phandle = <0xb6>;
  4023.  
  4024. mux {
  4025. drive-strength = <0x02>;
  4026. groups = "i2c2_sda_z\0i2c2_sck_z";
  4027. function = "i2c2";
  4028. };
  4029. };
  4030.  
  4031. b_uart {
  4032. phandle = <0x30>;
  4033.  
  4034. mux {
  4035. groups = "uart_tx_b\0uart_rx_b";
  4036. function = "uart_b";
  4037. };
  4038. };
  4039.  
  4040. pwm_b_pins1 {
  4041. phandle = <0xb9>;
  4042.  
  4043. mux {
  4044. groups = "pwm_b_x7";
  4045. function = "pwm_b";
  4046. };
  4047. };
  4048.  
  4049. i2c1_pins3 {
  4050. phandle = <0xb4>;
  4051.  
  4052. mux {
  4053. drive-strength = <0x02>;
  4054. groups = "i2c1_sda_h6\0i2c1_sck_h7";
  4055. function = "i2c1";
  4056. };
  4057. };
  4058.  
  4059. sdio_all_pins {
  4060. phandle = <0x45>;
  4061.  
  4062. mux {
  4063. drive-strength = <0x03>;
  4064. groups = "sdio_d0\0sdio_d1\0sdio_d2\0sdio_d3\0sdio_clk\0sdio_cmd";
  4065. function = "sdio";
  4066. input-enable;
  4067. bias-pull-up;
  4068. };
  4069. };
  4070.  
  4071. sd_clr_noall_pins {
  4072. phandle = <0xab>;
  4073.  
  4074. mux {
  4075. groups = "GPIOC_0\0GPIOC_1\0GPIOC_4\0GPIOC_5";
  4076. function = "gpio_periphs";
  4077. output-high;
  4078. };
  4079. };
  4080.  
  4081. sdio_x_clk_cmd_pins {
  4082. phandle = <0xac>;
  4083.  
  4084. mux1 {
  4085. drive-strength = <0x03>;
  4086. groups = "GPIOX_4";
  4087. function = "gpio_periphs";
  4088. bias-pull-up;
  4089. output-high;
  4090. };
  4091.  
  4092. mux {
  4093. drive-strength = <0x03>;
  4094. groups = "GPIOX_5";
  4095. function = "gpio_periphs";
  4096. input-enable;
  4097. bias-pull-up;
  4098. };
  4099. };
  4100.  
  4101. banks@ff6346c0 {
  4102. reg-names = "mux\0pull\0pull-enable\0gpio\0drive-strength";
  4103. gpio-controller;
  4104. phandle = <0x17>;
  4105. reg = <0xff6346c0 0x40 0xff6344e8 0x18 0xff634520 0x18 0xff634440 0x4c 0xff634740 0x1c>;
  4106. #gpio-cells = <0x02>;
  4107. };
  4108.  
  4109. tdmin_b {
  4110. phandle = <0x21>;
  4111.  
  4112. mux {
  4113. drive-strength = <0x02>;
  4114. groups = "tdmb_din1";
  4115. function = "tdmb_in";
  4116. };
  4117. };
  4118.  
  4119. hdmitx_hpd {
  4120. phandle = <0x33>;
  4121.  
  4122. mux {
  4123. bias-disable;
  4124. groups = "hdmitx_hpd_in";
  4125. function = "hdmitx";
  4126. };
  4127. };
  4128.  
  4129. emmc_clk_cmd_pins {
  4130. phandle = <0x3c>;
  4131.  
  4132. mux {
  4133. drive-strength = <0x03>;
  4134. groups = "emmc_clk\0emmc_cmd";
  4135. function = "emmc";
  4136. input-enable;
  4137. bias-pull-up;
  4138. };
  4139. };
  4140.  
  4141. i2c1_pins1 {
  4142. phandle = <0xb2>;
  4143.  
  4144. mux {
  4145. drive-strength = <0x02>;
  4146. groups = "i2c1_sda_x\0i2c1_sck_x";
  4147. function = "i2c1";
  4148. };
  4149. };
  4150.  
  4151. clk12_24_z_pins {
  4152. phandle = <0xc7>;
  4153.  
  4154. mux {
  4155. drive-strength = <0x03>;
  4156. groups = "clk12_24_z";
  4157. function = "clk12_24_ee";
  4158. };
  4159. };
  4160.  
  4161. a_uart {
  4162. phandle = <0x2f>;
  4163.  
  4164. mux {
  4165. groups = "uart_tx_a\0uart_rx_a\0uart_cts_a\0uart_rts_a";
  4166. function = "uart_a";
  4167. };
  4168. };
  4169.  
  4170. hdmitx_hpd_gpio {
  4171. phandle = <0x35>;
  4172.  
  4173. mux {
  4174. bias-disable;
  4175. groups = "GPIOH_1";
  4176. function = "gpio_periphs";
  4177. };
  4178. };
  4179. };
  4180.  
  4181. rtc {
  4182. compatible = "amlogic, aml_vrtc";
  4183. alarm_reg_addr = <0xff8000a8>;
  4184. timer_e_addr = <0xffd0f188>;
  4185. status = "okay";
  4186. init_date = "2015/01/01";
  4187. };
  4188.  
  4189. serial@ffd22000 {
  4190. compatible = "amlogic, meson-uart";
  4191. clocks = <0x15 0x02 0x3c>;
  4192. fifosize = <0x40>;
  4193. clock-names = "clk_uart\0clk_gate";
  4194. status = "disabled";
  4195. interrupts = <0x00 0x5d 0x01>;
  4196. phandle = <0xed>;
  4197. reg = <0xffd22000 0x18>;
  4198. pinctrl-0 = <0x31>;
  4199. pinctrl-names = "default";
  4200. };
  4201.  
  4202. ge2d {
  4203. compatible = "amlogic, ge2d-sm1";
  4204. clocks = <0x02 0x95 0x02 0x3d 0x02 0x96>;
  4205. dev_name = "ge2d";
  4206. clock-names = "clk_vapb_0\0clk_ge2d\0clk_ge2d_gate";
  4207. status = "okay";
  4208. interrupts = <0x00 0x92 0x01>;
  4209. reg = <0xff940000 0x10000>;
  4210. interrupt-names = "ge2d";
  4211. };
  4212.  
  4213. emmc@ffe07000 {
  4214. cap-mmc-highspeed;
  4215. compatible = "amlogic, meson-mmc-sm1";
  4216. clocks = <0x02 0x35 0x02 0x72 0x02 0x02 0x02 0x20 0x15>;
  4217. cap-sd-highspeed;
  4218. pinctrl-1 = <0x3d 0x3e>;
  4219. clock-names = "core\0clkin0\0clkin1\0clkin2\0xtal";
  4220. status = "okay";
  4221. interrupts = <0x00 0xbf 0x01>;
  4222. disable-wp;
  4223. bus-width = <0x08>;
  4224. phandle = <0xf7>;
  4225. reg = <0xffe07000 0x800>;
  4226. pinctrl-0 = <0x3c>;
  4227. non-removable;
  4228. max-frequency = <0xbebc200>;
  4229. pinctrl-names = "emmc_clk_cmd_pins\0emmc_all_pins";
  4230.  
  4231. emmc {
  4232. max_req_size = <0x20000>;
  4233. caps2 = "MMC_CAP2_HS200";
  4234. gpio_dat3 = <0x17 0x1d 0x00>;
  4235. f_min = <0x61a80>;
  4236. card_type = <0x01>;
  4237. f_max = <0x5f5e100>;
  4238. ocr_avail = <0x200080>;
  4239. hw_reset = <0x17 0x26 0x00>;
  4240. co_phase = <0x03>;
  4241. tx_delay = <0x00>;
  4242. pinname = "emmc";
  4243. caps = "MMC_CAP_8_BIT_DATA\0MMC_CAP_MMC_HIGHSPEED\0MMC_CAP_SD_HIGHSPEED\0MMC_CAP_NONREMOVABLE\0MMC_CAP_HW_RESET\0MMC_CAP_ERASE\0MMC_CAP_CMD23\0MMC_CAP_DRIVER_TYPE_D";
  4244. };
  4245. };
  4246.  
  4247. vout2 {
  4248. compatible = "amlogic, vout2";
  4249. clocks = <0x02 0xc4 0x02 0xc9>;
  4250. dev_name = "vout";
  4251. clock-names = "vpu_clkc0\0vpu_clkc";
  4252. status = "okay";
  4253. };
  4254. };
  4255.  
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