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Unpatched kernel dts

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May 11th, 2017
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  1. /dts-v1/;
  2.  
  3. / {
  4. #address-cells = <0x1>;
  5. #size-cells = <0x1>;
  6. interrupt-parent = <0x1>;
  7. model = "Q8 A33 Tablet";
  8. compatible = "allwinner,q8-a33", "allwinner,sun8i-a33";
  9.  
  10. chosen {
  11. #address-cells = <0x1>;
  12. #size-cells = <0x1>;
  13. ranges;
  14. stdout-path = "serial0:115200n8";
  15.  
  16. framebuffer@0 {
  17. compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
  18. allwinner,pipeline = "de_be0-lcd0";
  19. clocks = <0x2 0x26 0x2 0x28 0x2 0x57 0x2 0x55 0x2 0x54 0x2 0x62>;
  20. status = "disabled";
  21. vcc-lcd-supply = <0x3>;
  22. };
  23. };
  24.  
  25. aliases {
  26. serial0 = "/soc@01c00000/serial@01f02800";
  27. ethernet0 = "/soc@01c00000/mmc@01c10000/sdio_wifi@1";
  28. };
  29.  
  30. memory {
  31. device_type = "memory";
  32. reg = <0x40000000 0x80000000>;
  33. };
  34.  
  35. timer {
  36. compatible = "arm,armv7-timer";
  37. interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
  38. clock-frequency = <0x16e3600>;
  39. arm,cpu-registers-not-fw-configured;
  40. };
  41.  
  42. cpus {
  43. enable-method = "allwinner,sun8i-a23";
  44. #address-cells = <0x1>;
  45. #size-cells = <0x0>;
  46.  
  47. cpu@0 {
  48. compatible = "arm,cortex-a7";
  49. device_type = "cpu";
  50. reg = <0x0>;
  51. clocks = <0x2 0x12>;
  52. clock-names = "cpu";
  53. operating-points-v2 = <0x4>;
  54. #cooling-cells = <0x2>;
  55. cpu-supply = <0x5>;
  56. linux,phandle = <0x31>;
  57. phandle = <0x31>;
  58. };
  59.  
  60. cpu@1 {
  61. compatible = "arm,cortex-a7";
  62. device_type = "cpu";
  63. reg = <0x1>;
  64. operating-points-v2 = <0x4>;
  65. };
  66.  
  67. cpu@2 {
  68. compatible = "arm,cortex-a7";
  69. device_type = "cpu";
  70. reg = <0x2>;
  71. operating-points-v2 = <0x4>;
  72. };
  73.  
  74. cpu@3 {
  75. compatible = "arm,cortex-a7";
  76. device_type = "cpu";
  77. reg = <0x3>;
  78. operating-points-v2 = <0x4>;
  79. };
  80. };
  81.  
  82. clocks {
  83. #address-cells = <0x1>;
  84. #size-cells = <0x1>;
  85. ranges;
  86.  
  87. osc24M_clk {
  88. #clock-cells = <0x0>;
  89. compatible = "fixed-clock";
  90. clock-frequency = <0x16e3600>;
  91. clock-accuracy = <0xc350>;
  92. clock-output-names = "osc24M";
  93. linux,phandle = <0x11>;
  94. phandle = <0x11>;
  95. };
  96.  
  97. ext_osc32k_clk {
  98. #clock-cells = <0x0>;
  99. compatible = "fixed-clock";
  100. clock-frequency = <0x8000>;
  101. clock-accuracy = <0xc350>;
  102. clock-output-names = "ext-osc32k";
  103. linux,phandle = <0x1a>;
  104. phandle = <0x1a>;
  105. };
  106. };
  107.  
  108. soc@01c00000 {
  109. compatible = "simple-bus";
  110. #address-cells = <0x1>;
  111. #size-cells = <0x1>;
  112. ranges;
  113.  
  114. dma-controller@01c02000 {
  115. compatible = "allwinner,sun8i-a23-dma";
  116. reg = <0x1c02000 0x1000>;
  117. interrupts = <0x0 0x32 0x4>;
  118. clocks = <0x2 0x19>;
  119. resets = <0x2 0x6>;
  120. #dma-cells = <0x1>;
  121. linux,phandle = <0x15>;
  122. phandle = <0x15>;
  123. };
  124.  
  125. mmc@01c0f000 {
  126. compatible = "allwinner,sun7i-a20-mmc";
  127. reg = <0x1c0f000 0x1000>;
  128. clocks = <0x2 0x1a 0x2 0x3c 0x2 0x3e 0x2 0x3d>;
  129. clock-names = "ahb", "mmc", "output", "sample";
  130. resets = <0x2 0x7>;
  131. reset-names = "ahb";
  132. interrupts = <0x0 0x3c 0x4>;
  133. status = "okay";
  134. #address-cells = <0x1>;
  135. #size-cells = <0x0>;
  136. pinctrl-names = "default";
  137. pinctrl-0 = <0x6 0x7>;
  138. vmmc-supply = <0x8>;
  139. bus-width = <0x4>;
  140. cd-gpios = <0x9 0x1 0x4 0x0>;
  141. cd-inverted;
  142. };
  143.  
  144. mmc@01c10000 {
  145. compatible = "allwinner,sun7i-a20-mmc";
  146. reg = <0x1c10000 0x1000>;
  147. clocks = <0x2 0x1b 0x2 0x3f 0x2 0x41 0x2 0x40>;
  148. clock-names = "ahb", "mmc", "output", "sample";
  149. resets = <0x2 0x8>;
  150. reset-names = "ahb";
  151. interrupts = <0x0 0x3d 0x4>;
  152. status = "okay";
  153. #address-cells = <0x1>;
  154. #size-cells = <0x0>;
  155. pinctrl-names = "default";
  156. pinctrl-0 = <0xa>;
  157. vmmc-supply = <0xb>;
  158. mmc-pwrseq = <0xc>;
  159. bus-width = <0x4>;
  160. non-removable;
  161.  
  162. sdio_wifi@1 {
  163. reg = <0x1>;
  164. };
  165. };
  166.  
  167. mmc@01c11000 {
  168. compatible = "allwinner,sun7i-a20-mmc";
  169. reg = <0x1c11000 0x1000>;
  170. clocks = <0x2 0x1c 0x2 0x42 0x2 0x44 0x2 0x43>;
  171. clock-names = "ahb", "mmc", "output", "sample";
  172. resets = <0x2 0x9>;
  173. reset-names = "ahb";
  174. interrupts = <0x0 0x3e 0x4>;
  175. status = "disabled";
  176. #address-cells = <0x1>;
  177. #size-cells = <0x0>;
  178. };
  179.  
  180. nand@01c03000 {
  181. compatible = "allwinner,sun4i-a10-nand";
  182. reg = <0x1c03000 0x1000>;
  183. interrupts = <0x0 0x46 0x4>;
  184. clocks = <0x2 0x1d 0x2 0x3b>;
  185. clock-names = "ahb", "mod";
  186. resets = <0x2 0xa>;
  187. reset-names = "ahb";
  188. status = "disabled";
  189. #address-cells = <0x1>;
  190. #size-cells = <0x0>;
  191. };
  192.  
  193. usb@01c19000 {
  194. reg = <0x1c19000 0x400>;
  195. clocks = <0x2 0x22>;
  196. resets = <0x2 0xf>;
  197. interrupts = <0x0 0x47 0x4>;
  198. interrupt-names = "mc";
  199. phys = <0xd 0x0>;
  200. phy-names = "usb";
  201. extcon = <0xd 0x0>;
  202. status = "okay";
  203. compatible = "allwinner,sun8i-a33-musb";
  204. dr_mode = "otg";
  205. };
  206.  
  207. phy@01c19400 {
  208. clocks = <0x2 0x4a 0x2 0x4b>;
  209. clock-names = "usb0_phy", "usb1_phy";
  210. resets = <0x2 0x0 0x2 0x1>;
  211. reset-names = "usb0_reset", "usb1_reset";
  212. status = "okay";
  213. #phy-cells = <0x1>;
  214. compatible = "allwinner,sun8i-a33-usb-phy";
  215. reg = <0x1c19400 0x14 0x1c1a800 0x4>;
  216. reg-names = "phy_ctrl", "pmu1";
  217. pinctrl-names = "default";
  218. pinctrl-0 = <0xe>;
  219. usb0_id_det-gpio = <0x9 0x7 0x8 0x0>;
  220. usb0_vbus_power-supply = <0xf>;
  221. usb0_vbus-supply = <0x10>;
  222. usb1_vbus-supply = <0xb>;
  223. linux,phandle = <0xd>;
  224. phandle = <0xd>;
  225. };
  226.  
  227. usb@01c1a000 {
  228. compatible = "allwinner,sun8i-a23-ehci", "generic-ehci";
  229. reg = <0x1c1a000 0x100>;
  230. interrupts = <0x0 0x48 0x4>;
  231. clocks = <0x2 0x23>;
  232. resets = <0x2 0x10>;
  233. phys = <0xd 0x1>;
  234. phy-names = "usb";
  235. status = "okay";
  236. };
  237.  
  238. usb@01c1a400 {
  239. compatible = "allwinner,sun8i-a23-ohci", "generic-ohci";
  240. reg = <0x1c1a400 0x100>;
  241. interrupts = <0x0 0x49 0x4>;
  242. clocks = <0x2 0x24 0x2 0x4e>;
  243. resets = <0x2 0x11>;
  244. phys = <0xd 0x1>;
  245. phy-names = "usb";
  246. status = "disabled";
  247. };
  248.  
  249. clock@01c20000 {
  250. reg = <0x1c20000 0x400>;
  251. clocks = <0x11 0x12 0x0>;
  252. clock-names = "hosc", "losc";
  253. #clock-cells = <0x1>;
  254. #reset-cells = <0x1>;
  255. compatible = "allwinner,sun8i-a33-ccu";
  256. linux,phandle = <0x2>;
  257. phandle = <0x2>;
  258. };
  259.  
  260. pinctrl@01c20800 {
  261. reg = <0x1c20800 0x400>;
  262. clocks = <0x2 0x30 0x11 0x12 0x0>;
  263. clock-names = "apb", "hosc", "losc";
  264. gpio-controller;
  265. interrupt-controller;
  266. #interrupt-cells = <0x3>;
  267. #gpio-cells = <0x3>;
  268. compatible = "allwinner,sun8i-a33-pinctrl";
  269. interrupts = <0x0 0xf 0x4 0x0 0x11 0x4>;
  270. linux,phandle = <0x9>;
  271. phandle = <0x9>;
  272.  
  273. uart0@0 {
  274. pins = "PF2", "PF4";
  275. function = "uart0";
  276. };
  277.  
  278. uart1@0 {
  279. pins = "PG6", "PG7";
  280. function = "uart1";
  281. };
  282.  
  283. uart1-cts-rts@0 {
  284. pins = "PG8", "PG9";
  285. function = "uart1";
  286. };
  287.  
  288. mmc0@0 {
  289. pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
  290. function = "mmc0";
  291. drive-strength = <0x1e>;
  292. bias-pull-up;
  293. linux,phandle = <0x6>;
  294. phandle = <0x6>;
  295. };
  296.  
  297. mmc1@0 {
  298. pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5";
  299. function = "mmc1";
  300. drive-strength = <0x1e>;
  301. bias-pull-up;
  302. linux,phandle = <0xa>;
  303. phandle = <0xa>;
  304. };
  305.  
  306. mmc2_8bit {
  307. pins = "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16";
  308. function = "mmc2";
  309. drive-strength = <0x1e>;
  310. bias-pull-up;
  311. };
  312.  
  313. pwm0 {
  314. pins = "PH0";
  315. function = "pwm0";
  316. linux,phandle = <0x13>;
  317. phandle = <0x13>;
  318. };
  319.  
  320. i2c0@0 {
  321. pins = "PH2", "PH3";
  322. function = "i2c0";
  323. linux,phandle = <0x16>;
  324. phandle = <0x16>;
  325. };
  326.  
  327. i2c1@0 {
  328. pins = "PH4", "PH5";
  329. function = "i2c1";
  330. linux,phandle = <0x18>;
  331. phandle = <0x18>;
  332. };
  333.  
  334. i2c2@0 {
  335. pins = "PE12", "PE13";
  336. function = "i2c2";
  337. };
  338.  
  339. lcd-rgb666@0 {
  340. pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD20", "PD21", "PD22", "PD23", "PD24", "PD25", "PD26", "PD27";
  341. function = "lcd0";
  342. };
  343.  
  344. uart0@1 {
  345. pins = "PB0", "PB1";
  346. function = "uart0";
  347. };
  348.  
  349. ahci_pwr_pin@0 {
  350. pins = "PB8";
  351. function = "gpio_out";
  352. linux,phandle = <0x36>;
  353. phandle = <0x36>;
  354. };
  355.  
  356. usb0_vbus_pin@0 {
  357. pins = "PB9";
  358. function = "gpio_out";
  359. linux,phandle = <0x37>;
  360. phandle = <0x37>;
  361. };
  362.  
  363. usb1_vbus_pin@0 {
  364. pins = "PH6";
  365. function = "gpio_out";
  366. linux,phandle = <0x38>;
  367. phandle = <0x38>;
  368. };
  369.  
  370. usb2_vbus_pin@0 {
  371. pins = "PH3";
  372. function = "gpio_out";
  373. linux,phandle = <0x39>;
  374. phandle = <0x39>;
  375. };
  376.  
  377. mmc0_cd_pin@0 {
  378. pins = "PB4";
  379. function = "gpio_in";
  380. bias-pull-up;
  381. linux,phandle = <0x7>;
  382. phandle = <0x7>;
  383. };
  384.  
  385. ts_power_pin@0 {
  386. pins = "PH1";
  387. function = "gpio_out";
  388. linux,phandle = <0x17>;
  389. phandle = <0x17>;
  390. };
  391.  
  392. usb0_id_detect_pin@0 {
  393. pins = "PH8";
  394. function = "gpio_in";
  395. bias-pull-up;
  396. linux,phandle = <0xe>;
  397. phandle = <0xe>;
  398. };
  399. };
  400.  
  401. timer@01c20c00 {
  402. compatible = "allwinner,sun4i-a10-timer";
  403. reg = <0x1c20c00 0xa0>;
  404. interrupts = <0x0 0x12 0x4 0x0 0x13 0x4>;
  405. clocks = <0x11>;
  406. };
  407.  
  408. watchdog@01c20ca0 {
  409. compatible = "allwinner,sun6i-a31-wdt";
  410. reg = <0x1c20ca0 0x20>;
  411. interrupts = <0x0 0x19 0x4>;
  412. };
  413.  
  414. pwm@01c21400 {
  415. compatible = "allwinner,sun7i-a20-pwm";
  416. reg = <0x1c21400 0xc>;
  417. clocks = <0x11>;
  418. #pwm-cells = <0x3>;
  419. status = "okay";
  420. pinctrl-names = "default";
  421. pinctrl-0 = <0x13>;
  422. linux,phandle = <0x3a>;
  423. phandle = <0x3a>;
  424. };
  425.  
  426. lradc@01c22800 {
  427. compatible = "allwinner,sun4i-a10-lradc-keys";
  428. reg = <0x1c22800 0x100>;
  429. interrupts = <0x0 0x1e 0x4>;
  430. status = "okay";
  431. vref-supply = <0x14>;
  432.  
  433. button@200 {
  434. label = "Volume Up";
  435. linux,code = <0x73>;
  436. channel = <0x0>;
  437. voltage = <0x30d40>;
  438. };
  439.  
  440. button@400 {
  441. label = "Volume Down";
  442. linux,code = <0x72>;
  443. channel = <0x0>;
  444. voltage = <0x61a80>;
  445. };
  446. };
  447.  
  448. serial@01c28000 {
  449. compatible = "snps,dw-apb-uart";
  450. reg = <0x1c28000 0x400>;
  451. interrupts = <0x0 0x0 0x4>;
  452. reg-shift = <0x2>;
  453. reg-io-width = <0x4>;
  454. clocks = <0x2 0x36>;
  455. resets = <0x2 0x23>;
  456. dmas = <0x15 0x6 0x15 0x6>;
  457. dma-names = "rx", "tx";
  458. status = "disabled";
  459. };
  460.  
  461. serial@01c28400 {
  462. compatible = "snps,dw-apb-uart";
  463. reg = <0x1c28400 0x400>;
  464. interrupts = <0x0 0x1 0x4>;
  465. reg-shift = <0x2>;
  466. reg-io-width = <0x4>;
  467. clocks = <0x2 0x37>;
  468. resets = <0x2 0x24>;
  469. dmas = <0x15 0x7 0x15 0x7>;
  470. dma-names = "rx", "tx";
  471. status = "disabled";
  472. };
  473.  
  474. serial@01c28800 {
  475. compatible = "snps,dw-apb-uart";
  476. reg = <0x1c28800 0x400>;
  477. interrupts = <0x0 0x2 0x4>;
  478. reg-shift = <0x2>;
  479. reg-io-width = <0x4>;
  480. clocks = <0x2 0x38>;
  481. resets = <0x2 0x25>;
  482. dmas = <0x15 0x8 0x15 0x8>;
  483. dma-names = "rx", "tx";
  484. status = "disabled";
  485. };
  486.  
  487. serial@01c28c00 {
  488. compatible = "snps,dw-apb-uart";
  489. reg = <0x1c28c00 0x400>;
  490. interrupts = <0x0 0x3 0x4>;
  491. reg-shift = <0x2>;
  492. reg-io-width = <0x4>;
  493. clocks = <0x2 0x39>;
  494. resets = <0x2 0x26>;
  495. dmas = <0x15 0x9 0x15 0x9>;
  496. dma-names = "rx", "tx";
  497. status = "disabled";
  498. };
  499.  
  500. serial@01c29000 {
  501. compatible = "snps,dw-apb-uart";
  502. reg = <0x1c29000 0x400>;
  503. interrupts = <0x0 0x4 0x4>;
  504. reg-shift = <0x2>;
  505. reg-io-width = <0x4>;
  506. clocks = <0x2 0x3a>;
  507. resets = <0x2 0x27>;
  508. dmas = <0x15 0xa 0x15 0xa>;
  509. dma-names = "rx", "tx";
  510. status = "disabled";
  511. };
  512.  
  513. i2c@01c2ac00 {
  514. compatible = "allwinner,sun6i-a31-i2c";
  515. reg = <0x1c2ac00 0x400>;
  516. interrupts = <0x0 0x6 0x4>;
  517. clocks = <0x2 0x33>;
  518. resets = <0x2 0x20>;
  519. status = "okay";
  520. #address-cells = <0x1>;
  521. #size-cells = <0x0>;
  522. pinctrl-names = "default";
  523. pinctrl-0 = <0x16>;
  524. clock-frequency = <0x61a80>;
  525.  
  526. touchscreen@0 {
  527. interrupt-parent = <0x9>;
  528. interrupts = <0x1 0x5 0x2>;
  529. pinctrl-names = "default";
  530. pinctrl-0 = <0x17>;
  531. power-gpios = <0x9 0x7 0x1 0x0>;
  532. status = "disabled";
  533. };
  534. };
  535.  
  536. i2c@01c2b000 {
  537. compatible = "allwinner,sun6i-a31-i2c";
  538. reg = <0x1c2b000 0x400>;
  539. interrupts = <0x0 0x7 0x4>;
  540. clocks = <0x2 0x34>;
  541. resets = <0x2 0x21>;
  542. status = "okay";
  543. #address-cells = <0x1>;
  544. #size-cells = <0x0>;
  545. pinctrl-names = "default";
  546. pinctrl-0 = <0x18>;
  547. };
  548.  
  549. i2c@01c2b400 {
  550. compatible = "allwinner,sun6i-a31-i2c";
  551. reg = <0x1c2b400 0x400>;
  552. interrupts = <0x0 0x8 0x4>;
  553. clocks = <0x2 0x35>;
  554. resets = <0x2 0x22>;
  555. status = "disabled";
  556. #address-cells = <0x1>;
  557. #size-cells = <0x0>;
  558. };
  559.  
  560. gpu@1c40000 {
  561. compatible = "allwinner,sun8i-a23-mali", "allwinner,sun7i-a20-mali", "arm,mali-400";
  562. reg = <0x1c40000 0x10000>;
  563. interrupts = <0x0 0x61 0x4 0x0 0x62 0x4 0x0 0x63 0x4 0x0 0x64 0x4 0x0 0x66 0x4 0x0 0x67 0x4 0x0 0x65 0x4>;
  564. interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1", "ppmmu1", "pmu";
  565. clocks = <0x2 0x2a 0x2 0x63>;
  566. clock-names = "bus", "core";
  567. resets = <0x2 0x17>;
  568. #cooling-cells = <0x2>;
  569. assigned-clocks = <0x2 0x63>;
  570. assigned-clock-rates = <0x16e36000>;
  571. operating-points-v2 = <0x19>;
  572. linux,phandle = <0x34>;
  573. phandle = <0x34>;
  574. };
  575.  
  576. interrupt-controller@01c81000 {
  577. compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
  578. reg = <0x1c81000 0x1000 0x1c82000 0x2000 0x1c84000 0x2000 0x1c86000 0x2000>;
  579. interrupt-controller;
  580. #interrupt-cells = <0x3>;
  581. interrupts = <0x1 0x9 0xf04>;
  582. linux,phandle = <0x1>;
  583. phandle = <0x1>;
  584. };
  585.  
  586. rtc@01f00000 {
  587. compatible = "allwinner,sun6i-a31-rtc";
  588. reg = <0x1f00000 0x54>;
  589. interrupts = <0x0 0x28 0x4 0x0 0x29 0x4>;
  590. clock-output-names = "osc32k";
  591. clocks = <0x1a>;
  592. #clock-cells = <0x1>;
  593. linux,phandle = <0x12>;
  594. phandle = <0x12>;
  595. };
  596.  
  597. interrupt-controller@01f00c0c {
  598. compatible = "allwinner,sun6i-a31-sc-nmi";
  599. interrupt-controller;
  600. #interrupt-cells = <0x2>;
  601. reg = <0x1f00c0c 0x38>;
  602. interrupts = <0x0 0x20 0x4>;
  603. linux,phandle = <0x22>;
  604. phandle = <0x22>;
  605. };
  606.  
  607. prcm@01f01400 {
  608. compatible = "allwinner,sun8i-a23-prcm";
  609. reg = <0x1f01400 0x200>;
  610.  
  611. ar100_clk {
  612. compatible = "fixed-factor-clock";
  613. #clock-cells = <0x0>;
  614. clock-div = <0x1>;
  615. clock-mult = <0x1>;
  616. clocks = <0x11>;
  617. clock-output-names = "ar100";
  618. linux,phandle = <0x1b>;
  619. phandle = <0x1b>;
  620. };
  621.  
  622. ahb0_clk {
  623. compatible = "fixed-factor-clock";
  624. #clock-cells = <0x0>;
  625. clock-div = <0x1>;
  626. clock-mult = <0x1>;
  627. clocks = <0x1b>;
  628. clock-output-names = "ahb0";
  629. linux,phandle = <0x1c>;
  630. phandle = <0x1c>;
  631. };
  632.  
  633. apb0_clk {
  634. compatible = "allwinner,sun8i-a23-apb0-clk";
  635. #clock-cells = <0x0>;
  636. clocks = <0x1c>;
  637. clock-output-names = "apb0";
  638. linux,phandle = <0x1d>;
  639. phandle = <0x1d>;
  640. };
  641.  
  642. apb0_gates_clk {
  643. compatible = "allwinner,sun8i-a23-apb0-gates-clk";
  644. #clock-cells = <0x1>;
  645. clocks = <0x1d>;
  646. clock-output-names = "apb0_pio", "apb0_timer", "apb0_rsb", "apb0_uart", "apb0_i2c";
  647. linux,phandle = <0x1e>;
  648. phandle = <0x1e>;
  649. };
  650.  
  651. apb0_rst {
  652. compatible = "allwinner,sun6i-a31-clock-reset";
  653. #reset-cells = <0x1>;
  654. linux,phandle = <0x1f>;
  655. phandle = <0x1f>;
  656. };
  657.  
  658. codec-analog {
  659. compatible = "allwinner,sun8i-a23-codec-analog";
  660. linux,phandle = <0x2d>;
  661. phandle = <0x2d>;
  662. };
  663. };
  664.  
  665. cpucfg@01f01c00 {
  666. compatible = "allwinner,sun8i-a23-cpuconfig";
  667. reg = <0x1f01c00 0x300>;
  668. };
  669.  
  670. serial@01f02800 {
  671. compatible = "snps,dw-apb-uart";
  672. reg = <0x1f02800 0x400>;
  673. interrupts = <0x0 0x26 0x4>;
  674. reg-shift = <0x2>;
  675. reg-io-width = <0x4>;
  676. clocks = <0x1e 0x4>;
  677. resets = <0x1f 0x4>;
  678. status = "okay";
  679. pinctrl-names = "default";
  680. pinctrl-0 = <0x20>;
  681. };
  682.  
  683. pinctrl@01f02c00 {
  684. compatible = "allwinner,sun8i-a23-r-pinctrl";
  685. reg = <0x1f02c00 0x400>;
  686. interrupts = <0x0 0x2d 0x4>;
  687. clocks = <0x1e 0x0 0x11 0x12 0x0>;
  688. clock-names = "apb", "hosc", "losc";
  689. resets = <0x1f 0x0>;
  690. gpio-controller;
  691. interrupt-controller;
  692. #interrupt-cells = <0x3>;
  693. #address-cells = <0x1>;
  694. #size-cells = <0x0>;
  695. #gpio-cells = <0x3>;
  696.  
  697. r_rsb {
  698. pins = "PL0", "PL1";
  699. function = "s_rsb";
  700. drive-strength = <0x14>;
  701. bias-pull-up;
  702. linux,phandle = <0x21>;
  703. phandle = <0x21>;
  704. };
  705.  
  706. r_uart@0 {
  707. pins = "PL2", "PL3";
  708. function = "s_uart";
  709. linux,phandle = <0x20>;
  710. phandle = <0x20>;
  711. };
  712.  
  713. wifi_pwrseq_pin@0 {
  714. pins = "PL6", "PL7", "PL11";
  715. function = "gpio_in";
  716. bias-pull-up;
  717. linux,phandle = <0x3b>;
  718. phandle = <0x3b>;
  719. };
  720. };
  721.  
  722. rsb@01f03400 {
  723. compatible = "allwinner,sun8i-a23-rsb";
  724. reg = <0x1f03400 0x400>;
  725. interrupts = <0x0 0x27 0x4>;
  726. clocks = <0x1e 0x3>;
  727. clock-frequency = <0x2dc6c0>;
  728. resets = <0x1f 0x3>;
  729. pinctrl-names = "default";
  730. pinctrl-0 = <0x21>;
  731. status = "okay";
  732. #address-cells = <0x1>;
  733. #size-cells = <0x0>;
  734.  
  735. pmic@3a3 {
  736. compatible = "x-powers,axp223";
  737. reg = <0x3a3>;
  738. interrupt-parent = <0x22>;
  739. interrupts = <0x0 0x8>;
  740. eldoin-supply = <0x8>;
  741. drivevbus-supply = <0x23>;
  742. x-powers,drive-vbus-en;
  743. interrupt-controller;
  744. #interrupt-cells = <0x1>;
  745.  
  746. ac-power-supply {
  747. compatible = "x-powers,axp221-ac-power-supply";
  748. status = "disabled";
  749. };
  750.  
  751. regulators {
  752. x-powers,dcdc-freq = <0xbb8>;
  753.  
  754. dcdc1 {
  755. regulator-name = "vcc-3v0";
  756. regulator-always-on;
  757. regulator-min-microvolt = <0x2dc6c0>;
  758. regulator-max-microvolt = <0x2dc6c0>;
  759. linux,phandle = <0x8>;
  760. phandle = <0x8>;
  761. };
  762.  
  763. dcdc2 {
  764. regulator-name = "vdd-sys";
  765. regulator-always-on;
  766. regulator-min-microvolt = <0xdbba0>;
  767. regulator-max-microvolt = <0x155cc0>;
  768. linux,phandle = <0x5>;
  769. phandle = <0x5>;
  770. };
  771.  
  772. dcdc3 {
  773. regulator-name = "vdd-cpu";
  774. regulator-always-on;
  775. regulator-min-microvolt = <0xdbba0>;
  776. regulator-max-microvolt = <0x155cc0>;
  777. };
  778.  
  779. dcdc4 {
  780. regulator-name = "dcdc4";
  781. };
  782.  
  783. dcdc5 {
  784. regulator-name = "vcc-dram";
  785. regulator-always-on;
  786. regulator-min-microvolt = <0x16e360>;
  787. regulator-max-microvolt = <0x16e360>;
  788. };
  789.  
  790. dc1sw {
  791. regulator-name = "vcc-lcd";
  792. linux,phandle = <0x3>;
  793. phandle = <0x3>;
  794. };
  795.  
  796. dc5ldo {
  797. regulator-name = "vdd-cpus";
  798. regulator-always-on;
  799. regulator-min-microvolt = <0xdbba0>;
  800. regulator-max-microvolt = <0x155cc0>;
  801. };
  802.  
  803. aldo1 {
  804. regulator-name = "vcc-io";
  805. regulator-always-on;
  806. regulator-min-microvolt = <0x2dc6c0>;
  807. regulator-max-microvolt = <0x2dc6c0>;
  808. };
  809.  
  810. aldo2 {
  811. regulator-name = "vdd-dll";
  812. regulator-always-on;
  813. regulator-min-microvolt = <0x23dbb0>;
  814. regulator-max-microvolt = <0x286f90>;
  815. };
  816.  
  817. aldo3 {
  818. regulator-name = "vcc-pll-avcc";
  819. regulator-always-on;
  820. regulator-min-microvolt = <0x2932e0>;
  821. regulator-max-microvolt = <0x325aa0>;
  822. };
  823.  
  824. dldo1 {
  825. regulator-name = "vcc-wifi";
  826. regulator-min-microvolt = <0x325aa0>;
  827. regulator-max-microvolt = <0x325aa0>;
  828. linux,phandle = <0xb>;
  829. phandle = <0xb>;
  830. };
  831.  
  832. dldo2 {
  833. regulator-name = "dldo2";
  834. };
  835.  
  836. dldo3 {
  837. regulator-name = "dldo3";
  838. };
  839.  
  840. dldo4 {
  841. regulator-name = "dldo4";
  842. };
  843.  
  844. eldo1 {
  845. regulator-name = "eldo1";
  846. };
  847.  
  848. eldo2 {
  849. regulator-name = "eldo2";
  850. };
  851.  
  852. eldo3 {
  853. regulator-name = "eldo3";
  854. };
  855.  
  856. ldo_io0 {
  857. regulator-name = "ldo_io0";
  858. status = "disabled";
  859. };
  860.  
  861. ldo_io1 {
  862. regulator-name = "vcc-touchscreen";
  863. status = "okay";
  864. regulator-min-microvolt = <0x325aa0>;
  865. regulator-max-microvolt = <0x325aa0>;
  866. };
  867.  
  868. rtc_ldo {
  869. regulator-always-on;
  870. regulator-min-microvolt = <0x2dc6c0>;
  871. regulator-max-microvolt = <0x2dc6c0>;
  872. regulator-name = "vcc-rtc";
  873. };
  874.  
  875. drivevbus {
  876. regulator-name = "usb0-vbus";
  877. status = "okay";
  878. linux,phandle = <0x10>;
  879. phandle = <0x10>;
  880. };
  881. };
  882.  
  883. usb_power_supply {
  884. compatible = "x-powers,axp223-usb-power-supply";
  885. status = "okay";
  886. linux,phandle = <0xf>;
  887. phandle = <0xf>;
  888. };
  889. };
  890. };
  891.  
  892. lcd-controller@01c0c000 {
  893. compatible = "allwinner,sun8i-a33-tcon";
  894. reg = <0x1c0c000 0x1000>;
  895. interrupts = <0x0 0x56 0x4>;
  896. clocks = <0x2 0x26 0x2 0x57>;
  897. clock-names = "ahb", "tcon-ch0";
  898. clock-output-names = "tcon-pixel-clock";
  899. resets = <0x2 0x13>;
  900. reset-names = "lcd";
  901. status = "disabled";
  902.  
  903. ports {
  904. #address-cells = <0x1>;
  905. #size-cells = <0x0>;
  906.  
  907. port@0 {
  908. #address-cells = <0x1>;
  909. #size-cells = <0x0>;
  910. reg = <0x0>;
  911.  
  912. endpoint@0 {
  913. reg = <0x0>;
  914. remote-endpoint = <0x24>;
  915. linux,phandle = <0x29>;
  916. phandle = <0x29>;
  917. };
  918. };
  919.  
  920. port@1 {
  921. #address-cells = <0x1>;
  922. #size-cells = <0x0>;
  923. reg = <0x1>;
  924. };
  925. };
  926. };
  927.  
  928. crypto-engine@01c15000 {
  929. compatible = "allwinner,sun4i-a10-crypto";
  930. reg = <0x1c15000 0x1000>;
  931. interrupts = <0x0 0x50 0x4>;
  932. clocks = <0x2 0x18 0x2 0x45>;
  933. clock-names = "ahb", "mod";
  934. resets = <0x2 0x5>;
  935. reset-names = "ahb";
  936. };
  937.  
  938. dai@01c22c00 {
  939. #sound-dai-cells = <0x0>;
  940. compatible = "allwinner,sun6i-a31-i2s";
  941. reg = <0x1c22c00 0x200>;
  942. interrupts = <0x0 0x1d 0x4>;
  943. clocks = <0x2 0x2f 0x2 0x5c>;
  944. clock-names = "apb", "mod";
  945. resets = <0x2 0x1d>;
  946. dmas = <0x15 0xf 0x15 0xf>;
  947. dma-names = "rx", "tx";
  948. status = "disabled";
  949. linux,phandle = <0x2e>;
  950. phandle = <0x2e>;
  951. };
  952.  
  953. codec@01c22e00 {
  954. #sound-dai-cells = <0x0>;
  955. compatible = "allwinner,sun8i-a33-codec";
  956. reg = <0x1c22e00 0x400>;
  957. interrupts = <0x0 0x1d 0x4>;
  958. clocks = <0x2 0x2f 0x2 0x5c>;
  959. clock-names = "bus", "mod";
  960. status = "disabled";
  961. linux,phandle = <0x2f>;
  962. phandle = <0x2f>;
  963. };
  964.  
  965. ths@01c25000 {
  966. compatible = "allwinner,sun8i-a33-ths";
  967. reg = <0x1c25000 0x100>;
  968. #thermal-sensor-cells = <0x0>;
  969. #io-channel-cells = <0x0>;
  970. linux,phandle = <0x2b>;
  971. phandle = <0x2b>;
  972. };
  973.  
  974. display-frontend@01e00000 {
  975. compatible = "allwinner,sun8i-a33-display-frontend";
  976. reg = <0x1e00000 0x20000>;
  977. interrupts = <0x0 0x5d 0x4>;
  978. clocks = <0x2 0x29 0x2 0x56 0x2 0x53>;
  979. clock-names = "ahb", "mod", "ram";
  980. resets = <0x2 0x16>;
  981. status = "disabled";
  982. linux,phandle = <0x2a>;
  983. phandle = <0x2a>;
  984.  
  985. ports {
  986. #address-cells = <0x1>;
  987. #size-cells = <0x0>;
  988.  
  989. port@1 {
  990. #address-cells = <0x1>;
  991. #size-cells = <0x0>;
  992. reg = <0x1>;
  993.  
  994. endpoint@0 {
  995. reg = <0x0>;
  996. remote-endpoint = <0x25>;
  997. linux,phandle = <0x26>;
  998. phandle = <0x26>;
  999. };
  1000. };
  1001. };
  1002. };
  1003.  
  1004. display-backend@01e60000 {
  1005. compatible = "allwinner,sun8i-a33-display-backend";
  1006. reg = <0x1e60000 0x10000 0x1e80000 0x1000>;
  1007. reg-names = "be", "sat";
  1008. interrupts = <0x0 0x5f 0x4>;
  1009. clocks = <0x2 0x28 0x2 0x55 0x2 0x54 0x2 0x2e>;
  1010. clock-names = "ahb", "mod", "ram", "sat";
  1011. resets = <0x2 0x15 0x2 0x1b>;
  1012. reset-names = "be", "sat";
  1013. assigned-clocks = <0x2 0x55>;
  1014. assigned-clock-rates = <0x11e1a300>;
  1015.  
  1016. ports {
  1017. #address-cells = <0x1>;
  1018. #size-cells = <0x0>;
  1019.  
  1020. port@0 {
  1021. #address-cells = <0x1>;
  1022. #size-cells = <0x0>;
  1023. reg = <0x0>;
  1024.  
  1025. endpoint@0 {
  1026. reg = <0x0>;
  1027. remote-endpoint = <0x26>;
  1028. linux,phandle = <0x25>;
  1029. phandle = <0x25>;
  1030. };
  1031. };
  1032.  
  1033. port@1 {
  1034. #address-cells = <0x1>;
  1035. #size-cells = <0x0>;
  1036. reg = <0x1>;
  1037.  
  1038. endpoint@0 {
  1039. reg = <0x0>;
  1040. remote-endpoint = <0x27>;
  1041. linux,phandle = <0x28>;
  1042. phandle = <0x28>;
  1043. };
  1044. };
  1045. };
  1046. };
  1047.  
  1048. drc@01e70000 {
  1049. compatible = "allwinner,sun8i-a33-drc";
  1050. reg = <0x1e70000 0x10000>;
  1051. interrupts = <0x0 0x5b 0x4>;
  1052. clocks = <0x2 0x2d 0x2 0x62 0x2 0x52>;
  1053. clock-names = "ahb", "mod", "ram";
  1054. resets = <0x2 0x1a>;
  1055. assigned-clocks = <0x2 0x62>;
  1056. assigned-clock-rates = <0x11e1a300>;
  1057.  
  1058. ports {
  1059. #address-cells = <0x1>;
  1060. #size-cells = <0x0>;
  1061.  
  1062. port@0 {
  1063. #address-cells = <0x1>;
  1064. #size-cells = <0x0>;
  1065. reg = <0x0>;
  1066.  
  1067. endpoint@0 {
  1068. reg = <0x0>;
  1069. remote-endpoint = <0x28>;
  1070. linux,phandle = <0x27>;
  1071. phandle = <0x27>;
  1072. };
  1073. };
  1074.  
  1075. port@1 {
  1076. #address-cells = <0x1>;
  1077. #size-cells = <0x0>;
  1078. reg = <0x1>;
  1079.  
  1080. endpoint@0 {
  1081. reg = <0x0>;
  1082. remote-endpoint = <0x29>;
  1083. linux,phandle = <0x24>;
  1084. phandle = <0x24>;
  1085. };
  1086. };
  1087. };
  1088. };
  1089. };
  1090.  
  1091. opp_table0 {
  1092. compatible = "operating-points-v2";
  1093. opp-shared;
  1094. linux,phandle = <0x4>;
  1095. phandle = <0x4>;
  1096.  
  1097. opp@120000000 {
  1098. opp-hz = <0x0 0x7270e00>;
  1099. opp-microvolt = <0xfde80>;
  1100. clock-latency-ns = <0x3b9b0>;
  1101. };
  1102.  
  1103. opp@240000000 {
  1104. opp-hz = <0x0 0xe4e1c00>;
  1105. opp-microvolt = <0xfde80>;
  1106. clock-latency-ns = <0x3b9b0>;
  1107. };
  1108.  
  1109. opp@312000000 {
  1110. opp-hz = <0x0 0x1298be00>;
  1111. opp-microvolt = <0xfde80>;
  1112. clock-latency-ns = <0x3b9b0>;
  1113. };
  1114.  
  1115. opp@408000000 {
  1116. opp-hz = <0x0 0x18519600>;
  1117. opp-microvolt = <0xfde80>;
  1118. clock-latency-ns = <0x3b9b0>;
  1119. };
  1120.  
  1121. opp@480000000 {
  1122. opp-hz = <0x0 0x1c9c3800>;
  1123. opp-microvolt = <0xfde80>;
  1124. clock-latency-ns = <0x3b9b0>;
  1125. };
  1126.  
  1127. opp@504000000 {
  1128. opp-hz = <0x0 0x1e0a6e00>;
  1129. opp-microvolt = <0xfde80>;
  1130. clock-latency-ns = <0x3b9b0>;
  1131. };
  1132.  
  1133. opp@600000000 {
  1134. opp-hz = <0x0 0x23c34600>;
  1135. opp-microvolt = <0xfde80>;
  1136. clock-latency-ns = <0x3b9b0>;
  1137. };
  1138.  
  1139. opp@648000000 {
  1140. opp-hz = <0x0 0x269fb200>;
  1141. opp-microvolt = <0xfde80>;
  1142. clock-latency-ns = <0x3b9b0>;
  1143. };
  1144.  
  1145. opp@720000000 {
  1146. opp-hz = <0x0 0x2aea5400>;
  1147. opp-microvolt = <0x10c8e0>;
  1148. clock-latency-ns = <0x3b9b0>;
  1149. };
  1150.  
  1151. opp@816000000 {
  1152. opp-hz = <0x0 0x30a32c00>;
  1153. opp-microvolt = <0x10c8e0>;
  1154. clock-latency-ns = <0x3b9b0>;
  1155. };
  1156.  
  1157. opp@912000000 {
  1158. opp-hz = <0x0 0x365c0400>;
  1159. opp-microvolt = <0x124f80>;
  1160. clock-latency-ns = <0x3b9b0>;
  1161. };
  1162.  
  1163. opp@1008000000 {
  1164. opp-hz = <0x0 0x3c14dc00>;
  1165. opp-microvolt = <0x124f80>;
  1166. clock-latency-ns = <0x3b9b0>;
  1167. };
  1168. };
  1169.  
  1170. display-engine {
  1171. compatible = "allwinner,sun8i-a33-display-engine";
  1172. allwinner,pipelines = <0x2a>;
  1173. status = "disabled";
  1174. };
  1175.  
  1176. iio-hwmon {
  1177. compatible = "iio-hwmon";
  1178. io-channels = <0x2b>;
  1179. };
  1180.  
  1181. gpu-opp-table {
  1182. compatible = "operating-points-v2";
  1183. linux,phandle = <0x19>;
  1184. phandle = <0x19>;
  1185.  
  1186. opp@144000000 {
  1187. opp-hz = <0x0 0x8954400>;
  1188. };
  1189.  
  1190. opp@240000000 {
  1191. opp-hz = <0x0 0xe4e1c00>;
  1192. };
  1193.  
  1194. opp@384000000 {
  1195. opp-hz = <0x0 0x16e36000>;
  1196. };
  1197. };
  1198.  
  1199. sound {
  1200. compatible = "simple-audio-card";
  1201. simple-audio-card,name = "sun8i-a33-audio";
  1202. simple-audio-card,format = "i2s";
  1203. simple-audio-card,frame-master = <0x2c>;
  1204. simple-audio-card,bitclock-master = <0x2c>;
  1205. simple-audio-card,mclk-fs = <0x200>;
  1206. simple-audio-card,aux-devs = <0x2d>;
  1207. simple-audio-card,routing = "Left DAC", "AIF1 Slot 0 Left", "Right DAC", "AIF1 Slot 0 Right";
  1208. status = "disabled";
  1209.  
  1210. simple-audio-card,cpu {
  1211. sound-dai = <0x2e>;
  1212. };
  1213.  
  1214. simple-audio-card,codec {
  1215. sound-dai = <0x2f>;
  1216. linux,phandle = <0x2c>;
  1217. phandle = <0x2c>;
  1218. };
  1219. };
  1220.  
  1221. thermal-zones {
  1222.  
  1223. cpu_thermal {
  1224. polling-delay-passive = <0xfa>;
  1225. polling-delay = <0x3e8>;
  1226. thermal-sensors = <0x2b>;
  1227.  
  1228. cooling-maps {
  1229.  
  1230. map0 {
  1231. trip = <0x30>;
  1232. cooling-device = <0x31 0xffffffff 0xffffffff>;
  1233. };
  1234.  
  1235. map1 {
  1236. trip = <0x32>;
  1237. cooling-device = <0x31 0xffffffff 0xffffffff>;
  1238. };
  1239.  
  1240. map2 {
  1241. trip = <0x33>;
  1242. cooling-device = <0x34 0x1 0xffffffff>;
  1243. };
  1244.  
  1245. map3 {
  1246. trip = <0x35>;
  1247. cooling-device = <0x34 0x2 0xffffffff>;
  1248. };
  1249. };
  1250.  
  1251. trips {
  1252.  
  1253. cpu_alert0 {
  1254. temperature = <0x124f8>;
  1255. hysteresis = <0x7d0>;
  1256. type = "passive";
  1257. linux,phandle = <0x30>;
  1258. phandle = <0x30>;
  1259. };
  1260.  
  1261. gpu_alert0 {
  1262. temperature = <0x14c08>;
  1263. hysteresis = <0x7d0>;
  1264. type = "passive";
  1265. linux,phandle = <0x33>;
  1266. phandle = <0x33>;
  1267. };
  1268.  
  1269. cpu_alert1 {
  1270. temperature = <0x15f90>;
  1271. hysteresis = <0x7d0>;
  1272. type = "hot";
  1273. linux,phandle = <0x32>;
  1274. phandle = <0x32>;
  1275. };
  1276.  
  1277. gpu_alert1 {
  1278. temperature = <0x17318>;
  1279. hysteresis = <0x7d0>;
  1280. type = "hot";
  1281. linux,phandle = <0x35>;
  1282. phandle = <0x35>;
  1283. };
  1284.  
  1285. cpu_crit {
  1286. temperature = <0x1adb0>;
  1287. hysteresis = <0x7d0>;
  1288. type = "critical";
  1289. };
  1290. };
  1291. };
  1292. };
  1293.  
  1294. ahci-5v {
  1295. compatible = "regulator-fixed";
  1296. pinctrl-names = "default";
  1297. pinctrl-0 = <0x36>;
  1298. regulator-name = "ahci-5v";
  1299. regulator-min-microvolt = <0x4c4b40>;
  1300. regulator-max-microvolt = <0x4c4b40>;
  1301. regulator-boot-on;
  1302. enable-active-high;
  1303. gpio = <0x9 0x1 0x8 0x0>;
  1304. status = "disabled";
  1305. };
  1306.  
  1307. usb0-vbus {
  1308. compatible = "regulator-fixed";
  1309. pinctrl-names = "default";
  1310. pinctrl-0 = <0x37>;
  1311. regulator-name = "usb0-vbus";
  1312. regulator-min-microvolt = <0x4c4b40>;
  1313. regulator-max-microvolt = <0x4c4b40>;
  1314. enable-active-high;
  1315. gpio = <0x9 0x1 0x9 0x0>;
  1316. status = "disabled";
  1317. };
  1318.  
  1319. usb1-vbus {
  1320. compatible = "regulator-fixed";
  1321. pinctrl-names = "default";
  1322. pinctrl-0 = <0x38>;
  1323. regulator-name = "usb1-vbus";
  1324. regulator-min-microvolt = <0x4c4b40>;
  1325. regulator-max-microvolt = <0x4c4b40>;
  1326. regulator-boot-on;
  1327. enable-active-high;
  1328. gpio = <0x9 0x7 0x6 0x0>;
  1329. status = "disabled";
  1330. };
  1331.  
  1332. usb2-vbus {
  1333. compatible = "regulator-fixed";
  1334. pinctrl-names = "default";
  1335. pinctrl-0 = <0x39>;
  1336. regulator-name = "usb2-vbus";
  1337. regulator-min-microvolt = <0x4c4b40>;
  1338. regulator-max-microvolt = <0x4c4b40>;
  1339. regulator-boot-on;
  1340. enable-active-high;
  1341. gpio = <0x9 0x7 0x3 0x0>;
  1342. status = "disabled";
  1343. };
  1344.  
  1345. vcc3v0 {
  1346. compatible = "regulator-fixed";
  1347. regulator-name = "vcc3v0";
  1348. regulator-min-microvolt = <0x2dc6c0>;
  1349. regulator-max-microvolt = <0x2dc6c0>;
  1350. linux,phandle = <0x14>;
  1351. phandle = <0x14>;
  1352. };
  1353.  
  1354. vcc3v3 {
  1355. compatible = "regulator-fixed";
  1356. regulator-name = "vcc3v3";
  1357. regulator-min-microvolt = <0x325aa0>;
  1358. regulator-max-microvolt = <0x325aa0>;
  1359. };
  1360.  
  1361. vcc5v0 {
  1362. compatible = "regulator-fixed";
  1363. regulator-name = "vcc5v0";
  1364. regulator-min-microvolt = <0x4c4b40>;
  1365. regulator-max-microvolt = <0x4c4b40>;
  1366. linux,phandle = <0x23>;
  1367. phandle = <0x23>;
  1368. };
  1369.  
  1370. backlight {
  1371. compatible = "pwm-backlight";
  1372. pwms = <0x3a 0x0 0xc350 0x1>;
  1373. brightness-levels = <0x0 0xa 0x14 0x1e 0x28 0x32 0x3c 0x46 0x50 0x5a 0x64>;
  1374. default-brightness-level = <0x8>;
  1375. enable-gpios = <0x9 0x7 0x6 0x0>;
  1376. };
  1377.  
  1378. wifi_pwrseq {
  1379. compatible = "mmc-pwrseq-simple";
  1380. pinctrl-names = "default";
  1381. pinctrl-0 = <0x3b>;
  1382. post-power-on-delay-ms = <0xc8>;
  1383. linux,phandle = <0xc>;
  1384. phandle = <0xc>;
  1385. };
  1386. };
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