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Raspberry Pi OS DTS on Raspberry Pi 5

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May 7th, 2024
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  1. /dts-v1/;
  2.  
  3. / {
  4. #address-cells = <0x02>;
  5. #size-cells = <0x01>;
  6. compatible = "raspberrypi,5-model-b\0brcm,bcm2712";
  7. interrupt-parent = <0x01>;
  8. memreserve = <0x3fc00000 0x400000>;
  9. model = "Raspberry Pi 5 Model B Rev 1.0";
  10. serial-number = "f0141a7b43378f25";
  11.  
  12. __overrides__ {
  13. act_led_activelow = "\0\0\0lgpios:8";
  14. act_led_gpio = [00 00 00 6c 67 70 69 6f 73 3a 34 00 00 00 00 6c 67 70 69 6f 73 3a 30 3d 00 00 00 00 35];
  15. act_led_trigger = "\0\0\0llinux,default-trigger";
  16. arm_freq;
  17. axiperf = "\0\0\0]status";
  18. bdaddr = "\0\0\0^local-bd-address[";
  19. button_debounce = "\0\0\0_debounce-interval:0";
  20. cooling_fan = [00 00 00 04 73 74 61 74 75 73 00 00 00 00 60 73 74 61 74 75 73 00];
  21. drm_fb0_rp1_dpi = "\0\0\0bdrm-fb0=\0/axi/pcie@120000/rp1/dpi@148000";
  22. drm_fb0_rp1_dsi0 = "\0\0\0bdrm-fb0=\0/axi/pcie@120000/rp1/dsi@110000";
  23. drm_fb0_rp1_dsi1 = "\0\0\0bdrm-fb0=\0/axi/pcie@120000/rp1/dsi@128000";
  24. drm_fb0_vc4 = "\0\0\0bdrm-fb0=\0/axi/gpu";
  25. drm_fb1_rp1_dpi = "\0\0\0bdrm-fb1=\0/axi/pcie@120000/rp1/dpi@148000";
  26. drm_fb1_rp1_dsi0 = "\0\0\0bdrm-fb1=\0/axi/pcie@120000/rp1/dsi@110000";
  27. drm_fb1_rp1_dsi1 = "\0\0\0bdrm-fb1=\0/axi/pcie@120000/rp1/dsi@128000";
  28. drm_fb1_vc4 = "\0\0\0bdrm-fb1=\0/axi/gpu";
  29. drm_fb2_rp1_dpi = "\0\0\0bdrm-fb2=\0/axi/pcie@120000/rp1/dpi@148000";
  30. drm_fb2_rp1_dsi0 = "\0\0\0bdrm-fb2=\0/axi/pcie@120000/rp1/dsi@110000";
  31. drm_fb2_rp1_dsi1 = "\0\0\0bdrm-fb2=\0/axi/pcie@120000/rp1/dsi@128000";
  32. drm_fb2_vc4 = "\0\0\0bdrm-fb2=\0/axi/gpu";
  33. eth_led0 = "\0\0\0Hled-modes:0";
  34. eth_led1 = "\0\0\0Hled-modes:4";
  35. fan_temp0 = [00 00 00 03 74 65 6d 70 65 72 61 74 75 72 65 3a 30 00];
  36. fan_temp0_hyst = [00 00 00 03 68 79 73 74 65 72 65 73 69 73 3a 30 00];
  37. fan_temp0_speed = [00 00 00 04 63 6f 6f 6c 69 6e 67 2d 6c 65 76 65 6c 73 3a 34 00];
  38. fan_temp1 = [00 00 00 05 74 65 6d 70 65 72 61 74 75 72 65 3a 30 00];
  39. fan_temp1_hyst = [00 00 00 05 68 79 73 74 65 72 65 73 69 73 3a 30 00];
  40. fan_temp1_speed = [00 00 00 04 63 6f 6f 6c 69 6e 67 2d 6c 65 76 65 6c 73 3a 38 00];
  41. fan_temp2 = [00 00 00 06 74 65 6d 70 65 72 61 74 75 72 65 3a 30 00];
  42. fan_temp2_hyst = [00 00 00 06 68 79 73 74 65 72 65 73 69 73 3a 30 00];
  43. fan_temp2_speed = [00 00 00 04 63 6f 6f 6c 69 6e 67 2d 6c 65 76 65 6c 73 3a 31 32 00];
  44. fan_temp3 = "\0\0\0\atemperature:0";
  45. fan_temp3_hyst = "\0\0\0\ahysteresis:0";
  46. fan_temp3_speed = [00 00 00 04 63 6f 6f 6c 69 6e 67 2d 6c 65 76 65 6c 73 3a 31 36 00];
  47. i2c = "\0\0\0dstatus";
  48. i2c0 = "\0\0\0cstatus";
  49. i2c0_baudrate = "\0\0\0cclock-frequency:0";
  50. i2c1 = "\0\0\0dstatus";
  51. i2c1_baudrate = "\0\0\0dclock-frequency:0";
  52. i2c_arm = "\0\0\0dstatus";
  53. i2c_arm_baudrate = "\0\0\0dclock-frequency:0";
  54. i2c_baudrate = "\0\0\0dclock-frequency:0";
  55. i2c_csi_dsi = "\0\0\0estatus";
  56. i2c_csi_dsi0 = "\0\0\0fstatus";
  57. i2c_csi_dsi1 = "\0\0\0estatus";
  58. i2c_vc = "\0\0\0cstatus";
  59. i2c_vc_baudrate = "\0\0\0cclock-frequency:0";
  60. krnbt = "\0\0\0^status";
  61. nvme = "\0\0\0gstatus";
  62. pcie_tperst_clk_ms = "\0\0\0gbrcm,tperst-clk-ms:0";
  63. pciex1 = "\0\0\0gstatus";
  64. pciex1_gen = "\0\0\0gmax-link-speed:0";
  65. pciex1_no_l0s = "\0\0\0gaspm-no-l0s?";
  66. pciex1_tperst_clk_ms = "\0\0\0gbrcm,tperst-clk-ms:0";
  67. pwr_led_activelow = "\0\0\0mgpios:8";
  68. pwr_led_gpio = "\0\0\0mgpios:4";
  69. pwr_led_trigger = "\0\0\0mlinux,default-trigger";
  70. random = "\0\0\0hstatus";
  71. rtc = "\0\0\0istatus";
  72. rtc_bbat_vchg = "\0\0\0itrickle-charge-microvolt:0";
  73. spi = "\0\0\0jstatus";
  74. suspend = "\0\0\0_linux,code:0=205";
  75. uart0 = "\0\0\0astatus";
  76. uart0_console = "\0\0\0astatus\0\0\0\0bconsole=\0/axi/pcie@120000/rp1/serial@30000";
  77. wifiaddr = "\0\0\0klocal-mac-address[";
  78. };
  79.  
  80. __symbols__ {
  81. _i2c0 = "/soc/i2c@7d005000";
  82. _i2c3 = "/soc/i2c@7d005600";
  83. _i2c4 = "/soc/i2c@7d005800";
  84. _i2c5 = "/soc/i2c@7d005a00";
  85. _i2c6 = "/soc/i2c@7d005c00";
  86. _i2c8 = "/soc/i2c@7d005e00";
  87. _i2s = "/soc/_i2s@7d003000";
  88. _pwm0 = "/soc/pwm@7d00c000";
  89. _pwm1 = "/soc/pwm@7d00c800";
  90. _spi0 = "/soc/spi@7d004000";
  91. _spi3 = "/soc/spi@7d004600";
  92. _spi4 = "/soc/spi@7d004800";
  93. _spi5 = "/soc/spi@7d004a00";
  94. _spi6 = "/soc/spi@7d004c00";
  95. _uart0 = "/soc/serial@7d001000";
  96. _uart2 = "/soc/serial@7d001400";
  97. _uart5 = "/soc/serial@7d001a00";
  98. aliases = "/aliases";
  99. aon_intr = "/soc/interrupt-controller@7d510600";
  100. aon_pwm_1pin = "/soc/pinctrl@7d510700/aon_pwm_1pin";
  101. aux = "/dummy";
  102. avs_monitor = "/soc/avs-monitor@7d542000";
  103. axi = "/axi";
  104. axiperf = "/soc/axiperf";
  105. bcm_reset = "/axi/reset-controller@1504318";
  106. blconfig = "/reserved-memory/nvram@0";
  107. bluetooth = "/soc/serial@7d50c000/bluetooth";
  108. bsc_aon_irq = "/soc/intc@7d517b00";
  109. bsc_irq = "/soc/intc@7d508380";
  110. bsc_m1_agpio13_pins = "/soc/pinctrl@7d510700/bsc_m1_agpio13_pins";
  111. bsc_m2_sgpio4_pins = "/soc/pinctrl@7d510700/bsc_m2_sgpio4_pins";
  112. bsc_pmu = "/soc/i2c@7d544000";
  113. bsc_pmu_sgpio4_pins = "/soc/pinctrl@7d510700/bsc_pmu_sgpio4_pins";
  114. bscc = "/soc/i2c@7d517a00";
  115. bscd = "/soc/i2c@7d508300";
  116. bt_shutdown_pins = "/soc/pinctrl@7d504100/bt_shutdown_pins";
  117. cam0_clk = "/cam0_clk";
  118. cam0_reg = "/cam0_reg";
  119. cam1_clk = "/cam1_clk";
  120. cam1_reg = "/cam1_reg";
  121. cam_dummy_reg = "/cam_dummy_reg";
  122. chosen = "/chosen";
  123. clk_108MHz = "/clk-108M";
  124. clk_27MHz = "/clk-27M";
  125. clk_emmc2 = "/clocks/clk_emmc2";
  126. clk_osc = "/clocks/clk-osc";
  127. clk_uart = "/clocks/clk_uart";
  128. clk_usb = "/clocks/clk-usb";
  129. clk_vpu = "/clocks/clk_vpu";
  130. clk_xosc = "/clocks/clk_xosc";
  131. clksrc_gp0 = "/clocks/clksrc_gp0";
  132. clksrc_gp1 = "/clocks/clksrc_gp1";
  133. clksrc_gp2 = "/clocks/clksrc_gp2";
  134. clksrc_gp3 = "/clocks/clksrc_gp3";
  135. clksrc_gp4 = "/clocks/clksrc_gp4";
  136. clksrc_gp5 = "/clocks/clksrc_gp5";
  137. clksrc_mipi0_dsi_byteclk = "/clocks/clksrc_mipi0_dsi_byteclk";
  138. clksrc_mipi1_dsi_byteclk = "/clocks/clksrc_mipi1_dsi_byteclk";
  139. clocks = "/clocks";
  140. cma = "/reserved-memory/linux,cma";
  141. cooling_maps = "/thermal-zones/cpu-thermal/cooling-maps";
  142. cprman = "/soc/cprman@7d202000";
  143. cpu0 = "/cpus/cpu@0";
  144. cpu1 = "/cpus/cpu@1";
  145. cpu2 = "/cpus/cpu@2";
  146. cpu3 = "/cpus/cpu@3";
  147. cpu_crit = "/thermal-zones/cpu-thermal/trips/cpu-crit";
  148. cpu_hot = "/thermal-zones/cpu-thermal/trips/cpu-hot";
  149. cpu_l2_irq = "/soc/intc@7d503000";
  150. cpu_tepid = "/thermal-zones/cpu-thermal/trips/cpu-tepid";
  151. cpu_thermal = "/thermal-zones/cpu-thermal";
  152. cpu_vhot = "/thermal-zones/cpu-thermal/trips/cpu-vhot";
  153. cpu_warm = "/thermal-zones/cpu-thermal/trips/cpu-warm";
  154. cpus = "/cpus";
  155. csi0 = "/axi/pcie@120000/rp1/csi@110000";
  156. csi1 = "/axi/pcie@120000/rp1/csi@128000";
  157. ddc0 = "/soc/i2c@7d508200";
  158. ddc1 = "/soc/i2c@7d508280";
  159. disp_intr = "/soc/interrupt-controller@7c502000";
  160. dma32 = "/axi/dma@10000";
  161. dma40 = "/axi/dma@10600";
  162. dpi = "/axi/pcie@120000/rp1/dpi@148000";
  163. dpi_16bit_cpadhi_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_cpadhi_gpio0";
  164. dpi_16bit_cpadhi_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_cpadhi_gpio2";
  165. dpi_16bit_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_gpio0";
  166. dpi_16bit_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_gpio2";
  167. dpi_18bit_cpadhi_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_18bit_cpadhi_gpio0";
  168. dpi_18bit_cpadhi_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_18bit_cpadhi_gpio2";
  169. dpi_18bit_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_18bit_gpio0";
  170. dpi_18bit_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_18bit_gpio2";
  171. dpi_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_24bit_gpio0";
  172. dpi_gpio1 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_24bit_gpio2";
  173. dsi0 = "/axi/pcie@120000/rp1/dsi@110000";
  174. dsi1 = "/axi/pcie@120000/rp1/dsi@128000";
  175. dummy = "/dummy";
  176. dvp = "/soc/clock@7c700000";
  177. emmc_aon_cd_pins = "/soc/pinctrl@7d510700/emmc_aon_cd_pins";
  178. emmc_sd_pulls = "/soc/pinctrl@7d504100/emmc_sd_pulls";
  179. fan = "/cooling_fan";
  180. fb = "/soc/fb";
  181. firmware = "/soc/firmware";
  182. firmware_clocks = "/soc/firmware/clocks";
  183. firmwarekms = "/soc/firmwarekms@7d503000";
  184. gicv2 = "/axi/interrupt-controller@7fff9000";
  185. gio = "/soc/gpio@7d508500";
  186. gio_aon = "/soc/gpio@7d517c00";
  187. gpio = "/axi/pcie@120000/rp1/gpio@d0000";
  188. hdmi0 = "/soc/hdmi@7ef00700";
  189. hdmi1 = "/soc/hdmi@7ef05700";
  190. hvs = "/hvs@107c580000";
  191. i2c0 = "/axi/pcie@120000/rp1/i2c@70000";
  192. i2c0if = "/i2c0if";
  193. i2c0mux = "/i2c0mux";
  194. i2c1 = "/axi/pcie@120000/rp1/i2c@74000";
  195. i2c2 = "/axi/pcie@120000/rp1/i2c@78000";
  196. i2c3 = "/axi/pcie@120000/rp1/i2c@7c000";
  197. i2c3_m4_agpio0_pins = "/soc/pinctrl@7d510700/i2c3_m4_agpio0_pins";
  198. i2c4 = "/axi/pcie@120000/rp1/i2c@80000";
  199. i2c5 = "/axi/pcie@120000/rp1/i2c@84000";
  200. i2c6 = "/axi/pcie@120000/rp1/i2c@88000";
  201. i2c_arm = "/axi/pcie@120000/rp1/i2c@74000";
  202. i2c_csi_dsi = "/axi/pcie@120000/rp1/i2c@80000";
  203. i2c_csi_dsi0 = "/axi/pcie@120000/rp1/i2c@88000";
  204. i2c_csi_dsi1 = "/axi/pcie@120000/rp1/i2c@80000";
  205. i2c_rp1boot = "/soc/i2c@7d005600";
  206. i2c_vc = "/axi/pcie@120000/rp1/i2c@70000";
  207. i2s = "/axi/pcie@120000/rp1/i2s@a0000";
  208. i2s_clk_consumer = "/axi/pcie@120000/rp1/i2s@a4000";
  209. i2s_clk_producer = "/axi/pcie@120000/rp1/i2s@a0000";
  210. iommu2 = "/axi/iommu@5100";
  211. iommu4 = "/axi/iommu@5200";
  212. iommu5 = "/axi/iommu@5280";
  213. iommuc = "/axi/iommuc@5b00";
  214. l2_cache = "/cpus/l2-cache";
  215. l3_cache = "/cpus/l3-cache";
  216. led_act = "/leds/led-act";
  217. led_pwr = "/leds/led-pwr";
  218. leds = "/leds";
  219. local_intc = "/soc/local_intc@7cd00000";
  220. macb_hclk = "/clocks/macb_hclk";
  221. macb_pclk = "/clocks/macb_pclk";
  222. mailbox = "/soc/mailbox@7c013880";
  223. main_aon_irq = "/soc/intc@7d517ac0";
  224. main_irq = "/soc/intc@7d508400";
  225. mip0 = "/axi/msi-controller@130000";
  226. mip1 = "/axi/msi-controller@131000";
  227. mop = "/soc/mop@7c500000";
  228. moplet = "/soc/moplet@7c501000";
  229. pcie0 = "/axi/pcie@100000";
  230. pcie1 = "/axi/pcie@110000";
  231. pcie2 = "/axi/pcie@120000";
  232. pcie_rescal = "/axi/reset-controller@119500";
  233. pciex1 = "/axi/pcie@110000";
  234. pciex4 = "/axi/pcie@120000";
  235. phy1 = "/axi/pcie@120000/rp1/ethernet@100000/ethernet-phy@1";
  236. pinctrl = "/soc/pinctrl@7d504100";
  237. pinctrl_aon = "/soc/pinctrl@7d510700";
  238. pisp_be = "/axi/pisp_be@880000";
  239. pixelvalve0 = "/soc/pixelvalve@7c410000";
  240. pixelvalve1 = "/soc/pixelvalve@7c411000";
  241. pm = "/soc/watchdog@7d200000";
  242. power = "/soc/power";
  243. pwm = "/axi/pcie@120000/rp1/pwm@98000";
  244. pwm0 = "/axi/pcie@120000/rp1/pwm@98000";
  245. pwm1 = "/axi/pcie@120000/rp1/pwm@9c000";
  246. pwm_aon = "/soc/pwm@7d517a80";
  247. pwm_aon_agpio1_pins = "/soc/pinctrl@7d510700/pwm_aon_agpio1_pins";
  248. pwm_aon_agpio4_pins = "/soc/pinctrl@7d510700/pwm_aon_agpio4_pins";
  249. pwm_aon_agpio7_pins = "/soc/pinctrl@7d510700/pwm_aon_agpio7_pins";
  250. pwr_button_pins = "/soc/pinctrl@7d504100/pwr_button_pins";
  251. pwr_key = "/pwr_button/pwr";
  252. random = "/soc/rng@7d208000";
  253. reset = "/soc/firmware/reset";
  254. rmem = "/reserved-memory";
  255. rp1 = "/axi/pcie@120000/rp1";
  256. rp1_adc = "/axi/pcie@120000/rp1/adc@c8000";
  257. rp1_clocks = "/axi/pcie@120000/rp1/clocks@18000";
  258. rp1_csi0 = "/axi/pcie@120000/rp1/csi@110000";
  259. rp1_csi1 = "/axi/pcie@120000/rp1/csi@128000";
  260. rp1_dma = "/axi/pcie@120000/rp1/dma@188000";
  261. rp1_dpi = "/axi/pcie@120000/rp1/dpi@148000";
  262. rp1_dpi_16bit_cpadhi_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_cpadhi_gpio0";
  263. rp1_dpi_16bit_cpadhi_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_cpadhi_gpio2";
  264. rp1_dpi_16bit_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_gpio0";
  265. rp1_dpi_16bit_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_gpio2";
  266. rp1_dpi_16bit_pad666_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_pad666_gpio0";
  267. rp1_dpi_16bit_pad666_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_16bit_pad666_gpio2";
  268. rp1_dpi_18bit_cpadhi_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_18bit_cpadhi_gpio0";
  269. rp1_dpi_18bit_cpadhi_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_18bit_cpadhi_gpio2";
  270. rp1_dpi_18bit_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_18bit_gpio0";
  271. rp1_dpi_18bit_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_18bit_gpio2";
  272. rp1_dpi_24bit_gpio0 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_24bit_gpio0";
  273. rp1_dpi_24bit_gpio2 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_24bit_gpio2";
  274. rp1_dpi_hvsync = "/axi/pcie@120000/rp1/gpio@d0000/rp1_dpi_hvsync";
  275. rp1_dsi0 = "/axi/pcie@120000/rp1/dsi@110000";
  276. rp1_dsi1 = "/axi/pcie@120000/rp1/dsi@128000";
  277. rp1_eth = "/axi/pcie@120000/rp1/ethernet@100000";
  278. rp1_gpclksrc0_gpio20 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_gpclksrc0_gpio20";
  279. rp1_gpclksrc0_gpio4 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_gpclksrc0_gpio4";
  280. rp1_gpclksrc1_gpio18 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_gpclksrc1_gpio18";
  281. rp1_gpclksrc1_gpio21 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_gpclksrc1_gpio21";
  282. rp1_gpclksrc1_gpio5 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_gpclksrc1_gpio5";
  283. rp1_gpio = "/axi/pcie@120000/rp1/gpio@d0000";
  284. rp1_i2c0 = "/axi/pcie@120000/rp1/i2c@70000";
  285. rp1_i2c0_0_1 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c0_0_1";
  286. rp1_i2c0_8_9 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c0_8_9";
  287. rp1_i2c1 = "/axi/pcie@120000/rp1/i2c@74000";
  288. rp1_i2c1_10_11 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c1_10_11";
  289. rp1_i2c1_2_3 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c1_2_3";
  290. rp1_i2c2 = "/axi/pcie@120000/rp1/i2c@78000";
  291. rp1_i2c2_12_13 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c2_12_13";
  292. rp1_i2c2_4_5 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c2_4_5";
  293. rp1_i2c3 = "/axi/pcie@120000/rp1/i2c@7c000";
  294. rp1_i2c3_14_15 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c3_14_15";
  295. rp1_i2c3_22_23 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c3_22_23";
  296. rp1_i2c3_6_7 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c3_6_7";
  297. rp1_i2c4 = "/axi/pcie@120000/rp1/i2c@80000";
  298. rp1_i2c4_34_35 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c4_34_35";
  299. rp1_i2c4_40_41 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c4_40_41";
  300. rp1_i2c5 = "/axi/pcie@120000/rp1/i2c@84000";
  301. rp1_i2c5_44_45 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c5_44_45";
  302. rp1_i2c6 = "/axi/pcie@120000/rp1/i2c@88000";
  303. rp1_i2c6_38_39 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2c6_38_39";
  304. rp1_i2s0 = "/axi/pcie@120000/rp1/i2s@a0000";
  305. rp1_i2s0_18_21 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2s0_18_21";
  306. rp1_i2s1 = "/axi/pcie@120000/rp1/i2s@a4000";
  307. rp1_i2s1_18_21 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_i2s1_18_21";
  308. rp1_i2s2 = "/axi/pcie@120000/rp1/i2s@a8000";
  309. rp1_mmc0 = "/axi/pcie@120000/rp1/mmc@180000";
  310. rp1_mmc1 = "/axi/pcie@120000/rp1/mmc@184000";
  311. rp1_pwm0 = "/axi/pcie@120000/rp1/pwm@98000";
  312. rp1_pwm1 = "/axi/pcie@120000/rp1/pwm@9c000";
  313. rp1_pwm1_gpio45 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_pwm1_gpio45";
  314. rp1_sdio0_22_27 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_sdio0_22_27";
  315. rp1_sdio1_28_33 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_sdio1_28_33";
  316. rp1_sdio_clk0 = "/axi/pcie@120000/rp1/sdio_clk0@b0004";
  317. rp1_sdio_clk1 = "/axi/pcie@120000/rp1/sdio_clk1@b4004";
  318. rp1_spi0 = "/axi/pcie@120000/rp1/spi@50000";
  319. rp1_spi0_cs_gpio7 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi0_cs_gpio7";
  320. rp1_spi0_gpio9 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi0_gpio9";
  321. rp1_spi1 = "/axi/pcie@120000/rp1/spi@54000";
  322. rp1_spi1_gpio19 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi1_gpio19";
  323. rp1_spi2 = "/axi/pcie@120000/rp1/spi@58000";
  324. rp1_spi2_gpio1 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi2_gpio1";
  325. rp1_spi3 = "/axi/pcie@120000/rp1/spi@5c000";
  326. rp1_spi3_gpio5 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi3_gpio5";
  327. rp1_spi4 = "/axi/pcie@120000/rp1/spi@60000";
  328. rp1_spi4_gpio9 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi4_gpio9";
  329. rp1_spi5 = "/axi/pcie@120000/rp1/spi@64000";
  330. rp1_spi5_gpio13 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi5_gpio13";
  331. rp1_spi6 = "/axi/pcie@120000/rp1/spi@68000";
  332. rp1_spi7 = "/axi/pcie@120000/rp1/spi@6c000";
  333. rp1_spi8 = "/axi/pcie@120000/rp1/spi@4c000";
  334. rp1_spi8_cs_gpio52 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi8_cs_gpio52";
  335. rp1_spi8_gpio49 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi8_gpio49";
  336. rp1_target = "/axi/pcie@120000";
  337. rp1_uart0 = "/axi/pcie@120000/rp1/serial@30000";
  338. rp1_uart0_14_15 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart0_14_15";
  339. rp1_uart0_ctsrts_16_17 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart0_ctsrts_16_17";
  340. rp1_uart1 = "/axi/pcie@120000/rp1/serial@34000";
  341. rp1_uart1_0_1 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart1_0_1";
  342. rp1_uart1_ctsrts_2_3 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart1_ctsrts_2_3";
  343. rp1_uart2 = "/axi/pcie@120000/rp1/serial@38000";
  344. rp1_uart2_4_5 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart2_4_5";
  345. rp1_uart2_ctsrts_6_7 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart2_ctsrts_6_7";
  346. rp1_uart3 = "/axi/pcie@120000/rp1/serial@3c000";
  347. rp1_uart3_8_9 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart3_8_9";
  348. rp1_uart3_ctsrts_10_11 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart3_ctsrts_10_11";
  349. rp1_uart4 = "/axi/pcie@120000/rp1/serial@40000";
  350. rp1_uart4_12_13 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart4_12_13";
  351. rp1_uart4_ctsrts_14_15 = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart4_ctsrts_14_15";
  352. rp1_uart5 = "/axi/pcie@120000/rp1/serial@44000";
  353. rp1_usb0 = "/axi/pcie@120000/rp1/usb@200000";
  354. rp1_usb1 = "/axi/pcie@120000/rp1/usb@300000";
  355. rp1_vdd_3v3 = "/rp1_vdd_3v3";
  356. rp1_vec = "/axi/pcie@120000/rp1/vec@144000";
  357. rpi_rtc = "/soc/rpi_rtc";
  358. rpivid = "/axi/codec@800000";
  359. sd_io_1v8_reg = "/sd_io_1v8_reg";
  360. sd_vcc_reg = "/sd_vcc_reg";
  361. sdhci_core = "/clocks/sdhci_core";
  362. sdhost = "/soc/mmc@7d002000";
  363. sdio1 = "/axi/mmc@fff000";
  364. sdio2 = "/axi/mmc@1100000";
  365. sdio2_30_pins = "/soc/pinctrl@7d504100/sdio2_30_pins";
  366. sdio_src = "/clocks/sdio_src";
  367. soc = "/soc";
  368. sound = "/soc/sound";
  369. spi0 = "/axi/pcie@120000/rp1/spi@50000";
  370. spi0_cs_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi0_cs_gpio7";
  371. spi0_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi0_gpio9";
  372. spi1 = "/axi/pcie@120000/rp1/spi@54000";
  373. spi10 = "/soc/spi@7d004000";
  374. spi10_cs_gpio1 = "/soc/pinctrl@7d504100/spi10_cs_gpio1";
  375. spi10_cs_pins = "/soc/pinctrl@7d504100/spi10_cs_gpio1";
  376. spi10_gpio2 = "/soc/pinctrl@7d504100/spi10_gpio2";
  377. spi10_pins = "/soc/pinctrl@7d504100/spi10_gpio2";
  378. spi2 = "/axi/pcie@120000/rp1/spi@58000";
  379. spi2_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi2_gpio1";
  380. spi3 = "/axi/pcie@120000/rp1/spi@5c000";
  381. spi3_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi3_gpio5";
  382. spi4 = "/axi/pcie@120000/rp1/spi@60000";
  383. spi4_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi4_gpio9";
  384. spi5 = "/axi/pcie@120000/rp1/spi@64000";
  385. spi5_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_spi5_gpio13";
  386. spidev0 = "/axi/pcie@120000/rp1/spi@50000/spidev@0";
  387. spidev1 = "/axi/pcie@120000/rp1/spi@50000/spidev@1";
  388. spidev10 = "/soc/spi@7d004000/spidev@0";
  389. syscon_piarbctl = "/axi/syscon@400018";
  390. system_timer = "/soc/timer@7c003000";
  391. thermal = "/soc/avs-monitor@7d542000/thermal";
  392. thermal_trips = "/thermal-zones/cpu-thermal/trips";
  393. uart0 = "/axi/pcie@120000/rp1/serial@30000";
  394. uart0_ctsrts_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart0_ctsrts_16_17";
  395. uart0_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart0_14_15";
  396. uart1 = "/axi/pcie@120000/rp1/serial@34000";
  397. uart10 = "/soc/serial@7d001000";
  398. uart1_ctsrts_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart1_ctsrts_2_3";
  399. uart1_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart1_0_1";
  400. uart2 = "/axi/pcie@120000/rp1/serial@38000";
  401. uart2_ctsrts_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart2_ctsrts_6_7";
  402. uart2_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart2_4_5";
  403. uart3 = "/axi/pcie@120000/rp1/serial@3c000";
  404. uart3_ctsrts_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart3_ctsrts_10_11";
  405. uart3_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart3_8_9";
  406. uart4 = "/axi/pcie@120000/rp1/serial@40000";
  407. uart4_ctsrts_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart4_ctsrts_14_15";
  408. uart4_pins = "/axi/pcie@120000/rp1/gpio@d0000/rp1_uart4_12_13";
  409. uarta = "/soc/serial@7d50c000";
  410. uarta_24_pins = "/soc/pinctrl@7d504100/uarta_24_pins";
  411. uartb = "/soc/serial@7d50d000";
  412. usb = "/axi/usb@480000";
  413. usb_vbus_pins = "/axi/pcie@120000/rp1/gpio@d0000/usb_vbus_pins";
  414. usbphy = "/phy";
  415. v3d = "/axi/v3d@2000000";
  416. vc4 = "/axi/gpu";
  417. vcio = "/soc/firmware/vcio";
  418. vdd_3v3_reg = "/soc/fixedregulator_3v3";
  419. vdd_5v0_reg = "/soc/fixedregulator_5v0";
  420. vec = "/axi/pcie@120000/rp1/vec@144000";
  421. wifi = "/axi/mmc@1100000/wifi@1";
  422. wl_on_pins = "/soc/pinctrl@7d504100/wl_on_pins";
  423. wl_on_reg = "/wl_on_reg";
  424. };
  425.  
  426. aliases {
  427. blconfig = "/reserved-memory/nvram@0";
  428. bluetooth = "/soc/serial@7d50c000/bluetooth";
  429. console = "/soc/serial@7d001000";
  430. drm-dsi1 = "/axi/pcie@120000/rp1/dsi@110000";
  431. drm-dsi2 = "/axi/pcie@120000/rp1/dsi@128000";
  432. ethernet0 = "/axi/pcie@120000/rp1/ethernet@100000";
  433. fb = "/soc/fb";
  434. gpio0 = "/axi/pcie@120000/rp1/gpio@d0000";
  435. gpio1 = "/soc/gpio@7d508500";
  436. gpio2 = "/soc/gpio@7d517c00";
  437. gpio3 = "/soc/pinctrl@7d504100";
  438. gpio4 = "/soc/pinctrl@7d510700";
  439. i2c = "/axi/pcie@120000/rp1/i2c@74000";
  440. i2c0 = "/axi/pcie@120000/rp1/i2c@70000";
  441. i2c1 = "/axi/pcie@120000/rp1/i2c@74000";
  442. i2c10 = "/soc/i2c@7d005600";
  443. i2c2 = "/axi/pcie@120000/rp1/i2c@78000";
  444. i2c3 = "/axi/pcie@120000/rp1/i2c@7c000";
  445. i2c4 = "/axi/pcie@120000/rp1/i2c@80000";
  446. i2c5 = "/axi/pcie@120000/rp1/i2c@84000";
  447. i2c6 = "/axi/pcie@120000/rp1/i2c@88000";
  448. mailbox = "/soc/mailbox@7c013880";
  449. mmc0 = "/axi/mmc@fff000";
  450. phandle = <0x62>;
  451. serial0 = "/axi/pcie@120000/rp1/serial@30000";
  452. serial1 = "/axi/pcie@120000/rp1/serial@34000";
  453. serial10 = "/soc/serial@7d001000";
  454. serial2 = "/axi/pcie@120000/rp1/serial@38000";
  455. serial3 = "/axi/pcie@120000/rp1/serial@3c000";
  456. serial4 = "/axi/pcie@120000/rp1/serial@40000";
  457. spi0 = "/axi/pcie@120000/rp1/spi@50000";
  458. spi1 = "/axi/pcie@120000/rp1/spi@54000";
  459. spi10 = "/soc/spi@7d004000";
  460. spi2 = "/axi/pcie@120000/rp1/spi@58000";
  461. spi3 = "/axi/pcie@120000/rp1/spi@5c000";
  462. spi4 = "/axi/pcie@120000/rp1/spi@60000";
  463. spi5 = "/axi/pcie@120000/rp1/spi@64000";
  464. uart0 = "/axi/pcie@120000/rp1/serial@30000";
  465. uart1 = "/axi/pcie@120000/rp1/serial@34000";
  466. uart10 = "/soc/serial@7d001000";
  467. uart2 = "/axi/pcie@120000/rp1/serial@38000";
  468. uart3 = "/axi/pcie@120000/rp1/serial@3c000";
  469. uart4 = "/axi/pcie@120000/rp1/serial@40000";
  470. usb0 = "/axi/pcie@120000/rp1/usb@200000";
  471. usb1 = "/axi/pcie@120000/rp1/usb@300000";
  472. wifi0 = "/axi/mmc@1100000/wifi@1";
  473. };
  474.  
  475. arm-pmu {
  476. compatible = "arm,cortex-a76-pmu";
  477. interrupt-affinity = <0x22 0x23 0x24 0x25>;
  478. interrupts = <0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x12 0x04 0x00 0x13 0x04>;
  479. };
  480.  
  481. axi {
  482. #address-cells = <0x02>;
  483. #size-cells = <0x02>;
  484. compatible = "simple-bus";
  485. dma-ranges = <0x00 0x00 0x00 0x00 0x10 0x00 0x10 0x00 0x10 0x00 0x01 0x00 0x14 0x00 0x14 0x00 0x04 0x00 0x18 0x00 0x18 0x00 0x04 0x00 0x1c 0x00 0x1c 0x00 0x04 0x00>;
  486. phandle = <0xab>;
  487. ranges = <0x00 0x00 0x00 0x00 0x10 0x00 0x10 0x00 0x10 0x00 0x01 0x00 0x14 0x00 0x14 0x00 0x04 0x00 0x18 0x00 0x18 0x00 0x04 0x00 0x1c 0x00 0x1c 0x00 0x04 0x00>;
  488.  
  489. codec@800000 {
  490. clock-names = "hevc";
  491. clocks = <0x0a 0x0b>;
  492. compatible = "raspberrypi,rpivid-vid-decoder";
  493. interrupts = <0x00 0x62 0x04>;
  494. iommus = <0x52>;
  495. phandle = <0xfb>;
  496. reg = <0x10 0x800000 0x00 0x10000 0x10 0x840000 0x00 0x1000>;
  497. reg-names = "hevc\0intc";
  498. status = "okay";
  499. };
  500.  
  501. dma@10000 {
  502. #dma-cells = <0x01>;
  503. brcm,dma-channel-mask = <0x3f>;
  504. compatible = "brcm,bcm2712-dma";
  505. interrupt-names = "dma0\0dma1\0dma2\0dma3\0dma4\0dma5";
  506. interrupts = <0x00 0x50 0x04 0x00 0x51 0x04 0x00 0x52 0x04 0x00 0x53 0x04 0x00 0x54 0x04 0x00 0x55 0x04>;
  507. phandle = <0xae>;
  508. reg = <0x10 0x10000 0x00 0x600>;
  509. };
  510.  
  511. dma@10600 {
  512. #dma-cells = <0x01>;
  513. brcm,dma-channel-mask = <0xf80>;
  514. compatible = "brcm,bcm2712-dma";
  515. interrupt-names = "dma6\0dma7\0dma8\0dma9\0dma10\0dma11";
  516. interrupts = <0x00 0x56 0x04 0x00 0x57 0x04 0x00 0x58 0x04 0x00 0x59 0x04 0x00 0x5a 0x04 0x00 0x5b 0x04>;
  517. phandle = <0x10>;
  518. reg = <0x10 0x10600 0x00 0x600>;
  519. };
  520.  
  521. gpu {
  522. compatible = "brcm,bcm2712-vc6";
  523. iommus = <0xad>;
  524. phandle = <0xac>;
  525. };
  526.  
  527. interrupt-controller@7fff9000 {
  528. #interrupt-cells = <0x03>;
  529. compatible = "arm,gic-400";
  530. interrupt-controller;
  531. interrupts = <0x01 0x09 0xf04>;
  532. phandle = <0x01>;
  533. reg = <0x10 0x7fff9000 0x00 0x1000 0x10 0x7fffa000 0x00 0x2000 0x10 0x7fffc000 0x00 0x2000 0x10 0x7fffe000 0x00 0x2000>;
  534. };
  535.  
  536. iommu@5100 {
  537. #iommu-cells = <0x00>;
  538. cache = <0x28>;
  539. compatible = "brcm,bcm2712-iommu";
  540. phandle = <0x52>;
  541. reg = <0x10 0x5100 0x00 0x80>;
  542. };
  543.  
  544. iommu@5200 {
  545. #interconnect-cells = <0x00>;
  546. #iommu-cells = <0x00>;
  547. cache = <0x28>;
  548. compatible = "brcm,bcm2712-iommu";
  549. phandle = <0xad>;
  550. reg = <0x10 0x5200 0x00 0x80>;
  551. };
  552.  
  553. iommu@5280 {
  554. #iommu-cells = <0x00>;
  555. cache = <0x28>;
  556. compatible = "brcm,bcm2712-iommu";
  557. dma-iova-offset = <0x10 0x00>;
  558. phandle = <0x49>;
  559. reg = <0x10 0x5280 0x00 0x80>;
  560. };
  561.  
  562. iommuc@5b00 {
  563. compatible = "brcm,bcm2712-iommuc";
  564. phandle = <0x28>;
  565. reg = <0x10 0x5b00 0x00 0x80>;
  566. };
  567.  
  568. mmc@1100000 {
  569. #address-cells = <0x01>;
  570. #size-cells = <0x00>;
  571. bus-width = <0x04>;
  572. clocks = <0x53>;
  573. compatible = "brcm,bcm2712-sdhci";
  574. interrupts = <0x00 0x112 0x04>;
  575. mmc-ddr-3_3v;
  576. non-removable;
  577. phandle = <0xfd>;
  578. pinctrl-0 = <0x59>;
  579. pinctrl-names = "default";
  580. reg = <0x10 0x1100000 0x00 0x260 0x10 0x1100400 0x00 0x200>;
  581. reg-names = "host\0cfg";
  582. sd-uhs-ddr50;
  583. sdhci-caps = <0x00 0x00>;
  584. sdhci-caps-mask = <0xc000 0x00>;
  585. status = "okay";
  586. supports-cqe;
  587. vmmc-supply = <0x5a>;
  588.  
  589. wifi@1 {
  590. compatible = "brcm,bcm4329-fmac";
  591. local-mac-address = [2c cf 67 0e c9 95];
  592. phandle = <0x6b>;
  593. reg = <0x01>;
  594. };
  595. };
  596.  
  597. mmc@fff000 {
  598. bus-width = <0x04>;
  599. cd-gpios = <0x58 0x05 0x01>;
  600. clocks = <0x53>;
  601. compatible = "brcm,bcm2712-sdhci";
  602. interrupts = <0x00 0x111 0x04>;
  603. mmc-ddr-3_3v;
  604. phandle = <0xfc>;
  605. pinctrl-0 = <0x54 0x55>;
  606. pinctrl-names = "default";
  607. reg = <0x10 0xfff000 0x00 0x260 0x10 0xfff400 0x00 0x200 0x10 0x15040b0 0x00 0x04 0x10 0x15200f0 0x00 0x24>;
  608. reg-names = "host\0cfg\0busisol\0lcpll";
  609. sd-uhs-ddr50;
  610. sd-uhs-sdr104;
  611. sd-uhs-sdr50;
  612. sdhci-caps = <0x00 0x00>;
  613. sdhci-caps-mask = <0xc000 0x00>;
  614. status = "okay";
  615. supports-cqe;
  616. vmmc-supply = <0x57>;
  617. vqmmc-supply = <0x56>;
  618. };
  619.  
  620. msi-controller@130000 {
  621. #interrupt-cells = <0x02>;
  622. brcm,msi-base-spi = <0x80>;
  623. brcm,msi-num-spis = <0x40>;
  624. brcm,msi-offset = <0x00>;
  625. brcm,msi-pci-addr = <0xff 0xfffff000>;
  626. compatible = "brcm,bcm2712-mip-intc";
  627. interrupt-controller;
  628. msi-controller;
  629. phandle = <0x2d>;
  630. reg = <0x10 0x130000 0x00 0xc0>;
  631. };
  632.  
  633. msi-controller@131000 {
  634. #interrupt-cells = <0x02>;
  635. brcm,msi-base-spi = <0xf7>;
  636. brcm,msi-num-spis = <0x08>;
  637. brcm,msi-offset = <0x08>;
  638. brcm,msi-pci-addr = <0xff 0xffffe000>;
  639. compatible = "brcm,bcm2712-mip-intc";
  640. interrupt-controller;
  641. msi-controller;
  642. phandle = <0x2c>;
  643. reg = <0x10 0x131000 0x00 0xc0>;
  644. };
  645.  
  646. pcie@100000 {
  647. #address-cells = <0x03>;
  648. #interrupt-cells = <0x01>;
  649. #size-cells = <0x02>;
  650. compatible = "brcm,bcm2712-pcie";
  651. device_type = "pci";
  652. dma-ranges = <0x43000000 0x10 0x00 0x00 0x00 0x10 0x00>;
  653. interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0xd1 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0xd2 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0xd3 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0xd4 0x04>;
  654. interrupt-map-mask = <0x00 0x00 0x00 0x07>;
  655. interrupt-names = "pcie\0msi";
  656. interrupt-parent = <0x01>;
  657. interrupts = <0x00 0xd5 0x04 0x00 0xd6 0x04>;
  658. max-link-speed = <0x02>;
  659. msi-controller;
  660. msi-parent = <0x2b>;
  661. phandle = <0x2b>;
  662. ranges = <0x2000000 0x00 0x00 0x17 0x00 0x00 0xfffffffc 0x43000000 0x04 0x00 0x14 0x00 0x03 0x00>;
  663. reg = <0x10 0x100000 0x00 0x9310>;
  664. reset-names = "swinit\0bridge\0rescal";
  665. resets = <0x29 0x05 0x29 0x2a 0x2a>;
  666. status = "disabled";
  667. };
  668.  
  669. pcie@110000 {
  670. #address-cells = <0x03>;
  671. #interrupt-cells = <0x01>;
  672. #size-cells = <0x02>;
  673. brcm,enable-l1ss;
  674. compatible = "brcm,bcm2712-pcie";
  675. device_type = "pci";
  676. dma-ranges = <0x3000000 0x10 0x00 0x00 0x00 0x10 0x00>;
  677. interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0xdb 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0xdc 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0xdd 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0xde 0x04>;
  678. interrupt-map-mask = <0x00 0x00 0x00 0x07>;
  679. interrupt-names = "pcie\0msi";
  680. interrupt-parent = <0x01>;
  681. interrupts = <0x00 0xdf 0x04 0x00 0xe0 0x04>;
  682. max-link-speed = <0x02>;
  683. msi-controller;
  684. msi-parent = <0x2c>;
  685. phandle = <0x67>;
  686. ranges = <0x2000000 0x00 0x00 0x1b 0x00 0x00 0xfffffffc 0x43000000 0x04 0x00 0x18 0x00 0x03 0x00>;
  687. reg = <0x10 0x110000 0x00 0x9310>;
  688. reset-names = "swinit\0bridge\0rescal";
  689. resets = <0x29 0x07 0x29 0x2b 0x2a>;
  690. status = "disabled";
  691. };
  692.  
  693. pcie@120000 {
  694. #address-cells = <0x03>;
  695. #interrupt-cells = <0x01>;
  696. #size-cells = <0x02>;
  697. aspm-no-l0s;
  698. brcm,enable-l1ss;
  699. brcm,enable-mps-rcb;
  700. brcm,vdm-qos-map = <0xbbaa9888>;
  701. compatible = "brcm,bcm2712-pcie";
  702. device_type = "pci";
  703. dma-ranges = <0x2000000 0x00 0x00 0x1f 0x00 0x00 0x400000 0x43000000 0x10 0x00 0x00 0x00 0x10 0x00>;
  704. interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0xe5 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0xe6 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0xe7 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0xe8 0x04>;
  705. interrupt-map-mask = <0x00 0x00 0x00 0x07>;
  706. interrupt-names = "pcie\0msi";
  707. interrupt-parent = <0x01>;
  708. interrupts = <0x00 0xe9 0x04 0x00 0xea 0x04>;
  709. max-link-speed = <0x02>;
  710. msi-controller;
  711. msi-parent = <0x2d>;
  712. phandle = <0xaf>;
  713. ranges = <0x2000000 0x00 0x00 0x1f 0x00 0x00 0xfffffffc 0x43000000 0x04 0x00 0x1c 0x00 0x03 0x00>;
  714. reg = <0x10 0x120000 0x00 0x9310>;
  715. reset-names = "swinit\0bridge\0rescal";
  716. resets = <0x29 0x20 0x29 0x2c 0x2a>;
  717. status = "okay";
  718.  
  719. rp1 {
  720. #address-cells = <0x02>;
  721. #interrupt-cells = <0x02>;
  722. #size-cells = <0x02>;
  723. compatible = "simple-bus";
  724. dma-ranges = <0x10 0x00 0x43000000 0x10 0x00 0x10 0x00 0xc0 0x40000000 0x2000000 0x00 0x00 0x00 0x400000 0x00 0x00 0x2000000 0x10 0x00 0x10 0x00>;
  725. interrupt-controller;
  726. interrupt-parent = <0x2e>;
  727. phandle = <0x2e>;
  728. ranges = <0xc0 0x40000000 0x2000000 0x00 0x00 0x00 0x400000>;
  729.  
  730. adc@c8000 {
  731. #clock-cells = <0x00>;
  732. clock-names = "adcclk";
  733. clocks = <0x30 0x1e>;
  734. compatible = "raspberrypi,rp1-adc";
  735. phandle = <0xc6>;
  736. reg = <0xc0 0x400c8000 0x00 0x4000>;
  737. status = "okay";
  738. vref-supply = <0x45>;
  739. };
  740.  
  741. clocks@18000 {
  742. #clock-cells = <0x01>;
  743. assigned-clock-rates = <0x3b9aca00 0x5b8d8000 0xbebc200 0x7735940 0x3a98000 0xb71b000 0xbebc200 0x5f5e100 0x2faf080 0xf4240 0xbebc200 0x2faf080>;
  744. assigned-clocks = <0x30 0x00 0x30 0x01 0x30 0x03 0x30 0x09 0x30 0x04 0x30 0x0a 0x30 0x0c 0x30 0x06 0x30 0x0d 0x30 0x1f 0x30 0x20 0x30 0x1d>;
  745. clocks = <0x2f>;
  746. compatible = "raspberrypi,rp1-clocks";
  747. phandle = <0x30>;
  748. reg = <0xc0 0x40018000 0x00 0x10038>;
  749. };
  750.  
  751. csi@110000 {
  752. #address-cells = <0x01>;
  753. #size-cells = <0x00>;
  754. assigned-clock-rates = <0x17d7840>;
  755. assigned-clocks = <0x30 0x16>;
  756. clocks = <0x30 0x16>;
  757. compatible = "raspberrypi,rp1-cfe";
  758. interrupts = <0x2f 0x04>;
  759. iommus = <0x49>;
  760. phandle = <0xef>;
  761. reg = <0xc0 0x40110000 0x00 0x100 0xc0 0x40114000 0x00 0x100 0xc0 0x40120000 0x00 0x100 0xc0 0x40124000 0x00 0x1000>;
  762. status = "disabled";
  763. };
  764.  
  765. csi@128000 {
  766. #address-cells = <0x01>;
  767. #size-cells = <0x00>;
  768. assigned-clock-rates = <0x17d7840>;
  769. assigned-clocks = <0x30 0x17>;
  770. clocks = <0x30 0x17>;
  771. compatible = "raspberrypi,rp1-cfe";
  772. interrupts = <0x30 0x04>;
  773. iommus = <0x49>;
  774. phandle = <0xf0>;
  775. reg = <0xc0 0x40128000 0x00 0x100 0xc0 0x4012c000 0x00 0x100 0xc0 0x40138000 0x00 0x100 0xc0 0x4013c000 0x00 0x1000>;
  776. status = "disabled";
  777. };
  778.  
  779. dma@188000 {
  780. #dma-cells = <0x01>;
  781. clock-names = "core-clk\0cfgr-clk";
  782. clocks = <0x44 0x30 0x0c>;
  783. compatible = "snps,axi-dma-1.01a";
  784. dma-channels = <0x08>;
  785. interrupts = <0x28 0x04>;
  786. phandle = <0x31>;
  787. reg = <0xc0 0x40188000 0x00 0x1000>;
  788. snps,axi-max-burst-len = <0x08>;
  789. snps,block-size = <0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000>;
  790. snps,data-width = <0x04>;
  791. snps,dma-masters = <0x01>;
  792. snps,dma-targets = <0x40>;
  793. snps,priority = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07>;
  794. status = "okay";
  795. };
  796.  
  797. dpi@148000 {
  798. assigned-clock-parents = <0x30 0x05>;
  799. assigned-clocks = <0x30 0x28>;
  800. clock-names = "dpiclk\0plldiv\0pllcore";
  801. clocks = <0x30 0x28 0x30 0x05 0x30 0x02>;
  802. compatible = "raspberrypi,rp1dpi";
  803. interrupts = <0x31 0x04>;
  804. iommus = <0x49>;
  805. phandle = <0xf8>;
  806. reg = <0xc0 0x40148000 0x00 0x1000 0xc0 0x40140000 0x00 0x1000>;
  807. status = "disabled";
  808. };
  809.  
  810. dsi@110000 {
  811. assigned-clock-parents = <0x00 0x4d>;
  812. assigned-clock-rates = <0x17d7840>;
  813. assigned-clocks = <0x30 0x16 0x30 0x29>;
  814. clock-names = "cfgclk\0dpiclk\0byteclk\0refclk";
  815. clocks = <0x30 0x16 0x30 0x29 0x4d 0x2f>;
  816. compatible = "raspberrypi,rp1dsi";
  817. interrupts = <0x2f 0x04>;
  818. iommus = <0x49>;
  819. phandle = <0xf5>;
  820. reg = <0xc0 0x40118000 0x00 0x1000 0xc0 0x4011c000 0x00 0x1000 0xc0 0x40120000 0x00 0x1000>;
  821. status = "disabled";
  822. };
  823.  
  824. dsi@128000 {
  825. assigned-clock-parents = <0x00 0x4e>;
  826. assigned-clock-rates = <0x17d7840>;
  827. assigned-clocks = <0x30 0x17 0x30 0x2a>;
  828. clock-names = "cfgclk\0dpiclk\0byteclk\0refclk";
  829. clocks = <0x30 0x17 0x30 0x2a 0x4e 0x2f>;
  830. compatible = "raspberrypi,rp1dsi";
  831. interrupts = <0x30 0x04>;
  832. iommus = <0x49>;
  833. phandle = <0xf6>;
  834. reg = <0xc0 0x40130000 0x00 0x1000 0xc0 0x40134000 0x00 0x1000 0xc0 0x40138000 0x00 0x1000>;
  835. status = "disabled";
  836. };
  837.  
  838. ethernet@100000 {
  839. #address-cells = <0x01>;
  840. #size-cells = <0x00>;
  841. cdns,ar2r-max-pipe = [08];
  842. cdns,aw2w-max-pipe = [08];
  843. cdns,use-aw2b-fill;
  844. clock-names = "pclk\0hclk\0tsu_clk";
  845. clocks = <0x46 0x47 0x30 0x1d>;
  846. compatible = "cdns,macb";
  847. interrupts = <0x06 0x04>;
  848. local-mac-address = [2c cf 67 0e c9 92];
  849. phandle = <0xee>;
  850. phy-handle = <0x48>;
  851. phy-mode = "rgmii-id";
  852. phy-reset-duration = <0x05>;
  853. phy-reset-gpios = <0x35 0x20 0x01>;
  854. reg = <0xc0 0x40100000 0x00 0x4000>;
  855. status = "okay";
  856.  
  857. ethernet-phy@1 {
  858. brcm,powerdown-enable;
  859. phandle = <0x48>;
  860. reg = <0x01>;
  861. };
  862. };
  863.  
  864. gpio@d0000 {
  865. #gpio-cells = <0x02>;
  866. #interrupt-cells = <0x02>;
  867. compatible = "raspberrypi,rp1-gpio";
  868. gpio-controller;
  869. gpio-line-names = "ID_SDA\0ID_SCL\0GPIO2\0GPIO3\0GPIO4\0GPIO5\0GPIO6\0GPIO7\0GPIO8\0GPIO9\0GPIO10\0GPIO11\0GPIO12\0GPIO13\0GPIO14\0GPIO15\0GPIO16\0GPIO17\0GPIO18\0GPIO19\0GPIO20\0GPIO21\0GPIO22\0GPIO23\0GPIO24\0GPIO25\0GPIO26\0GPIO27\0PCIE_RP1_WAKE\0FAN_TACH\0HOST_SDA\0HOST_SCL\0ETH_RST_N\0-\0CD0_IO0_MICCLK\0CD0_IO0_MICDAT0\0RP1_PCIE_CLKREQ_N\0-\0CD0_SDA\0CD0_SCL\0CD1_SDA\0CD1_SCL\0USB_VBUS_EN\0USB_OC_N\0RP1_STAT_LED\0FAN_PWM\0CD1_IO0_MICCLK\02712_WAKE\0CD1_IO1_MICDAT1\0EN_MAX_USB_CUR\0-\0-\0-\0-";
  870. interrupt-controller;
  871. interrupts = <0x00 0x04 0x01 0x04 0x02 0x04>;
  872. phandle = <0x35>;
  873. reg = <0xc0 0x400d0000 0x00 0xc000 0xc0 0x400e0000 0x00 0xc000 0xc0 0x400f0000 0x00 0xc000>;
  874. status = "okay";
  875.  
  876. rp1_dpi_16bit_cpadhi_gpio0 {
  877. bias-disable;
  878. function = "dpi";
  879. phandle = <0xe1>;
  880. pins = "gpio0\0gpio1\0gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio20\0gpio21\0gpio22\0gpio23\0gpio24";
  881. };
  882.  
  883. rp1_dpi_16bit_cpadhi_gpio2 {
  884. bias-disable;
  885. function = "dpi";
  886. phandle = <0xda>;
  887. pins = "gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio20\0gpio21\0gpio22\0gpio23\0gpio24";
  888. };
  889.  
  890. rp1_dpi_16bit_gpio0 {
  891. bias-disable;
  892. function = "dpi";
  893. phandle = <0xe0>;
  894. pins = "gpio0\0gpio1\0gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio10\0gpio11\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio18\0gpio19";
  895. };
  896.  
  897. rp1_dpi_16bit_gpio2 {
  898. bias-disable;
  899. function = "dpi";
  900. phandle = <0xd9>;
  901. pins = "gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio10\0gpio11\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio18\0gpio19";
  902. };
  903.  
  904. rp1_dpi_16bit_pad666_gpio0 {
  905. bias-disable;
  906. function = "dpi";
  907. phandle = <0xe2>;
  908. pins = "gpio0\0gpio1\0gpio2\0gpio3\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio21\0gpio22\0gpio23\0gpio24\0gpio25";
  909. };
  910.  
  911. rp1_dpi_16bit_pad666_gpio2 {
  912. bias-disable;
  913. function = "dpi";
  914. phandle = <0xdb>;
  915. pins = "gpio2\0gpio3\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio21\0gpio22\0gpio23\0gpio24\0gpio25";
  916. };
  917.  
  918. rp1_dpi_18bit_cpadhi_gpio0 {
  919. bias-disable;
  920. function = "dpi";
  921. phandle = <0xe4>;
  922. pins = "gpio0\0gpio1\0gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio20\0gpio21\0gpio22\0gpio23\0gpio24\0gpio25";
  923. };
  924.  
  925. rp1_dpi_18bit_cpadhi_gpio2 {
  926. bias-disable;
  927. function = "dpi";
  928. phandle = <0xdd>;
  929. pins = "gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio20\0gpio21\0gpio22\0gpio23\0gpio24\0gpio25";
  930. };
  931.  
  932. rp1_dpi_18bit_gpio0 {
  933. bias-disable;
  934. function = "dpi";
  935. phandle = <0xe3>;
  936. pins = "gpio0\0gpio1\0gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio10\0gpio11\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio18\0gpio19\0gpio20\0gpio21";
  937. };
  938.  
  939. rp1_dpi_18bit_gpio2 {
  940. bias-disable;
  941. function = "dpi";
  942. phandle = <0xdc>;
  943. pins = "gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio10\0gpio11\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio18\0gpio19\0gpio20\0gpio21";
  944. };
  945.  
  946. rp1_dpi_24bit_gpio0 {
  947. bias-disable;
  948. function = "dpi";
  949. phandle = <0xe5>;
  950. pins = "gpio0\0gpio1\0gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio10\0gpio11\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio18\0gpio19\0gpio20\0gpio21\0gpio22\0gpio23\0gpio24\0gpio25\0gpio26\0gpio27";
  951. };
  952.  
  953. rp1_dpi_24bit_gpio2 {
  954. bias-disable;
  955. function = "dpi";
  956. phandle = <0xde>;
  957. pins = "gpio2\0gpio3\0gpio4\0gpio5\0gpio6\0gpio7\0gpio8\0gpio9\0gpio10\0gpio11\0gpio12\0gpio13\0gpio14\0gpio15\0gpio16\0gpio17\0gpio18\0gpio19\0gpio20\0gpio21\0gpio22\0gpio23\0gpio24\0gpio25\0gpio26\0gpio27";
  958. };
  959.  
  960. rp1_dpi_hvsync {
  961. bias-disable;
  962. function = "dpi";
  963. phandle = <0xdf>;
  964. pins = "gpio2\0gpio3";
  965. };
  966.  
  967. rp1_gpclksrc0_gpio20 {
  968. bias-disable;
  969. function = "gpclk0";
  970. phandle = <0xe7>;
  971. pins = "gpio20";
  972. };
  973.  
  974. rp1_gpclksrc0_gpio4 {
  975. bias-disable;
  976. function = "gpclk0";
  977. phandle = <0xe6>;
  978. pins = "gpio4";
  979. };
  980.  
  981. rp1_gpclksrc1_gpio18 {
  982. bias-disable;
  983. function = "gpclk1";
  984. phandle = <0xe9>;
  985. pins = "gpio18";
  986. };
  987.  
  988. rp1_gpclksrc1_gpio21 {
  989. bias-disable;
  990. function = "gpclk1";
  991. phandle = <0xea>;
  992. pins = "gpio21";
  993. };
  994.  
  995. rp1_gpclksrc1_gpio5 {
  996. bias-disable;
  997. function = "gpclk1";
  998. phandle = <0xe8>;
  999. pins = "gpio5";
  1000. };
  1001.  
  1002. rp1_i2c0_0_1 {
  1003. bias-pull-up;
  1004. drive-strength = <0x0c>;
  1005. function = "i2c0";
  1006. phandle = <0x3a>;
  1007. pins = "gpio0\0gpio1";
  1008. };
  1009.  
  1010. rp1_i2c0_8_9 {
  1011. bias-pull-up;
  1012. drive-strength = <0x0c>;
  1013. function = "i2c0";
  1014. phandle = <0xd4>;
  1015. pins = "gpio8\0gpio9";
  1016. };
  1017.  
  1018. rp1_i2c1_10_11 {
  1019. bias-pull-up;
  1020. drive-strength = <0x0c>;
  1021. function = "i2c1";
  1022. phandle = <0xd5>;
  1023. pins = "gpio10\0gpio11";
  1024. };
  1025.  
  1026. rp1_i2c1_2_3 {
  1027. bias-pull-up;
  1028. drive-strength = <0x0c>;
  1029. function = "i2c1";
  1030. phandle = <0x3b>;
  1031. pins = "gpio2\0gpio3";
  1032. };
  1033.  
  1034. rp1_i2c2_12_13 {
  1035. bias-pull-up;
  1036. drive-strength = <0x0c>;
  1037. function = "i2c2";
  1038. phandle = <0xd6>;
  1039. pins = "gpio12\0gpio13";
  1040. };
  1041.  
  1042. rp1_i2c2_4_5 {
  1043. bias-pull-up;
  1044. drive-strength = <0x0c>;
  1045. function = "i2c2";
  1046. phandle = <0x3c>;
  1047. pins = "gpio4\0gpio5";
  1048. };
  1049.  
  1050. rp1_i2c3_14_15 {
  1051. bias-pull-up;
  1052. drive-strength = <0x0c>;
  1053. function = "i2c3";
  1054. phandle = <0xd7>;
  1055. pins = "gpio14\0gpio15";
  1056. };
  1057.  
  1058. rp1_i2c3_22_23 {
  1059. bias-pull-up;
  1060. drive-strength = <0x0c>;
  1061. function = "i2c3";
  1062. phandle = <0xd8>;
  1063. pins = "gpio22\0gpio23";
  1064. };
  1065.  
  1066. rp1_i2c3_6_7 {
  1067. bias-pull-up;
  1068. drive-strength = <0x0c>;
  1069. function = "i2c3";
  1070. phandle = <0x3d>;
  1071. pins = "gpio6\0gpio7";
  1072. };
  1073.  
  1074. rp1_i2c4_34_35 {
  1075. bias-pull-up;
  1076. drive-strength = <0x0c>;
  1077. function = "i2c4";
  1078. phandle = <0xd2>;
  1079. pins = "gpio34\0gpio35";
  1080. };
  1081.  
  1082. rp1_i2c4_40_41 {
  1083. bias-pull-up;
  1084. drive-strength = <0x0c>;
  1085. function = "i2c4";
  1086. phandle = <0x3e>;
  1087. pins = "gpio40\0gpio41";
  1088. };
  1089.  
  1090. rp1_i2c5_44_45 {
  1091. bias-pull-up;
  1092. drive-strength = <0x0c>;
  1093. function = "i2c5";
  1094. phandle = <0xd3>;
  1095. pins = "gpio44\0gpio45";
  1096. };
  1097.  
  1098. rp1_i2c6_38_39 {
  1099. bias-pull-up;
  1100. drive-strength = <0x0c>;
  1101. function = "i2c6";
  1102. phandle = <0x3f>;
  1103. pins = "gpio38\0gpio39";
  1104. };
  1105.  
  1106. rp1_i2s0_18_21 {
  1107. bias-disable;
  1108. function = "i2s0";
  1109. phandle = <0x41>;
  1110. pins = "gpio18\0gpio19\0gpio20\0gpio21";
  1111. };
  1112.  
  1113. rp1_i2s1_18_21 {
  1114. bias-disable;
  1115. function = "i2s1";
  1116. phandle = <0x42>;
  1117. pins = "gpio18\0gpio19\0gpio20\0gpio21";
  1118. };
  1119.  
  1120. rp1_pwm1_gpio45 {
  1121. bias-pull-down;
  1122. function = "pwm1";
  1123. phandle = <0x40>;
  1124. pins = "gpio45";
  1125. };
  1126.  
  1127. rp1_sdio0_22_27 {
  1128. phandle = <0xd0>;
  1129.  
  1130. pin_clk {
  1131. bias-disable;
  1132. drive-strength = <0x0c>;
  1133. function = "sd0";
  1134. pins = "gpio22";
  1135. slew-rate = <0x01>;
  1136. };
  1137.  
  1138. pin_cmd {
  1139. bias-pull-up;
  1140. drive-strength = <0x0c>;
  1141. function = "sd0";
  1142. pins = "gpio23";
  1143. slew-rate = <0x01>;
  1144. };
  1145.  
  1146. pins_dat {
  1147. bias-pull-up;
  1148. drive-strength = <0x0c>;
  1149. function = "sd0";
  1150. pins = "gpio24\0gpio25\0gpio26\0gpio27";
  1151. slew-rate = <0x01>;
  1152. };
  1153. };
  1154.  
  1155. rp1_sdio1_28_33 {
  1156. phandle = <0xd1>;
  1157.  
  1158. pin_clk {
  1159. bias-disable;
  1160. drive-strength = <0x0c>;
  1161. function = "sd1";
  1162. pins = "gpio28";
  1163. slew-rate = <0x01>;
  1164. };
  1165.  
  1166. pin_cmd {
  1167. bias-pull-up;
  1168. drive-strength = <0x0c>;
  1169. function = "sd1";
  1170. pins = "gpio29";
  1171. slew-rate = <0x01>;
  1172. };
  1173.  
  1174. pins_dat {
  1175. bias-pull-up;
  1176. drive-strength = <0x0c>;
  1177. function = "sd1";
  1178. pins = "gpio30\0gpio31\0gpio32\0gpio33";
  1179. slew-rate = <0x01>;
  1180. };
  1181. };
  1182.  
  1183. rp1_spi0_cs_gpio7 {
  1184. bias-pull-up;
  1185. function = "spi0";
  1186. phandle = <0x34>;
  1187. pins = "gpio7\0gpio8";
  1188. };
  1189.  
  1190. rp1_spi0_gpio9 {
  1191. bias-disable;
  1192. drive-strength = <0x0c>;
  1193. function = "spi0";
  1194. phandle = <0x33>;
  1195. pins = "gpio9\0gpio10\0gpio11";
  1196. slew-rate = <0x01>;
  1197. };
  1198.  
  1199. rp1_spi1_gpio19 {
  1200. bias-disable;
  1201. drive-strength = <0x0c>;
  1202. function = "spi1";
  1203. phandle = <0xeb>;
  1204. pins = "gpio19\0gpio20\0gpio21";
  1205. slew-rate = <0x01>;
  1206. };
  1207.  
  1208. rp1_spi2_gpio1 {
  1209. bias-disable;
  1210. drive-strength = <0x0c>;
  1211. function = "spi2";
  1212. phandle = <0x36>;
  1213. pins = "gpio1\0gpio2\0gpio3";
  1214. slew-rate = <0x01>;
  1215. };
  1216.  
  1217. rp1_spi3_gpio5 {
  1218. bias-disable;
  1219. drive-strength = <0x0c>;
  1220. function = "spi3";
  1221. phandle = <0x37>;
  1222. pins = "gpio5\0gpio6\0gpio7";
  1223. slew-rate = <0x01>;
  1224. };
  1225.  
  1226. rp1_spi4_gpio9 {
  1227. bias-disable;
  1228. drive-strength = <0x0c>;
  1229. function = "spi4";
  1230. phandle = <0x38>;
  1231. pins = "gpio9\0gpio10\0gpio11";
  1232. slew-rate = <0x01>;
  1233. };
  1234.  
  1235. rp1_spi5_gpio13 {
  1236. bias-disable;
  1237. drive-strength = <0x0c>;
  1238. function = "spi5";
  1239. phandle = <0x39>;
  1240. pins = "gpio13\0gpio14\0gpio15";
  1241. slew-rate = <0x01>;
  1242. };
  1243.  
  1244. rp1_spi8_cs_gpio52 {
  1245. bias-pull-up;
  1246. function = "spi0";
  1247. phandle = <0xed>;
  1248. pins = "gpio52\0gpio53";
  1249. };
  1250.  
  1251. rp1_spi8_gpio49 {
  1252. bias-disable;
  1253. drive-strength = <0x0c>;
  1254. function = "spi8";
  1255. phandle = <0xec>;
  1256. pins = "gpio49\0gpio50\0gpio51";
  1257. slew-rate = <0x01>;
  1258. };
  1259.  
  1260. rp1_uart0_14_15 {
  1261. phandle = <0x32>;
  1262.  
  1263. pin_rxd {
  1264. bias-pull-up;
  1265. function = "uart0";
  1266. pins = "gpio15";
  1267. };
  1268.  
  1269. pin_txd {
  1270. bias-disable;
  1271. function = "uart0";
  1272. pins = "gpio14";
  1273. };
  1274. };
  1275.  
  1276. rp1_uart0_ctsrts_16_17 {
  1277. phandle = <0xc7>;
  1278.  
  1279. pin_cts {
  1280. bias-pull-up;
  1281. function = "uart0";
  1282. pins = "gpio16";
  1283. };
  1284.  
  1285. pin_rts {
  1286. bias-disable;
  1287. function = "uart0";
  1288. pins = "gpio17";
  1289. };
  1290. };
  1291.  
  1292. rp1_uart1_0_1 {
  1293. phandle = <0xc8>;
  1294.  
  1295. pin_rxd {
  1296. bias-pull-up;
  1297. function = "uart1";
  1298. pins = "gpio1";
  1299. };
  1300.  
  1301. pin_txd {
  1302. bias-disable;
  1303. function = "uart1";
  1304. pins = "gpio0";
  1305. };
  1306. };
  1307.  
  1308. rp1_uart1_ctsrts_2_3 {
  1309. phandle = <0xc9>;
  1310.  
  1311. pin_cts {
  1312. bias-pull-up;
  1313. function = "uart1";
  1314. pins = "gpio2";
  1315. };
  1316.  
  1317. pin_rts {
  1318. bias-disable;
  1319. function = "uart1";
  1320. pins = "gpio3";
  1321. };
  1322. };
  1323.  
  1324. rp1_uart2_4_5 {
  1325. phandle = <0xca>;
  1326.  
  1327. pin_rxd {
  1328. bias-pull-up;
  1329. function = "uart2";
  1330. pins = "gpio5";
  1331. };
  1332.  
  1333. pin_txd {
  1334. bias-disable;
  1335. function = "uart2";
  1336. pins = "gpio4";
  1337. };
  1338. };
  1339.  
  1340. rp1_uart2_ctsrts_6_7 {
  1341. phandle = <0xcb>;
  1342.  
  1343. pin_cts {
  1344. bias-pull-up;
  1345. function = "uart2";
  1346. pins = "gpio6";
  1347. };
  1348.  
  1349. pin_rts {
  1350. bias-disable;
  1351. function = "uart2";
  1352. pins = "gpio7";
  1353. };
  1354. };
  1355.  
  1356. rp1_uart3_8_9 {
  1357. phandle = <0xcc>;
  1358.  
  1359. pin_rxd {
  1360. bias-pull-up;
  1361. function = "uart3";
  1362. pins = "gpio9";
  1363. };
  1364.  
  1365. pin_txd {
  1366. bias-disable;
  1367. function = "uart3";
  1368. pins = "gpio8";
  1369. };
  1370. };
  1371.  
  1372. rp1_uart3_ctsrts_10_11 {
  1373. phandle = <0xcd>;
  1374.  
  1375. pin_cts {
  1376. bias-pull-up;
  1377. function = "uart3";
  1378. pins = "gpio10";
  1379. };
  1380.  
  1381. pin_rts {
  1382. bias-disable;
  1383. function = "uart3";
  1384. pins = "gpio11";
  1385. };
  1386. };
  1387.  
  1388. rp1_uart4_12_13 {
  1389. phandle = <0xce>;
  1390.  
  1391. pin_rxd {
  1392. bias-pull-up;
  1393. function = "uart4";
  1394. pins = "gpio13";
  1395. };
  1396.  
  1397. pin_txd {
  1398. bias-disable;
  1399. function = "uart4";
  1400. pins = "gpio12";
  1401. };
  1402. };
  1403.  
  1404. rp1_uart4_ctsrts_14_15 {
  1405. phandle = <0xcf>;
  1406.  
  1407. pin_cts {
  1408. bias-pull-up;
  1409. function = "uart4";
  1410. pins = "gpio14";
  1411. };
  1412.  
  1413. pin_rts {
  1414. bias-disable;
  1415. function = "uart4";
  1416. pins = "gpio15";
  1417. };
  1418. };
  1419.  
  1420. usb_vbus_pins {
  1421. function = "vbus1";
  1422. phandle = <0x4c>;
  1423. pins = "gpio42\0gpio43";
  1424. };
  1425. };
  1426.  
  1427. gpiomem@d0000 {
  1428. chardev-name = "gpiomem0";
  1429. compatible = "raspberrypi,gpiomem";
  1430. reg = <0xc0 0x400d0000 0x00 0x30000>;
  1431. };
  1432.  
  1433. i2c@70000 {
  1434. clock-frequency = <0x186a0>;
  1435. clocks = <0x30 0x0c>;
  1436. compatible = "snps,designware-i2c";
  1437. i2c-scl-falling-time-ns = <0x64>;
  1438. i2c-scl-rising-time-ns = <0x41>;
  1439. i2c-sda-hold-time-ns = <0x12c>;
  1440. interrupts = <0x07 0x04>;
  1441. phandle = <0x63>;
  1442. pinctrl-0 = <0x3a>;
  1443. pinctrl-names = "default";
  1444. reg = <0xc0 0x40070000 0x00 0x1000>;
  1445. status = "disabled";
  1446. };
  1447.  
  1448. i2c@74000 {
  1449. clock-frequency = <0x186a0>;
  1450. clocks = <0x30 0x0c>;
  1451. compatible = "snps,designware-i2c";
  1452. i2c-scl-falling-time-ns = <0x64>;
  1453. i2c-scl-rising-time-ns = <0x41>;
  1454. i2c-sda-hold-time-ns = <0x12c>;
  1455. interrupts = <0x08 0x04>;
  1456. phandle = <0x64>;
  1457. pinctrl-0 = <0x3b>;
  1458. pinctrl-names = "default";
  1459. reg = <0xc0 0x40074000 0x00 0x1000>;
  1460. status = "okay";
  1461. };
  1462.  
  1463. i2c@78000 {
  1464. clocks = <0x30 0x0c>;
  1465. compatible = "snps,designware-i2c";
  1466. i2c-scl-falling-time-ns = <0x64>;
  1467. i2c-scl-rising-time-ns = <0x41>;
  1468. i2c-sda-hold-time-ns = <0x12c>;
  1469. interrupts = <0x09 0x04>;
  1470. phandle = <0xbf>;
  1471. pinctrl-0 = <0x3c>;
  1472. pinctrl-names = "default";
  1473. reg = <0xc0 0x40078000 0x00 0x1000>;
  1474. status = "disabled";
  1475. };
  1476.  
  1477. i2c@7c000 {
  1478. clocks = <0x30 0x0c>;
  1479. compatible = "snps,designware-i2c";
  1480. i2c-scl-falling-time-ns = <0x64>;
  1481. i2c-scl-rising-time-ns = <0x41>;
  1482. i2c-sda-hold-time-ns = <0x12c>;
  1483. interrupts = <0x0a 0x04>;
  1484. phandle = <0xc0>;
  1485. pinctrl-0 = <0x3d>;
  1486. pinctrl-names = "default";
  1487. reg = <0xc0 0x4007c000 0x00 0x1000>;
  1488. status = "disabled";
  1489. };
  1490.  
  1491. i2c@80000 {
  1492. clock-frequency = <0x186a0>;
  1493. clocks = <0x30 0x0c>;
  1494. compatible = "snps,designware-i2c";
  1495. i2c-scl-falling-time-ns = <0x64>;
  1496. i2c-scl-rising-time-ns = <0x41>;
  1497. i2c-sda-hold-time-ns = <0x12c>;
  1498. interrupts = <0x0b 0x04>;
  1499. phandle = <0x65>;
  1500. pinctrl-0 = <0x3e>;
  1501. pinctrl-names = "default";
  1502. reg = <0xc0 0x40080000 0x00 0x1000>;
  1503. status = "disabled";
  1504. };
  1505.  
  1506. i2c@84000 {
  1507. clocks = <0x30 0x0c>;
  1508. compatible = "snps,designware-i2c";
  1509. i2c-scl-falling-time-ns = <0x64>;
  1510. i2c-scl-rising-time-ns = <0x41>;
  1511. i2c-sda-hold-time-ns = <0x12c>;
  1512. interrupts = <0x0c 0x04>;
  1513. phandle = <0xc1>;
  1514. reg = <0xc0 0x40084000 0x00 0x1000>;
  1515. status = "disabled";
  1516. };
  1517.  
  1518. i2c@88000 {
  1519. clock-frequency = <0x186a0>;
  1520. clocks = <0x30 0x0c>;
  1521. compatible = "snps,designware-i2c";
  1522. i2c-scl-falling-time-ns = <0x64>;
  1523. i2c-scl-rising-time-ns = <0x41>;
  1524. i2c-sda-hold-time-ns = <0x12c>;
  1525. interrupts = <0x0d 0x04>;
  1526. phandle = <0x66>;
  1527. pinctrl-0 = <0x3f>;
  1528. pinctrl-names = "default";
  1529. reg = <0xc0 0x40088000 0x00 0x1000>;
  1530. status = "disabled";
  1531. };
  1532.  
  1533. i2s@a0000 {
  1534. #sound-dai-cells = <0x00>;
  1535. clock-names = "i2sclk";
  1536. clocks = <0x30 0x15>;
  1537. compatible = "snps,designware-i2s";
  1538. dma-names = "tx\0rx";
  1539. dmas = <0x31 0x20 0x31 0x1f>;
  1540. phandle = <0xc3>;
  1541. pinctrl-0 = <0x41>;
  1542. pinctrl-names = "default";
  1543. reg = <0xc0 0x400a0000 0x00 0x1000>;
  1544. status = "disabled";
  1545. };
  1546.  
  1547. i2s@a4000 {
  1548. #sound-dai-cells = <0x00>;
  1549. clock-names = "i2sclk";
  1550. clocks = <0x30 0x15>;
  1551. compatible = "snps,designware-i2s";
  1552. dma-names = "tx\0rx";
  1553. dmas = <0x31 0x22 0x31 0x21>;
  1554. phandle = <0xc4>;
  1555. pinctrl-0 = <0x42>;
  1556. pinctrl-names = "default";
  1557. reg = <0xc0 0x400a4000 0x00 0x1000>;
  1558. status = "disabled";
  1559. };
  1560.  
  1561. i2s@a8000 {
  1562. clocks = <0x30 0x15>;
  1563. compatible = "snps,designware-i2s";
  1564. phandle = <0xc5>;
  1565. reg = <0xc0 0x400a8000 0x00 0x1000>;
  1566. status = "disabled";
  1567. };
  1568.  
  1569. mmc@180000 {
  1570. broken-cd;
  1571. bus-width = <0x04>;
  1572. clock-names = "bus\0core\0timeout\0sdio";
  1573. clocks = <0x30 0x0c 0x44 0x30 0x1f 0x4a>;
  1574. compatible = "raspberrypi,rp1-dwcmshc";
  1575. interrupts = <0x11 0x04>;
  1576. no-1-8-v;
  1577. phandle = <0xf1>;
  1578. reg = <0xc0 0x40180000 0x00 0x100>;
  1579. status = "disabled";
  1580. vmmc-supply = <0x45>;
  1581. };
  1582.  
  1583. mmc@184000 {
  1584. broken-cd;
  1585. bus-width = <0x04>;
  1586. clock-names = "bus\0core\0timeout\0sdio";
  1587. clocks = <0x30 0x0c 0x44 0x30 0x1f 0x4b>;
  1588. compatible = "raspberrypi,rp1-dwcmshc";
  1589. interrupts = <0x12 0x04>;
  1590. phandle = <0xf2>;
  1591. reg = <0xc0 0x40184000 0x00 0x100>;
  1592. sdhci-caps-mask = <0x03 0x00>;
  1593. status = "disabled";
  1594. vmmc-supply = <0x45>;
  1595. };
  1596.  
  1597. pwm@98000 {
  1598. #pwm-cells = <0x03>;
  1599. assigned-clock-rates = <0x5dc000>;
  1600. assigned-clocks = <0x30 0x11>;
  1601. clocks = <0x30 0x11>;
  1602. compatible = "raspberrypi,rp1-pwm";
  1603. phandle = <0xc2>;
  1604. reg = <0xc0 0x40098000 0x00 0x100>;
  1605. status = "disabled";
  1606. };
  1607.  
  1608. pwm@9c000 {
  1609. #pwm-cells = <0x03>;
  1610. assigned-clock-rates = <0x5dc000>;
  1611. assigned-clocks = <0x30 0x12>;
  1612. clocks = <0x30 0x12>;
  1613. compatible = "raspberrypi,rp1-pwm";
  1614. phandle = <0x60>;
  1615. pinctrl-0 = <0x40>;
  1616. pinctrl-names = "default";
  1617. reg = <0xc0 0x4009c000 0x00 0x100>;
  1618. status = "okay";
  1619. };
  1620.  
  1621. sdio_clk0@b0004 {
  1622. #clock-cells = <0x00>;
  1623. clock-names = "src\0base";
  1624. clocks = <0x43 0x44>;
  1625. compatible = "raspberrypi,rp1-sdio-clk";
  1626. phandle = <0x4a>;
  1627. reg = <0xc0 0x400b0004 0x00 0x1c>;
  1628. status = "disabled";
  1629. };
  1630.  
  1631. sdio_clk1@b4004 {
  1632. #clock-cells = <0x00>;
  1633. clock-names = "src\0base";
  1634. clocks = <0x43 0x44>;
  1635. compatible = "raspberrypi,rp1-sdio-clk";
  1636. phandle = <0x4b>;
  1637. reg = <0xc0 0x400b4004 0x00 0x1c>;
  1638. status = "disabled";
  1639. };
  1640.  
  1641. serial@30000 {
  1642. arm,primecell-periphid = <0x541011>;
  1643. clock-names = "uartclk\0apb_pclk";
  1644. clocks = <0x30 0x0f 0x30 0x06>;
  1645. compatible = "arm,pl011-axi";
  1646. cts-event-workaround;
  1647. dma-names = "tx\0rx";
  1648. dmas = <0x31 0x1a 0x31 0x19>;
  1649. interrupts = <0x19 0x04>;
  1650. phandle = <0x61>;
  1651. pinctrl-0 = <0x32>;
  1652. pinctrl-names = "default";
  1653. reg = <0xc0 0x40030000 0x00 0x100>;
  1654. skip-init;
  1655. status = "disabled";
  1656. uart-has-rtscts;
  1657. };
  1658.  
  1659. serial@34000 {
  1660. arm,primecell-periphid = <0x541011>;
  1661. clock-names = "uartclk\0apb_pclk";
  1662. clocks = <0x30 0x0f 0x30 0x06>;
  1663. compatible = "arm,pl011-axi";
  1664. cts-event-workaround;
  1665. interrupts = <0x2a 0x04>;
  1666. phandle = <0xb0>;
  1667. pinctrl-names = "default";
  1668. reg = <0xc0 0x40034000 0x00 0x100>;
  1669. skip-init;
  1670. status = "disabled";
  1671. uart-has-rtscts;
  1672. };
  1673.  
  1674. serial@38000 {
  1675. arm,primecell-periphid = <0x541011>;
  1676. clock-names = "uartclk\0apb_pclk";
  1677. clocks = <0x30 0x0f 0x30 0x06>;
  1678. compatible = "arm,pl011-axi";
  1679. cts-event-workaround;
  1680. interrupts = <0x2b 0x04>;
  1681. phandle = <0xb1>;
  1682. pinctrl-names = "default";
  1683. reg = <0xc0 0x40038000 0x00 0x100>;
  1684. skip-init;
  1685. status = "disabled";
  1686. uart-has-rtscts;
  1687. };
  1688.  
  1689. serial@3c000 {
  1690. arm,primecell-periphid = <0x541011>;
  1691. clock-names = "uartclk\0apb_pclk";
  1692. clocks = <0x30 0x0f 0x30 0x06>;
  1693. compatible = "arm,pl011-axi";
  1694. cts-event-workaround;
  1695. interrupts = <0x2c 0x04>;
  1696. phandle = <0xb2>;
  1697. pinctrl-names = "default";
  1698. reg = <0xc0 0x4003c000 0x00 0x100>;
  1699. skip-init;
  1700. status = "disabled";
  1701. uart-has-rtscts;
  1702. };
  1703.  
  1704. serial@40000 {
  1705. arm,primecell-periphid = <0x541011>;
  1706. clock-names = "uartclk\0apb_pclk";
  1707. clocks = <0x30 0x0f 0x30 0x06>;
  1708. compatible = "arm,pl011-axi";
  1709. cts-event-workaround;
  1710. interrupts = <0x2d 0x04>;
  1711. phandle = <0xb3>;
  1712. pinctrl-names = "default";
  1713. reg = <0xc0 0x40040000 0x00 0x100>;
  1714. skip-init;
  1715. status = "disabled";
  1716. uart-has-rtscts;
  1717. };
  1718.  
  1719. serial@44000 {
  1720. arm,primecell-periphid = <0x541011>;
  1721. clock-names = "uartclk\0apb_pclk";
  1722. clocks = <0x30 0x0f 0x30 0x06>;
  1723. compatible = "arm,pl011-axi";
  1724. cts-event-workaround;
  1725. interrupts = <0x2e 0x04>;
  1726. phandle = <0xb4>;
  1727. pinctrl-names = "default";
  1728. reg = <0xc0 0x40044000 0x00 0x100>;
  1729. skip-init;
  1730. status = "disabled";
  1731. uart-has-rtscts;
  1732. };
  1733.  
  1734. spi@4c000 {
  1735. #address-cells = <0x01>;
  1736. #size-cells = <0x00>;
  1737. clock-names = "ssi_clk";
  1738. clocks = <0x30 0x0c>;
  1739. compatible = "snps,dw-apb-ssi";
  1740. dma-names = "tx\0rx";
  1741. dmas = <0x31 0x37 0x31 0x36>;
  1742. interrupts = <0x38 0x04>;
  1743. num-cs = <0x02>;
  1744. phandle = <0xb5>;
  1745. reg = <0xc0 0x4004c000 0x00 0x130>;
  1746. status = "disabled";
  1747. };
  1748.  
  1749. spi@50000 {
  1750. #address-cells = <0x01>;
  1751. #size-cells = <0x00>;
  1752. clock-names = "ssi_clk";
  1753. clocks = <0x30 0x0c>;
  1754. compatible = "snps,dw-apb-ssi";
  1755. cs-gpios = <0x35 0x08 0x01 0x35 0x07 0x01>;
  1756. dma-names = "tx\0rx";
  1757. dmas = <0x31 0x0d 0x31 0x0c>;
  1758. interrupts = <0x13 0x04>;
  1759. num-cs = <0x02>;
  1760. phandle = <0x6a>;
  1761. pinctrl-0 = <0x33 0x34>;
  1762. pinctrl-names = "default";
  1763. reg = <0xc0 0x40050000 0x00 0x130>;
  1764. status = "disabled";
  1765.  
  1766. spidev@0 {
  1767. #address-cells = <0x01>;
  1768. #size-cells = <0x00>;
  1769. compatible = "spidev";
  1770. phandle = <0xb6>;
  1771. reg = <0x00>;
  1772. spi-max-frequency = <0x7735940>;
  1773. };
  1774.  
  1775. spidev@1 {
  1776. #address-cells = <0x01>;
  1777. #size-cells = <0x00>;
  1778. compatible = "spidev";
  1779. phandle = <0xb7>;
  1780. reg = <0x01>;
  1781. spi-max-frequency = <0x7735940>;
  1782. };
  1783. };
  1784.  
  1785. spi@54000 {
  1786. #address-cells = <0x01>;
  1787. #size-cells = <0x00>;
  1788. clock-names = "ssi_clk";
  1789. clocks = <0x30 0x0c>;
  1790. compatible = "snps,dw-apb-ssi";
  1791. dma-names = "tx\0rx";
  1792. dmas = <0x31 0x0f 0x31 0x0e>;
  1793. interrupts = <0x14 0x04>;
  1794. num-cs = <0x02>;
  1795. phandle = <0xb8>;
  1796. reg = <0xc0 0x40054000 0x00 0x130>;
  1797. status = "disabled";
  1798. };
  1799.  
  1800. spi@58000 {
  1801. #address-cells = <0x01>;
  1802. #size-cells = <0x00>;
  1803. clock-names = "ssi_clk";
  1804. clocks = <0x30 0x0c>;
  1805. compatible = "snps,dw-apb-ssi";
  1806. dma-names = "tx\0rx";
  1807. dmas = <0x31 0x11 0x31 0x10>;
  1808. interrupts = <0x15 0x04>;
  1809. num-cs = <0x02>;
  1810. phandle = <0xb9>;
  1811. pinctrl-0 = <0x36>;
  1812. pinctrl-names = "default";
  1813. reg = <0xc0 0x40058000 0x00 0x130>;
  1814. status = "disabled";
  1815. };
  1816.  
  1817. spi@5c000 {
  1818. #address-cells = <0x01>;
  1819. #size-cells = <0x00>;
  1820. clock-names = "ssi_clk";
  1821. clocks = <0x30 0x0c>;
  1822. compatible = "snps,dw-apb-ssi";
  1823. dma-names = "tx\0rx";
  1824. dmas = <0x31 0x13 0x31 0x12>;
  1825. interrupts = <0x16 0x04>;
  1826. num-cs = <0x02>;
  1827. phandle = <0xba>;
  1828. pinctrl-0 = <0x37>;
  1829. pinctrl-names = "default";
  1830. reg = <0xc0 0x4005c000 0x00 0x130>;
  1831. status = "disabled";
  1832. };
  1833.  
  1834. spi@60000 {
  1835. #address-cells = <0x00>;
  1836. #size-cells = <0x00>;
  1837. clock-names = "ssi_clk";
  1838. clocks = <0x30 0x0c>;
  1839. compatible = "snps,dw-apb-ssi";
  1840. dma-names = "tx\0rx";
  1841. dmas = <0x31 0x15 0x31 0x14>;
  1842. interrupts = <0x17 0x04>;
  1843. num-cs = <0x01>;
  1844. phandle = <0xbb>;
  1845. pinctrl-0 = <0x38>;
  1846. pinctrl-names = "default";
  1847. reg = <0xc0 0x40060000 0x00 0x130>;
  1848. spi-slave;
  1849. status = "disabled";
  1850.  
  1851. slave {
  1852. compatible = "spidev";
  1853. spi-max-frequency = <0xf4240>;
  1854. };
  1855. };
  1856.  
  1857. spi@64000 {
  1858. #address-cells = <0x01>;
  1859. #size-cells = <0x00>;
  1860. clock-names = "ssi_clk";
  1861. clocks = <0x30 0x0c>;
  1862. compatible = "snps,dw-apb-ssi";
  1863. dma-names = "tx\0rx";
  1864. dmas = <0x31 0x17 0x31 0x16>;
  1865. interrupts = <0x18 0x04>;
  1866. num-cs = <0x02>;
  1867. phandle = <0xbc>;
  1868. pinctrl-0 = <0x39>;
  1869. pinctrl-names = "default";
  1870. reg = <0xc0 0x40064000 0x00 0x130>;
  1871. status = "disabled";
  1872. };
  1873.  
  1874. spi@68000 {
  1875. #address-cells = <0x01>;
  1876. #size-cells = <0x00>;
  1877. clock-names = "ssi_clk";
  1878. clocks = <0x30 0x0c>;
  1879. compatible = "snps,dw-apb-ssi";
  1880. dma-names = "tx\0rx";
  1881. dmas = <0x31 0x33 0x31 0x32>;
  1882. interrupts = <0x36 0x04>;
  1883. num-cs = <0x02>;
  1884. phandle = <0xbd>;
  1885. reg = <0xc0 0x40068000 0x00 0x130>;
  1886. status = "disabled";
  1887. };
  1888.  
  1889. spi@6c000 {
  1890. #address-cells = <0x00>;
  1891. #size-cells = <0x00>;
  1892. clock-names = "ssi_clk";
  1893. clocks = <0x30 0x0c>;
  1894. compatible = "snps,dw-apb-ssi";
  1895. dma-names = "tx\0rx";
  1896. dmas = <0x31 0x35 0x31 0x34>;
  1897. interrupts = <0x37 0x04>;
  1898. num-cs = <0x01>;
  1899. phandle = <0xbe>;
  1900. reg = <0xc0 0x4006c000 0x00 0x130>;
  1901. spi-slave;
  1902. status = "disabled";
  1903.  
  1904. slave {
  1905. compatible = "spidev";
  1906. spi-max-frequency = <0xf4240>;
  1907. };
  1908. };
  1909.  
  1910. usb@200000 {
  1911. compatible = "snps,dwc3";
  1912. dr_mode = "host";
  1913. interrupts = <0x1f 0x01>;
  1914. phandle = <0xf3>;
  1915. pinctrl-0 = <0x4c>;
  1916. pinctrl-names = "default";
  1917. reg = <0xc0 0x40200000 0x00 0x100000>;
  1918. snps,axi-pipe-limit = [08];
  1919. snps,dis_rxdet_inp3_quirk;
  1920. snps,parkmode-disable-fsls-quirk;
  1921. snps,parkmode-disable-hs-quirk;
  1922. snps,parkmode-disable-ss-quirk;
  1923. snps,tx-max-burst-prd = <0x08>;
  1924. snps,tx-thr-num-pkt-prd = <0x02>;
  1925. status = "okay";
  1926. usb3-lpm-capable;
  1927. };
  1928.  
  1929. usb@300000 {
  1930. compatible = "snps,dwc3";
  1931. dr_mode = "host";
  1932. interrupts = <0x24 0x01>;
  1933. phandle = <0xf4>;
  1934. reg = <0xc0 0x40300000 0x00 0x100000>;
  1935. snps,axi-pipe-limit = [08];
  1936. snps,dis_rxdet_inp3_quirk;
  1937. snps,parkmode-disable-fsls-quirk;
  1938. snps,parkmode-disable-hs-quirk;
  1939. snps,parkmode-disable-ss-quirk;
  1940. snps,tx-max-burst-prd = <0x08>;
  1941. snps,tx-thr-num-pkt-prd = <0x02>;
  1942. status = "okay";
  1943. usb3-lpm-capable;
  1944. };
  1945.  
  1946. vec@144000 {
  1947. assigned-clock-parents = <0x00 0x30 0x02 0x30 0x0b>;
  1948. assigned-clock-rates = <0x46cf7100 0x66ff300 0x66ff300>;
  1949. assigned-clocks = <0x30 0x02 0x30 0x0b 0x30 0x27>;
  1950. clocks = <0x30 0x27>;
  1951. compatible = "raspberrypi,rp1vec";
  1952. interrupts = <0x31 0x04>;
  1953. iommus = <0x49>;
  1954. phandle = <0xf7>;
  1955. reg = <0xc0 0x40144000 0x00 0x1000 0xc0 0x40140000 0x00 0x1000>;
  1956. status = "disabled";
  1957. };
  1958. };
  1959. };
  1960.  
  1961. pisp_be@880000 {
  1962. clocks = <0x0a 0x07>;
  1963. clocks-names = "isp_be";
  1964. compatible = "raspberrypi,pispbe";
  1965. interrupts = <0x00 0x48 0x04>;
  1966. iommus = <0x52>;
  1967. phandle = <0xff>;
  1968. reg = <0x10 0x880000 0x00 0x4000>;
  1969. status = "okay";
  1970. };
  1971.  
  1972. reset-controller@119500 {
  1973. #reset-cells = <0x00>;
  1974. compatible = "brcm,bcm7216-pcie-sata-rescal";
  1975. phandle = <0x2a>;
  1976. reg = <0x10 0x119500 0x00 0x10>;
  1977. };
  1978.  
  1979. reset-controller@1504318 {
  1980. #reset-cells = <0x01>;
  1981. compatible = "brcm,brcmstb-reset";
  1982. phandle = <0x29>;
  1983. reg = <0x10 0x1504318 0x00 0x30>;
  1984. };
  1985.  
  1986. syscon@400018 {
  1987. compatible = "brcm,syscon-piarbctl\0syscon\0simple-mfd";
  1988. phandle = <0xf9>;
  1989. reg = <0x10 0x400018 0x00 0x18>;
  1990. };
  1991.  
  1992. usb@480000 {
  1993. #address-cells = <0x01>;
  1994. #size-cells = <0x00>;
  1995. clock-names = "otg";
  1996. clocks = <0x4f>;
  1997. compatible = "brcm,bcm2835-usb";
  1998. interrupts = <0x00 0x49 0x04>;
  1999. phandle = <0xfa>;
  2000. phy-names = "usb2-phy";
  2001. phys = <0x50>;
  2002. power-domains = <0x51 0x06>;
  2003. reg = <0x10 0x480000 0x00 0x10000>;
  2004. status = "disabled";
  2005. };
  2006.  
  2007. v3d@2000000 {
  2008. clocks = <0x0a 0x05>;
  2009. clocks-names = "v3d";
  2010. compatible = "brcm,2712-v3d";
  2011. interrupts = <0x00 0xfa 0x04 0x00 0xf9 0x04>;
  2012. phandle = <0xfe>;
  2013. power-domains = <0x5b 0x01>;
  2014. reg = <0x10 0x2000000 0x00 0x4000 0x10 0x2008000 0x00 0x6000>;
  2015. reg-names = "hub\0core0";
  2016. resets = <0x5b 0x00>;
  2017. status = "okay";
  2018. };
  2019.  
  2020. vc_mem {
  2021. reg = <0x3fc00000 0x40000000 0xc0000000>;
  2022. };
  2023. };
  2024.  
  2025. cam0_clk {
  2026. #clock-cells = <0x00>;
  2027. compatible = "fixed-clock";
  2028. phandle = <0x109>;
  2029. status = "disabled";
  2030. };
  2031.  
  2032. cam0_reg {
  2033. compatible = "regulator-fixed";
  2034. enable-active-high;
  2035. gpio = <0x35 0x22 0x00>;
  2036. phandle = <0x10a>;
  2037. regulator-name = "cam0_reg";
  2038. status = "okay";
  2039. };
  2040.  
  2041. cam1_clk {
  2042. #clock-cells = <0x00>;
  2043. compatible = "fixed-clock";
  2044. phandle = <0x108>;
  2045. status = "disabled";
  2046. };
  2047.  
  2048. cam1_reg {
  2049. compatible = "regulator-fixed";
  2050. enable-active-high;
  2051. gpio = <0x35 0x2e 0x00>;
  2052. phandle = <0x10b>;
  2053. regulator-name = "cam1_reg";
  2054. status = "okay";
  2055. };
  2056.  
  2057. cam_dummy_reg {
  2058. compatible = "regulator-fixed";
  2059. phandle = <0x10c>;
  2060. regulator-name = "cam-dummy-reg";
  2061. status = "okay";
  2062. };
  2063.  
  2064. chosen {
  2065. bootargs = "reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 smsc95xx.macaddr=2C:CF:67:0E:C9:92 vc_mem.mem_base=0x3fc00000 vc_mem.mem_size=0x40000000 console=ttyAMA10,115200 console=tty1 root=PARTUUID=516702f7-02 rootfstype=ext4 fsck.repair=yes rootwait quiet splash plymouth.ignore-serial-consoles cfg80211.ieee80211_regdom=GB";
  2066. kaslr-seed = <0x00 0x00>;
  2067. linux,initrd-end = <0x2efff4fe>;
  2068. linux,initrd-start = <0x2dfaa000>;
  2069. log = <0x3ff16000 0x80000>;
  2070. os_prefix = [00];
  2071. overlay_prefix = "overlays/";
  2072. phandle = <0x110>;
  2073. rpi-boardrev-ext = <0x00>;
  2074. rpi-duid = "1000911004993312";
  2075. stdout-path = "serial10:115200n8";
  2076.  
  2077. bootloader {
  2078. boot-mode = <0x01>;
  2079. build-timestamp = <0x65cf7f29>;
  2080. capabilities = <0x7f>;
  2081. partition = <0x00>;
  2082. rsts = <0x1000>;
  2083. tryboot = <0x00>;
  2084. update-timestamp = <0x65faecb7>;
  2085. version = "4c845bd37c8a7c7ff79173cdc50dd3facf63996f";
  2086. };
  2087.  
  2088. power {
  2089. max_current = <0x1388>;
  2090. power_reset = <0x00>;
  2091. rpi_power_supply = <0x2e8a 0xf0000>;
  2092. usb_max_current_enable = <0x01>;
  2093. usb_over_current_detected = <0x00>;
  2094. usbpd_power_data_objects = <0xa0191f4 0x2d12c 0x3c0e1 0x4b0b4 0x00 0x00 0x00>;
  2095. };
  2096. };
  2097.  
  2098. clk-108M {
  2099. #clock-cells = <0x00>;
  2100. clock-frequency = <0x66ff300>;
  2101. clock-output-names = "108MHz-clock";
  2102. compatible = "fixed-clock";
  2103. phandle = <0x0d>;
  2104. };
  2105.  
  2106. clk-27M {
  2107. #clock-cells = <0x00>;
  2108. clock-frequency = <0x19bfcc0>;
  2109. clock-output-names = "27MHz-clock";
  2110. compatible = "fixed-clock";
  2111. phandle = <0x1b>;
  2112. };
  2113.  
  2114. clocks {
  2115. phandle = <0x100>;
  2116.  
  2117. clk-osc {
  2118. #clock-cells = <0x00>;
  2119. clock-frequency = <0x337f980>;
  2120. clock-output-names = "osc";
  2121. compatible = "fixed-clock";
  2122. phandle = <0x15>;
  2123. };
  2124.  
  2125. clk-usb {
  2126. #clock-cells = <0x00>;
  2127. clock-frequency = <0x1c9c3800>;
  2128. clock-output-names = "otg";
  2129. compatible = "fixed-clock";
  2130. phandle = <0x4f>;
  2131. };
  2132.  
  2133. clk_emmc2 {
  2134. #clock-cells = <0x00>;
  2135. clock-frequency = <0x337f980>;
  2136. clock-output-names = "emmc2-clock";
  2137. compatible = "fixed-clock";
  2138. phandle = <0x53>;
  2139. };
  2140.  
  2141. clk_uart {
  2142. #clock-cells = <0x00>;
  2143. clock-frequency = <0x2a30000>;
  2144. clock-output-names = "uart-clock";
  2145. compatible = "fixed-clock";
  2146. phandle = <0x0e>;
  2147. };
  2148.  
  2149. clk_vpu {
  2150. #clock-cells = <0x00>;
  2151. clock-frequency = <0x2cb41780>;
  2152. clock-output-names = "vpu-clock";
  2153. compatible = "fixed-clock";
  2154. phandle = <0x0f>;
  2155. };
  2156.  
  2157. clk_xosc {
  2158. #clock-cells = <0x00>;
  2159. clock-frequency = <0x2faf080>;
  2160. clock-output-names = "xosc";
  2161. compatible = "fixed-clock";
  2162. phandle = <0x2f>;
  2163. };
  2164.  
  2165. clksrc_gp0 {
  2166. #clock-cells = <0x00>;
  2167. clock-div = <0x01>;
  2168. clock-mult = <0x01>;
  2169. clock-output-names = "clksrc_gp0";
  2170. clocks = <0x30 0x21>;
  2171. compatible = "fixed-factor-clock";
  2172. phandle = <0x101>;
  2173. status = "disabled";
  2174. };
  2175.  
  2176. clksrc_gp1 {
  2177. #clock-cells = <0x00>;
  2178. clock-div = <0x01>;
  2179. clock-mult = <0x01>;
  2180. clock-output-names = "clksrc_gp1";
  2181. clocks = <0x30 0x22>;
  2182. compatible = "fixed-factor-clock";
  2183. phandle = <0x102>;
  2184. status = "disabled";
  2185. };
  2186.  
  2187. clksrc_gp2 {
  2188. #clock-cells = <0x00>;
  2189. clock-div = <0x01>;
  2190. clock-mult = <0x01>;
  2191. clock-output-names = "clksrc_gp2";
  2192. clocks = <0x30 0x23>;
  2193. compatible = "fixed-factor-clock";
  2194. phandle = <0x103>;
  2195. status = "disabled";
  2196. };
  2197.  
  2198. clksrc_gp3 {
  2199. #clock-cells = <0x00>;
  2200. clock-div = <0x01>;
  2201. clock-mult = <0x01>;
  2202. clock-output-names = "clksrc_gp3";
  2203. clocks = <0x30 0x24>;
  2204. compatible = "fixed-factor-clock";
  2205. phandle = <0x104>;
  2206. status = "disabled";
  2207. };
  2208.  
  2209. clksrc_gp4 {
  2210. #clock-cells = <0x00>;
  2211. clock-div = <0x01>;
  2212. clock-mult = <0x01>;
  2213. clock-output-names = "clksrc_gp4";
  2214. clocks = <0x30 0x25>;
  2215. compatible = "fixed-factor-clock";
  2216. phandle = <0x105>;
  2217. status = "disabled";
  2218. };
  2219.  
  2220. clksrc_gp5 {
  2221. #clock-cells = <0x00>;
  2222. clock-div = <0x01>;
  2223. clock-mult = <0x01>;
  2224. clock-output-names = "clksrc_gp5";
  2225. clocks = <0x30 0x26>;
  2226. compatible = "fixed-factor-clock";
  2227. phandle = <0x106>;
  2228. status = "disabled";
  2229. };
  2230.  
  2231. clksrc_mipi0_dsi_byteclk {
  2232. #clock-cells = <0x00>;
  2233. clock-frequency = <0x44aa200>;
  2234. clock-output-names = "clksrc_mipi0_dsi_byteclk";
  2235. compatible = "fixed-clock";
  2236. phandle = <0x4d>;
  2237. };
  2238.  
  2239. clksrc_mipi1_dsi_byteclk {
  2240. #clock-cells = <0x00>;
  2241. clock-frequency = <0x44aa200>;
  2242. clock-output-names = "clksrc_mipi1_dsi_byteclk";
  2243. compatible = "fixed-clock";
  2244. phandle = <0x4e>;
  2245. };
  2246.  
  2247. macb_hclk {
  2248. #clock-cells = <0x00>;
  2249. clock-frequency = <0xbebc200>;
  2250. clock-output-names = "hclk";
  2251. compatible = "fixed-clock";
  2252. phandle = <0x47>;
  2253. };
  2254.  
  2255. macb_pclk {
  2256. #clock-cells = <0x00>;
  2257. clock-frequency = <0xbebc200>;
  2258. clock-output-names = "pclk";
  2259. compatible = "fixed-clock";
  2260. phandle = <0x46>;
  2261. };
  2262.  
  2263. sdhci_core {
  2264. #clock-cells = <0x00>;
  2265. clock-frequency = <0x2faf080>;
  2266. clock-output-names = "core";
  2267. compatible = "fixed-clock";
  2268. phandle = <0x44>;
  2269. };
  2270.  
  2271. sdio_src {
  2272. #clock-cells = <0x00>;
  2273. clock-frequency = <0x3b9aca00>;
  2274. clock-output-names = "src";
  2275. compatible = "fixed-clock";
  2276. phandle = <0x43>;
  2277. };
  2278. };
  2279.  
  2280. cooling_fan {
  2281. #cooling-cells = <0x02>;
  2282. compatible = "pwm-fan";
  2283. cooling-levels = <0x00 0x4b 0x7d 0xaf 0xfa>;
  2284. cooling-max-state = <0x03>;
  2285. cooling-min-state = <0x00>;
  2286. phandle = <0x04>;
  2287. pwms = <0x60 0x03 0xa25e 0x01>;
  2288. rpm-offset = <0x3c>;
  2289. rpm-regmap = <0x60>;
  2290. status = "okay";
  2291. };
  2292.  
  2293. cpus {
  2294. #address-cells = <0x01>;
  2295. #size-cells = <0x00>;
  2296. enable-method = "brcm,bcm2836-smp";
  2297. phandle = <0xaa>;
  2298.  
  2299. cpu@0 {
  2300. compatible = "arm,cortex-a76";
  2301. device_type = "cpu";
  2302. enable-method = "psci";
  2303. next-level-cache = <0x26>;
  2304. phandle = <0x22>;
  2305. reg = <0x00>;
  2306. };
  2307.  
  2308. cpu@1 {
  2309. compatible = "arm,cortex-a76";
  2310. device_type = "cpu";
  2311. enable-method = "psci";
  2312. next-level-cache = <0x26>;
  2313. phandle = <0x23>;
  2314. reg = <0x100>;
  2315. };
  2316.  
  2317. cpu@2 {
  2318. compatible = "arm,cortex-a76";
  2319. device_type = "cpu";
  2320. enable-method = "psci";
  2321. next-level-cache = <0x26>;
  2322. phandle = <0x24>;
  2323. reg = <0x200>;
  2324. };
  2325.  
  2326. cpu@3 {
  2327. compatible = "arm,cortex-a76";
  2328. device_type = "cpu";
  2329. enable-method = "psci";
  2330. next-level-cache = <0x26>;
  2331. phandle = <0x25>;
  2332. reg = <0x300>;
  2333. };
  2334.  
  2335. l2-cache {
  2336. compatible = "cache";
  2337. next-level-cache = <0x27>;
  2338. phandle = <0x26>;
  2339. };
  2340.  
  2341. l3-cache {
  2342. compatible = "cache";
  2343. phandle = <0x27>;
  2344. };
  2345. };
  2346.  
  2347. dummy {
  2348. phandle = <0x10d>;
  2349. };
  2350.  
  2351. hvs@107c580000 {
  2352. clock-names = "core\0disp";
  2353. clocks = <0x0a 0x04 0x0a 0x10>;
  2354. compatible = "brcm,bcm2712-hvs";
  2355. interrupt-names = "ch0-eof\0ch1-eof\0ch2-eof";
  2356. interrupt-parent = <0x09>;
  2357. interrupts = <0x02 0x09 0x10>;
  2358. phandle = <0x75>;
  2359. reg = <0x10 0x7c580000 0x1a000>;
  2360. status = "okay";
  2361. };
  2362.  
  2363. i2c0if {
  2364. phandle = <0x10e>;
  2365. };
  2366.  
  2367. i2c0mux {
  2368. phandle = <0x10f>;
  2369. };
  2370.  
  2371. leds {
  2372. compatible = "gpio-leds";
  2373. phandle = <0x107>;
  2374.  
  2375. led-act {
  2376. default-state = "off";
  2377. gpios = <0x58 0x09 0x01>;
  2378. label = "ACT";
  2379. linux,default-trigger = "mmc0";
  2380. phandle = <0x6c>;
  2381. };
  2382.  
  2383. led-pwr {
  2384. default-state = "off";
  2385. gpios = <0x35 0x2c 0x01>;
  2386. label = "PWR";
  2387. linux,default-trigger = "none";
  2388. phandle = <0x6d>;
  2389. };
  2390. };
  2391.  
  2392. memory@0 {
  2393. device_type = "memory";
  2394. reg = <0x00 0x00 0x3fc00000 0x00 0x40000000 0xc0000000 0x01 0x00 0x80000000 0x01 0x80000000 0x80000000>;
  2395. };
  2396.  
  2397. phy {
  2398. #phy-cells = <0x00>;
  2399. compatible = "usb-nop-xceiv";
  2400. phandle = <0x50>;
  2401. };
  2402.  
  2403. psci {
  2404. compatible = "arm,psci-1.0\0arm,psci-0.2\0arm,psci";
  2405. cpu_off = <0x84000002>;
  2406. cpu_on = <0xc4000003>;
  2407. cpu_suspend = <0xc4000001>;
  2408. method = "smc";
  2409. };
  2410.  
  2411. pwr_button {
  2412. compatible = "gpio-keys";
  2413. pinctrl-0 = <0x6e>;
  2414. pinctrl-names = "default";
  2415. status = "okay";
  2416.  
  2417. pwr {
  2418. debounce-interval = <0x32>;
  2419. gpios = <0x11 0x14 0x01>;
  2420. label = "pwr_button";
  2421. linux,code = <0x74>;
  2422. phandle = <0x5f>;
  2423. };
  2424. };
  2425.  
  2426. reserved-memory {
  2427. #address-cells = <0x02>;
  2428. #size-cells = <0x01>;
  2429. phandle = <0x6f>;
  2430. ranges;
  2431.  
  2432. atf@0 {
  2433. no-map;
  2434. reg = <0x00 0x00 0x80000>;
  2435. };
  2436.  
  2437. linux,cma {
  2438. alloc-ranges = <0x00 0x00 0x40000000>;
  2439. compatible = "shared-dma-pool";
  2440. linux,cma-default;
  2441. phandle = <0x70>;
  2442. reusable;
  2443. size = <0x14000000>;
  2444. };
  2445.  
  2446. nvram@0 {
  2447. #address-cells = <0x01>;
  2448. #size-cells = <0x01>;
  2449. compatible = "raspberrypi,bootloader-config\0nvmem-rmem";
  2450. no-map;
  2451. phandle = <0x71>;
  2452. reg = <0x00 0x3fd165a0 0x38>;
  2453. status = "okay";
  2454. };
  2455. };
  2456.  
  2457. rp1_vdd_3v3 {
  2458. compatible = "regulator-fixed";
  2459. phandle = <0x45>;
  2460. regulator-always-on;
  2461. regulator-max-microvolt = <0x325aa0>;
  2462. regulator-min-microvolt = <0x325aa0>;
  2463. regulator-name = "vdd-3v3";
  2464. };
  2465.  
  2466. sd_io_1v8_reg {
  2467. compatible = "regulator-gpio";
  2468. gpios = <0x58 0x03 0x00>;
  2469. phandle = <0x56>;
  2470. regulator-always-on;
  2471. regulator-boot-on;
  2472. regulator-max-microvolt = <0x325aa0>;
  2473. regulator-min-microvolt = <0x1b7740>;
  2474. regulator-name = "vdd-sd-io";
  2475. regulator-settling-time-us = <0x1388>;
  2476. states = <0x1b7740 0x01 0x325aa0 0x00>;
  2477. status = "okay";
  2478. };
  2479.  
  2480. sd_vcc_reg {
  2481. compatible = "regulator-fixed";
  2482. enable-active-high;
  2483. gpios = <0x58 0x04 0x00>;
  2484. phandle = <0x57>;
  2485. regulator-boot-on;
  2486. regulator-max-microvolt = <0x325aa0>;
  2487. regulator-min-microvolt = <0x325aa0>;
  2488. regulator-name = "vcc-sd";
  2489. status = "okay";
  2490. };
  2491.  
  2492. soc {
  2493. #address-cells = <0x01>;
  2494. #size-cells = <0x01>;
  2495. compatible = "simple-bus";
  2496. dma-ranges = <0xc0000000 0x00 0x00 0x40000000 0x7c000000 0x10 0x7c000000 0x4000000>;
  2497. phandle = <0x76>;
  2498. ranges = <0x7c000000 0x10 0x7c000000 0x4000000>;
  2499.  
  2500. _i2s@7d003000 {
  2501. compatible = "brcm,bcm2835-i2s";
  2502. phandle = <0x82>;
  2503. reg = <0x7d003000 0x24>;
  2504. status = "disabled";
  2505. };
  2506.  
  2507. avs-monitor@7d542000 {
  2508. compatible = "brcm,bcm2711-avs-monitor\0syscon\0simple-mfd";
  2509. phandle = <0xa0>;
  2510. reg = <0x7d542000 0xf00>;
  2511. status = "okay";
  2512.  
  2513. thermal {
  2514. #thermal-sensor-cells = <0x00>;
  2515. compatible = "brcm,bcm2711-thermal";
  2516. phandle = <0x02>;
  2517. };
  2518. };
  2519.  
  2520. axiperf {
  2521. compatible = "brcm,bcm2712-axiperf";
  2522. firmware = <0x0c>;
  2523. phandle = <0x5d>;
  2524. reg = <0x7c012800 0x100 0x7e000000 0x100>;
  2525. status = "disabled";
  2526. };
  2527.  
  2528. clock@7c700000 {
  2529. #clock-cells = <0x01>;
  2530. #reset-cells = <0x01>;
  2531. clocks = <0x0d>;
  2532. compatible = "brcm,brcm2711-dvp";
  2533. phandle = <0x1d>;
  2534. reg = <0x7c700000 0x10>;
  2535. };
  2536.  
  2537. cprman@7d202000 {
  2538. #clock-cells = <0x01>;
  2539. clocks = <0x15>;
  2540. compatible = "brcm,bcm2711-cprman";
  2541. phandle = <0x91>;
  2542. reg = "} \0\0\0 ";
  2543. status = "disabled";
  2544. };
  2545.  
  2546. fb {
  2547. compatible = "brcm,bcm2708-fb";
  2548. firmware = <0x0c>;
  2549. phandle = <0xa7>;
  2550. status = "disabled";
  2551. };
  2552.  
  2553. firmware {
  2554. #address-cells = <0x01>;
  2555. #size-cells = <0x01>;
  2556. compatible = "raspberrypi,bcm2835-firmware\0simple-mfd";
  2557. dma-ranges;
  2558. mboxes = <0x21>;
  2559. phandle = <0x0c>;
  2560.  
  2561. clocks {
  2562. #clock-cells = <0x01>;
  2563. compatible = "raspberrypi,firmware-clocks";
  2564. phandle = <0x0a>;
  2565. };
  2566.  
  2567. reset {
  2568. #reset-cells = <0x01>;
  2569. compatible = "raspberrypi,firmware-reset";
  2570. phandle = <0xa5>;
  2571. };
  2572.  
  2573. vcio {
  2574. compatible = "raspberrypi,vcio";
  2575. phandle = <0xa6>;
  2576. };
  2577. };
  2578.  
  2579. firmwarekms@7d503000 {
  2580. brcm,firmware = <0x0c>;
  2581. compatible = "raspberrypi,rpi-firmware-kms-2712";
  2582. interrupt-parent = <0x0b>;
  2583. interrupts = <0x13>;
  2584. phandle = <0x78>;
  2585. reg = <0x7d503000 0x18>;
  2586. status = "disabled";
  2587. };
  2588.  
  2589. fixedregulator_3v3 {
  2590. compatible = "regulator-fixed";
  2591. phandle = <0xa8>;
  2592. regulator-always-on;
  2593. regulator-max-microvolt = <0x325aa0>;
  2594. regulator-min-microvolt = <0x325aa0>;
  2595. regulator-name = "3v3";
  2596. };
  2597.  
  2598. fixedregulator_5v0 {
  2599. compatible = "regulator-fixed";
  2600. phandle = <0xa9>;
  2601. regulator-always-on;
  2602. regulator-max-microvolt = <0x4c4b40>;
  2603. regulator-min-microvolt = <0x4c4b40>;
  2604. regulator-name = "5v0";
  2605. };
  2606.  
  2607. gpio@7d508500 {
  2608. #gpio-cells = <0x02>;
  2609. #interrupt-cells = <0x02>;
  2610. brcm,gpio-bank-widths = <0x20 0x04>;
  2611. brcm,gpio-direct;
  2612. compatible = "brcm,brcmstb-gpio";
  2613. gpio-controller;
  2614. gpio-line-names = "-\02712_BOOT_CS_N\02712_BOOT_MISO\02712_BOOT_MOSI\02712_BOOT_SCLK\0-\0-\0-\0-\0-\0-\0-\0-\0-\0PCIE_SDA\0PCIE_SCL\0-\0-\0-\0-\0PWR_GPIO\02712_G21_FS\0-\0-\0BT_RTS\0BT_CTS\0BT_TXD\0BT_RXD\0WL_ON\0BT_ON\0WIFI_SDIO_CLK\0WIFI_SDIO_CMD\0WIFI_SDIO_D0\0WIFI_SDIO_D1\0WIFI_SDIO_D2\0WIFI_SDIO_D3";
  2615. interrupt-controller;
  2616. interrupt-parent = <0x17>;
  2617. interrupts = <0x00>;
  2618. phandle = <0x11>;
  2619. reg = <0x7d508500 0x40>;
  2620. };
  2621.  
  2622. gpio@7d517c00 {
  2623. #gpio-cells = <0x02>;
  2624. #interrupt-cells = <0x02>;
  2625. brcm,gpio-bank-widths = <0x11 0x06>;
  2626. brcm,gpio-direct;
  2627. compatible = "brcm,brcmstb-gpio";
  2628. gpio-controller;
  2629. gpio-line-names = "RP1_SDA\0RP1_SCL\0RP1_RUN\0SD_IOVDD_SEL\0SD_PWR_ON\0SD_CDET_N\0SD_FLG_N\0-\02712_WAKE\02712_STAT_LED\0-\0-\0PMIC_INT\0UART_TX_FS\0UART_RX_FS\0-\0-\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0HDMI0_SCL\0HDMI0_SDA\0HDMI1_SCL\0HDMI1_SDA\0PMIC_SCL\0PMIC_SDA";
  2630. interrupt-parent = <0x1c>;
  2631. interrupts = <0x00>;
  2632. phandle = <0x58>;
  2633. reg = <0x7d517c00 0x40>;
  2634.  
  2635. rp1_run_hog {
  2636. gpio-hog;
  2637. gpios = <0x02 0x00>;
  2638. line-name = "RP1 RUN pin";
  2639. output-high;
  2640. };
  2641. };
  2642.  
  2643. gpiomem@7d504100 {
  2644. chardev-name = "gpiomem3";
  2645. compatible = "raspberrypi,gpiomem";
  2646. reg = <0x7d504100 0x20>;
  2647. };
  2648.  
  2649. gpiomem@7d508500 {
  2650. chardev-name = "gpiomem1";
  2651. compatible = "raspberrypi,gpiomem";
  2652. reg = <0x7d508500 0x40>;
  2653. };
  2654.  
  2655. gpiomem@7d510700 {
  2656. chardev-name = "gpiomem4";
  2657. compatible = "raspberrypi,gpiomem";
  2658. reg = <0x7d510700 0x20>;
  2659. };
  2660.  
  2661. gpiomem@7d517c00 {
  2662. chardev-name = "gpiomem2";
  2663. compatible = "raspberrypi,gpiomem";
  2664. reg = <0x7d517c00 0x40>;
  2665. };
  2666.  
  2667. hdmi@7ef00700 {
  2668. clock-names = "hdmi\0bvb\0audio\0cec";
  2669. clocks = <0x0a 0x0d 0x0a 0x0e 0x1d 0x00 0x1b>;
  2670. compatible = "brcm,bcm2712-hdmi0";
  2671. ddc = <0x1f>;
  2672. dma-names = "audio-rx";
  2673. dmas = <0x10 0x41fa000a>;
  2674. interrupt-names = "cec-tx\0cec-rx\0cec-low\0hpd-connected\0hpd-removed";
  2675. interrupt-parent = <0x1e>;
  2676. interrupts = <0x01 0x02 0x03 0x07 0x08>;
  2677. phandle = <0xa2>;
  2678. reg = <0x7c701400 0x300 0x7c701000 0x200 0x7c701d00 0x300 0x7c702000 0x80 0x7c703800 0x200 0x7c704000 0x800 0x7c700100 0x80 0x7d510800 0x100 0x7c720000 0x100>;
  2679. reg-names = "hdmi\0dvp\0phy\0rm\0packet\0metadata\0csc\0cec\0hd";
  2680. resets = <0x1d 0x01>;
  2681. status = "okay";
  2682. };
  2683.  
  2684. hdmi@7ef05700 {
  2685. clock-names = "hdmi\0bvb\0audio\0cec";
  2686. clocks = <0x0a 0x0d 0x0a 0x0e 0x1d 0x01 0x1b>;
  2687. compatible = "brcm,bcm2712-hdmi1";
  2688. ddc = <0x20>;
  2689. dma-names = "audio-rx";
  2690. dmas = <0x10 0x41fa0011>;
  2691. interrupt-names = "cec-tx\0cec-rx\0cec-low\0hpd-connected\0hpd-removed";
  2692. interrupt-parent = <0x1e>;
  2693. interrupts = <0x0b 0x0c 0x0d 0x0e 0x0f>;
  2694. phandle = <0xa3>;
  2695. reg = <0x7c706400 0x300 0x7c706000 0x200 0x7c706d00 0x300 0x7c707000 0x80 0x7c708800 0x200 0x7c709000 0x800 0x7c700180 0x80 0x7d511000 0x100 0x7c720000 0x100>;
  2696. reg-names = "hdmi\0dvp\0phy\0rm\0packet\0metadata\0csc\0cec\0hd";
  2697. resets = <0x1d 0x02>;
  2698. status = "okay";
  2699. };
  2700.  
  2701. i2c@7d005000 {
  2702. #address-cells = <0x01>;
  2703. #size-cells = <0x00>;
  2704. clocks = <0x0f>;
  2705. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2706. interrupts = <0x00 0x75 0x04>;
  2707. phandle = <0x89>;
  2708. reg = <0x7d005000 0x20>;
  2709. status = "disabled";
  2710. };
  2711.  
  2712. i2c@7d005600 {
  2713. #address-cells = <0x01>;
  2714. #size-cells = <0x00>;
  2715. clock-frequency = <0x61a80>;
  2716. clocks = <0x0f>;
  2717. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2718. interrupts = <0x00 0x75 0x04>;
  2719. phandle = <0x8a>;
  2720. pinctrl-0 = <0x14>;
  2721. pinctrl-names = "default";
  2722. reg = <0x7d005600 0x20>;
  2723. status = "disabled";
  2724. };
  2725.  
  2726. i2c@7d005800 {
  2727. #address-cells = <0x01>;
  2728. #size-cells = <0x00>;
  2729. clocks = <0x0f>;
  2730. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2731. interrupts = <0x00 0x75 0x04>;
  2732. phandle = <0x8b>;
  2733. reg = <0x7d005800 0x20>;
  2734. status = "disabled";
  2735. };
  2736.  
  2737. i2c@7d005a00 {
  2738. #address-cells = <0x01>;
  2739. #size-cells = <0x00>;
  2740. clocks = <0x0f>;
  2741. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2742. interrupts = <0x00 0x75 0x04>;
  2743. phandle = <0x8c>;
  2744. reg = <0x7d005a00 0x20>;
  2745. status = "disabled";
  2746. };
  2747.  
  2748. i2c@7d005c00 {
  2749. #address-cells = <0x01>;
  2750. #size-cells = <0x00>;
  2751. clocks = <0x0f>;
  2752. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2753. interrupts = <0x00 0x75 0x04>;
  2754. phandle = <0x8d>;
  2755. reg = <0x7d005c00 0x20>;
  2756. status = "disabled";
  2757. };
  2758.  
  2759. i2c@7d005e00 {
  2760. #address-cells = <0x01>;
  2761. #size-cells = <0x00>;
  2762. clocks = <0x0f>;
  2763. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2764. interrupts = <0x00 0x75 0x04>;
  2765. phandle = <0x8e>;
  2766. reg = <0x7d005e00 0x20>;
  2767. status = "disabled";
  2768. };
  2769.  
  2770. i2c@7d508200 {
  2771. #address-cells = <0x01>;
  2772. #size-cells = <0x00>;
  2773. clock-frequency = <0x17cdc>;
  2774. compatible = "brcm,brcmstb-i2c";
  2775. interrupt-parent = <0x16>;
  2776. interrupts = <0x01>;
  2777. phandle = <0x1f>;
  2778. reg = <0x7d508200 0x58>;
  2779. status = "okay";
  2780. };
  2781.  
  2782. i2c@7d508280 {
  2783. #address-cells = <0x01>;
  2784. #size-cells = <0x00>;
  2785. clock-frequency = <0x17cdc>;
  2786. compatible = "brcm,brcmstb-i2c";
  2787. interrupt-parent = <0x16>;
  2788. interrupts = <0x02>;
  2789. phandle = <0x20>;
  2790. reg = <0x7d508280 0x58>;
  2791. status = "okay";
  2792. };
  2793.  
  2794. i2c@7d508300 {
  2795. #address-cells = <0x01>;
  2796. #size-cells = <0x00>;
  2797. clock-frequency = <0x30d40>;
  2798. compatible = "brcm,brcmstb-i2c";
  2799. interrupt-parent = <0x16>;
  2800. interrupts = <0x00>;
  2801. phandle = <0x93>;
  2802. reg = <0x7d508300 0x58>;
  2803. status = "disabled";
  2804. };
  2805.  
  2806. i2c@7d517a00 {
  2807. #address-cells = <0x01>;
  2808. #size-cells = <0x00>;
  2809. clock-frequency = <0x30d40>;
  2810. compatible = "brcm,brcmstb-i2c";
  2811. interrupt-parent = <0x1a>;
  2812. interrupts = <0x00>;
  2813. phandle = <0x9e>;
  2814. reg = <0x7d517a00 0x58>;
  2815. status = "disabled";
  2816. };
  2817.  
  2818. i2c@7d544000 {
  2819. clock-frequency = <0x30d40>;
  2820. compatible = "brcm,brcmstb-i2c";
  2821. interrupt-parent = <0x1a>;
  2822. interrupts = <0x01>;
  2823. phandle = <0xa1>;
  2824. reg = <0x7d544000 0x58>;
  2825. status = "disabled";
  2826. };
  2827.  
  2828. intc@7d503000 {
  2829. #interrupt-cells = <0x01>;
  2830. compatible = "brcm,l2-intc";
  2831. interrupt-controller;
  2832. interrupts = <0x00 0xee 0x04>;
  2833. phandle = <0x0b>;
  2834. reg = <0x7d503000 0x18>;
  2835. };
  2836.  
  2837. intc@7d508380 {
  2838. #interrupt-cells = <0x01>;
  2839. compatible = "brcm,bcm7271-l2-intc";
  2840. interrupt-controller;
  2841. interrupts = <0x00 0xf2 0x04>;
  2842. phandle = <0x16>;
  2843. reg = <0x7d508380 0x10>;
  2844. };
  2845.  
  2846. intc@7d508400 {
  2847. #interrupt-cells = <0x01>;
  2848. compatible = "brcm,bcm7271-l2-intc";
  2849. interrupt-controller;
  2850. interrupts = <0x00 0xf4 0x04>;
  2851. phandle = <0x17>;
  2852. reg = <0x7d508400 0x10>;
  2853. };
  2854.  
  2855. intc@7d517000 {
  2856. #interrupt-cells = <0x01>;
  2857. compatible = "brcm,bcm7271-l2-intc";
  2858. interrupt-controller;
  2859. interrupts = <0x00 0xf7 0x04>;
  2860. reg = <0x7d517000 0x10>;
  2861. status = "disabled";
  2862. };
  2863.  
  2864. intc@7d517ac0 {
  2865. #interrupt-cells = <0x01>;
  2866. compatible = "brcm,bcm7271-l2-intc";
  2867. interrupt-controller;
  2868. interrupts = <0x00 0xf5 0x04>;
  2869. phandle = <0x1c>;
  2870. reg = <0x7d517ac0 0x10>;
  2871. status = "disabled";
  2872. };
  2873.  
  2874. intc@7d517b00 {
  2875. #interrupt-cells = <0x01>;
  2876. compatible = "brcm,bcm7271-l2-intc";
  2877. interrupt-controller;
  2878. interrupts = <0x00 0xf3 0x04>;
  2879. phandle = <0x1a>;
  2880. reg = <0x7d517b00 0x10>;
  2881. };
  2882.  
  2883. interrupt-controller@7c502000 {
  2884. #interrupt-cells = <0x01>;
  2885. compatible = "brcm,bcm2711-l2-intc\0brcm,l2-intc";
  2886. interrupt-controller;
  2887. interrupts = <0x00 0x61 0x04>;
  2888. phandle = <0x09>;
  2889. reg = <0x7c502000 0x30>;
  2890. status = "okay";
  2891. };
  2892.  
  2893. interrupt-controller@7d510600 {
  2894. #interrupt-cells = <0x01>;
  2895. compatible = "brcm,bcm2711-l2-intc\0brcm,l2-intc";
  2896. interrupt-controller;
  2897. interrupts = <0x00 0xef 0x04>;
  2898. phandle = <0x1e>;
  2899. reg = <0x7d510600 0x30>;
  2900. status = "okay";
  2901. };
  2902.  
  2903. local_intc@7cd00000 {
  2904. compatible = "brcm,bcm2836-l1-intc";
  2905. phandle = <0x7d>;
  2906. reg = <0x7cd00000 0x100>;
  2907. };
  2908.  
  2909. mailbox@7c013880 {
  2910. #mbox-cells = <0x00>;
  2911. compatible = "brcm,bcm2835-mbox";
  2912. interrupts = <0x00 0x21 0x04>;
  2913. phandle = <0x21>;
  2914. reg = <0x7c013880 0x40>;
  2915. };
  2916.  
  2917. mmc@7d002000 {
  2918. clocks = <0x0f>;
  2919. compatible = "brcm,bcm2835-sdhost";
  2920. phandle = <0x81>;
  2921. reg = <0x7d002000 0x100>;
  2922. status = "disabled";
  2923. };
  2924.  
  2925. mop@7c500000 {
  2926. compatible = "brcm,bcm2712-mop";
  2927. interrupt-parent = <0x09>;
  2928. interrupts = <0x01>;
  2929. phandle = <0x7b>;
  2930. reg = <0x7c500000 0x28>;
  2931. status = "okay";
  2932. };
  2933.  
  2934. moplet@7c501000 {
  2935. compatible = "brcm,bcm2712-moplet";
  2936. interrupt-parent = <0x09>;
  2937. interrupts = <0x00>;
  2938. phandle = <0x7c>;
  2939. reg = <0x7c501000 0x20>;
  2940. status = "okay";
  2941. };
  2942.  
  2943. pinctrl@7d504100 {
  2944. compatible = "brcm,bcm2712-pinctrl";
  2945. phandle = <0x92>;
  2946. reg = <0x7d504100 0x30>;
  2947.  
  2948. bt_shutdown_pins {
  2949. function = "gpio";
  2950. phandle = <0x19>;
  2951. pins = "gpio29";
  2952. };
  2953.  
  2954. emmc_sd_pulls {
  2955. bias-pull-up;
  2956. phandle = <0x54>;
  2957. pins = "emmc_cmd\0emmc_dat0\0emmc_dat1\0emmc_dat2\0emmc_dat3";
  2958. };
  2959.  
  2960. pwr_button_pins {
  2961. bias-pull-up;
  2962. function = "gpio";
  2963. phandle = <0x6e>;
  2964. pins = "gpio20";
  2965. };
  2966.  
  2967. sdio2_30_pins {
  2968. phandle = <0x59>;
  2969.  
  2970. pin_clk {
  2971. bias-disable;
  2972. function = "sd2";
  2973. pins = "gpio30";
  2974. };
  2975.  
  2976. pin_cmd {
  2977. bias-pull-up;
  2978. function = "sd2";
  2979. pins = "gpio31";
  2980. };
  2981.  
  2982. pins_dat {
  2983. bias-pull-up;
  2984. function = "sd2";
  2985. pins = "gpio32\0gpio33\0gpio34\0gpio35";
  2986. };
  2987. };
  2988.  
  2989. spi10_cs_gpio1 {
  2990. bias-pull-up;
  2991. function = "gpio";
  2992. phandle = <0x13>;
  2993. pins = "gpio1";
  2994. };
  2995.  
  2996. spi10_gpio2 {
  2997. bias-disable;
  2998. function = "vc_spi0";
  2999. phandle = <0x12>;
  3000. pins = "gpio2\0gpio3\0gpio4";
  3001. };
  3002.  
  3003. uarta_24_pins {
  3004. phandle = <0x18>;
  3005.  
  3006. pin_cts {
  3007. bias-pull-up;
  3008. function = "uart0";
  3009. pins = "gpio25";
  3010. };
  3011.  
  3012. pin_rts {
  3013. bias-disable;
  3014. function = "uart0";
  3015. pins = "gpio24";
  3016. };
  3017.  
  3018. pin_rxd {
  3019. bias-pull-up;
  3020. function = "uart0";
  3021. pins = "gpio27";
  3022. };
  3023.  
  3024. pin_txd {
  3025. bias-disable;
  3026. function = "uart0";
  3027. pins = "gpio26";
  3028. };
  3029. };
  3030.  
  3031. wl_on_pins {
  3032. function = "gpio";
  3033. phandle = <0x5c>;
  3034. pins = "gpio28";
  3035. };
  3036. };
  3037.  
  3038. pinctrl@7d510700 {
  3039. compatible = "brcm,bcm2712-aon-pinctrl";
  3040. phandle = <0x96>;
  3041. reg = <0x7d510700 0x20>;
  3042.  
  3043. aon_pwm_1pin {
  3044. function = "aon_pwm";
  3045. phandle = <0x9d>;
  3046. pins = "aon_gpio9";
  3047. };
  3048.  
  3049. bsc_m1_agpio13_pins {
  3050. bias-pull-up;
  3051. function = "bsc_m1";
  3052. phandle = <0x97>;
  3053. pins = "aon_gpio13\0aon_gpio14";
  3054. };
  3055.  
  3056. bsc_m2_sgpio4_pins {
  3057. function = "bsc_m2";
  3058. phandle = <0x99>;
  3059. pins = "aon_sgpio4\0aon_sgpio5";
  3060. };
  3061.  
  3062. bsc_pmu_sgpio4_pins {
  3063. function = "avs_pmu_bsc";
  3064. phandle = <0x98>;
  3065. pins = "aon_sgpio4\0aon_sgpio5";
  3066. };
  3067.  
  3068. emmc_aon_cd_pins {
  3069. bias-pull-up;
  3070. function = "sd_card_g";
  3071. phandle = <0x55>;
  3072. pins = "aon_gpio5";
  3073. };
  3074.  
  3075. i2c3_m4_agpio0_pins {
  3076. bias-pull-up;
  3077. function = "vc_i2c3";
  3078. phandle = <0x14>;
  3079. pins = "aon_gpio0\0aon_gpio1";
  3080. };
  3081.  
  3082. pwm_aon_agpio1_pins {
  3083. function = "aon_pwm";
  3084. phandle = <0x9a>;
  3085. pins = "aon_gpio1\0aon_gpio2";
  3086. };
  3087.  
  3088. pwm_aon_agpio4_pins {
  3089. function = "vc_pwm0";
  3090. phandle = <0x9b>;
  3091. pins = "aon_gpio4\0aon_gpio5";
  3092. };
  3093.  
  3094. pwm_aon_agpio7_pins {
  3095. function = "aon_pwm";
  3096. phandle = <0x9c>;
  3097. pins = "aon_gpio7\0aon_gpio9";
  3098. };
  3099. };
  3100.  
  3101. pixelvalve@7c410000 {
  3102. compatible = "brcm,bcm2712-pixelvalve0";
  3103. interrupts = <0x00 0x65 0x04>;
  3104. phandle = <0x79>;
  3105. reg = <0x7c410000 0x100>;
  3106. status = "okay";
  3107. };
  3108.  
  3109. pixelvalve@7c411000 {
  3110. compatible = "brcm,bcm2712-pixelvalve1";
  3111. interrupts = <0x00 0x6e 0x04>;
  3112. phandle = <0x7a>;
  3113. reg = <0x7c411000 0x100>;
  3114. status = "okay";
  3115. };
  3116.  
  3117. power {
  3118. #power-domain-cells = <0x01>;
  3119. compatible = "raspberrypi,bcm2835-power";
  3120. firmware = <0x0c>;
  3121. phandle = <0x51>;
  3122. };
  3123.  
  3124. pwm@7d00c000 {
  3125. #pwm-cells = <0x03>;
  3126. assigned-clock-rates = <0x989680>;
  3127. compatible = "brcm,bcm2835-pwm";
  3128. phandle = <0x8f>;
  3129. reg = <0x7d00c000 0x28>;
  3130. status = "disabled";
  3131. };
  3132.  
  3133. pwm@7d00c800 {
  3134. #pwm-cells = <0x03>;
  3135. assigned-clock-rates = <0x989680>;
  3136. compatible = "brcm,bcm2835-pwm";
  3137. phandle = <0x90>;
  3138. reg = <0x7d00c800 0x28>;
  3139. status = "disabled";
  3140. };
  3141.  
  3142. pwm@7d517a80 {
  3143. #pwm-cells = <0x03>;
  3144. clocks = <0x1b>;
  3145. compatible = "brcm,bcm7038-pwm";
  3146. phandle = <0x9f>;
  3147. reg = <0x7d517a80 0x28>;
  3148. };
  3149.  
  3150. rng@7d208000 {
  3151. compatible = "brcm,bcm2711-rng200";
  3152. phandle = <0x68>;
  3153. reg = <0x7d208000 0x28>;
  3154. status = "okay";
  3155. };
  3156.  
  3157. rpi_rtc {
  3158. compatible = "raspberrypi,rpi-rtc";
  3159. firmware = <0x0c>;
  3160. phandle = <0x69>;
  3161. status = "okay";
  3162. trickle-charge-microvolt = <0x00>;
  3163. };
  3164.  
  3165. serial@7d001000 {
  3166. arm,primecell-periphid = <0x241011>;
  3167. clock-names = "uartclk\0apb_pclk";
  3168. clocks = <0x0e 0x0f>;
  3169. compatible = "arm,pl011\0arm,primecell";
  3170. interrupts = <0x00 0x79 0x04>;
  3171. phandle = <0x7e>;
  3172. reg = <0x7d001000 0x200>;
  3173. status = "okay";
  3174. };
  3175.  
  3176. serial@7d001400 {
  3177. arm,primecell-periphid = <0x241011>;
  3178. clock-names = "uartclk\0apb_pclk";
  3179. clocks = <0x0e 0x0f>;
  3180. compatible = "arm,pl011\0arm,primecell";
  3181. interrupts = <0x00 0x79 0x04>;
  3182. phandle = <0x7f>;
  3183. reg = <0x7d001400 0x200>;
  3184. status = "disabled";
  3185. };
  3186.  
  3187. serial@7d001a00 {
  3188. arm,primecell-periphid = <0x241011>;
  3189. clock-names = "uartclk\0apb_pclk";
  3190. clocks = <0x0e 0x0f>;
  3191. compatible = "arm,pl011\0arm,primecell";
  3192. interrupts = <0x00 0x79 0x04>;
  3193. phandle = <0x80>;
  3194. reg = <0x7d001a00 0x200>;
  3195. status = "disabled";
  3196. };
  3197.  
  3198. serial@7d50c000 {
  3199. auto-flow-control;
  3200. clock-frequency = <0x5b8d800>;
  3201. compatible = "brcm,bcm7271-uart";
  3202. interrupts = <0x00 0x114 0x04>;
  3203. phandle = <0x94>;
  3204. pinctrl-0 = <0x18 0x19>;
  3205. pinctrl-names = "default";
  3206. reg = <0x7d50c000 0x20>;
  3207. reg-io-width = <0x04>;
  3208. reg-names = "uart";
  3209. reg-shift = <0x02>;
  3210. skip-init;
  3211. status = "okay";
  3212. uart-has-rtscts;
  3213.  
  3214. bluetooth {
  3215. compatible = "brcm,bcm43438-bt";
  3216. local-bd-address = [97 c9 0e 67 cf 2c];
  3217. max-speed = <0x2dc6c0>;
  3218. phandle = <0x5e>;
  3219. shutdown-gpios = <0x11 0x1d 0x00>;
  3220. };
  3221. };
  3222.  
  3223. serial@7d50d000 {
  3224. compatible = "brcm,bcm7271-uart";
  3225. interrupts = <0x00 0x115 0x04>;
  3226. phandle = <0x95>;
  3227. reg = <0x7d50d000 0x20>;
  3228. reg-io-width = <0x04>;
  3229. reg-names = "uart";
  3230. reg-shift = <0x02>;
  3231. skip-init;
  3232. status = "disabled";
  3233. };
  3234.  
  3235. sound {
  3236. phandle = <0xa4>;
  3237. };
  3238.  
  3239. spi@7d004000 {
  3240. #address-cells = <0x01>;
  3241. #size-cells = <0x00>;
  3242. clocks = <0x0f>;
  3243. compatible = "brcm,bcm2835-spi";
  3244. cs-gpios = <0x11 0x01 0x01>;
  3245. dma-names = "tx\0rx";
  3246. dmas = <0x10 0x06 0x10 0x07>;
  3247. interrupts = <0x00 0x76 0x04>;
  3248. num-cs = <0x01>;
  3249. phandle = <0x83>;
  3250. pinctrl-0 = <0x12 0x13>;
  3251. pinctrl-names = "default";
  3252. reg = <0x7d004000 0x200>;
  3253. status = "okay";
  3254.  
  3255. spidev@0 {
  3256. #address-cells = <0x01>;
  3257. #size-cells = <0x00>;
  3258. compatible = "spidev";
  3259. phandle = <0x84>;
  3260. reg = <0x00>;
  3261. spi-max-frequency = <0x1312d00>;
  3262. status = "okay";
  3263. };
  3264. };
  3265.  
  3266. spi@7d004600 {
  3267. #address-cells = <0x01>;
  3268. #size-cells = <0x00>;
  3269. clocks = <0x0f>;
  3270. compatible = "brcm,bcm2835-spi";
  3271. interrupts = <0x00 0x76 0x04>;
  3272. phandle = <0x85>;
  3273. reg = <0x7d004600 0x200>;
  3274. status = "disabled";
  3275. };
  3276.  
  3277. spi@7d004800 {
  3278. #address-cells = <0x01>;
  3279. #size-cells = <0x00>;
  3280. clocks = <0x0f>;
  3281. compatible = "brcm,bcm2835-spi";
  3282. interrupts = <0x00 0x76 0x04>;
  3283. phandle = <0x86>;
  3284. reg = <0x7d004800 0x200>;
  3285. status = "disabled";
  3286. };
  3287.  
  3288. spi@7d004a00 {
  3289. #address-cells = <0x01>;
  3290. #size-cells = <0x00>;
  3291. clocks = <0x0f>;
  3292. compatible = "brcm,bcm2835-spi";
  3293. interrupts = <0x00 0x76 0x04>;
  3294. phandle = <0x87>;
  3295. reg = <0x7d004a00 0x200>;
  3296. status = "disabled";
  3297. };
  3298.  
  3299. spi@7d004c00 {
  3300. #address-cells = <0x01>;
  3301. #size-cells = <0x00>;
  3302. clocks = <0x0f>;
  3303. compatible = "brcm,bcm2835-spi";
  3304. interrupts = <0x00 0x76 0x04>;
  3305. phandle = <0x88>;
  3306. reg = <0x7d004c00 0x200>;
  3307. status = "disabled";
  3308. };
  3309.  
  3310. timer@7c003000 {
  3311. clock-frequency = <0xf4240>;
  3312. compatible = "brcm,bcm2835-system-timer";
  3313. interrupts = <0x00 0x40 0x04 0x00 0x41 0x04 0x00 0x42 0x04 0x00 0x43 0x04>;
  3314. phandle = <0x77>;
  3315. reg = <0x7c003000 0x1000>;
  3316. };
  3317.  
  3318. watchdog@7d200000 {
  3319. #power-domain-cells = <0x01>;
  3320. #reset-cells = <0x01>;
  3321. clock-names = "v3d\0peri_image\0h264\0isp";
  3322. compatible = "brcm,bcm2712-pm";
  3323. phandle = <0x5b>;
  3324. reg = <0x7d200000 0x308>;
  3325. reg-names = "pm";
  3326. system-power-controller;
  3327. };
  3328. };
  3329.  
  3330. system {
  3331. linux,revision = <0xd04170>;
  3332. linux,serial = <0xf0141a7b 0x43378f25>;
  3333. };
  3334.  
  3335. thermal-zones {
  3336.  
  3337. cpu-thermal {
  3338. coefficients = <0xfffffdda 0x6ddd0>;
  3339. phandle = <0x72>;
  3340. polling-delay = <0x3e8>;
  3341. polling-delay-passive = <0x7d0>;
  3342. thermal-sensors = <0x02>;
  3343.  
  3344. cooling-maps {
  3345. phandle = <0x74>;
  3346.  
  3347. hot {
  3348. cooling-device = <0x04 0x03 0x03>;
  3349. trip = <0x06>;
  3350. };
  3351.  
  3352. melt {
  3353. cooling-device = <0x04 0x04 0x04>;
  3354. trip = <0x08>;
  3355. };
  3356.  
  3357. tepid {
  3358. cooling-device = <0x04 0x01 0x01>;
  3359. trip = <0x03>;
  3360. };
  3361.  
  3362. vhot {
  3363. cooling-device = <0x04 0x04 0x04>;
  3364. trip = <0x07>;
  3365. };
  3366.  
  3367. warm {
  3368. cooling-device = <0x04 0x02 0x02>;
  3369. trip = <0x05>;
  3370. };
  3371. };
  3372.  
  3373. trips {
  3374. phandle = <0x73>;
  3375.  
  3376. cpu-crit {
  3377. hysteresis = <0x00>;
  3378. phandle = <0x08>;
  3379. temperature = <0x1adb0>;
  3380. type = "critical";
  3381. };
  3382.  
  3383. cpu-hot {
  3384. hysteresis = <0x1388>;
  3385. phandle = <0x06>;
  3386. temperature = <0x107ac>;
  3387. type = "active";
  3388. };
  3389.  
  3390. cpu-tepid {
  3391. hysteresis = <0x1388>;
  3392. phandle = <0x03>;
  3393. temperature = <0xc350>;
  3394. type = "active";
  3395. };
  3396.  
  3397. cpu-vhot {
  3398. hysteresis = <0x1388>;
  3399. phandle = <0x07>;
  3400. temperature = <0x124f8>;
  3401. type = "active";
  3402. };
  3403.  
  3404. cpu-warm {
  3405. hysteresis = <0x1388>;
  3406. phandle = <0x05>;
  3407. temperature = <0xea60>;
  3408. type = "active";
  3409. };
  3410. };
  3411. };
  3412. };
  3413.  
  3414. timer {
  3415. arm,cpu-registers-not-fw-configured;
  3416. compatible = "arm,armv8-timer";
  3417. interrupts = <0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08>;
  3418. };
  3419.  
  3420. wl_on_reg {
  3421. compatible = "regulator-fixed";
  3422. enable-active-high;
  3423. gpio = <0x11 0x1c 0x00>;
  3424. phandle = <0x5a>;
  3425. pinctrl-0 = <0x5c>;
  3426. pinctrl-names = "default";
  3427. regulator-max-microvolt = <0x325aa0>;
  3428. regulator-min-microvolt = <0x325aa0>;
  3429. regulator-name = "wl-on-regulator";
  3430. startup-delay-us = <0x249f0>;
  3431. };
  3432. };
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