// can stop at every...
// - mainboard cycle             ca. 21.477 MHz
// - mainboard CPU opcode cycle  ca. 1.79 or 2.68 or 3.58 MHz
// - mainboard CPU opcode        < 1 MHz
// - APU cycle                   24.576 MHz
// - APU CPU opcode cycle        ?
// - APU CPU opcode              ?


function SNES_Start : T_State;
label
        n00,    resume_n00,     // 65c816 (native) mode opcode $00
        n00c1,                  // cycle 1
        n00c1c, resume_n00c1c,  // cycle 1 CPU core
        n00c1m, resume_n00c1m,  // cycle 1 mainboard
        n00c1a, resume_n00c1a;  // cycle 1 audio
        // ...
        e00,    resume_e00,     // 6502 (emulation) mode opcode $00
        // ...
var
        APU            : T_APU       absolute SNES.APU;                           // audio processing unit
        Core           : T_65c816    absolute SNES.Mainboard.CPU.Core;            // "65c816" CPU core, part of the "5A22" CPU
        CoreWaitstates : u4          absolute SNES.Mainboard.CPU.CoreWaitstates;  // CPU core runs at 1/6, 1/8 or 1/12 speed of the mainboard oscillator
        Mainboard      : T_Mainboard absolute SNES.Mainboard;                     // contains everything except the APU
        Time           : i32         absolute SNES.Mainboard.Time;                // used for synchronizing the mainboard oscillator with the APU oscillator
begin
SNES_Stop := False;
// insert state dispatch here
n00:
        if SNES_Stop then exit(State_n00);                                      {$IFDEF Step_5A22_Core_Opcode}  exit(State_n00);     {$ENDIF}  resume_n00:
        n00c1:
                n00c1c:                                                         {$IFDEF Step_5A22_Core_Cycle}   exit(State_n00c1c);  {$ENDIF}  resume_n00c1c:
                        // insert CPU core PHI1 code here
                        CPU_PHI1;  // emulate the CPU reacting to the CPU core
                n00c1m:
                        if (Time <= 0) then begin                               {$IFDEF Step_Mainboard_Cycle}   exit(State_n00c1m);  {$ENDIF}  resume_n00c1m:
                                Mainboard_Update;
                                Inc(Time, Mainboard.Oscillator.CycleDuration);
                        end;
                n00c1m:                                                         {$IFDEF Step_APU_Cycle}         exit(State_n00c1a);  {$ENDIF}  resume_n00c1a:
                        APU_Update;  // emulate audio
                        Dec(Time, APU.Oscillator.CycleDuration);
                        if (CoreWaitstates <> 0) then begin  // time to wake up the CPU core?
                                Dec(CoreWaitstates);
                                goto n00c1m;
                        end;
                        // insert CPU core PHI2 code here (CPU core reacts to DataBus and signals)
        // cycle 2
        // ...
        // last cycle of opcode $00
                // ...
                // ...
                // ...
                        // insert opcode dispatch here
// native mode opcode $02
// ...
// native mode opcode $FF
// emulation mode opcode $00
// ...
// emulation mode opcode $FF
Assert(False);  // this code should never be reached
end;