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- module cordic(
- input [15:0]theta,
- input beg, clk, rst,
- output [15:0]cos,
- output fin
- );
- wire ld;
- reg [15:0]atan;
- reg itr;
- wire sel;
- cu cu1(
- .beg(beg),
- .itr(itr),
- .ld(ld),
- .fin(fin),
- .init(sel)
- );
- cntr cntr1(
- .c_up(ld),
- .clk(clk),
- .clr(rst),
- .q(itr)
- );
- atan_const atan1(
- .itr(itr),
- .atan( atan)
- );
- wire [15:0]z_out1;
- wire [15:0]z_out2;
- wire [15:0]z_out3;
- wire [15:0]mux_out_1;
- wire [15:0]mux_out_2;
- wire [15:0]mux_out_3;
- mux mux1(
- .d1(z_out1),
- .d2(16'h26dd),
- .sel(sel),
- .q(mux_out_1)
- );
- mux mux2(
- .d1(z_out2),
- .d2(16'h26dd),
- .sel(sel),
- .q(mux_out_2)
- );
- mux mux3(
- .d1(z_out3),
- .d2(theta),
- .sel(sel),
- .q(mux_out_3)
- );
- reg [15:0]reg_out_2;
- reg [15:0]reg_out_3;
- rgst rgst1(
- .d(mux_out_1),
- .clk(clk),
- .ld(ld),
- .rst(rst),
- .q(cos)
- );
- rgst rgst2(
- .d(mux_out_2),
- .clk(clk),
- .ld(ld),
- .rst(rst),
- .q(reg_out_2)
- );
- rgst rgst3(
- .d(mux_out_3),
- .clk(clk),
- .ld(ld),
- .rst(rst),
- .q(reg_out_3)
- );
- wire [15:0]shift_out_1;
- wire [15:0]shift_out_2;
- shifter shift1(
- .d(reg_out_1),
- .i(itr),
- .q(shift_out_1)
- );
- shifter shift2(
- .d(reg_out_2),
- .i(itr),
- .q(shift_out_2)
- );
- add_sub add1(
- .x(shift_out_2),
- .y(reg_out_1),
- .sub(!reg_out_3[15]),
- .z(z_out1)
- );
- add_sub add2(
- .x(shift_out_1),
- .y(reg_out_2),
- .sub(reg_out_3[15]),
- .z(z_out2)
- );
- add_sub add3(
- .x(atan),
- .y(reg_out_3),
- .sub(!reg_out_3[15]),
- .z(z_out3)
- );
- endmodule
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