0x0000000080000000 <+0>:	auipc	t0,0x0
   0x0000000080000004 <+4>:	addi	t0,t0,84 # 0x80000054 <supervisor>
   0x0000000080000008 <+8>:	csrw	mepc,t0
   0x000000008000000c <+12>:	auipc	t1,0x0
   0x0000000080000010 <+16>:	addi	t1,t1,48 # 0x8000003c <m_trap>
   0x0000000080000014 <+20>:	csrw	mtvec,t1
   0x0000000080000018 <+24>:	lui	t2,0x2
   0x000000008000001c <+28>:	addiw	t2,t2,-2048
   0x0000000080000020 <+32>:	csrc	mstatus,t2
   0x0000000080000024 <+36>:	lui	t3,0x1
   0x0000000080000028 <+40>:	addiw	t3,t3,-2048
   0x000000008000002c <+44>:	csrs	mstatus,t3
   0x0000000080000030 <+48>:	li	t4,256
   0x0000000080000034 <+52>:	csrs	medeleg,t4
   0x0000000080000038 <+56>:	mret