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- [NOTE ] coreboot-4.21-250-g1c9734f769f0-dirty Thu Sep 28 06:16:11 UTC 2023 x86_32 bootblock starting (log level: 8)...
- [DEBUG] CPU: 12th Gen Intel(R) Core(TM) i7-1280P
- [DEBUG] CPU: ID 906a3, Alderlake L0 Platform, ucode: 00000429
- [DEBUG] CPU: AES supported, TXT supported, VT supported
- [INFO ] Cache: Level 3: Associativity = 12 Partitions = 1 Line Size = 64 Sets = 32768
- [INFO ] Cache size = 24 MiB
- [DEBUG] MCH: device id 4641 (rev 02) is Alderlake-P
- [DEBUG] PCH: device id 5182 (rev 01) is Alderlake-P SKU
- [DEBUG] IGD: device id 46a6 (rev 0c) is Alderlake P GT2
- [DEBUG] FMAP: Found "FLASH" version 1.1 at 0x1950000.
- [DEBUG] FMAP: base = 0xfe000000 size = 0x2000000 #areas = 10
- [DEBUG] FMAP: area COREBOOT found @ 1950200 (7011840 bytes)
- [INFO ] CBFS: mcache @0xfef84600 built for 16 files, used 0x37c of 0x4000 bytes
- [INFO ] CBFS: Found 'fallback/romstage' @0x80 size 0x14390 in mcache @0xfef8462c
- [DEBUG] BS: bootblock times (exec / console): total (unknown) / 90 ms
- [NOTE ] coreboot-4.21-250-g1c9734f769f0-dirty Thu Sep 28 06:16:11 UTC 2023 x86_32 romstage starting (log level: 8)...
- [DEBUG] pm1_sts: 0000 pm1_en: 0000 pm1_cnt: 00001c00
- [DEBUG] gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
- [DEBUG] gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
- [DEBUG] gpe0_sts[2]: 00000088 gpe0_en[2]: 00000000
- [DEBUG] gpe0_sts[3]: 00000400 gpe0_en[3]: 00080000
- [DEBUG] TCO_STS: 0000 0000
- [DEBUG] GEN_PMCON: d0015038 00002200
- [DEBUG] GBLRST_CAUSE: 00000000 00000000
- [DEBUG] HPR_CAUSE0: 00000000
- [DEBUG] prev_sleep_state 5
- [INFO ] POST: 0x00
- [INFO ] TXT disabled successfully - Unlocked memory
- [DEBUG] FMAP: area COREBOOT found @ 1950200 (7011840 bytes)
- [INFO ] MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
- [INFO ] CBFS: Found 'fspm.bin' @0x171dc0 size 0x150000 in mcache @0xfef84824
- [INFO ] POST: 0x34
- [DEBUG] FMAP: area RW_MRC_CACHE found @ 1900000 (65536 bytes)
- [NOTE ] MRC: no data in 'RW_MRC_CACHE'
- [SPEW ] bootmode is set to: 0
- [SPEW ] Data from EC: 0x08
- [SPEW ] Data from EC: 0x14
- [SPEW ] Data from EC: 0x08
- [SPEW ] Data from EC: 0x14
- [SPEW ] Data from EC: 0x08
- [SPEW ] Data from EC: 0x14
- [INFO ] board id is 0x14
- [INFO ] SPD index is 0x4
- [INFO ] No memory dimm at address A2
- [INFO ] No memory dimm at address A6
- [INFO ] SPD: module type is DDR4
- [INFO ] SPD: module part number is 4ATF1G64HZ-3G2E2
- [INFO ] SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
- [INFO ] SPD: device width 16 bits, bus width 64 bits
- [INFO ] SPD: module size is 8192 MB (per channel)
- [INFO ] SPD: module type is DDR4
- [INFO ] SPD: module part number is 4ATF1G64HZ-3G2E2
- [INFO ] SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
- [INFO ] SPD: device width 16 bits, bus width 64 bits
- [INFO ] SPD: module size is 8192 MB (per channel)
- [INFO ] POST: 0x36
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [DEBUG] Detected 14 core, 20 thread CPU.
- [SPEW ] +-------+--------------------------------------------------------------------------------------+
- [SPEW ] | Index | Packge CoreType CacheLevel CacheType CacheWays (FA|DM) CacheSizeinKB CacheCount |
- [SPEW ] +-------+--------------------------------------------------------------------------------------+
- [SPEW ] | 0 | 0 20 1 1 7 ( 0| 1) 20 8 |
- [SPEW ] | 1 | 0 20 1 2 7 ( 0| 1) 40 8 |
- [SPEW ] | 2 | 0 20 2 3 F ( 0| 1) 800 2 |
- [SPEW ] | 3 | 0 20 3 3 B ( 0| 0) 6000 1 |
- [SPEW ] | 4 | 0 40 1 1 B ( 0| 1) 30 6 |
- [SPEW ] | 5 | 0 40 1 2 7 ( 0| 1) 20 6 |
- [SPEW ] | 6 | 0 40 2 3 9 ( 0| 1) 500 6 |
- [SPEW ] | 7 | 0 40 3 3 B ( 0| 0) 6000 1 |
- [SPEW ] +-------+--------------------------------------------------------------------------------------+
- [SPEW ] GetCpuCacheInfo: Success (CacheInfoCount = 8)
- [SPEW ] InitializeSmbiosCacheInfoHobs() - End
- [SPEW ] InitializeSmbiosProcessorInfoHob() - Start
- [SPEW ] (SMBIOS) BCLK frequency = 99756
- [SPEW ] (MAILBOX) Mailbox Read Command = 1h
- [SPEW ] (MAILBOX) Mailbox Status = 00h
- [SPEW ] OC MaxSpeed 4800 MHz
- [SPEW ] GetCpuIdentifier () - CpuSku = 0x0
- [SPEW ] - PackageTdp = 2800
- [SPEW ] - CpuStepping = 3
- [SPEW ] - CpuDID = 0x4641
- [SPEW ] - GtDid = 0x46A6
- [SPEW ] CPU Identifier = ADL-P 6+8+2 28W
- [SPEW ] InitializeSmbiosProcessorInfoHob() - End
- [SPEW ] SiInitOnEndOfPei - End
- [SPEW ] FSP is waiting for NOTIFY
- [SPEW ] FspSiliconInitApi() - [Status: 0x00000000] - End
- PROGRESS CODE: V0000087F I0
- [INFO ] POST: 0xa1
- [DEBUG] Display FSP Version Info HOB
- [DEBUG] Reference Code - CPU = c.0.a2.40
- [DEBUG] uCode Version = 0.0.4.29
- [DEBUG] TXT ACM version = ff.ff.ff.ffff
- [DEBUG] Reference Code - ME = c.0.a2.40
- [DEBUG] MEBx version = 0.0.0.0
- [DEBUG] ME Firmware Version = Consumer SKU
- [DEBUG] Reference Code - PCH = c.0.a2.40
- [DEBUG] PCH-CRID Status = Disabled
- [DEBUG] PCH-CRID Original Value = ff.ff.ff.ffff
- [DEBUG] PCH-CRID New Value = ff.ff.ff.ffff
- [DEBUG] OPROM - RST - RAID = ff.ff.ff.ffff
- [DEBUG] PCH Hsio Version = 4.0.0.0
- [DEBUG] Reference Code - SA - System Agent = c.0.a2.40
- [DEBUG] Reference Code - MRC = 0.0.4.7c
- [DEBUG] SA - PCIe Version = c.0.a2.40
- [DEBUG] SA-CRID Status = Disabled
- [DEBUG] SA-CRID Original Value = 0.0.0.2
- [DEBUG] SA-CRID New Value = 0.0.0.2
- [DEBUG] OPROM - VBIOS = ff.ff.ff.ffff
- [DEBUG] IO Manageability Engine FW Version = 24.0.6.0
- [DEBUG] PHY Build Version = 0.0.0.2041
- [DEBUG] Thunderbolt(TM) FW Version = 13.1.0.0
- [DEBUG] System Agent Manageability Engine FW Version = ff.ff.ff.ffff
- [NOTE ] pcie_rp_update_dev: Couldn't find PCIe Root Port #5 (originally PCI: 00:1c.4) which was enabled in devicetree, removing.
- [NOTE ] pcie_rp_update_dev: Couldn't find PCIe Root Port #6 (originally PCI: 00:1c.5) which was enabled in devicetree, removing.
- [NOTE ] pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
- [NOTE ] pcie_rp_update_dev: Couldn't find PCIe Root Port #9 (originally PCI: 00:1d.0) which was enabled in devicetree, removing.
- [NOTE ] pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
- [INFO ] Found PCIe Root Port #1 at PCI: 00:07.0.
- [INFO ] Found PCIe Root Port #2 at PCI: 00:07.1.
- [INFO ] Found PCIe Root Port #3 at PCI: 00:07.2.
- [INFO ] Found PCIe Root Port #4 at PCI: 00:07.3.
- [DEBUG] BS: BS_DEV_INIT_CHIPS run times (exec / console): 1707 / 27421 ms
- [INFO ] POST: 0x72
- [INFO ] Enumerating buses...
- [SPEW ] Show all devs... Before device enumeration.
- [SPEW ] Root Device: enabled 1
- [SPEW ] CPU_CLUSTER: 0: enabled 1
- [SPEW ] DOMAIN: 0000: enabled 1
- [SPEW ] MMIO: fed40000: enabled 1
- [SPEW ] GPIO: 0: enabled 1
- [SPEW ] PCI: 00:00.0: enabled 1
- [SPEW ] PCI: 00:01.0: enabled 1
- [SPEW ] PCI: 00:01.1: enabled 0
- [SPEW ] PCI: 00:02.0: enabled 1
- [SPEW ] PCI: 00:04.0: enabled 1
- [SPEW ] PCI: 00:05.0: enabled 1
- [SPEW ] PCI: 00:06.0: enabled 1
- [SPEW ] PCI: 00:06.2: enabled 1
- [SPEW ] PCI: 00:07.0: enabled 1
- [SPEW ] PCI: 00:07.1: enabled 1
- [SPEW ] PCI: 00:07.2: enabled 1
- [SPEW ] PCI: 00:07.3: enabled 1
- [SPEW ] PCI: 00:08.0: enabled 0
- [SPEW ] PCI: 00:09.0: enabled 0
- [SPEW ] PCI: 00:0a.0: enabled 0
- [SPEW ] PCI: 00:0d.0: enabled 1
- [SPEW ] PCI: 00:0d.1: enabled 0
- [SPEW ] PCI: 00:0d.2: enabled 1
- [SPEW ] PCI: 00:0d.3: enabled 1
- [SPEW ] PCI: 00:0e.0: enabled 0
- [SPEW ] PCI: 00:10.0: enabled 0
- [SPEW ] PCI: 00:10.1: enabled 0
- [SPEW ] PCI: 00:10.6: enabled 0
- [SPEW ] PCI: 00:10.7: enabled 0
- [SPEW ] PCI: 00:12.0: enabled 0
- [SPEW ] PCI: 00:12.6: enabled 0
- [SPEW ] PCI: 00:12.7: enabled 0
- [SPEW ] PCI: 00:13.0: enabled 0
- [SPEW ] PCI: 00:14.0: enabled 1
- [SPEW ] PCI: 00:14.1: enabled 0
- [SPEW ] PCI: 00:14.2: enabled 0
- [SPEW ] PCI: 00:14.3: enabled 1
- [SPEW ] PCI: 00:15.0: enabled 1
- [SPEW ] PCI: 00:15.1: enabled 1
- [SPEW ] PCI: 00:15.2: enabled 1
- [SPEW ] PCI: 00:15.3: enabled 1
- [SPEW ] PCI: 00:16.0: enabled 1
- [SPEW ] PCI: 00:16.1: enabled 0
- [SPEW ] PCI: 00:16.2: enabled 0
- [SPEW ] PCI: 00:16.3: enabled 0
- [SPEW ] PCI: 00:16.4: enabled 0
- [SPEW ] PCI: 00:16.5: enabled 0
- [SPEW ] PCI: 00:17.0: enabled 1
- [SPEW ] PCI: 00:19.0: enabled 0
- [SPEW ] PCI: 00:19.1: enabled 1
- [SPEW ] PCI: 00:19.2: enabled 0
- [SPEW ] PCI: 00:1a.0: enabled 0
- [SPEW ] PCI: 00:1c.0: enabled 0
- [SPEW ] PCI: 00:1c.1: enabled 0
- [SPEW ] PCI: 00:1c.2: enabled 0
- [SPEW ] PCI: 00:1c.3: enabled 0
- [SPEW ] PCI: 00:1c.4: enabled 1
- [SPEW ] PCI: 00:1c.5: enabled 1
- [SPEW ] PCI: 00:1c.6: enabled 0
- [SPEW ] PCI: 00:1c.7: enabled 1
- [SPEW ] PCI: 00:1d.0: enabled 1
- [SPEW ] PCI: 00:1d.1: enabled 0
- [SPEW ] PCI: 00:1d.2: enabled 1
- [SPEW ] PCI: 00:1d.3: enabled 0
- [SPEW ] PCI: 00:1e.0: enabled 1
- [SPEW ] PCI: 00:1e.1: enabled 0
- [SPEW ] PCI: 00:1e.2: enabled 1
- [SPEW ] PCI: 00:1e.3: enabled 1
- [SPEW ] PCI: 00:1f.0: enabled 1
- [SPEW ] PCI: 00:1f.1: enabled 1
- [SPEW ] PCI: 00:1f.2: enabled 1
- [SPEW ] PCI: 00:1f.3: enabled 1
- [SPEW ] PCI: 00:1f.4: enabled 1
- [SPEW ] PCI: 00:1f.5: enabled 1
- [SPEW ] PCI: 00:1f.6: enabled 1
- [SPEW ] PCI: 00:1f.7: enabled 0
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] GENERIC: 1.0: enabled 1
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] GENERIC: 1.0: enabled 1
- [SPEW ] USB0 port 0: enabled 0
- [SPEW ] USB0 port 0: enabled 1
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] I2C: 00:36: enabled 1
- [SPEW ] I2C: 00:0c: enabled 1
- [SPEW ] I2C: 00:36: enabled 1
- [SPEW ] SPI: 00: enabled 1
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] USB3 port 0: enabled 0
- [SPEW ] USB3 port 1: enabled 0
- [SPEW ] USB3 port 2: enabled 0
- [SPEW ] USB3 port 3: enabled 0
- [SPEW ] USB2 port 0: enabled 0
- [SPEW ] USB2 port 1: enabled 0
- [SPEW ] USB2 port 2: enabled 0
- [SPEW ] USB2 port 3: enabled 0
- [SPEW ] USB2 port 4: enabled 0
- [SPEW ] USB2 port 5: enabled 0
- [SPEW ] USB2 port 6: enabled 0
- [SPEW ] USB2 port 7: enabled 0
- [SPEW ] USB2 port 8: enabled 0
- [SPEW ] USB2 port 9: enabled 1
- [SPEW ] USB3 port 0: enabled 0
- [SPEW ] USB3 port 1: enabled 0
- [SPEW ] USB3 port 2: enabled 0
- [SPEW ] USB3 port 3: enabled 0
- [SPEW ] GENERIC: 0.1: enabled 1
- [SPEW ] APIC: 00: enabled 1
- [SPEW ] APIC: 36: enabled 1
- [SPEW ] APIC: 3c: enabled 1
- [SPEW ] APIC: 30: enabled 1
- [SPEW ] APIC: 3e: enabled 1
- [SPEW ] APIC: 32: enabled 1
- [SPEW ] APIC: 38: enabled 1
- [SPEW ] APIC: 08: enabled 1
- [SPEW ] APIC: 34: enabled 1
- [SPEW ] APIC: 3a: enabled 1
- [SPEW ] APIC: 01: enabled 1
- [SPEW ] APIC: 09: enabled 1
- [SPEW ] APIC: 11: enabled 1
- [SPEW ] APIC: 21: enabled 1
- [SPEW ] APIC: 10: enabled 1
- [SPEW ] APIC: 20: enabled 1
- [SPEW ] APIC: 28: enabled 1
- [SPEW ] APIC: 29: enabled 1
- [SPEW ] APIC: 19: enabled 1
- [SPEW ] APIC: 18: enabled 1
- [SPEW ] Compare with tree...
- [SPEW ] Root Device: enabled 1
- [SPEW ] CPU_CLUSTER: 0: enabled 1
- [SPEW ] APIC: 00: enabled 1
- [SPEW ] APIC: 36: enabled 1
- [SPEW ] APIC: 3c: enabled 1
- [SPEW ] APIC: 30: enabled 1
- [SPEW ] APIC: 3e: enabled 1
- [SPEW ] APIC: 32: enabled 1
- [SPEW ] APIC: 38: enabled 1
- [SPEW ] APIC: 08: enabled 1
- [SPEW ] APIC: 34: enabled 1
- [SPEW ] APIC: 3a: enabled 1
- [SPEW ] APIC: 01: enabled 1
- [SPEW ] APIC: 09: enabled 1
- [SPEW ] APIC: 11: enabled 1
- [SPEW ] APIC: 21: enabled 1
- [SPEW ] APIC: 10: enabled 1
- [SPEW ] APIC: 20: enabled 1
- [SPEW ] APIC: 28: enabled 1
- [SPEW ] APIC: 29: enabled 1
- [SPEW ] APIC: 19: enabled 1
- [SPEW ] APIC: 18: enabled 1
- [SPEW ] DOMAIN: 0000: enabled 1
- [SPEW ] GPIO: 0: enabled 1
- [SPEW ] PCI: 00:00.0: enabled 1
- [SPEW ] PCI: 00:01.0: enabled 1
- [SPEW ] PCI: 00:01.1: enabled 0
- [SPEW ] PCI: 00:02.0: enabled 1
- [SPEW ] PCI: 00:04.0: enabled 1
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] PCI: 00:05.0: enabled 1
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] PCI: 00:06.0: enabled 1
- [SPEW ] PCI: 00:06.2: enabled 1
- [SPEW ] PCI: 00:07.0: enabled 1
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] PCI: 00:07.1: enabled 1
- [SPEW ] GENERIC: 1.0: enabled 1
- [SPEW ] PCI: 00:07.2: enabled 1
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] PCI: 00:07.3: enabled 1
- [SPEW ] GENERIC: 1.0: enabled 1
- [SPEW ] PCI: 00:08.0: enabled 0
- [SPEW ] PCI: 00:09.0: enabled 0
- [SPEW ] PCI: 00:0a.0: enabled 0
- [SPEW ] PCI: 00:0d.0: enabled 1
- [SPEW ] USB0 port 0: enabled 0
- [SPEW ] USB3 port 0: enabled 0
- [SPEW ] USB3 port 1: enabled 0
- [SPEW ] USB3 port 2: enabled 0
- [SPEW ] USB3 port 3: enabled 0
- [SPEW ] PCI: 00:0d.1: enabled 0
- [SPEW ] PCI: 00:0d.2: enabled 1
- [SPEW ] PCI: 00:0d.3: enabled 1
- [SPEW ] PCI: 00:0e.0: enabled 0
- [SPEW ] PCI: 00:10.0: enabled 0
- [SPEW ] PCI: 00:10.1: enabled 0
- [SPEW ] PCI: 00:10.6: enabled 0
- [SPEW ] PCI: 00:10.7: enabled 0
- [SPEW ] PCI: 00:12.0: enabled 0
- [SPEW ] PCI: 00:12.6: enabled 0
- [SPEW ] PCI: 00:12.7: enabled 0
- [SPEW ] PCI: 00:13.0: enabled 0
- [SPEW ] PCI: 00:14.0: enabled 1
- [SPEW ] USB0 port 0: enabled 1
- [SPEW ] USB2 port 0: enabled 0
- [SPEW ] USB2 port 1: enabled 0
- [SPEW ] USB2 port 2: enabled 0
- [SPEW ] USB2 port 3: enabled 0
- [SPEW ] USB2 port 4: enabled 0
- [SPEW ] USB2 port 5: enabled 0
- [SPEW ] USB2 port 6: enabled 0
- [SPEW ] USB2 port 7: enabled 0
- [SPEW ] USB2 port 8: enabled 0
- [SPEW ] USB2 port 9: enabled 1
- [SPEW ] USB3 port 0: enabled 0
- [SPEW ] USB3 port 1: enabled 0
- [SPEW ] USB3 port 2: enabled 0
- [SPEW ] USB3 port 3: enabled 0
- [SPEW ] PCI: 00:14.1: enabled 0
- [SPEW ] PCI: 00:14.2: enabled 0
- [SPEW ] PCI: 00:14.3: enabled 1
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] PCI: 00:15.0: enabled 1
- [SPEW ] PCI: 00:15.1: enabled 1
- [SPEW ] I2C: 00:36: enabled 1
- [SPEW ] I2C: 00:0c: enabled 1
- [SPEW ] PCI: 00:15.2: enabled 1
- [SPEW ] PCI: 00:15.3: enabled 1
- [SPEW ] PCI: 00:16.0: enabled 1
- [SPEW ] PCI: 00:16.1: enabled 0
- [SPEW ] PCI: 00:16.2: enabled 0
- [SPEW ] PCI: 00:16.3: enabled 0
- [SPEW ] PCI: 00:16.4: enabled 0
- [SPEW ] PCI: 00:16.5: enabled 0
- [SPEW ] PCI: 00:17.0: enabled 1
- [SPEW ] PCI: 00:19.0: enabled 0
- [SPEW ] PCI: 00:19.1: enabled 1
- [SPEW ] I2C: 00:36: enabled 1
- [SPEW ] PCI: 00:19.2: enabled 0
- [SPEW ] PCI: 00:1a.0: enabled 0
- [SPEW ] PCI: 00:1e.0: enabled 1
- [SPEW ] PCI: 00:1e.1: enabled 0
- [SPEW ] PCI: 00:1e.2: enabled 1
- [SPEW ] PCI: 00:1e.3: enabled 1
- [SPEW ] SPI: 00: enabled 1
- [SPEW ] PCI: 00:1f.0: enabled 1
- [SPEW ] PCI: 00:1f.1: enabled 1
- [SPEW ] PCI: 00:1f.2: enabled 1
- [SPEW ] PCI: 00:1f.3: enabled 1
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] GENERIC: 0.1: enabled 1
- [SPEW ] PCI: 00:1f.4: enabled 1
- [SPEW ] PCI: 00:1f.5: enabled 1
- [SPEW ] PCI: 00:1f.6: enabled 1
- [SPEW ] PCI: 00:1f.7: enabled 0
- [SPEW ] MMIO: fed40000: enabled 1
- [DEBUG] Root Device scanning...
- [SPEW ] scan_static_bus for Root Device
- [DEBUG] CPU_CLUSTER: 0 enabled
- [DEBUG] DOMAIN: 0000 enabled
- [DEBUG] MMIO: fed40000 enabled
- [DEBUG] DOMAIN: 0000 scanning...
- [DEBUG] PCI: pci_scan_bus for bus 00
- [INFO ] POST: 0x24
- [SPEW ] PCI: 00:00.0 [8086/0000] ops
- [DEBUG] PCI: 00:00.0 [8086/4641] enabled
- [INFO ] PCI: Static device PCI: 00:01.0 not found, disabling it.
- [SPEW ] PCI: 00:02.0 [8086/0000] bus ops
- [DEBUG] PCI: 00:02.0 [8086/46a6] enabled
- [SPEW ] PCI: 00:04.0 [8086/0000] bus ops
- [DEBUG] PCI: 00:04.0 [8086/461d] enabled
- [SPEW ] PCI: 00:05.0 [8086/0000] bus ops
- [DEBUG] PCI: 00:05.0 [8086/465d] enabled
- [SPEW ] PCI: 00:06.0 [8086/0000] bus ops
- [DEBUG] PCI: 00:06.0 [8086/464d] enabled
- [INFO ] PCI: Static device PCI: 00:06.2 not found, disabling it.
- [DEBUG] PCI: 00:07.0 subordinate bus PCI Express
- [DEBUG] PCI: 00:07.0 hot-plug capable
- [DEBUG] PCI: 00:07.0 [8086/466e] enabled
- [DEBUG] PCI: 00:07.1 subordinate bus PCI Express
- [DEBUG] PCI: 00:07.1 hot-plug capable
- [DEBUG] PCI: 00:07.1 [8086/463f] enabled
- [DEBUG] PCI: 00:07.2 subordinate bus PCI Express
- [DEBUG] PCI: 00:07.2 hot-plug capable
- [DEBUG] PCI: 00:07.2 [8086/462f] enabled
- [DEBUG] PCI: 00:07.3 subordinate bus PCI Express
- [DEBUG] PCI: 00:07.3 hot-plug capable
- [DEBUG] PCI: 00:07.3 [8086/461f] enabled
- [SPEW ] PCI: 00:0d.0 [8086/0000] bus ops
- [DEBUG] PCI: 00:0d.0 [8086/461e] enabled
- [SPEW ] PCI: 00:0d.2 [8086/0000] bus ops
- [DEBUG] PCI: 00:0d.2 [8086/463e] enabled
- [SPEW ] PCI: 00:0d.3 [8086/0000] bus ops
- [DEBUG] PCI: 00:0d.3 [8086/466d] enabled
- [SPEW ] PCI: 00:14.0 [8086/0000] bus ops
- [DEBUG] PCI: 00:14.0 [8086/51ed] enabled
- [DEBUG] PCI: 00:14.2 [8086/51ef] disabled
- [INFO ] PCI: Static device PCI: 00:14.3 not found, disabling it.
- [SPEW ] PCI: 00:15.0 [8086/0000] bus ops
- [DEBUG] PCI: 00:15.0 [8086/51e8] enabled
- [SPEW ] PCI: 00:15.1 [8086/0000] bus ops
- [DEBUG] PCI: 00:15.1 [8086/51e9] enabled
- [SPEW ] PCI: 00:15.2 [8086/0000] bus ops
- [DEBUG] PCI: 00:15.2 [8086/51ea] enabled
- [SPEW ] PCI: 00:15.3 [8086/0000] bus ops
- [DEBUG] PCI: 00:15.3 [8086/51eb] enabled
- [SPEW ] PCI: 00:16.0 [8086/0000] ops
- [DEBUG] PCI: 00:16.0 [8086/51e0] enabled
- [INFO ] PCI: Static device PCI: 00:17.0 not found, disabling it.
- [SPEW ] PCI: 00:19.0 [8086/0000] bus ops
- [DEBUG] PCI: 00:19.0 [8086/51c5] disabled
- [SPEW ] PCI: 00:19.1 [8086/0000] bus ops
- [DEBUG] PCI: 00:19.1 [8086/51c6] enabled
- [SPEW ] PCI: 00:1e.0 [8086/0000] ops
- [DEBUG] PCI: 00:1e.0 [8086/51a8] enabled
- [SPEW ] PCI: 00:1e.2 [8086/0000] bus ops
- [DEBUG] PCI: 00:1e.2 [8086/51aa] enabled
- [SPEW ] PCI: 00:1e.3 [8086/0000] bus ops
- [DEBUG] PCI: 00:1e.3 [8086/51ab] enabled
- [SPEW ] PCI: 00:1f.0 [8086/0000] bus ops
- [DEBUG] PCI: 00:1f.0 [8086/5182] enabled
- [INFO ] PCI: Static device PCI: 00:1f.1 not found, disabling it.
- [DEBUG] RTC Init
- [INFO ] Set power on after power failure.
- [DEBUG] Disabling Deep S3
- [DEBUG] Disabling Deep S3
- [DEBUG] Disabling Deep S4
- [DEBUG] Disabling Deep S4
- [DEBUG] Disabling Deep S5
- [DEBUG] Disabling Deep S5
- [DEBUG] PCI: 00:1f.2 [0000/0000] hidden
- [SPEW ] PCI: 00:1f.3 [8086/0000] bus ops
- [DEBUG] PCI: 00:1f.3 [8086/51c8] enabled
- [SPEW ] PCI: 00:1f.4 [8086/0000] bus ops
- [DEBUG] PCI: 00:1f.4 [8086/51a3] enabled
- [SPEW ] PCI: 00:1f.5 [8086/0000] ops
- [DEBUG] PCI: 00:1f.5 [8086/51a4] enabled
- [DEBUG] PCI: 00:1f.6 [8086/1a1f] enabled
- [DEBUG] GPIO: 0 enabled
- [WARN ] PCI: Leftover static devices:
- [WARN ] PCI: 00:01.0
- [WARN ] PCI: 00:01.1
- [WARN ] PCI: 00:06.2
- [WARN ] PCI: 00:08.0
- [WARN ] PCI: 00:09.0
- [WARN ] PCI: 00:0a.0
- [WARN ] PCI: 00:0d.1
- [WARN ] PCI: 00:0e.0
- [WARN ] PCI: 00:10.0
- [WARN ] PCI: 00:10.1
- [WARN ] PCI: 00:10.6
- [WARN ] PCI: 00:10.7
- [WARN ] PCI: 00:12.0
- [WARN ] PCI: 00:12.6
- [WARN ] PCI: 00:12.7
- [WARN ] PCI: 00:13.0
- [WARN ] PCI: 00:14.1
- [WARN ] PCI: 00:14.3
- [WARN ] PCI: 00:16.1
- [WARN ] PCI: 00:16.2
- [WARN ] PCI: 00:16.3
- [WARN ] PCI: 00:16.4
- [WARN ] PCI: 00:16.5
- [WARN ] PCI: 00:17.0
- [WARN ] PCI: 00:19.2
- [WARN ] PCI: 00:1a.0
- [WARN ] PCI: 00:1e.1
- [WARN ] PCI: 00:1f.1
- [WARN ] PCI: 00:1f.7
- [WARN ] PCI: Check your devicetree.cb.
- [DEBUG] PCI: 00:02.0 scanning...
- [SPEW ] scan_generic_bus for PCI: 00:02.0
- [SPEW ] scan_generic_bus for PCI: 00:02.0 done
- [DEBUG] scan_bus: bus PCI: 00:02.0 finished in 9 msecs
- [DEBUG] PCI: 00:04.0 scanning...
- [SPEW ] scan_generic_bus for PCI: 00:04.0
- [DEBUG] GENERIC: 0.0 enabled
- [DEBUG] bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
- [DEBUG] scan_bus: bus PCI: 00:04.0 finished in 14 msecs
- [DEBUG] PCI: 00:05.0 scanning...
- [SPEW ] scan_generic_bus for PCI: 00:05.0
- [DEBUG] GENERIC: 0.0 enabled
- [DEBUG] bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
- [DEBUG] scan_bus: bus PCI: 00:05.0 finished in 14 msecs
- [DEBUG] PCI: 00:06.0 scanning...
- [SPEW ] do_pci_scan_bridge for PCI: 00:06.0
- [DEBUG] PCI: pci_scan_bus for bus 01
- [INFO ] POST: 0x24
- [DEBUG] PCI: 01:00.0 [8086/09ad] enabled
- [INFO ] POST: 0x25
- [INFO ] PCIe: Common Clock Configuration already enabled
- [INFO ] L1 Sub-State supported from root port 6
- [INFO ] L1 Sub-State Support = 0xf
- [INFO ] CommonModeRestoreTime = 0x6e
- [INFO ] Power On Value = 0x1f, Power On Scale = 0x2
- [INFO ] ASPM: Enabled L1
- [INFO ] PCIe: Max_Payload_Size adjusted to 256
- [INFO ] PCI: 01:00.0: Enabled LTR
- [INFO ] PCI: 01:00.0: Programmed LTR max latencies
- [DEBUG] scan_bus: bus PCI: 00:06.0 finished in 58 msecs
- [DEBUG] PCI: 00:07.0 scanning...
- [SPEW ] do_pci_scan_bridge for PCI: 00:07.0
- [DEBUG] PCI: pci_scan_bus for bus 02
- [INFO ] POST: 0x24
- [DEBUG] GENERIC: 0.0 enabled
- [INFO ] POST: 0x25
- [DEBUG] scan_bus: bus PCI: 00:07.0 finished in 16 msecs
- [DEBUG] PCI: 00:07.1 scanning...
- [SPEW ] do_pci_scan_bridge for PCI: 00:07.1
- [DEBUG] PCI: pci_scan_bus for bus 2d
- [INFO ] POST: 0x24
- [DEBUG] GENERIC: 1.0 enabled
- [INFO ] POST: 0x25
- [DEBUG] scan_bus: bus PCI: 00:07.1 finished in 16 msecs
- [DEBUG] PCI: 00:07.2 scanning...
- [SPEW ] do_pci_scan_bridge for PCI: 00:07.2
- [DEBUG] PCI: pci_scan_bus for bus 58
- [INFO ] POST: 0x24
- [DEBUG] GENERIC: 0.0 enabled
- [INFO ] POST: 0x25
- [DEBUG] scan_bus: bus PCI: 00:07.2 finished in 16 msecs
- [DEBUG] PCI: 00:07.3 scanning...
- [SPEW ] do_pci_scan_bridge for PCI: 00:07.3
- [DEBUG] PCI: pci_scan_bus for bus 83
- [INFO ] POST: 0x24
- [DEBUG] GENERIC: 1.0 enabled
- [INFO ] POST: 0x25
- [DEBUG] scan_bus: bus PCI: 00:07.3 finished in 16 msecs
- [DEBUG] PCI: 00:0d.0 scanning...
- [SPEW ] scan_static_bus for PCI: 00:0d.0
- [DEBUG] USB0 port 0 disabled
- [SPEW ] scan_static_bus for PCI: 00:0d.0 done
- [DEBUG] scan_bus: bus PCI: 00:0d.0 finished in 12 msecs
- [DEBUG] PCI: 00:0d.2 scanning...
- [SPEW ] scan_generic_bus for PCI: 00:0d.2
- [SPEW ] scan_generic_bus for PCI: 00:0d.2 done
- [DEBUG] scan_bus: bus PCI: 00:0d.2 finished in 9 msecs
- [DEBUG] PCI: 00:0d.3 scanning...
- [SPEW ] scan_generic_bus for PCI: 00:0d.3
- [SPEW ] scan_generic_bus for PCI: 00:0d.3 done
- [DEBUG] scan_bus: bus PCI: 00:0d.3 finished in 9 msecs
- [DEBUG] PCI: 00:14.0 scanning...
- [SPEW ] scan_static_bus for PCI: 00:14.0
- [DEBUG] USB0 port 0 enabled
- [DEBUG] USB0 port 0 scanning...
- [SPEW ] scan_static_bus for USB0 port 0
- [DEBUG] USB2 port 0 disabled
- [DEBUG] USB2 port 1 disabled
- [DEBUG] USB2 port 2 disabled
- [DEBUG] USB2 port 3 disabled
- [DEBUG] USB2 port 4 disabled
- [DEBUG] USB2 port 5 disabled
- [DEBUG] USB2 port 6 disabled
- [DEBUG] USB2 port 7 disabled
- [DEBUG] USB2 port 8 disabled
- [DEBUG] USB2 port 9 enabled
- [DEBUG] USB3 port 0 disabled
- [DEBUG] USB3 port 1 disabled
- [DEBUG] USB3 port 2 disabled
- [DEBUG] USB3 port 3 disabled
- [DEBUG] USB2 port 9 scanning...
- [SPEW ] scan_static_bus for USB2 port 9
- [SPEW ] scan_static_bus for USB2 port 9 done
- [DEBUG] scan_bus: bus USB2 port 9 finished in 9 msecs
- [SPEW ] scan_static_bus for USB0 port 0 done
- [DEBUG] scan_bus: bus USB0 port 0 finished in 73 msecs
- [SPEW ] scan_static_bus for PCI: 00:14.0 done
- [DEBUG] scan_bus: bus PCI: 00:14.0 finished in 95 msecs
- [DEBUG] PCI: 00:15.0 scanning...
- [SPEW ] scan_static_bus for PCI: 00:15.0
- [SPEW ] scan_static_bus for PCI: 00:15.0 done
- [DEBUG] scan_bus: bus PCI: 00:15.0 finished in 9 msecs
- [DEBUG] PCI: 00:15.1 scanning...
- [SPEW ] scan_static_bus for PCI: 00:15.1
- [DEBUG] I2C: 00:36 enabled
- [DEBUG] I2C: 00:0c enabled
- [SPEW ] scan_static_bus for PCI: 00:15.1 done
- [DEBUG] scan_bus: bus PCI: 00:15.1 finished in 15 msecs
- [DEBUG] PCI: 00:15.2 scanning...
- [SPEW ] scan_static_bus for PCI: 00:15.2
- [SPEW ] scan_static_bus for PCI: 00:15.2 done
- [DEBUG] scan_bus: bus PCI: 00:15.2 finished in 9 msecs
- [DEBUG] PCI: 00:15.3 scanning...
- [SPEW ] scan_static_bus for PCI: 00:15.3
- [SPEW ] scan_static_bus for PCI: 00:15.3 done
- [DEBUG] scan_bus: bus PCI: 00:15.3 finished in 9 msecs
- [DEBUG] PCI: 00:19.1 scanning...
- [SPEW ] scan_static_bus for PCI: 00:19.1
- [DEBUG] I2C: 00:36 enabled
- [SPEW ] scan_static_bus for PCI: 00:19.1 done
- [DEBUG] scan_bus: bus PCI: 00:19.1 finished in 12 msecs
- [DEBUG] PCI: 00:1e.2 scanning...
- [SPEW ] scan_generic_bus for PCI: 00:1e.2
- [SPEW ] scan_generic_bus for PCI: 00:1e.2 done
- [DEBUG] scan_bus: bus PCI: 00:1e.2 finished in 9 msecs
- [DEBUG] PCI: 00:1e.3 scanning...
- [SPEW ] scan_generic_bus for PCI: 00:1e.3
- [DEBUG] SPI: 00 enabled
- [DEBUG] bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
- [DEBUG] scan_bus: bus PCI: 00:1e.3 finished in 14 msecs
- [DEBUG] PCI: 00:1f.0 scanning...
- [SPEW ] scan_static_bus for PCI: 00:1f.0
- [SPEW ] scan_static_bus for PCI: 00:1f.0 done
- [DEBUG] scan_bus: bus PCI: 00:1f.0 finished in 9 msecs
- [DEBUG] PCI: 00:1f.2 scanning...
- [SPEW ] scan_static_bus for PCI: 00:1f.2
- [SPEW ] scan_static_bus for PCI: 00:1f.2 done
- [DEBUG] scan_bus: bus PCI: 00:1f.2 finished in 9 msecs
- [DEBUG] PCI: 00:1f.3 scanning...
- [SPEW ] scan_static_bus for PCI: 00:1f.3
- [DEBUG] GENERIC: 0.0 enabled
- [DEBUG] GENERIC: 0.0 scanning...
- [SPEW ] scan_static_bus for GENERIC: 0.0
- [DEBUG] GENERIC: 0.1 enabled
- [SPEW ] scan_static_bus for GENERIC: 0.0 done
- [DEBUG] scan_bus: bus GENERIC: 0.0 finished in 12 msecs
- [SPEW ] scan_static_bus for PCI: 00:1f.3 done
- [DEBUG] scan_bus: bus PCI: 00:1f.3 finished in 34 msecs
- [DEBUG] PCI: 00:1f.4 scanning...
- [SPEW ] scan_generic_bus for PCI: 00:1f.4
- [SPEW ] scan_generic_bus for PCI: 00:1f.4 done
- [DEBUG] scan_bus: bus PCI: 00:1f.4 finished in 9 msecs
- [INFO ] POST: 0x25
- [DEBUG] scan_bus: bus DOMAIN: 0000 finished in 1075 msecs
- [SPEW ] scan_static_bus for Root Device done
- [DEBUG] scan_bus: bus Root Device finished in 1104 msecs
- [INFO ] done
- [DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 2017 ms
- [INFO ] MRC: Could not find region 'UNIFIED_MRC_CACHE'
- [DEBUG] FMAP: area RW_MRC_CACHE found @ 1900000 (65536 bytes)
- [INFO ] MRC: NOT enabling PRR for 'RW_MRC_CACHE'.
- [DEBUG] BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 17 ms
- [INFO ] POST: 0x73
- [DEBUG] found VGA at PCI: 00:02.0
- [DEBUG] Setting up VGA for PCI: 00:02.0
- [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
- [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
- [INFO ] Allocating resources...
- [INFO ] Reading resources...
- [SPEW ] Root Device read_resources bus 0 link: 0
- [SPEW ] CPU_CLUSTER: 0 read_resources bus 0 link: 0
- [SPEW ] CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
- [SPEW ] DOMAIN: 0000 read_resources bus 0 link: 0
- [DEBUG] SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x00020000
- [SPEW ] dev: PCI: 00:00.0, index: 0x0, base: 0xfedc0000, size: 0x20000
- [DEBUG] SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x00001000
- [SPEW ] dev: PCI: 00:00.0, index: 0x1, base: 0xfeda0000, size: 0x1000
- [DEBUG] SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x00001000
- [SPEW ] dev: PCI: 00:00.0, index: 0x2, base: 0xfeda1000, size: 0x1000
- [DEBUG] SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x00001000
- [SPEW ] dev: PCI: 00:00.0, index: 0x3, base: 0xfb000000, size: 0x1000
- [DEBUG] SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x00004000
- [SPEW ] dev: PCI: 00:00.0, index: 0x4, base: 0xfed80000, size: 0x4000
- [DEBUG] SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x00080000
- [SPEW ] dev: PCI: 00:00.0, index: 0x5, base: 0xfeb00000, size: 0x80000
- [DEBUG] SA MMIO resource: TPM -> base = 0xfed40000, size = 0x00010000
- [SPEW ] dev: PCI: 00:00.0, index: 0x6, base: 0xfed40000, size: 0x10000
- [DEBUG] SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x00020000
- [SPEW ] dev: PCI: 00:00.0, index: 0x7, base: 0xfed50000, size: 0x20000
- [DEBUG] SA MMIO resource: APIC -> base = 0xfec00000, size = 0x00100000
- [SPEW ] dev: PCI: 00:00.0, index: 0x8, base: 0xfec00000, size: 0x100000
- [DEBUG] SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x02000000
- [SPEW ] dev: PCI: 00:00.0, index: 0x9, base: 0xfc800000, size: 0x2000000
- [DEBUG] SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x00001000
- [SPEW ] dev: PCI: 00:00.0, index: 0xa, base: 0xfed90000, size: 0x1000
- [DEBUG] SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x00001000
- [SPEW ] dev: PCI: 00:00.0, index: 0xb, base: 0xfed92000, size: 0x1000
- [DEBUG] SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x00001000
- [SPEW ] dev: PCI: 00:00.0, index: 0xc, base: 0xfed84000, size: 0x1000
- [DEBUG] SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x00001000
- [SPEW ] dev: PCI: 00:00.0, index: 0xd, base: 0xfed85000, size: 0x1000
- [DEBUG] SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x00001000
- [SPEW ] dev: PCI: 00:00.0, index: 0xe, base: 0xfed86000, size: 0x1000
- [DEBUG] SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x00001000
- [SPEW ] dev: PCI: 00:00.0, index: 0xf, base: 0xfed87000, size: 0x1000
- [DEBUG] SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x00001000
- [SPEW ] dev: PCI: 00:00.0, index: 0x10, base: 0xfed91000, size: 0x1000
- [DEBUG] SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
- [SPEW ] dev: PCI: 00:00.0, index: 0x11, base: 0xc0000000, size: 0x10000000
- [DEBUG] SA MMIO resource: DSM -> base = 0x7c800000, size = 0x03c00000
- [SPEW ] dev: PCI: 00:00.0, index: 0x12, base: 0x7c800000, size: 0x3c00000
- [DEBUG] SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x00800000
- [SPEW ] dev: PCI: 00:00.0, index: 0x13, base: 0x7b800000, size: 0x800000
- [DEBUG] SA MMIO resource: GSM -> base = 0x7c000000, size = 0x00800000
- [SPEW ] dev: PCI: 00:00.0, index: 0x14, base: 0x7c000000, size: 0x800000
- [SPEW ] dev: PCI: 00:00.0, index: 0x15, base: 0x0, size: 0xa0000
- [SPEW ] dev: PCI: 00:00.0, index: 0x16, base: 0xc0000, size: 0x76f40000
- [SPEW ] dev: PCI: 00:00.0, index: 0x17, base: 0x77000000, size: 0x9400000
- [INFO ] Available memory above 4GB: 14332M
- [SPEW ] dev: PCI: 00:00.0, index: 0x18, base: 0x100000000, size: 0x37fc00000
- [SPEW ] dev: PCI: 00:00.0, index: 0x19, base: 0xa0000, size: 0x20000
- [SPEW ] dev: PCI: 00:00.0, index: 0x1a, base: 0xc0000, size: 0x40000
- [SPEW ] PCI: 00:04.0 read_resources bus 1 link: 0
- [SPEW ] PCI: 00:04.0 read_resources bus 1 link: 0 done
- [SPEW ] PCI: 00:05.0 read_resources bus 2 link: 0
- [SPEW ] PCI: 00:05.0 read_resources bus 2 link: 0 done
- [SPEW ] PCI: 00:06.0 read_resources bus 1 link: 0
- [SPEW ] PCI: 00:06.0 read_resources bus 1 link: 0 done
- [SPEW ] PCI: 00:07.0 read_resources bus 2 link: 0
- [SPEW ] PCI: 00:07.0 read_resources bus 2 link: 0 done
- [SPEW ] PCI: 00:07.1 read_resources bus 45 link: 0
- [SPEW ] PCI: 00:07.1 read_resources bus 45 link: 0 done
- [SPEW ] PCI: 00:07.2 read_resources bus 88 link: 0
- [SPEW ] PCI: 00:07.2 read_resources bus 88 link: 0 done
- [SPEW ] PCI: 00:07.3 read_resources bus 131 link: 0
- [SPEW ] PCI: 00:07.3 read_resources bus 131 link: 0 done
- [SPEW ] PCI: 00:0d.0 read_resources bus 0 link: 0
- [SPEW ] PCI: 00:0d.0 read_resources bus 0 link: 0 done
- [SPEW ] PCI: 00:14.0 read_resources bus 0 link: 0
- [SPEW ] USB0 port 0 read_resources bus 0 link: 0
- [SPEW ] USB0 port 0 read_resources bus 0 link: 0 done
- [SPEW ] PCI: 00:14.0 read_resources bus 0 link: 0 done
- [SPEW ] PCI: 00:15.1 read_resources bus 0 link: 0
- [SPEW ] PCI: 00:15.1 read_resources bus 0 link: 0 done
- [SPEW ] PCI: 00:19.1 read_resources bus 0 link: 0
- [SPEW ] PCI: 00:19.1 read_resources bus 0 link: 0 done
- [SPEW ] PCI: 00:1e.3 read_resources bus 3 link: 0
- [SPEW ] PCI: 00:1e.3 read_resources bus 3 link: 0 done
- [SPEW ] dev: PCI: 00:1f.2, index: 0x10, base: 0xfe000000, size: 0x10000
- [SPEW ] PCI: 00:1f.3 read_resources bus 0 link: 0
- [SPEW ] GENERIC: 0.0 read_resources bus 0 link: 0
- [SPEW ] GENERIC: 0.0 read_resources bus 0 link: 0 done
- [SPEW ] PCI: 00:1f.3 read_resources bus 0 link: 0 done
- [SPEW ] dev: PCI: 00:1f.5, index: 0x0, base: 0xff000000, size: 0x1000000
- [SPEW ] dev: PCI: 00:1f.5, index: 0x1, base: 0xf8000000, size: 0x2000000
- [SPEW ] DOMAIN: 0000 read_resources bus 0 link: 0 done
- [SPEW ] Root Device read_resources bus 0 link: 0 done
- [INFO ] Done reading resources.
- [SPEW ] Show resources in subtree (Root Device)...After reading.
- [DEBUG] Root Device child on link 0 CPU_CLUSTER: 0
- [DEBUG] CPU_CLUSTER: 0 child on link 0 APIC: 00
- [DEBUG] APIC: 00
- [DEBUG] APIC: 36
- [DEBUG] APIC: 3c
- [DEBUG] APIC: 30
- [DEBUG] APIC: 3e
- [DEBUG] APIC: 32
- [DEBUG] APIC: 38
- [DEBUG] APIC: 08
- [DEBUG] APIC: 34
- [DEBUG] APIC: 3a
- [DEBUG] APIC: 01
- [DEBUG] APIC: 09
- [DEBUG] APIC: 11
- [DEBUG] APIC: 21
- [DEBUG] APIC: 10
- [DEBUG] APIC: 20
- [DEBUG] APIC: 28
- [DEBUG] APIC: 29
- [DEBUG] APIC: 19
- [DEBUG] APIC: 18
- [DEBUG] DOMAIN: 0000 child on link 0 GPIO: 0
- [SPEW ] DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
- [SPEW ] DOMAIN: 0000 resource base 77000000 size 0 align 0 gran 0 limit dfffffff flags 40040200 index 10000100
- [SPEW ] DOMAIN: 0000 resource base 100000000 size 0 align 0 gran 0 limit 3fffffffffff flags 40040200 index 10000200
- [DEBUG] GPIO: 0
- [DEBUG] PCI: 00:00.0
- [SPEW ] PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
- [SPEW ] PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
- [SPEW ] PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
- [SPEW ] PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
- [SPEW ] PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
- [SPEW ] PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
- [SPEW ] PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
- [SPEW ] PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
- [SPEW ] PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
- [SPEW ] PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
- [SPEW ] PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
- [SPEW ] PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
- [SPEW ] PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
- [SPEW ] PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
- [SPEW ] PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
- [SPEW ] PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
- [SPEW ] PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
- [SPEW ] PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
- [SPEW ] PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
- [SPEW ] PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
- [SPEW ] PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
- [SPEW ] PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
- [SPEW ] PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
- [SPEW ] PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
- [SPEW ] PCI: 00:00.0 resource base 100000000 size 37fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
- [SPEW ] PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
- [SPEW ] PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
- [DEBUG] PCI: 00:02.0
- [SPEW ] PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
- [SPEW ] PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
- [SPEW ] PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
- [DEBUG] PCI: 00:04.0 child on link 0 GENERIC: 0.0
- [SPEW ] PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
- [DEBUG] GENERIC: 0.0
- [DEBUG] PCI: 00:05.0 child on link 0 GENERIC: 0.0
- [SPEW ] PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
- [DEBUG] GENERIC: 0.0
- [DEBUG] PCI: 00:06.0 child on link 0 PCI: 01:00.0
- [SPEW ] PCI: 00:06.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
- [SPEW ] PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
- [SPEW ] PCI: 00:06.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
- [DEBUG] PCI: 01:00.0
- [SPEW ] PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
- [DEBUG] PCI: 00:07.0 child on link 0 GENERIC: 0.0
- [SPEW ] PCI: 00:07.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
- [SPEW ] PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
- [SPEW ] PCI: 00:07.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
- [DEBUG] GENERIC: 0.0
- [DEBUG] NONE
- [SPEW ] NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
- [SPEW ] NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
- [SPEW ] NONE resource base 0 size 800 align 12 gran 12 limit ffff flags 100 index 18
- [DEBUG] PCI: 00:07.1 child on link 0 GENERIC: 1.0
- [SPEW ] PCI: 00:07.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
- [SPEW ] PCI: 00:07.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
- [SPEW ] PCI: 00:07.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
- [DEBUG] GENERIC: 1.0
- [DEBUG] NONE
- [SPEW ] NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
- [SPEW ] NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
- [SPEW ] NONE resource base 0 size 800 align 12 gran 12 limit ffff flags 100 index 18
- [DEBUG] PCI: 00:07.2 child on link 0 GENERIC: 0.0
- [SPEW ] PCI: 00:07.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
- [SPEW ] PCI: 00:07.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
- [SPEW ] PCI: 00:07.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
- [DEBUG] GENERIC: 0.0
- [DEBUG] NONE
- [SPEW ] NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
- [SPEW ] NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
- [SPEW ] NONE resource base 0 size 800 align 12 gran 12 limit ffff flags 100 index 18
- [DEBUG] PCI: 00:07.3 child on link 0 GENERIC: 1.0
- [SPEW ] PCI: 00:07.3 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
- [SPEW ] PCI: 00:07.3 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
- [SPEW ] PCI: 00:07.3 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
- [DEBUG] GENERIC: 1.0
- [DEBUG] NONE
- [SPEW ] NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
- [SPEW ] NONE resource base 0 size 1c000000 align 12 gran 12 limit ffffffffffffffff flags 101200 index 14
- [SPEW ] NONE resource base 0 size 800 align 12 gran 12 limit ffff flags 100 index 18
- [DEBUG] PCI: 00:0d.0 child on link 0 USB0 port 0
- [SPEW ] PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
- [DEBUG] USB0 port 0 child on link 0 USB3 port 0
- [DEBUG] USB3 port 0
- [DEBUG] USB3 port 1
- [DEBUG] USB3 port 2
- [DEBUG] USB3 port 3
- [DEBUG] PCI: 00:0d.2
- [SPEW ] PCI: 00:0d.2 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10
- [SPEW ] PCI: 00:0d.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
- [DEBUG] PCI: 00:0d.3
- [SPEW ] PCI: 00:0d.3 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10
- [SPEW ] PCI: 00:0d.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
- [DEBUG] PCI: 00:14.0 child on link 0 USB0 port 0
- [SPEW ] PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
- [DEBUG] USB0 port 0 child on link 0 USB2 port 0
- [DEBUG] USB2 port 0
- [DEBUG] USB2 port 1
- [DEBUG] USB2 port 2
- [DEBUG] USB2 port 3
- [DEBUG] USB2 port 4
- [DEBUG] USB2 port 5
- [DEBUG] USB2 port 6
- [DEBUG] USB2 port 7
- [DEBUG] USB2 port 8
- [DEBUG] USB2 port 9
- [DEBUG] USB3 port 0
- [DEBUG] USB3 port 1
- [DEBUG] USB3 port 2
- [DEBUG] USB3 port 3
- [DEBUG] PCI: 00:14.2
- [DEBUG] PCI: 00:15.0
- [SPEW ] PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
- [DEBUG] PCI: 00:15.1 child on link 0 I2C: 00:36
- [SPEW ] PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
- [DEBUG] I2C: 00:36
- [DEBUG] I2C: 00:0c
- [DEBUG] PCI: 00:15.2
- [SPEW ] PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
- [DEBUG] PCI: 00:15.3
- [SPEW ] PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
- [DEBUG] PCI: 00:16.0
- [SPEW ] PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
- [DEBUG] PCI: 00:19.0
- [DEBUG] PCI: 00:19.1 child on link 0 I2C: 00:36
- [SPEW ] PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
- [DEBUG] I2C: 00:36
- [DEBUG] PCI: 00:1e.0
- [SPEW ] PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
- [SPEW ] PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
- [DEBUG] PCI: 00:1e.2
- [SPEW ] PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
- [DEBUG] PCI: 00:1e.3 child on link 0 SPI: 00
- [SPEW ] PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
- [DEBUG] SPI: 00
- [DEBUG] PCI: 00:1f.0
- [SPEW ] PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
- [SPEW ] PCI: 00:1f.0 resource base 800 size 100 align 0 gran 0 limit 0 flags c0000100 index 84
- [SPEW ] PCI: 00:1f.0 resource base 200 size 10 align 0 gran 0 limit 0 flags c0000100 index 88
- [SPEW ] PCI: 00:1f.0 resource base 900 size 100 align 0 gran 0 limit 0 flags c0000100 index 8c
- [SPEW ] PCI: 00:1f.0 resource base 80 size 10 align 0 gran 0 limit 0 flags c0000100 index 90
- [SPEW ] PCI: 00:1f.0 resource base fe0b0000 size 10000 align 0 gran 0 limit 0 flags d0000200 index 98
- [DEBUG] PCI: 00:1f.2
- [SPEW ] PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 10
- [SPEW ] PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
- [DEBUG] PCI: 00:1f.3 child on link 0 GENERIC: 0.0
- [SPEW ] PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
- [SPEW ] PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
- [DEBUG] GENERIC: 0.0 child on link 0 GENERIC: 0.1
- [DEBUG] GENERIC: 0.1
- [DEBUG] PCI: 00:1f.4
- [SPEW ] PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
- [SPEW ] PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
- [DEBUG] PCI: 00:1f.5
- [SPEW ] PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
- [SPEW ] PCI: 00:1f.5 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index 0
- [SPEW ] PCI: 00:1f.5 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1
- [DEBUG] PCI: 00:1f.6
- [SPEW ] PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10
- [DEBUG] MMIO: fed40000
- [INFO ] === Resource allocator: DOMAIN: 0000 - Pass 1 (relative placement) ===
- [DEBUG] PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff
- [DEBUG] PCI: 00:06.0 io: size: 0 align: 12 gran: 12 limit: ffff done
- [DEBUG] PCI: 00:06.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
- [DEBUG] PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
- [DEBUG] PCI: 00:06.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
- [DEBUG] PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
- [DEBUG] PCI: 00:06.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
- [DEBUG] PCI: 00:07.0 io: size: 0 align: 12 gran: 12 limit: ffff
- [DEBUG] NONE 18 * [0x0 - 0x7ff] io
- [DEBUG] PCI: 00:07.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
- [DEBUG] PCI: 00:07.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
- [DEBUG] NONE 10 * [0x0 - 0xc1fffff] mem
- [DEBUG] PCI: 00:07.0 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done
- [DEBUG] PCI: 00:07.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
- [DEBUG] NONE 14 * [0x0 - 0x1bffffff] prefmem
- [DEBUG] PCI: 00:07.0 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done
- [DEBUG] PCI: 00:07.1 io: size: 0 align: 12 gran: 12 limit: ffff
- [DEBUG] NONE 18 * [0x0 - 0x7ff] io
- [DEBUG] PCI: 00:07.1 io: size: 1000 align: 12 gran: 12 limit: ffff done
- [DEBUG] PCI: 00:07.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
- [DEBUG] NONE 10 * [0x0 - 0xc1fffff] mem
- [DEBUG] PCI: 00:07.1 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done
- [DEBUG] PCI: 00:07.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
- [DEBUG] NONE 14 * [0x0 - 0x1bffffff] prefmem
- [DEBUG] PCI: 00:07.1 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done
- [DEBUG] PCI: 00:07.2 io: size: 0 align: 12 gran: 12 limit: ffff
- [DEBUG] NONE 18 * [0x0 - 0x7ff] io
- [DEBUG] PCI: 00:07.2 io: size: 1000 align: 12 gran: 12 limit: ffff done
- [DEBUG] PCI: 00:07.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
- [DEBUG] NONE 10 * [0x0 - 0xc1fffff] mem
- [DEBUG] PCI: 00:07.2 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done
- [DEBUG] PCI: 00:07.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
- [DEBUG] NONE 14 * [0x0 - 0x1bffffff] prefmem
- [DEBUG] PCI: 00:07.2 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done
- [DEBUG] PCI: 00:07.3 io: size: 0 align: 12 gran: 12 limit: ffff
- [DEBUG] NONE 18 * [0x0 - 0x7ff] io
- [DEBUG] PCI: 00:07.3 io: size: 1000 align: 12 gran: 12 limit: ffff done
- [DEBUG] PCI: 00:07.3 mem: size: 0 align: 20 gran: 20 limit: ffffffff
- [DEBUG] NONE 10 * [0x0 - 0xc1fffff] mem
- [DEBUG] PCI: 00:07.3 mem: size: c200000 align: 20 gran: 20 limit: ffffffff done
- [DEBUG] PCI: 00:07.3 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
- [DEBUG] NONE 14 * [0x0 - 0x1bffffff] prefmem
- [DEBUG] PCI: 00:07.3 prefmem: size: 1c000000 align: 20 gran: 20 limit: ffffffffffffffff done
- [INFO ] === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
- [DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
- [DEBUG] avoid_fixed_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:1f.0 84 base 00000800 limit 000008ff io (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:1f.0 88 base 00000200 limit 0000020f io (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:1f.0 8c base 00000900 limit 000009ff io (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:1f.0 90 base 00000080 limit 0000008f io (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
- [INFO ] DOMAIN: 0000: Resource ranges:
- [INFO ] * Base: 1000, Size: 800, Tag: 100
- [INFO ] * Base: 1900, Size: d6a0, Tag: 100
- [INFO ] * Base: efc0, Size: 1040, Tag: 100
- [DEBUG] PCI: 00:07.0 1c * [0x2000 - 0x2fff] limit: 2fff io
- [DEBUG] PCI: 00:07.1 1c * [0x3000 - 0x3fff] limit: 3fff io
- [DEBUG] PCI: 00:07.2 1c * [0x4000 - 0x4fff] limit: 4fff io
- [DEBUG] PCI: 00:07.3 1c * [0x5000 - 0x5fff] limit: 5fff io
- [DEBUG] PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
- [DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
- [DEBUG] DOMAIN: 0000 mem: base: 77000000 size: 0 align: 0 gran: 0 limit: dfffffff
- [DEBUG] DOMAIN: 0000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 3fffffffffff
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 00 base fedc0000 limit feddffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 01 base feda0000 limit feda0fff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 02 base feda1000 limit feda1fff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 03 base fb000000 limit fb000fff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 04 base fed80000 limit fed83fff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 08 base fec00000 limit fecfffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 0b base fed92000 limit fed92fff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 0c base fed84000 limit fed84fff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 0d base fed85000 limit fed85fff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 0e base fed86000 limit fed86fff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 0f base fed87000 limit fed87fff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 10 base fed91000 limit fed91fff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 11 base c0000000 limit cfffffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 17 base 77000000 limit 803fffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 18 base 100000000 limit 47fbfffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:1f.0 98 base fe0b0000 limit fe0bffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:1f.2 10 base fe000000 limit fe00ffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:1f.5 00 base ff000000 limit ffffffff mem (fixed)
- [DEBUG] avoid_fixed_resources: PCI: 00:1f.5 01 base f8000000 limit f9ffffff mem (fixed)
- [INFO ] DOMAIN: 0000: Resource ranges:
- [INFO ] * Base: 80400000, Size: 3fc00000, Tag: 200
- [INFO ] * Base: d0000000, Size: 10000000, Tag: 200
- [INFO ] * Base: 47fc00000, Size: 3ffb80400000, Tag: 200
- [DEBUG] PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
- [DEBUG] PCI: 00:02.0 10 * [0x81000000 - 0x81ffffff] limit: 81ffffff mem
- [DEBUG] PCI: 00:05.0 10 * [0x82000000 - 0x82ffffff] limit: 82ffffff mem
- [DEBUG] PCI: 00:07.0 24 * [0xa0000000 - 0xbbffffff] limit: bbffffff prefmem
- [DEBUG] PCI: 00:07.1 24 * [0x47fc00000 - 0x49bbfffff] limit: 49bbfffff prefmem
- [DEBUG] PCI: 00:07.2 24 * [0x49bc00000 - 0x4b7bfffff] limit: 4b7bfffff prefmem
- [DEBUG] PCI: 00:07.3 24 * [0x4b7c00000 - 0x4d3bfffff] limit: 4d3bfffff prefmem
- [DEBUG] PCI: 00:07.0 20 * [0x83000000 - 0x8f1fffff] limit: 8f1fffff mem
- [DEBUG] PCI: 00:07.1 20 * [0xd0000000 - 0xdc1fffff] limit: dc1fffff mem
- [ERROR] Resource didn't fit!!!
- [DEBUG] PCI: 00:07.2 20 * size: 0xc200000 limit: ffffffff mem
- [ERROR] Resource didn't fit!!!
- [DEBUG] PCI: 00:07.3 20 * size: 0xc200000 limit: ffffffff mem
- [DEBUG] PCI: 00:06.0 20 * [0x80400000 - 0x804fffff] limit: 804fffff mem
- [DEBUG] PCI: 00:1f.3 20 * [0x80500000 - 0x805fffff] limit: 805fffff mem
- [DEBUG] PCI: 00:0d.2 10 * [0x80600000 - 0x8063ffff] limit: 8063ffff mem
- [DEBUG] PCI: 00:0d.3 10 * [0x80640000 - 0x8067ffff] limit: 8067ffff mem
- [DEBUG] PCI: 00:04.0 10 * [0x80680000 - 0x8069ffff] limit: 8069ffff mem
- [DEBUG] PCI: 00:1f.6 10 * [0x806a0000 - 0x806bffff] limit: 806bffff mem
- [DEBUG] PCI: 00:0d.0 10 * [0x806c0000 - 0x806cffff] limit: 806cffff mem
- [DEBUG] PCI: 00:14.0 10 * [0x806d0000 - 0x806dffff] limit: 806dffff mem
- [DEBUG] PCI: 00:1f.3 10 * [0x806e0000 - 0x806e3fff] limit: 806e3fff mem
- [DEBUG] PCI: 00:0d.2 18 * [0x806e4000 - 0x806e4fff] limit: 806e4fff mem
- [DEBUG] PCI: 00:0d.3 18 * [0x806e5000 - 0x806e5fff] limit: 806e5fff mem
- [DEBUG] PCI: 00:15.0 10 * [0x806e6000 - 0x806e6fff] limit: 806e6fff mem
- [DEBUG] PCI: 00:15.1 10 * [0x806e7000 - 0x806e7fff] limit: 806e7fff mem
- [DEBUG] PCI: 00:15.2 10 * [0x806e8000 - 0x806e8fff] limit: 806e8fff mem
- [DEBUG] PCI: 00:15.3 10 * [0x806e9000 - 0x806e9fff] limit: 806e9fff mem
- [DEBUG] PCI: 00:16.0 10 * [0x806ea000 - 0x806eafff] limit: 806eafff mem
- [DEBUG] PCI: 00:19.1 10 * [0x806eb000 - 0x806ebfff] limit: 806ebfff mem
- [DEBUG] PCI: 00:1e.0 10 * [0x806ec000 - 0x806ecfff] limit: 806ecfff mem
- [DEBUG] PCI: 00:1e.0 18 * [0x806ed000 - 0x806edfff] limit: 806edfff mem
- [DEBUG] PCI: 00:1e.2 10 * [0x806ee000 - 0x806eefff] limit: 806eefff mem
- [DEBUG] PCI: 00:1e.3 10 * [0x806ef000 - 0x806effff] limit: 806effff mem
- [DEBUG] PCI: 00:1f.5 10 * [0x806f0000 - 0x806f0fff] limit: 806f0fff mem
- [DEBUG] PCI: 00:1f.4 10 * [0x806f1000 - 0x806f10ff] limit: 806f10ff mem
- [DEBUG] DOMAIN: 0000 mem: base: 77000000 size: 0 align: 0 gran: 0 limit: dfffffff done
- [DEBUG] DOMAIN: 0000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 3fffffffffff done
- [DEBUG] PCI: 01:00.0 10 * [0x80400000 - 0x80403fff] limit: 80403fff mem
- [DEBUG] NONE 18 * [0x2000 - 0x27ff] limit: 27ff io
- [DEBUG] NONE 14 * [0xa0000000 - 0xbbffffff] limit: bbffffff prefmem
- [DEBUG] NONE 10 * [0x83000000 - 0x8f1fffff] limit: 8f1fffff mem
- [DEBUG] NONE 18 * [0x3000 - 0x37ff] limit: 37ff io
- [DEBUG] NONE 14 * [0x47fc00000 - 0x49bbfffff] limit: 49bbfffff prefmem
- [DEBUG] NONE 10 * [0xd0000000 - 0xdc1fffff] limit: dc1fffff mem
- [DEBUG] NONE 18 * [0x4000 - 0x47ff] limit: 47ff io
- [DEBUG] NONE 14 * [0x49bc00000 - 0x4b7bfffff] limit: 4b7bfffff prefmem
- [DEBUG] NONE 18 * [0x5000 - 0x57ff] limit: 57ff io
- [DEBUG] NONE 14 * [0x4b7c00000 - 0x4d3bfffff] limit: 4d3bfffff prefmem
- [INFO ] === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
- [SPEW ] Root Device assign_resources, bus 0 link: 0
- [SPEW ] DOMAIN: 0000 assign_resources, bus 0 link: 0
- [DEBUG] PCI: 00:02.0 10 <- [0x0000000081000000 - 0x0000000081ffffff] size 0x01000000 gran 0x18 mem64
- [DEBUG] PCI: 00:02.0 18 <- [0x0000000090000000 - 0x000000009fffffff] size 0x10000000 gran 0x1c prefmem64
- [DEBUG] PCI: 00:02.0 20 <- [0x0000000000001000 - 0x000000000000103f] size 0x00000040 gran 0x06 io
- [DEBUG] PCI: 00:04.0 10 <- [0x0000000080680000 - 0x000000008069ffff] size 0x00020000 gran 0x11 mem64
- [SPEW ] PCI: 00:04.0 assign_resources, bus 1 link: 0
- [SPEW ] PCI: 00:04.0 assign_resources, bus 1 link: 0 done
- [DEBUG] PCI: 00:05.0 10 <- [0x0000000082000000 - 0x0000000082ffffff] size 0x01000000 gran 0x18 mem64
- [SPEW ] PCI: 00:05.0 assign_resources, bus 2 link: 0
- [SPEW ] PCI: 00:05.0 assign_resources, bus 2 link: 0 done
- [DEBUG] PCI: 00:06.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 01 io
- [DEBUG] PCI: 00:06.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
- [DEBUG] PCI: 00:06.0 20 <- [0x0000000080400000 - 0x00000000804fffff] size 0x00100000 gran 0x14 bus 01 mem
- [SPEW ] PCI: 00:06.0 assign_resources, bus 1 link: 0
- [DEBUG] PCI: 01:00.0 10 <- [0x0000000080400000 - 0x0000000080403fff] size 0x00004000 gran 0x0e mem64
- [SPEW ] PCI: 00:06.0 assign_resources, bus 1 link: 0 done
- [DEBUG] PCI: 00:07.0 1c <- [0x0000000000002000 - 0x0000000000002fff] size 0x00001000 gran 0x0c bus 02 io
- [DEBUG] PCI: 00:07.0 24 <- [0x00000000a0000000 - 0x00000000bbffffff] size 0x1c000000 gran 0x14 bus 02 prefmem
- [DEBUG] PCI: 00:07.0 20 <- [0x0000000083000000 - 0x000000008f1fffff] size 0x0c200000 gran 0x14 bus 02 mem
- [SPEW ] PCI: 00:07.0 assign_resources, bus 2 link: 0
- [SPEW ] PCI: 00:07.0 assign_resources, bus 2 link: 0 done
- [DEBUG] PCI: 00:07.1 1c <- [0x0000000000003000 - 0x0000000000003fff] size 0x00001000 gran 0x0c bus 2d io
- [DEBUG] PCI: 00:07.1 24 <- [0x000000047fc00000 - 0x000000049bbfffff] size 0x1c000000 gran 0x14 bus 2d prefmem
- [DEBUG] PCI: 00:07.1 20 <- [0x00000000d0000000 - 0x00000000dc1fffff] size 0x0c200000 gran 0x14 bus 2d mem
- [SPEW ] PCI: 00:07.1 assign_resources, bus 45 link: 0
- [SPEW ] PCI: 00:07.1 assign_resources, bus 45 link: 0 done
- [DEBUG] PCI: 00:07.2 1c <- [0x0000000000004000 - 0x0000000000004fff] size 0x00001000 gran 0x0c bus 58 io
- [DEBUG] PCI: 00:07.2 24 <- [0x000000049bc00000 - 0x00000004b7bfffff] size 0x1c000000 gran 0x14 bus 58 prefmem
- [DEBUG] PCI: 00:07.2 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 bus 58 mem
- [SPEW ] PCI: 00:07.2 assign_resources, bus 88 link: 0
- [SPEW ] PCI: 00:07.2 assign_resources, bus 88 link: 0 done
- [DEBUG] PCI: 00:07.3 1c <- [0x0000000000005000 - 0x0000000000005fff] size 0x00001000 gran 0x0c bus 83 io
- [DEBUG] PCI: 00:07.3 24 <- [0x00000004b7c00000 - 0x00000004d3bfffff] size 0x1c000000 gran 0x14 bus 83 prefmem
- [DEBUG] PCI: 00:07.3 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 bus 83 mem
- [SPEW ] PCI: 00:07.3 assign_resources, bus 131 link: 0
- [SPEW ] PCI: 00:07.3 assign_resources, bus 131 link: 0 done
- [DEBUG] PCI: 00:0d.0 10 <- [0x00000000806c0000 - 0x00000000806cffff] size 0x00010000 gran 0x10 mem64
- [SPEW ] PCI: 00:0d.0 assign_resources, bus 0 link: 0
- [SPEW ] PCI: 00:0d.0 assign_resources, bus 0 link: 0 done
- [DEBUG] PCI: 00:0d.2 10 <- [0x0000000080600000 - 0x000000008063ffff] size 0x00040000 gran 0x12 mem64
- [DEBUG] PCI: 00:0d.2 18 <- [0x00000000806e4000 - 0x00000000806e4fff] size 0x00001000 gran 0x0c mem64
- [DEBUG] PCI: 00:0d.3 10 <- [0x0000000080640000 - 0x000000008067ffff] size 0x00040000 gran 0x12 mem64
- [DEBUG] PCI: 00:0d.3 18 <- [0x00000000806e5000 - 0x00000000806e5fff] size 0x00001000 gran 0x0c mem64
- [DEBUG] PCI: 00:14.0 10 <- [0x00000000806d0000 - 0x00000000806dffff] size 0x00010000 gran 0x10 mem64
- [SPEW ] PCI: 00:14.0 assign_resources, bus 0 link: 0
- [SPEW ] PCI: 00:14.0 assign_resources, bus 0 link: 0 done
- [DEBUG] PCI: 00:15.0 10 <- [0x00000000806e6000 - 0x00000000806e6fff] size 0x00001000 gran 0x0c mem64
- [DEBUG] PCI: 00:15.1 10 <- [0x00000000806e7000 - 0x00000000806e7fff] size 0x00001000 gran 0x0c mem64
- [SPEW ] PCI: 00:15.1 assign_resources, bus 0 link: 0
- [SPEW ] PCI: 00:15.1 assign_resources, bus 0 link: 0 done
- [DEBUG] PCI: 00:15.2 10 <- [0x00000000806e8000 - 0x00000000806e8fff] size 0x00001000 gran 0x0c mem64
- [DEBUG] PCI: 00:15.3 10 <- [0x00000000806e9000 - 0x00000000806e9fff] size 0x00001000 gran 0x0c mem64
- [DEBUG] PCI: 00:16.0 10 <- [0x00000000806ea000 - 0x00000000806eafff] size 0x00001000 gran 0x0c mem64
- [DEBUG] PCI: 00:19.1 10 <- [0x00000000806eb000 - 0x00000000806ebfff] size 0x00001000 gran 0x0c mem64
- [SPEW ] PCI: 00:19.1 assign_resources, bus 0 link: 0
- [SPEW ] PCI: 00:19.1 assign_resources, bus 0 link: 0 done
- [DEBUG] PCI: 00:1e.0 10 <- [0x00000000806ec000 - 0x00000000806ecfff] size 0x00001000 gran 0x0c mem64
- [DEBUG] PCI: 00:1e.0 18 <- [0x00000000806ed000 - 0x00000000806edfff] size 0x00001000 gran 0x0c mem64
- [DEBUG] PCI: 00:1e.2 10 <- [0x00000000806ee000 - 0x00000000806eefff] size 0x00001000 gran 0x0c mem64
- [DEBUG] PCI: 00:1e.3 10 <- [0x00000000806ef000 - 0x00000000806effff] size 0x00001000 gran 0x0c mem64
- [SPEW ] PCI: 00:1e.3 assign_resources, bus 3 link: 0
- [SPEW ] PCI: 00:1e.3 assign_resources, bus 3 link: 0 done
- [DEBUG] PCI: 00:1f.3 10 <- [0x00000000806e0000 - 0x00000000806e3fff] size 0x00004000 gran 0x0e mem64
- [DEBUG] PCI: 00:1f.3 20 <- [0x0000000080500000 - 0x00000000805fffff] size 0x00100000 gran 0x14 mem64
- [SPEW ] PCI: 00:1f.3 assign_resources, bus 0 link: 0
- [SPEW ] PCI: 00:1f.3 assign_resources, bus 0 link: 0 done
- [DEBUG] PCI: 00:1f.4 10 <- [0x00000000806f1000 - 0x00000000806f10ff] size 0x00000100 gran 0x08 mem64
- [DEBUG] PCI: 00:1f.5 10 <- [0x00000000806f0000 - 0x00000000806f0fff] size 0x00001000 gran 0x0c mem
- [DEBUG] PCI: 00:1f.6 10 <- [0x00000000806a0000 - 0x00000000806bffff] size 0x00020000 gran 0x11 mem
- [SPEW ] DOMAIN: 0000 assign_resources, bus 0 link: 0 done
- [SPEW ] Root Device assign_resources, bus 0 link: 0 done
- [INFO ] Done setting resources.
- [SPEW ] Show resources in subtree (Root Device)...After assigning values.
- [DEBUG] Root Device child on link 0 CPU_CLUSTER: 0
- [DEBUG] CPU_CLUSTER: 0 child on link 0 APIC: 00
- [DEBUG] APIC: 00
- [DEBUG] APIC: 36
- [DEBUG] APIC: 3c
- [DEBUG] APIC: 30
- [DEBUG] APIC: 3e
- [DEBUG] APIC: 32
- [DEBUG] APIC: 38
- [DEBUG] APIC: 08
- [DEBUG] APIC: 34
- [DEBUG] APIC: 3a
- [DEBUG] APIC: 01
- [DEBUG] APIC: 09
- [DEBUG] APIC: 11
- [DEBUG] APIC: 21
- [DEBUG] APIC: 10
- [DEBUG] APIC: 20
- [DEBUG] APIC: 28
- [DEBUG] APIC: 29
- [DEBUG] APIC: 19
- [DEBUG] APIC: 18
- [DEBUG] DOMAIN: 0000 child on link 0 GPIO: 0
- [SPEW ] DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
- [SPEW ] DOMAIN: 0000 resource base 77000000 size 0 align 0 gran 0 limit dfffffff flags 40040200 index 10000100
- [SPEW ] DOMAIN: 0000 resource base 100000000 size 0 align 0 gran 0 limit 3fffffffffff flags 40040200 index 10000200
- [DEBUG] GPIO: 0
- [DEBUG] PCI: 00:00.0
- [SPEW ] PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 0
- [SPEW ] PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 1
- [SPEW ] PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
- [SPEW ] PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
- [SPEW ] PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 4
- [SPEW ] PCI: 00:00.0 resource base feb00000 size 80000 align 0 gran 0 limit 0 flags f0000200 index 5
- [SPEW ] PCI: 00:00.0 resource base fed40000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
- [SPEW ] PCI: 00:00.0 resource base fed50000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
- [SPEW ] PCI: 00:00.0 resource base fec00000 size 100000 align 0 gran 0 limit 0 flags f0000200 index 8
- [SPEW ] PCI: 00:00.0 resource base fc800000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 9
- [SPEW ] PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
- [SPEW ] PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
- [SPEW ] PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
- [SPEW ] PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index d
- [SPEW ] PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index e
- [SPEW ] PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index f
- [SPEW ] PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 10
- [SPEW ] PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 11
- [SPEW ] PCI: 00:00.0 resource base 7c800000 size 3c00000 align 0 gran 0 limit 0 flags f0000200 index 12
- [SPEW ] PCI: 00:00.0 resource base 7b800000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 13
- [SPEW ] PCI: 00:00.0 resource base 7c000000 size 800000 align 0 gran 0 limit 0 flags f0000200 index 14
- [SPEW ] PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 15
- [SPEW ] PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index 16
- [SPEW ] PCI: 00:00.0 resource base 77000000 size 9400000 align 0 gran 0 limit 0 flags f0000200 index 17
- [SPEW ] PCI: 00:00.0 resource base 100000000 size 37fc00000 align 0 gran 0 limit 0 flags e0004200 index 18
- [SPEW ] PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 19
- [SPEW ] PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 1a
- [DEBUG] PCI: 00:02.0
- [SPEW ] PCI: 00:02.0 resource base 81000000 size 1000000 align 24 gran 24 limit 81ffffff flags 60000201 index 10
- [SPEW ] PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18
- [SPEW ] PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
- [DEBUG] PCI: 00:04.0 child on link 0 GENERIC: 0.0
- [SPEW ] PCI: 00:04.0 resource base 80680000 size 20000 align 17 gran 17 limit 8069ffff flags 60000201 index 10
- [DEBUG] GENERIC: 0.0
- [DEBUG] PCI: 00:05.0 child on link 0 GENERIC: 0.0
- [SPEW ] PCI: 00:05.0 resource base 82000000 size 1000000 align 24 gran 24 limit 82ffffff flags 60000201 index 10
- [DEBUG] GENERIC: 0.0
- [DEBUG] PCI: 00:06.0 child on link 0 PCI: 01:00.0
- [SPEW ] PCI: 00:06.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
- [SPEW ] PCI: 00:06.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
- [SPEW ] PCI: 00:06.0 resource base 80400000 size 100000 align 20 gran 20 limit 804fffff flags 60080202 index 20
- [DEBUG] PCI: 01:00.0
- [SPEW ] PCI: 01:00.0 resource base 80400000 size 4000 align 14 gran 14 limit 80403fff flags 60000201 index 10
- [DEBUG] PCI: 00:07.0 child on link 0 GENERIC: 0.0
- [SPEW ] PCI: 00:07.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c
- [SPEW ] PCI: 00:07.0 resource base a0000000 size 1c000000 align 20 gran 20 limit bbffffff flags 60081202 index 24
- [SPEW ] PCI: 00:07.0 resource base 83000000 size c200000 align 20 gran 20 limit 8f1fffff flags 60080202 index 20
- [DEBUG] GENERIC: 0.0
- [DEBUG] NONE
- [SPEW ] NONE resource base 83000000 size c200000 align 12 gran 12 limit 8f1fffff flags 40000200 index 10
- [SPEW ] NONE resource base a0000000 size 1c000000 align 12 gran 12 limit bbffffff flags 40101200 index 14
- [SPEW ] NONE resource base 2000 size 800 align 12 gran 12 limit 27ff flags 40000100 index 18
- [DEBUG] PCI: 00:07.1 child on link 0 GENERIC: 1.0
- [SPEW ] PCI: 00:07.1 resource base 3000 size 1000 align 12 gran 12 limit 3fff flags 60080102 index 1c
- [SPEW ] PCI: 00:07.1 resource base 47fc00000 size 1c000000 align 20 gran 20 limit 49bbfffff flags 60081202 index 24
- [SPEW ] PCI: 00:07.1 resource base d0000000 size c200000 align 20 gran 20 limit dc1fffff flags 60080202 index 20
- [DEBUG] GENERIC: 1.0
- [DEBUG] NONE
- [SPEW ] NONE resource base d0000000 size c200000 align 12 gran 12 limit dc1fffff flags 40000200 index 10
- [SPEW ] NONE resource base 47fc00000 size 1c000000 align 12 gran 12 limit 49bbfffff flags 40101200 index 14
- [SPEW ] NONE resource base 3000 size 800 align 12 gran 12 limit 37ff flags 40000100 index 18
- [DEBUG] PCI: 00:07.2 child on link 0 GENERIC: 0.0
- [SPEW ] PCI: 00:07.2 resource base 4000 size 1000 align 12 gran 12 limit 4fff flags 60080102 index 1c
- [SPEW ] PCI: 00:07.2 resource base 49bc00000 size 1c000000 align 20 gran 20 limit 4b7bfffff flags 60081202 index 24
- [SPEW ] PCI: 00:07.2 resource base ffffffff size 0 align 20 gran 20 limit ffffffff flags 20080202 index 20
- [DEBUG] GENERIC: 0.0
- [DEBUG] NONE
- [SPEW ] NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
- [SPEW ] NONE resource base 49bc00000 size 1c000000 align 12 gran 12 limit 4b7bfffff flags 40101200 index 14
- [SPEW ] NONE resource base 4000 size 800 align 12 gran 12 limit 47ff flags 40000100 index 18
- [DEBUG] PCI: 00:07.3 child on link 0 GENERIC: 1.0
- [SPEW ] PCI: 00:07.3 resource base 5000 size 1000 align 12 gran 12 limit 5fff flags 60080102 index 1c
- [SPEW ] PCI: 00:07.3 resource base 4b7c00000 size 1c000000 align 20 gran 20 limit 4d3bfffff flags 60081202 index 24
- [SPEW ] PCI: 00:07.3 resource base ffffffff size 0 align 20 gran 20 limit ffffffff flags 20080202 index 20
- [DEBUG] GENERIC: 1.0
- [DEBUG] NONE
- [SPEW ] NONE resource base 0 size c200000 align 12 gran 12 limit ffffffff flags 200 index 10
- [SPEW ] NONE resource base 4b7c00000 size 1c000000 align 12 gran 12 limit 4d3bfffff flags 40101200 index 14
- [SPEW ] NONE resource base 5000 size 800 align 12 gran 12 limit 57ff flags 40000100 index 18
- [DEBUG] PCI: 00:0d.0 child on link 0 USB0 port 0
- [SPEW ] PCI: 00:0d.0 resource base 806c0000 size 10000 align 16 gran 16 limit 806cffff flags 60000201 index 10
- [DEBUG] USB0 port 0 child on link 0 USB3 port 0
- [DEBUG] USB3 port 0
- [DEBUG] USB3 port 1
- [DEBUG] USB3 port 2
- [DEBUG] USB3 port 3
- [DEBUG] PCI: 00:0d.2
- [SPEW ] PCI: 00:0d.2 resource base 80600000 size 40000 align 18 gran 18 limit 8063ffff flags 60000201 index 10
- [SPEW ] PCI: 00:0d.2 resource base 806e4000 size 1000 align 12 gran 12 limit 806e4fff flags 60000201 index 18
- [DEBUG] PCI: 00:0d.3
- [SPEW ] PCI: 00:0d.3 resource base 80640000 size 40000 align 18 gran 18 limit 8067ffff flags 60000201 index 10
- [SPEW ] PCI: 00:0d.3 resource base 806e5000 size 1000 align 12 gran 12 limit 806e5fff flags 60000201 index 18
- [DEBUG] PCI: 00:14.0 child on link 0 USB0 port 0
- [SPEW ] PCI: 00:14.0 resource base 806d0000 size 10000 align 16 gran 16 limit 806dffff flags 60000201 index 10
- [DEBUG] USB0 port 0 child on link 0 USB2 port 0
- [DEBUG] USB2 port 0
- [DEBUG] USB2 port 1
- [DEBUG] USB2 port 2
- [DEBUG] USB2 port 3
- [DEBUG] USB2 port 4
- [DEBUG] USB2 port 5
- [DEBUG] USB2 port 6
- [DEBUG] USB2 port 7
- [DEBUG] USB2 port 8
- [DEBUG] USB2 port 9
- [DEBUG] USB3 port 0
- [DEBUG] USB3 port 1
- [DEBUG] USB3 port 2
- [DEBUG] USB3 port 3
- [DEBUG] PCI: 00:14.2
- [DEBUG] PCI: 00:15.0
- [SPEW ] PCI: 00:15.0 resource base 806e6000 size 1000 align 12 gran 12 limit 806e6fff flags 60000201 index 10
- [DEBUG] PCI: 00:15.1 child on link 0 I2C: 00:36
- [SPEW ] PCI: 00:15.1 resource base 806e7000 size 1000 align 12 gran 12 limit 806e7fff flags 60000201 index 10
- [DEBUG] I2C: 00:36
- [DEBUG] I2C: 00:0c
- [DEBUG] PCI: 00:15.2
- [SPEW ] PCI: 00:15.2 resource base 806e8000 size 1000 align 12 gran 12 limit 806e8fff flags 60000201 index 10
- [DEBUG] PCI: 00:15.3
- [SPEW ] PCI: 00:15.3 resource base 806e9000 size 1000 align 12 gran 12 limit 806e9fff flags 60000201 index 10
- [DEBUG] PCI: 00:16.0
- [SPEW ] PCI: 00:16.0 resource base 806ea000 size 1000 align 12 gran 12 limit 806eafff flags 60000201 index 10
- [DEBUG] PCI: 00:19.0
- [DEBUG] PCI: 00:19.1 child on link 0 I2C: 00:36
- [SPEW ] PCI: 00:19.1 resource base 806eb000 size 1000 align 12 gran 12 limit 806ebfff flags 60000201 index 10
- [DEBUG] I2C: 00:36
- [DEBUG] PCI: 00:1e.0
- [SPEW ] PCI: 00:1e.0 resource base 806ec000 size 1000 align 12 gran 12 limit 806ecfff flags 60000201 index 10
- [SPEW ] PCI: 00:1e.0 resource base 806ed000 size 1000 align 12 gran 12 limit 806edfff flags 60000201 index 18
- [DEBUG] PCI: 00:1e.2
- [SPEW ] PCI: 00:1e.2 resource base 806ee000 size 1000 align 12 gran 12 limit 806eefff flags 60000201 index 10
- [DEBUG] PCI: 00:1e.3 child on link 0 SPI: 00
- [SPEW ] PCI: 00:1e.3 resource base 806ef000 size 1000 align 12 gran 12 limit 806effff flags 60000201 index 10
- [DEBUG] SPI: 00
- [DEBUG] PCI: 00:1f.0
- [SPEW ] PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
- [SPEW ] PCI: 00:1f.0 resource base 800 size 100 align 0 gran 0 limit 0 flags c0000100 index 84
- [SPEW ] PCI: 00:1f.0 resource base 200 size 10 align 0 gran 0 limit 0 flags c0000100 index 88
- [SPEW ] PCI: 00:1f.0 resource base 900 size 100 align 0 gran 0 limit 0 flags c0000100 index 8c
- [SPEW ] PCI: 00:1f.0 resource base 80 size 10 align 0 gran 0 limit 0 flags c0000100 index 90
- [SPEW ] PCI: 00:1f.0 resource base fe0b0000 size 10000 align 0 gran 0 limit 0 flags d0000200 index 98
- [DEBUG] PCI: 00:1f.2
- [SPEW ] PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 10
- [SPEW ] PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
- [DEBUG] PCI: 00:1f.3 child on link 0 GENERIC: 0.0
- [SPEW ] PCI: 00:1f.3 resource base 806e0000 size 4000 align 14 gran 14 limit 806e3fff flags 60000201 index 10
- [SPEW ] PCI: 00:1f.3 resource base 80500000 size 100000 align 20 gran 20 limit 805fffff flags 60000201 index 20
- [DEBUG] GENERIC: 0.0 child on link 0 GENERIC: 0.1
- [DEBUG] GENERIC: 0.1
- [DEBUG] PCI: 00:1f.4
- [SPEW ] PCI: 00:1f.4 resource base 806f1000 size 100 align 12 gran 8 limit 806f10ff flags 60000201 index 10
- [SPEW ] PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
- [DEBUG] PCI: 00:1f.5
- [SPEW ] PCI: 00:1f.5 resource base 806f0000 size 1000 align 12 gran 12 limit 806f0fff flags 60000200 index 10
- [SPEW ] PCI: 00:1f.5 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags f0000200 index 0
- [SPEW ] PCI: 00:1f.5 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 1
- [DEBUG] PCI: 00:1f.6
- [SPEW ] PCI: 00:1f.6 resource base 806a0000 size 20000 align 17 gran 17 limit 806bffff flags 60000200 index 10
- [DEBUG] MMIO: fed40000
- [INFO ] Done allocating resources.
- [DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 13 / 4764 ms
- [INFO ] coreboot skipped calling FSP notify phase: 00000020.
- [DEBUG] BS: BS_DEV_ENABLE entry times (exec / console): 0 / 6 ms
- [INFO ] POST: 0x74
- [INFO ] Enabling resources...
- [DEBUG] PCI: 00:00.0 subsystem <- 8086/4641
- [DEBUG] PCI: 00:00.0 cmd <- 06
- [DEBUG] PCI: 00:02.0 subsystem <- 8086/46a6
- [DEBUG] PCI: 00:02.0 cmd <- 03
- [DEBUG] PCI: 00:04.0 subsystem <- 8086/461d
- [DEBUG] PCI: 00:04.0 cmd <- 02
- [DEBUG] PCI: 00:05.0 bridge ctrl <- 0003
- [DEBUG] PCI: 00:05.0 subsystem <- 8086/465d
- [DEBUG] PCI: 00:05.0 cmd <- 02
- [DEBUG] PCI: 00:06.0 bridge ctrl <- 0013
- [DEBUG] PCI: 00:06.0 subsystem <- 8086/464d
- [DEBUG] PCI: 00:06.0 cmd <- 106
- [DEBUG] PCI: 00:07.0 bridge ctrl <- 0013
- [DEBUG] PCI: 00:07.0 cmd <- 07
- [DEBUG] PCI: 00:07.1 bridge ctrl <- 0013
- [DEBUG] PCI: 00:07.1 cmd <- 07
- [DEBUG] PCI: 00:07.2 bridge ctrl <- 0013
- [DEBUG] PCI: 00:07.2 cmd <- 07
- [DEBUG] PCI: 00:07.3 bridge ctrl <- 0013
- [DEBUG] PCI: 00:07.3 cmd <- 07
- [DEBUG] PCI: 00:0d.0 subsystem <- 8086/461e
- [DEBUG] PCI: 00:0d.0 cmd <- 02
- [DEBUG] PCI: 00:0d.2 subsystem <- 8086/463e
- [DEBUG] PCI: 00:0d.2 cmd <- 02
- [DEBUG] PCI: 00:0d.3 subsystem <- 8086/466d
- [DEBUG] PCI: 00:0d.3 cmd <- 02
- [DEBUG] PCI: 00:14.0 subsystem <- 8086/51ed
- [DEBUG] PCI: 00:14.0 cmd <- 02
- [DEBUG] PCI: 00:15.0 subsystem <- 8086/51e8
- [DEBUG] PCI: 00:15.0 cmd <- 02
- [DEBUG] PCI: 00:15.1 subsystem <- 8086/51e9
- [DEBUG] PCI: 00:15.1 cmd <- 02
- [DEBUG] PCI: 00:15.2 subsystem <- 8086/51ea
- [DEBUG] PCI: 00:15.2 cmd <- 02
- [DEBUG] PCI: 00:15.3 subsystem <- 8086/51eb
- [DEBUG] PCI: 00:15.3 cmd <- 02
- [DEBUG] PCI: 00:16.0 subsystem <- 8086/51e0
- [DEBUG] PCI: 00:16.0 cmd <- 06
- [DEBUG] PCI: 00:19.1 subsystem <- 8086/51c6
- [DEBUG] PCI: 00:19.1 cmd <- 02
- [DEBUG] PCI: 00:1e.0 subsystem <- 8086/51a8
- [DEBUG] PCI: 00:1e.0 cmd <- 02
- [DEBUG] PCI: 00:1e.2 subsystem <- 8086/51aa
- [DEBUG] PCI: 00:1e.2 cmd <- 02
- [DEBUG] PCI: 00:1e.3 subsystem <- 8086/51ab
- [DEBUG] PCI: 00:1e.3 cmd <- 06
- [DEBUG] PCI: 00:1f.0 subsystem <- 8086/5182
- [DEBUG] PCI: 00:1f.0 cmd <- 407
- [DEBUG] PCI: 00:1f.3 subsystem <- 8086/51c8
- [DEBUG] PCI: 00:1f.3 cmd <- 02
- [DEBUG] PCI: 00:1f.4 subsystem <- 8086/51a3
- [DEBUG] PCI: 00:1f.4 cmd <- 03
- [DEBUG] PCI: 00:1f.5 subsystem <- 8086/51a4
- [DEBUG] PCI: 00:1f.5 cmd <- 406
- [DEBUG] PCI: 00:1f.6 subsystem <- 8086/1a1f
- [DEBUG] PCI: 00:1f.6 cmd <- 02
- [DEBUG] PCI: 01:00.0 cmd <- 02
- [INFO ] done.
- [DEBUG] BS: BS_DEV_ENABLE run times (exec / console): 7 / 239 ms
- [INFO ] POST: 0x00
- [DEBUG] ME: Version: 16.1.25.2124
- [DEBUG] BS: BS_DEV_ENABLE exit times (exec / console): 3 / 6 ms
- [INFO ] POST: 0x75
- [INFO ] Initializing devices...
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [DEBUG] PCI: 00:00.0 init
- [INFO ] CPU TDP = 28 Watts
- [INFO ] CPU PL1 = 28 Watts
- [INFO ] CPU PL2 = 64 Watts
- [INFO ] CPU PL4 = 140 Watts
- [DEBUG] PCI: 00:00.0 init finished in 12 msecs
- [INFO ] POST: 0x75
- [DEBUG] PCI: 00:02.0 init
- [INFO ] CBFS: Found 'vbt.bin' @0x351fc0 size 0x4f4 in mcache @0x76abd298
- [INFO ] Found a VBT of 9216 bytes after decompression
- [INFO ] GMA: Found VBT in CBFS
- [INFO ] GMA: Found valid VBT in CBFS
- [DEBUG] PCI: 00:02.0 init finished in 1086 msecs
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [DEBUG] PCI: 00:06.0 init
- [DEBUG] Initializing PCH PCIe bridge.
- [DEBUG] PCI: 00:06.0 init finished in 4 msecs
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [DEBUG] PCI: 00:14.0 init
- [DEBUG] PCI: 00:14.0 init finished in 0 msecs
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [DEBUG] PCI: 00:15.0 init
- [DEBUG] I2C bus 0 version 0x3230302a
- [INFO ] DW I2C bus 0 at 0x806e6000 (400 KHz)
- [DEBUG] PCI: 00:15.0 init finished in 8 msecs
- [INFO ] POST: 0x75
- [DEBUG] PCI: 00:15.1 init
- [DEBUG] I2C bus 1 version 0x3230302a
- [INFO ] DW I2C bus 1 at 0x806e7000 (400 KHz)
- [DEBUG] PCI: 00:15.1 init finished in 8 msecs
- [INFO ] POST: 0x75
- [DEBUG] PCI: 00:15.2 init
- [DEBUG] I2C bus 2 version 0x3230302a
- [INFO ] DW I2C bus 2 at 0x806e8000 (400 KHz)
- [DEBUG] PCI: 00:15.2 init finished in 8 msecs
- [INFO ] POST: 0x75
- [DEBUG] PCI: 00:15.3 init
- [DEBUG] I2C bus 3 version 0x3230302a
- [INFO ] DW I2C bus 3 at 0x806e9000 (400 KHz)
- [DEBUG] PCI: 00:15.3 init finished in 8 msecs
- [INFO ] POST: 0x75
- [DEBUG] PCI: 00:16.0 init
- [DEBUG] PCI: 00:16.0 init finished in 0 msecs
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [DEBUG] PCI: 00:19.1 init
- [DEBUG] I2C bus 5 version 0x3230302a
- [INFO ] DW I2C bus 5 at 0x806eb000 (400 KHz)
- [DEBUG] PCI: 00:19.1 init finished in 8 msecs
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [DEBUG] PCI: 00:1f.0 init
- [DEBUG] IOAPIC: Initializing IOAPIC at 0xfec00000
- [DEBUG] IOAPIC: ID = 0x00
- [SPEW ] IOAPIC: Dumping registers
- [SPEW ] reg 0x0000: 0x02000000
- [SPEW ] reg 0x0001: 0x00770020
- [SPEW ] reg 0x0002: 0x00000000
- [DEBUG] IOAPIC: 120 interrupts
- [DEBUG] IOAPIC: Clearing IOAPIC at 0xfec00000
- [SPEW ] IOAPIC: vector 0x00 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x01 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x02 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x03 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x04 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x05 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x06 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x07 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x08 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x09 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x0a value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x0b value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x0c value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x0d value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x0e value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x0f value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x10 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x11 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x12 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x13 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x14 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x15 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x16 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x17 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x18 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x19 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x1a value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x1b value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x1c value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x1d value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x1e value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x1f value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x20 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x21 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x22 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x23 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x24 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x25 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x26 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x27 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x28 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x29 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x2a value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x2b value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x2c value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x2d value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x2e value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x2f value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x30 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x31 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x32 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x33 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x34 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x35 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x36 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x37 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x38 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x39 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x3a value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x3b value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x3c value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x3d value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x3e value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x3f value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x40 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x41 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x42 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x43 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x44 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x45 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x46 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x47 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x48 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x49 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x4a value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x4b value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x4c value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x4d value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x4e value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x4f value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x50 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x51 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x52 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x53 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x54 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x55 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x56 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x57 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x58 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x59 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x5a value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x5b value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x5c value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x5d value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x5e value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x5f value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x60 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x61 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x62 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x63 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x64 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x65 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x66 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x67 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x68 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x69 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x6a value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x6b value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x6c value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x6d value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x6e value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x6f value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x70 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x71 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x72 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x73 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x74 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x75 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x76 value 0x00000000 0x00010000
- [SPEW ] IOAPIC: vector 0x77 value 0x00000000 0x00010000
- [DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00
- [SPEW ] IOAPIC: vector 0x00 value 0x00000000 0x00000700
- [DEBUG] PCI: 00:1f.0 init finished in 725 msecs
- [INFO ] POST: 0x75
- [DEBUG] PCI: 00:1f.2 init
- [DEBUG] apm_control: Disabling ACPI.
- [DEBUG] APMC done.
- [DEBUG] PCI: 00:1f.2 init finished in 6 msecs
- [INFO ] POST: 0x75
- [DEBUG] PCI: 00:1f.3 init
- [DEBUG] PCI: 00:1f.3 init finished in 0 msecs
- [INFO ] POST: 0x75
- [DEBUG] PCI: 00:1f.4 init
- [DEBUG] PCI: 00:1f.4 init finished in 0 msecs
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [DEBUG] PCI: 00:1f.6 init
- [DEBUG] PCI: 00:1f.6 init finished in 0 msecs
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [DEBUG] PCI: 01:00.0 init
- [DEBUG] PCI: 01:00.0 init finished in 0 msecs
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] POST: 0x75
- [INFO ] Devices initialized
- [SPEW ] Show all devs... After init.
- [SPEW ] Root Device: enabled 1
- [SPEW ] CPU_CLUSTER: 0: enabled 1
- [SPEW ] DOMAIN: 0000: enabled 1
- [SPEW ] MMIO: fed40000: enabled 1
- [SPEW ] GPIO: 0: enabled 1
- [SPEW ] PCI: 00:00.0: enabled 1
- [SPEW ] PCI: 00:01.0: enabled 0
- [SPEW ] PCI: 00:01.1: enabled 0
- [SPEW ] PCI: 00:02.0: enabled 1
- [SPEW ] PCI: 00:04.0: enabled 1
- [SPEW ] PCI: 00:05.0: enabled 1
- [SPEW ] PCI: 00:06.0: enabled 1
- [SPEW ] PCI: 00:06.2: enabled 0
- [SPEW ] PCI: 00:07.0: enabled 1
- [SPEW ] PCI: 00:07.1: enabled 1
- [SPEW ] PCI: 00:07.2: enabled 1
- [SPEW ] PCI: 00:07.3: enabled 1
- [SPEW ] PCI: 00:08.0: enabled 0
- [SPEW ] PCI: 00:09.0: enabled 0
- [SPEW ] PCI: 00:0a.0: enabled 0
- [SPEW ] PCI: 00:0d.0: enabled 1
- [SPEW ] PCI: 00:0d.1: enabled 0
- [SPEW ] PCI: 00:0d.2: enabled 1
- [SPEW ] PCI: 00:0d.3: enabled 1
- [SPEW ] PCI: 00:0e.0: enabled 0
- [SPEW ] PCI: 00:10.0: enabled 0
- [SPEW ] PCI: 00:10.1: enabled 0
- [SPEW ] PCI: 00:10.6: enabled 0
- [SPEW ] PCI: 00:10.7: enabled 0
- [SPEW ] PCI: 00:12.0: enabled 0
- [SPEW ] PCI: 00:12.6: enabled 0
- [SPEW ] PCI: 00:12.7: enabled 0
- [SPEW ] PCI: 00:13.0: enabled 0
- [SPEW ] PCI: 00:14.0: enabled 1
- [SPEW ] PCI: 00:14.1: enabled 0
- [SPEW ] PCI: 00:14.2: enabled 0
- [SPEW ] PCI: 00:14.3: enabled 0
- [SPEW ] PCI: 00:15.0: enabled 1
- [SPEW ] PCI: 00:15.1: enabled 1
- [SPEW ] PCI: 00:15.2: enabled 1
- [SPEW ] PCI: 00:15.3: enabled 1
- [SPEW ] PCI: 00:16.0: enabled 1
- [SPEW ] PCI: 00:16.1: enabled 0
- [SPEW ] PCI: 00:16.2: enabled 0
- [SPEW ] PCI: 00:16.3: enabled 0
- [SPEW ] PCI: 00:16.4: enabled 0
- [SPEW ] PCI: 00:16.5: enabled 0
- [SPEW ] PCI: 00:17.0: enabled 0
- [SPEW ] PCI: 00:19.0: enabled 0
- [SPEW ] PCI: 00:19.1: enabled 1
- [SPEW ] PCI: 00:19.2: enabled 0
- [SPEW ] PCI: 00:1a.0: enabled 0
- [SPEW ] PCI: 00:1c.0: enabled 0
- [SPEW ] PCI: 00:1c.1: enabled 0
- [SPEW ] PCI: 00:1c.2: enabled 0
- [SPEW ] PCI: 00:1c.3: enabled 0
- [SPEW ] PCI: 00:1c.4: enabled 1
- [SPEW ] PCI: 00:1c.5: enabled 1
- [SPEW ] PCI: 00:1c.6: enabled 0
- [SPEW ] PCI: 00:1c.7: enabled 1
- [SPEW ] PCI: 00:1d.0: enabled 1
- [SPEW ] PCI: 00:1d.1: enabled 0
- [SPEW ] PCI: 00:1d.2: enabled 1
- [SPEW ] PCI: 00:1d.3: enabled 0
- [SPEW ] PCI: 00:1e.0: enabled 1
- [SPEW ] PCI: 00:1e.1: enabled 0
- [SPEW ] PCI: 00:1e.2: enabled 1
- [SPEW ] PCI: 00:1e.3: enabled 1
- [SPEW ] PCI: 00:1f.0: enabled 1
- [SPEW ] PCI: 00:1f.1: enabled 0
- [SPEW ] PCI: 00:1f.2: enabled 1
- [SPEW ] PCI: 00:1f.3: enabled 1
- [SPEW ] PCI: 00:1f.4: enabled 1
- [SPEW ] PCI: 00:1f.5: enabled 1
- [SPEW ] PCI: 00:1f.6: enabled 1
- [SPEW ] PCI: 00:1f.7: enabled 0
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] GENERIC: 1.0: enabled 1
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] GENERIC: 1.0: enabled 1
- [SPEW ] USB0 port 0: enabled 0
- [SPEW ] USB0 port 0: enabled 1
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] I2C: 00:36: enabled 1
- [SPEW ] I2C: 00:0c: enabled 1
- [SPEW ] I2C: 00:36: enabled 1
- [SPEW ] SPI: 00: enabled 1
- [SPEW ] GENERIC: 0.0: enabled 1
- [SPEW ] USB3 port 0: enabled 0
- [SPEW ] USB3 port 1: enabled 0
- [SPEW ] USB3 port 2: enabled 0
- [SPEW ] USB3 port 3: enabled 0
- [SPEW ] USB2 port 0: enabled 0
- [SPEW ] USB2 port 1: enabled 0
- [SPEW ] USB2 port 2: enabled 0
- [SPEW ] USB2 port 3: enabled 0
- [SPEW ] USB2 port 4: enabled 0
- [SPEW ] USB2 port 5: enabled 0
- [SPEW ] USB2 port 6: enabled 0
- [SPEW ] USB2 port 7: enabled 0
- [SPEW ] USB2 port 8: enabled 0
- [SPEW ] USB2 port 9: enabled 1
- [SPEW ] USB3 port 0: enabled 0
- [SPEW ] USB3 port 1: enabled 0
- [SPEW ] USB3 port 2: enabled 0
- [SPEW ] USB3 port 3: enabled 0
- [SPEW ] GENERIC: 0.1: enabled 1
- [SPEW ] APIC: 00: enabled 1
- [SPEW ] APIC: 36: enabled 1
- [SPEW ] APIC: 3c: enabled 1
- [SPEW ] APIC: 30: enabled 1
- [SPEW ] APIC: 3e: enabled 1
- [SPEW ] APIC: 32: enabled 1
- [SPEW ] APIC: 38: enabled 1
- [SPEW ] APIC: 08: enabled 1
- [SPEW ] APIC: 34: enabled 1
- [SPEW ] APIC: 3a: enabled 1
- [SPEW ] APIC: 01: enabled 1
- [SPEW ] APIC: 09: enabled 1
- [SPEW ] APIC: 11: enabled 1
- [SPEW ] APIC: 21: enabled 1
- [SPEW ] APIC: 10: enabled 1
- [SPEW ] APIC: 20: enabled 1
- [SPEW ] APIC: 28: enabled 1
- [SPEW ] APIC: 29: enabled 1
- [SPEW ] APIC: 19: enabled 1
- [SPEW ] APIC: 18: enabled 1
- [SPEW ] PCI: 01:00.0: enabled 1
- [SPEW ] NONE: enabled 1
- [SPEW ] NONE: enabled 1
- [SPEW ] NONE: enabled 1
- [SPEW ] NONE: enabled 1
- [DEBUG] BS: BS_DEV_INIT run times (exec / console): 1071 / 1644 ms
- [DEBUG] FMAP: area SMMSTORE found @ 1910000 (262144 bytes)
- [INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
- [DEBUG] smm store: 4 # blocks with size 0x10000
- [INFO ] SMMSTORE: Setting up SMI handler
- [DEBUG] BS: BS_DEV_INIT exit times (exec / console): 0 / 22 ms
- [INFO ] POST: 0x76
- [INFO ] Finalize devices...
- [DEBUG] PCI: 00:02.0 final
- [DEBUG] PCI: 00:16.0 final
- [DEBUG] PCI: 00:1f.2 final
- [DEBUG] PCI: 00:1f.4 final
- [INFO ] Devices finalized
- [DEBUG] BS: BS_POST_DEVICE run times (exec / console): 1 / 21 ms
- [INFO ] POST: 0x77
- [DEBUG] BS: BS_OS_RESUME_CHECK run times (exec / console): 0 / 2 ms
- [DEBUG] ME: HFSTS1 : 0x90000255
- [DEBUG] ME: HFSTS2 : 0x30850106
- [DEBUG] ME: HFSTS3 : 0x00000020
- [DEBUG] ME: HFSTS4 : 0x00004004
- [DEBUG] ME: HFSTS5 : 0x00000000
- [DEBUG] ME: HFSTS6 : 0x00400002
- [DEBUG] ME: Manufacturing Mode : YES
- [DEBUG] ME: SPI Protection Mode Enabled : NO
- [DEBUG] ME: FW Partition Table : OK
- [DEBUG] ME: Bringup Loader Failure : NO
- [DEBUG] ME: Firmware Init Complete : YES
- [DEBUG] ME: Boot Options Present : NO
- [DEBUG] ME: Update In Progress : NO
- [DEBUG] ME: D0i3 Support : YES
- [DEBUG] ME: Low Power State Enabled : NO
- [DEBUG] ME: CPU Replaced : NO
- [DEBUG] ME: CPU Replacement Valid : YES
- [DEBUG] ME: Current Working State : 5
- [DEBUG] ME: Current Operation State : 1
- [DEBUG] ME: Current Operation Mode : 0
- [DEBUG] ME: Error Code : 0
- [DEBUG] ME: FPFs Committed : NO
- [DEBUG] ME: Enhanced Debug Mode : NO
- [DEBUG] ME: CPU Debug Disabled : YES
- [DEBUG] ME: TXT Support : NO
- [DEBUG] ME: Manufacturing Vars Locked : NO
- [DEBUG] BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 127 ms
- [INFO ] POST: 0x79
- [INFO ] POST: 0x9c
- [INFO ] CBFS: Found 'fallback/dsdt.aml' @0x16d780 size 0x4227 in mcache @0x76abd1f8
- [WARN ] CBFS: 'fallback/slic' not found.
- [INFO ] ACPI: Writing ACPI tables at 7693c000.
- [DEBUG] ACPI: * FACS
- [DEBUG] SCI is IRQ 9, GSI 9
- [DEBUG] ACPI: * FACP
- [DEBUG] ACPI: added table 1/32, length now 44
- [DEBUG] Found 1 CPU(s) with 14/20 physical/logical core(s) each.
- [DEBUG] PCI space above 4GB MMIO is at 0x47fc00000, len = 0x3ffb80400000
- [WARN ] Unknown min d_state for PCI: 00:04.0
- [WARN ] Unknown min d_state for PCI: 00:1f.4
- [WARN ] Unknown min d_state for PCI: 00:04.0
- [WARN ] Unknown min d_state for PCI: 00:1f.4
- [INFO ] \_SB.PCI0.PEPD: Intel Power Engine Plug-in
- [INFO ] \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:1f.2
- [INFO ] \_SB.DPTF: Intel DPTF at GENERIC: 0.0
- [INFO ] \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
- [INFO ] \_SB.PCI0.TRP0: Intel USB4 PCIe Root Port at PCI: 00:07.0
- [INFO ] \_SB.PCI0.TRP1: Intel USB4 PCIe Root Port at PCI: 00:07.1
- [INFO ] \_SB.PCI0.TRP2: Intel USB4 PCIe Root Port at PCI: 00:07.2
- [INFO ] \_SB.PCI0.TRP3: Intel USB4 PCIe Root Port at PCI: 00:07.3
- [INFO ] \_SB.PCI0.I2C1.CAM0: Intel MIPI Camera Device I2C address 036h
- [INFO ] \_SB.PCI0.I2C1.VCM0: Intel MIPI Camera Device I2C address 0ch
- [INFO ] \_SB.PCI0.I2C5.CAM1: Intel MIPI Camera Device I2C address 036h
- [INFO ] \_SB.PCI0.SPI1.S002: SPI Device at SPI: 00
- [INFO ] \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
- [DEBUG] ACPI: * SSDT
- [DEBUG] ACPI: added table 2/32, length now 52
- [DEBUG] ACPI: * MCFG
- [DEBUG] ACPI: added table 3/32, length now 60
- [DEBUG] ACPI: * LPIT
- [DEBUG] ACPI: added table 4/32, length now 68
- [DEBUG] IOAPIC: 120 interrupts
- [DEBUG] SCI is IRQ 9, GSI 9
- [DEBUG] ACPI: * APIC
- [DEBUG] ACPI: added table 5/32, length now 76
- [DEBUG] ACPI: * SPCR
- [DEBUG] ACPI: added table 6/32, length now 84
- [DEBUG] current = 76945ec0
- [DEBUG] ACPI: * DMAR
- [DEBUG] ACPI: added table 7/32, length now 92
- [DEBUG] acpi_write_dbg2_pci_uart: Device not found
- [DEBUG] ACPI: * HPET
- [DEBUG] ACPI: added table 8/32, length now 100
- [INFO ] ACPI: done.
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