//*****************************************************************************
// COMPANY : VALEO CDA/CIC/INTERIOR SWITCHES AND SMART CONTROLS
//
// PROJECT  : ISC_STD:LMPK_DEMTP_DEV
//*****************************************************************************
// !File            : S32.icf
//
// !Description     :
//   Specific linker file directive for no OS projects.
//
//
// !COPYRIGHT 2014 VALEO CDA/CIC/ISC
// All rights reserved
//*****************************************************************************
// EVOLUTIONS (automatic update under DIMENSIONS)
// Current revision : %PR%
//*****************************************************************************
// EVOLUTIONS (automatic update under DIMENSIONS)
//*****************************************************************************
// %PL%
// %PCMS_HEADER_SUBSTITUTION_END%
//*****************************************************************************
//******************************************************************************
//
//   Freescale(TM) and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
//   All other product or service names are the property of their respective owners.
//   (c) Copyright 2012 - 2015 Freescale Semiconductor Inc.
//   All Rights Reserved.
//
//   You can use this example for any purpose on any computer system with the
//   following restrictions:
//
//   1. This example is provided as is, without warranty.
//
//   2. You don't remove this copyright notice from this example or any direct derivation
//      thereof.
//
//   Description:  IAR linker command file for S32
//
//******************************************************************************


/**************************************/
/* SYMBOLS DEFINITION */
/**************************************/
define symbol __intvec_start__ = 0x00000000;  //Fixed address

/*-Sizes-*/
define symbol __ROM1_start__ = 0x00000000;
define symbol __ROM1_end__   = 0x000003ff;
define symbol __ROM2_start__ = 0x00000410;
define symbol __ROM2_end__   = 0x0003FFFF;
define symbol __RAM_start__  = 0x1FFFFC00 ;
define symbol __RAM_end__    = 0x200057FF ;

define symbol __cstack_size__ = 0x800 ;

/**********************/
/* DEFINE MEMORY SIZE */
/**********************/
define memory mem with size = 1G;

/**********************/
/* REGIONS DEFINITION */
/**********************/
define region ROM_region   =   mem:[from __ROM1_start__ to __ROM1_end__]
                              | mem:[from __ROM2_start__ to __ROM2_end__];
define region RAM_region   =   mem:[from __RAM_start__ to __RAM_end__];

/*********************/
/* BLOCKS DEFINITION */
/*********************/
define block CSTACK    with alignment = 8, size = __cstack_size__   { rw section CSTACK };
define block RamCode   with alignment = 8, size = 0x1E2 {rw section .ramcode};
define block ResetCauseCode with size = 2 {rw section RESET_CAUSE_CODE_N};

/**************************************/
/* SECTIONS INITIALIZATION ATTRIBUTION*/
/**************************************/
initialize by copy { readwrite };  //Data segment initialization by coping from ROM to RAM

do not initialize   { zeroinit};   //No initialization for BSS segment

/*********************/
/* MEMORY ALLOCATION */
/*********************/
place at address mem:__intvec_start__ { readonly section .OS_INTVEC_CORE0_CONST };
place in ROM_region  { readonly, ro section .CSTARTUP, ro section .text };
place in RAM_region  { readwrite, block CSTACK, section .bss };
place at address mem:0x20005500 { block RamCode };
place at address mem:0x200057fe { block ResetCauseCode };