// arith_machine: execute a series of arithmetic instructions from an instruction cache
//
// except (output) - set to 1 when an unrecognized instruction is to be executed.
// clock  (input)  - the clock signal
// reset  (input)  - set to 1 to set all registers to zero, set to 0 for normal execution.

module arith_machine(except, clock, reset);
    output      except;
    input       clock, reset;

    wire [31:0] inst;
    wire [31:0] PC;
    wire [31:0] nextPC = 32'b00;

    // DO NOT comment out or rename this module
    // or the test bench will break
    register #(32) PC_reg(PC, nextPC, clock, 1'b1, reset);
    alu32 pcplus4(nextPC, , , , PC, 32’h4,`ALU_ADD);

    // DO NOT comment out or rename this module
    // or the test bench will break
    instruction_memory im(inst, PC[31:2]);

    wire alu_src2, rd_src, writeenable, [2:0] alu_op;
    mips_decode decode(alu_src2, rd_src, writeenable, alu_op, except, inst[31:26], inst[5:0]);

    // DO NOT comment out or rename this module
    // or the test bench will break
    wire [31:0] A_Data, [31:0] B_Data, [31:0] B;
    mux2v m(out[31:16], zeroes, ones, negative);
    regfile rf (  );

    /* add other modules */

endmodule // arith_machine

module sign_extender(out, in);
    output      [31:0] out;
    input       [15:0] in;
    wire [15:0] ones = 16'b1;
    wire [15:0] zeroes = 16'b0;

    assign negative = (in[15] == 1);
    mux2v m(out[31:16], zeroes, ones, negative);
    assign out[15:0] = in[15:0];
endmodule