module senzor (output reg out_senzor,
               input clock,start);

always @(posedge clock)
begin
if(start==0)
out_senzor<=1;
else
out_senzor<=0;
end
endmodule


module ram(output [3:0] dataOut1,dataOut2,
           input clock,we,
			  input addr_W,
			  input addr_R1,
			  input addr_R2,
			  input [3:0] dataIn);

reg [1:0] mem [0:3] ;
always @(posedge clock)
begin
if(we==0)
mem[addr_W]<=dataIn;
end
assign dataOut1=mem[addr_R1];
assign dataOut2=mem[addr_R2];
endmodule


module mem_read(output reg out_adresa,)
                input clock,reset);

reg [31:0] count;
always @(posedge clock)
begin
if(reset==0)
begin
cout<=0;
out_adresa<=0;
end
else
count<=count+1;

if(count==49999999)
out_adresa<=1;
else
if(count==99999999)
begin
out_adresa<=0;
count<=0;
end
end
endmoule


module control ( output [2:0] bias,
                 output up_down,
					  input [3:0] in_dO2);

assign up_down=in_dO2[3];
assign bias=in_dO2[2:0];
endmodule