self.usart.brr.write(|w| unsafe {w.bits(0x2541B4DBF)});


unsafe {
    asm!("" ::: "memory");}
// This is a compiler fence to prevent re-ordering of memory access in C
// Ensure the s->usart is assigned before enabling interrupts

// Driver enable mode (user can activate external transceiver via DE line)
self.usart.cr3.write(|w| w.dem().set_bit());

// When this bit is cleared the chip is stopped
self.usart.cr1.write(|w| w.ue().clear_bit());