YM2413 test data

YM2413 test data output format(!!not verified on hardware!!).
/CS = 0
/WE = 1
A0  = 0
D0 and D1 serially output test data with internal clock rate
Internal clock rate is MCLK/4
Clock 0  1  2  3  4  5  6  7  8  9  10 11 12 13 14 15 16 17
D0:   P8 P7 P6 P5 P4 P3 P2 P1 P0 E6 E5 E4 E2 E1 E0 0  0  0
D1:   C8 C7 C6 C5 C4 C3 C2 C1 C0 0  0  0  0  0  0  0  0  0

Px - Operator 0 phase generator output LSB bits
Ex - Operator 17 envelope generator output
Cx - Channel 6(?) output