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- coreboot-4.0-1815-gb9da3cd-dirty Fri Oct 28 13:26:09 PDT 2011 starting...
- *sysinfo range: [000cf000,000cf730]
- bsp_apicid=00
- Enabling routing table for node 00 done.
- Enabling SMP settings
- (0,1) link=00
- (1,0) link=02
- setup_remote_node: done
- Renaming current temporary node to 01 done.
- Enabling routing table for node 01 done.
- 02 nodes initialized.
- coherent_ht_finalize
- done
- core0 started: 01
- started ap apicid: * AP 01started
- * AP 03started
- SBLink=01
- NC node|link=01
- NC node|link=02
- busn=40
- entering optimize_link_incoherent_ht
- sysinfo->link_pair_num=0x2
- entering ht_optimize_link
- pos=0xaa, unfiltered freq_cap=0x8075
- pos=0xaa, filtered freq_cap=0x75
- pos=0x52, unfiltered freq_cap=0x7f
- pos=0x52, filtered freq_cap=0x7f
- freq_cap1=0x75, freq_cap2=0x7f
- dev1 old_freq=0x6, freq=0x6, needs_reset=0x0
- dev2 old_freq=0x6, freq=0x6, needs_reset=0x0
- width_cap1=0x11, width_cap2=0x11
- dev1 input ln_width1=0x4, ln_width2=0x4
- dev1 input width=0x1
- dev1 output ln_width1=0x4, ln_width2=0x4
- dev1 input|output width=0x11
- old dev1 input|output width=0x11
- dev2 input|output width=0x11
- old dev2 input|output width=0x11
- after ht_optimize_link for link pair 0, reset_needed=0x0
- entering ht_optimize_link
- pos=0xca, unfiltered freq_cap=0x8075
- pos=0xca, filtered freq_cap=0x75
- pos=0x52, unfiltered freq_cap=0x7f
- pos=0x52, filtered freq_cap=0x7f
- freq_cap1=0x75, freq_cap2=0x7f
- dev1 old_freq=0x6, freq=0x6, needs_reset=0x0
- dev2 old_freq=0x6, freq=0x6, needs_reset=0x0
- width_cap1=0x11, width_cap2=0x11
- dev1 input ln_width1=0x4, ln_width2=0x4
- dev1 input width=0x1
- dev1 output ln_width1=0x4, ln_width2=0x4
- dev1 input|output width=0x11
- old dev1 input|output width=0x11
- dev2 input|output width=0x11
- old dev2 input|output width=0x11
- after ht_optimize_link for link pair 1, reset_needed=0x0
- after optimize_link_read_pointers_chain, reset_needed=0x0
- mcp55_num:01
- ht reset -
- coreboot-4.0-1815-gb9da3cd-dirty Fri Oct 28 13:26:09 PDT 2011 starting...
- *sysinfo range: [000cf000,000cf730]
- bsp_apicid=00
- Enabling routing table for node 00 done.
- Enabling SMP settings
- (0,1) link=00
- (1,0) link=02
- setup_remote_node: done
- Renaming current temporary node to 01 done.
- Enabling routing table for node 01 done.
- 02 nodes initialized.
- coherent_ht_finalize
- done
- core0 started: 01
- started ap apicid: * AP 01started
- * AP 03started
- SBLink=01
- NC node|link=01
- NC node|link=02
- busn=40
- entering optimize_link_incoherent_ht
- sysinfo->link_pair_num=0x2
- entering ht_optimize_link
- pos=0xaa, unfiltered freq_cap=0x8075
- pos=0xaa, filtered freq_cap=0x75
- pos=0x52, unfiltered freq_cap=0x7f
- pos=0x52, filtered freq_cap=0x7f
- freq_cap1=0x75, freq_cap2=0x7f
- dev1 old_freq=0x6, freq=0x6, needs_reset=0x0
- dev2 old_freq=0x6, freq=0x6, needs_reset=0x0
- width_cap1=0x11, width_cap2=0x11
- dev1 input ln_width1=0x4, ln_width2=0x4
- dev1 input width=0x1
- dev1 output ln_width1=0x4, ln_width2=0x4
- dev1 input|output width=0x11
- old dev1 input|output width=0x11
- dev2 input|output width=0x11
- old dev2 input|output width=0x11
- after ht_optimize_link for link pair 0, reset_needed=0x0
- entering ht_optimize_link
- pos=0xca, unfiltered freq_cap=0x8075
- pos=0xca, filtered freq_cap=0x75
- pos=0x52, unfiltered freq_cap=0x7f
- pos=0x52, filtered freq_cap=0x7f
- freq_cap1=0x75, freq_cap2=0x7f
- dev1 old_freq=0x6, freq=0x6, needs_reset=0x0
- dev2 old_freq=0x6, freq=0x6, needs_reset=0x0
- width_cap1=0x11, width_cap2=0x11
- dev1 input ln_width1=0x4, ln_width2=0x4
- dev1 input width=0x1
- dev1 output ln_width1=0x4, ln_width2=0x4
- dev1 input|output width=0x11
- old dev1 input|output width=0x11
- dev2 input|output width=0x11
- old dev2 input|output width=0x11
- after ht_optimize_link for link pair 1, reset_needed=0x0
- after optimize_link_read_pointers_chain, reset_needed=0x0
- mcp55_num:01
- Ram1.00
- setting up CPU 00 northbridge registers
- done.
- Ram1.01
- setting up CPU 01 northbridge registers
- done.
- Ram2.00
- sdram_set_spd_registers: paramx :000cef28
- Enabling dual channel memory
- Registered
- 333MHz
- 333MHz
- Interleaved
- RAM end at 0x00400000 kB
- Ram2.01
- sdram_set_spd_registers: paramx :000cef28
- Enabling dual channel memory
- Registered
- 333MHz
- 333MHz
- Interleaved
- RAM end at 0x00800000 kB
- Ram3
- ECC enabled
- ECC enabled
- Initializing memory: done
- Initializing memory: done
- RAM end at 0x00900000 kB
- set DQS timing:RcvrEn:Pass1: 00
- done
- set DQS timing:DQSPos: 00
- TrainDQSRdWrPos: buf_a:000ce9a0
- TrainDQSPos: MutualCSPassW[48] :000ce878
- TrainDQSPos: MutualCSPassW[48] :000ce878
- TrainDQSPos: MutualCSPassW[48] :000ce878
- TrainDQSPos: MutualCSPassW[48] :000ce878
- TrainDQSPos: MutualCSPassW[48] :000ce878
- TrainDQSPos: MutualCSPassW[48] :000ce878
- TrainDQSPos: MutualCSPassW[48] :000ce888
- TrainDQSPos: MutualCSPassW[48] :000ce878
- TrainDQSPos: MutualCSPassW[48] :000ce878
- TrainDQSPos: MutualCSPassW[48] :000ce878
- TrainDQSPos: MutualCSPassW[48] :000ce878
- TrainDQSPos: MutualCSPassW[48] :000ce878
- TrainDQSPos: MutualCSPassW[48] :000ce878
- TrainDQSPos: MutualCSPassW[48] :000ce888
- done
- set DQS timing:RcvrEn:Pass2: 00
- done
- Total DQS Training : tsc [00]=0000000552e53b8f
- Total DQS Training : tsc [01]=00000005bbc4d07e
- Total DQS Training : tsc [02]=0000006b02b708c6
- Total DQS Training : tsc [03]=0000006b93194cab
- Ram4
- v_esp=000cef68
- testx = 5a5a5a5a
- Copying data from cache to RAM -- switching to use RAM as stack... Done
- testx = 5a5a5a5a
- Disabling cache as ram now
- Clearing initial memory region: Done
- INIT detected from --- { APICID = 00 NODEID = 00 COREID = 00} ---
- Issuing SOFT_RESET...
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