/*
Name: main.S
Project: d_sema
Author: JCSilva
Creation Date: 2016-05-03
Tabsize: 4
Copyright: License: GNU GPL v2 (see License.txt)
This Revision: $Id$
*/

#define __SFR_OFFSET 0
#include <avr/io.h>
#include <avr/eeprom.h>

/*
	EEPROM
*/

/*
	IO Definitions
*/
#define RED		PB0
#define YELLOW	PB1
#define GREEN	PB2


/*
	Constants
*/
#define WDT_CNTEND 15		/* 32 x 2.5s, end count for WDT timeouts */

/* Time system constants */

/*
	Register difinition, use only C-style comments (avr-as is stupid)
*/
; from R0-R15 only direct addressing
#define zero	R0

; from R16-R31 ldi possible
#define wrkreg	R16 		/* working register */
#define wdt_cnt	R17			/* WDT interrupts counter */
#define light_o	R18			/* light output */

/*
	Interrupt Routines
*/
;* Addresses of interrupt routines is defined in io.h (for this processor)
;.global INT0_vect
;.global IO_PINS_vect
;.global TIMER1_COMP_vect
;.global TIMER1_OVF_vect
;.global TIMER0_OVF_vect
;.global EE_RDY_vect
;.global ANA_COMP_vect
;.global ADC_vect

.text

;*
;* Interrupt 0
;*
.global	INT0_vect
INT0_vect:
	reti

;*
;* Pin change interrupt
;*
.global	IO_PINS_vect
IO_PINS_vect:
	reti

;*
;* Interrupt Timer 1 Overflow
;*
.global TIMER1_OVF_vect
TIMER1_OVF_vect:
	reti

;*
;* Interrupt Timer 1 Compare
;*
.global TIMER1_COMP_vect
TIMER1_COMP_vect:
		reti

;*
;* Interrupt Timer 0 Overflow
;*
.global	TIMER0_OVF_vect
TIMER0_OVF_vect:
	reti

;*
;* EEPROM ready interrupt
;*
.global	EE_RDY_vect
EE_RDY_vect:
	reti

;.global ANA_COMP_vect
;*
;* Analog Comparator Interrupt
;*
.global	ANA_COMP_vect
ANA_COMP_vect:
	reti

;*
;* ADC Converter, End of Convertion
;*
.global ADC_vect
ADC_vect:
	reti

;*
;* Main routine
;*
.global main
main:
	in wrkreg, MCUSR		; save MCUSR
	clr zero
	out MCUSR,zero			; clear it for next
	sbrc wrkreg, WDRF		; skip next if not WDReset
	rjmp wdt_rst			; WDT reset, check division
							; from here any other reset

							; calibrate clock speed - not needed
;	ldi ZH, 0x03			; Z -> End of Program memory (pmem)
;	ldi ZL, 0xff
;	lpm						; get calibration byte from pmem(0x3ff)
;	out OSCCAL, R0			; set calibration byte
							; calibrate clock speed - not needed
	clr wdt_cnt				; new activation reset counter
	cpi light_o, 0b00000100	; test if green
	breq next_light
	cpi light_o, 0b00000010	; test if yellow
	breq next_light
set_green:
	ldi light_o,0b00000100	; set light to green
	rjmp out_start
next_light:
	lsr	light_o				; set next light
out_start:
	mov wrkreg,light_o
	com wrkreg
	andi wrkreg,0b00000111
	out PORTB, wrkreg		; set light output
	out DDRB, light_o
	ldi wrkreg, 0x0F		; Enable WDT, reset in 2048K cycles
	out WDTCR, wrkreg

go_sleep:
	ldi wrkreg, 0x30		; Enable Pull Up, Sleep enable, Power Down mode
	out MCUCR, wrkreg
	sleep					; else wait for next WDT interrupt
	nop

wdt_rst:
	inc wdt_cnt				; increment wdt_reset_counter
	cpi wdt_cnt,WDT_CNTEND	; check number of WDT resets
	breq go_sleep
	rjmp out_start

.section .eeprom
	.org 0x00
	.ds 1
	.byte 0xAA
	.byte 0x55
.end