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MrRockchip

g505s uefi getpir

MrRockchip
Dec 6th, 2020
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  1. Accessing memory
  2. Probing PIRQ table in memory.
  3. Found PCI IRQ routing table signature at 0xfe990.
  4. SIGNATURE = $PIR
  5. VERSION = 0100
  6. SIZE = 320
  7. MAX_DEVICES_ON_BUS = 32 + 16 * 18
  8. INT_ROUTER_BUS = 0x00
  9. INT_ROUTER DEVICE = (0x14 << 3) | 0x4
  10. IRQ_DEVOTED_TO_PCI = 0
  11. VENDOR = 0x1022
  12. DEVICE = 0x780b
  13. MINIPORT = 0
  14. CHECKSUM = 0xfd
  15. bus , dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu
  16. 0x00, (0x01 << 3) | 0x0, {{0x01, 0xdc90}, {0x02, 0xdc90}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
  17. 0x00, (0x02 << 3) | 0x0, {{0x02, 0xdc90}, {0x03, 0xdc90}, {0x00, 0xdc90}, {0x01, 0xdc90}}, 0x0, 0x0},
  18. 0x00, (0x03 << 3) | 0x0, {{0x03, 0xdc90}, {0x00, 0xdc90}, {0x01, 0xdc90}, {0x02, 0xdc90}}, 0x0, 0x0},
  19. 0x00, (0x04 << 3) | 0x0, {{0x00, 0xdc90}, {0x01, 0xdc90}, {0x02, 0xdc90}, {0x03, 0xdc90}}, 0x0, 0x0},
  20. 0x00, (0x05 << 3) | 0x0, {{0x01, 0xdc90}, {0x02, 0xdc90}, {0x03, 0xdc90}, {0x00, 0xdc90}}, 0x0, 0x0},
  21. 0x00, (0x06 << 3) | 0x0, {{0x02, 0xdc90}, {0x03, 0xdc90}, {0x00, 0xdc90}, {0x01, 0xdc90}}, 0x0, 0x0},
  22. 0x00, (0x07 << 3) | 0x0, {{0x03, 0xdc90}, {0x00, 0xdc90}, {0x01, 0xdc90}, {0x02, 0xdc90}}, 0x0, 0x0},
  23. 0x01, (0x00 << 3) | 0x0, {{0x02, 0xdc90}, {0x03, 0xdc90}, {0x00, 0xdc90}, {0x01, 0xdc90}}, 0x1, 0x0},
  24. 0x03, (0x00 << 3) | 0x0, {{0x03, 0xdc90}, {0x00, 0xdc90}, {0x01, 0xdc90}, {0x02, 0xdc90}}, 0x2, 0x0},
  25. 0x02, (0x00 << 3) | 0x0, {{0x00, 0xdc90}, {0x01, 0xdc90}, {0x02, 0xdc90}, {0x03, 0xdc90}}, 0x3, 0x0},
  26. 0x03, (0x00 << 3) | 0x0, {{0x01, 0xdc90}, {0x02, 0xdc90}, {0x03, 0xdc90}, {0x00, 0xdc90}}, 0x4, 0x0},
  27. 0x00, (0x11 << 3) | 0x0, {{0x03, 0xdc90}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
  28. 0x00, (0x12 << 3) | 0x0, {{0x02, 0xdc90}, {0x01, 0xdc90}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
  29. 0x00, (0x13 << 3) | 0x0, {{0x02, 0xdc90}, {0x01, 0xdc90}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
  30. 0x00, (0x14 << 3) | 0x0, {{0x00, 0xdc90}, {0x01, 0xdc90}, {0x02, 0xdc90}, {0x03, 0xdc90}}, 0x0, 0x0},
  31. 0x00, (0x15 << 3) | 0x0, {{0x00, 0xdc90}, {0x01, 0xdc90}, {0x02, 0xdc90}, {0x03, 0xdc90}}, 0x0, 0x0},
  32. 0x00, (0x16 << 3) | 0x0, {{0x02, 0xdc90}, {0x01, 0xdc90}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
  33. 0x00, (0x10 << 3) | 0x0, {{0x02, 0xdc90}, {0x01, 0xdc90}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x0, 0x0},
  34. Validating...
  35. CHECKSUM = 0xfd
  36. checksum is ok.
  37. Creating irq_tables.c ...
  38. Done, you can move the file to the coreboot tree now.
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