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meson-g12b-a311d-khadas-vim3.dts

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  1. /dts-v1/;
  2.  
  3. / {
  4. interrupt-parent = <0x01>;
  5. #address-cells = <0x02>;
  6. #size-cells = <0x02>;
  7. compatible = "khadas,vim3\0amlogic,a311d\0amlogic,g12b";
  8. model = "Khadas VIM3";
  9.  
  10. aliases {
  11. mmc0 = "/soc/sd@ffe05000";
  12. mmc1 = "/soc/mmc@ffe07000";
  13. mmc2 = "/soc/sd@ffe03000";
  14. serial0 = "/soc/bus@ff800000/serial@3000";
  15. ethernet0 = "/soc/ethernet@ff3f0000";
  16. rtc0 = "/soc/bus@ff800000/i2c@5000/rtc@51";
  17. rtc1 = "/soc/bus@ff800000/rtc@a8";
  18. };
  19.  
  20. chosen {
  21. #address-cells = <0x02>;
  22. #size-cells = <0x02>;
  23. ranges;
  24. stdout-path = "serial0:115200n8";
  25.  
  26. framebuffer-cvbs {
  27. compatible = "amlogic,simple-framebuffer\0simple-framebuffer";
  28. amlogic,pipeline = "vpu-cvbs";
  29. clocks = <0x02 0xa8 0x02 0x35 0x02 0x3a>;
  30. status = "disabled";
  31. power-domains = <0x03 0x00>;
  32. phandle = <0x61>;
  33. };
  34.  
  35. framebuffer-hdmi {
  36. compatible = "amlogic,simple-framebuffer\0simple-framebuffer";
  37. amlogic,pipeline = "vpu-hdmi";
  38. clocks = <0x02 0xa8 0x02 0x35 0x02 0x3a>;
  39. status = "disabled";
  40. power-domains = <0x03 0x00>;
  41. phandle = <0x62>;
  42. };
  43. };
  44.  
  45. efuse {
  46. compatible = "amlogic,meson-gxbb-efuse";
  47. clocks = <0x02 0x6a>;
  48. #address-cells = <0x01>;
  49. #size-cells = <0x01>;
  50. read-only;
  51. secure-monitor = <0x04>;
  52. phandle = <0x63>;
  53. };
  54.  
  55. opp-table-gpu {
  56. compatible = "operating-points-v2";
  57. phandle = <0x3c>;
  58.  
  59. opp-124999998 {
  60. opp-hz = <0x00 0x773593e>;
  61. opp-microvolt = "\0\f5";
  62. };
  63.  
  64. opp-249999996 {
  65. opp-hz = <0x00 0xee6b27c>;
  66. opp-microvolt = "\0\f5";
  67. };
  68.  
  69. opp-285714281 {
  70. opp-hz = <0x00 0x1107a769>;
  71. opp-microvolt = "\0\f5";
  72. };
  73.  
  74. opp-399999994 {
  75. opp-hz = <0x00 0x17d783fa>;
  76. opp-microvolt = "\0\f5";
  77. };
  78.  
  79. opp-499999992 {
  80. opp-hz = <0x00 0x1dcd64f8>;
  81. opp-microvolt = "\0\f5";
  82. };
  83.  
  84. opp-666666656 {
  85. opp-hz = <0x00 0x27bc86a0>;
  86. opp-microvolt = "\0\f5";
  87. };
  88.  
  89. opp-799999987 {
  90. opp-hz = <0x00 0x2faf07f3>;
  91. opp-microvolt = "\0\f5";
  92. };
  93. };
  94.  
  95. psci {
  96. compatible = "arm,psci-1.0";
  97. method = "smc";
  98. };
  99.  
  100. reserved-memory {
  101. #address-cells = <0x02>;
  102. #size-cells = <0x02>;
  103. ranges;
  104.  
  105. secmon@5000000 {
  106. reg = <0x00 0x5000000 0x00 0x300000>;
  107. no-map;
  108. phandle = <0x64>;
  109. };
  110.  
  111. secmon@5300000 {
  112. reg = <0x00 0x5300000 0x00 0x2000000>;
  113. no-map;
  114. phandle = <0x65>;
  115. };
  116.  
  117. linux,cma {
  118. compatible = "shared-dma-pool";
  119. reusable;
  120. size = <0x00 0x10000000>;
  121. alignment = <0x00 0x400000>;
  122. linux,cma-default;
  123. };
  124. };
  125.  
  126. secure-monitor {
  127. compatible = "amlogic,meson-gxbb-sm";
  128. phandle = <0x04>;
  129. };
  130.  
  131. soc {
  132. compatible = "simple-bus";
  133. #address-cells = <0x02>;
  134. #size-cells = <0x02>;
  135. ranges;
  136.  
  137. pcie@fc000000 {
  138. compatible = "amlogic,g12a-pcie\0snps,dw-pcie";
  139. reg = <0x00 0xfc000000 0x00 0x400000 0x00 0xff648000 0x00 0x2000 0x00 0xfc400000 0x00 0x200000>;
  140. reg-names = "elbi\0cfg\0config";
  141. interrupts = <0x00 0xdd 0x04>;
  142. #interrupt-cells = <0x01>;
  143. interrupt-map-mask = <0x00 0x00 0x00 0x00>;
  144. interrupt-map = <0x00 0x00 0x00 0x00 0x01 0x00 0xdf 0x04>;
  145. bus-range = <0x00 0xff>;
  146. #address-cells = <0x03>;
  147. #size-cells = <0x02>;
  148. device_type = "pci";
  149. ranges = <0x81000000 0x00 0x00 0x00 0xfc600000 0x00 0x100000 0x82000000 0x00 0xfc700000 0x00 0xfc700000 0x00 0x1900000>;
  150. clocks = <0x02 0x30 0x02 0x2d 0x02 0xc9>;
  151. clock-names = "general\0pclk\0port";
  152. resets = <0x05 0x0c 0x05 0x0f>;
  153. reset-names = "port\0apb";
  154. num-lanes = <0x01>;
  155. phys = <0x06 0x02>;
  156. phy-names = "pcie";
  157. status = "disabled";
  158. reset-gpios = <0x07 0x39 0x01>;
  159. phandle = <0x66>;
  160. };
  161.  
  162. ethernet@ff3f0000 {
  163. compatible = "amlogic,meson-g12a-dwmac\0snps,dwmac-3.70a\0snps,dwmac";
  164. reg = <0x00 0xff3f0000 0x00 0x10000 0x00 0xff634540 0x00 0x08>;
  165. interrupts = <0x00 0x08 0x04>;
  166. interrupt-names = "macirq";
  167. clocks = <0x02 0x26 0x02 0x02 0x02 0x0d 0x02 0x02>;
  168. clock-names = "stmmaceth\0clkin0\0clkin1\0timing-adjustment";
  169. rx-fifo-depth = <0x1000>;
  170. tx-fifo-depth = <0x800>;
  171. status = "okay";
  172. power-domains = <0x03 0x01>;
  173. pinctrl-0 = <0x08 0x09>;
  174. pinctrl-names = "default";
  175. phy-mode = "rgmii";
  176. phy-handle = <0x0a>;
  177. amlogic,tx-delay-ns = <0x02>;
  178. phandle = <0x67>;
  179.  
  180. mdio {
  181. #address-cells = <0x01>;
  182. #size-cells = <0x00>;
  183. compatible = "snps,dwmac-mdio";
  184. phandle = <0x16>;
  185. };
  186. };
  187.  
  188. bus@ff600000 {
  189. compatible = "simple-bus";
  190. reg = <0x00 0xff600000 0x00 0x200000>;
  191. #address-cells = <0x02>;
  192. #size-cells = <0x02>;
  193. ranges = <0x00 0x00 0x00 0xff600000 0x00 0x200000>;
  194. phandle = <0x68>;
  195.  
  196. hdmi-tx@0 {
  197. compatible = "amlogic,meson-g12a-dw-hdmi";
  198. reg = <0x00 0x00 0x00 0x10000>;
  199. interrupts = <0x00 0x39 0x01>;
  200. resets = <0x05 0x13 0x05 0x42 0x05 0x4f>;
  201. reset-names = "hdmitx_apb\0hdmitx\0hdmitx_phy";
  202. clocks = <0x02 0xa8 0x02 0x35 0x02 0x3a>;
  203. clock-names = "isfr\0iahb\0venci";
  204. #address-cells = <0x01>;
  205. #size-cells = <0x00>;
  206. #sound-dai-cells = <0x00>;
  207. status = "okay";
  208. pinctrl-0 = <0x0b 0x0c>;
  209. pinctrl-names = "default";
  210. hdmi-supply = <0x0d>;
  211. phandle = <0x1d>;
  212.  
  213. port@0 {
  214. reg = <0x00>;
  215. phandle = <0x69>;
  216.  
  217. endpoint {
  218. remote-endpoint = <0x0e>;
  219. phandle = <0x27>;
  220. };
  221. };
  222.  
  223. port@1 {
  224. reg = <0x01>;
  225. phandle = <0x6a>;
  226.  
  227. endpoint {
  228. remote-endpoint = <0x0f>;
  229. phandle = <0x53>;
  230. };
  231. };
  232. };
  233.  
  234. bus@30000 {
  235. compatible = "simple-bus";
  236. reg = <0x00 0x30000 0x00 0x2000>;
  237. #address-cells = <0x02>;
  238. #size-cells = <0x02>;
  239. ranges = <0x00 0x00 0x00 0x30000 0x00 0x2000>;
  240. phandle = <0x6b>;
  241.  
  242. rng@218 {
  243. compatible = "amlogic,meson-rng";
  244. reg = <0x00 0x218 0x00 0x04>;
  245. clocks = <0x02 0x1b>;
  246. clock-names = "core";
  247. phandle = <0x6c>;
  248. };
  249. };
  250.  
  251. audio-controller@32000 {
  252. compatible = "amlogic,t9015";
  253. reg = <0x00 0x32000 0x00 0x14>;
  254. #sound-dai-cells = <0x00>;
  255. sound-name-prefix = "ACODEC";
  256. clocks = <0x02 0x24>;
  257. clock-names = "pclk";
  258. resets = <0x05 0x3d>;
  259. status = "disabled";
  260. phandle = <0x6d>;
  261. };
  262.  
  263. bus@34400 {
  264. compatible = "simple-bus";
  265. reg = <0x00 0x34400 0x00 0x400>;
  266. #address-cells = <0x02>;
  267. #size-cells = <0x02>;
  268. ranges = <0x00 0x00 0x00 0x34400 0x00 0x400>;
  269. phandle = <0x6e>;
  270.  
  271. pinctrl@40 {
  272. compatible = "amlogic,meson-g12a-periphs-pinctrl";
  273. #address-cells = <0x02>;
  274. #size-cells = <0x02>;
  275. ranges;
  276. phandle = <0x10>;
  277.  
  278. bank@40 {
  279. reg = <0x00 0x40 0x00 0x4c 0x00 0xe8 0x00 0x18 0x00 0x120 0x00 0x18 0x00 0x2c0 0x00 0x40 0x00 0x340 0x00 0x1c>;
  280. reg-names = "gpio\0pull\0pull-enable\0mux\0ds";
  281. gpio-controller;
  282. #gpio-cells = <0x02>;
  283. gpio-ranges = <0x10 0x00 0x00 0x56>;
  284. phandle = <0x07>;
  285. };
  286.  
  287. cec_ao_a_h {
  288. phandle = <0x1c>;
  289.  
  290. mux {
  291. groups = "cec_ao_a_h";
  292. function = "cec_ao_a_h";
  293. bias-disable;
  294. };
  295. };
  296.  
  297. cec_ao_b_h {
  298. phandle = <0x1e>;
  299.  
  300. mux {
  301. groups = "cec_ao_b_h";
  302. function = "cec_ao_b_h";
  303. bias-disable;
  304. };
  305. };
  306.  
  307. emmc-ctrl {
  308. phandle = <0x34>;
  309.  
  310. mux-0 {
  311. groups = "emmc_cmd";
  312. function = "emmc";
  313. bias-pull-up;
  314. drive-strength-microamp = <0xfa0>;
  315. };
  316.  
  317. mux-1 {
  318. groups = "emmc_clk";
  319. function = "emmc";
  320. bias-disable;
  321. drive-strength-microamp = <0xfa0>;
  322. };
  323. };
  324.  
  325. emmc-data-4b {
  326. phandle = <0x6f>;
  327.  
  328. mux-0 {
  329. groups = "emmc_nand_d0\0emmc_nand_d1\0emmc_nand_d2\0emmc_nand_d3";
  330. function = "emmc";
  331. bias-pull-up;
  332. drive-strength-microamp = <0xfa0>;
  333. };
  334. };
  335.  
  336. emmc-data-8b {
  337. phandle = <0x35>;
  338.  
  339. mux-0 {
  340. groups = "emmc_nand_d0\0emmc_nand_d1\0emmc_nand_d2\0emmc_nand_d3\0emmc_nand_d4\0emmc_nand_d5\0emmc_nand_d6\0emmc_nand_d7";
  341. function = "emmc";
  342. bias-pull-up;
  343. drive-strength-microamp = <0xfa0>;
  344. };
  345. };
  346.  
  347. emmc-ds {
  348. phandle = <0x36>;
  349.  
  350. mux {
  351. groups = "emmc_nand_ds";
  352. function = "emmc";
  353. bias-pull-down;
  354. drive-strength-microamp = <0xfa0>;
  355. };
  356. };
  357.  
  358. emmc_clk_gate {
  359. phandle = <0x37>;
  360.  
  361. mux {
  362. groups = "BOOT_8";
  363. function = "gpio_periphs";
  364. bias-pull-down;
  365. drive-strength-microamp = <0xfa0>;
  366. };
  367. };
  368.  
  369. hdmitx_ddc {
  370. phandle = <0x0c>;
  371.  
  372. mux {
  373. groups = "hdmitx_sda\0hdmitx_sck";
  374. function = "hdmitx";
  375. bias-disable;
  376. drive-strength-microamp = <0xfa0>;
  377. };
  378. };
  379.  
  380. hdmitx_hpd {
  381. phandle = <0x0b>;
  382.  
  383. mux {
  384. groups = "hdmitx_hpd_in";
  385. function = "hdmitx";
  386. bias-disable;
  387. };
  388. };
  389.  
  390. i2c0-sda-c {
  391. phandle = <0x70>;
  392.  
  393. mux {
  394. groups = "i2c0_sda_c";
  395. function = "i2c0";
  396. bias-disable;
  397. drive-strength-microamp = <0xbb8>;
  398. };
  399. };
  400.  
  401. i2c0-sck-c {
  402. phandle = <0x71>;
  403.  
  404. mux {
  405. groups = "i2c0_sck_c";
  406. function = "i2c0";
  407. bias-disable;
  408. drive-strength-microamp = <0xbb8>;
  409. };
  410. };
  411.  
  412. i2c0-sda-z0 {
  413. phandle = <0x72>;
  414.  
  415. mux {
  416. groups = "i2c0_sda_z0";
  417. function = "i2c0";
  418. bias-disable;
  419. drive-strength-microamp = <0xbb8>;
  420. };
  421. };
  422.  
  423. i2c0-sck-z1 {
  424. phandle = <0x73>;
  425.  
  426. mux {
  427. groups = "i2c0_sck_z1";
  428. function = "i2c0";
  429. bias-disable;
  430. drive-strength-microamp = <0xbb8>;
  431. };
  432. };
  433.  
  434. i2c0-sda-z7 {
  435. phandle = <0x74>;
  436.  
  437. mux {
  438. groups = "i2c0_sda_z7";
  439. function = "i2c0";
  440. bias-disable;
  441. drive-strength-microamp = <0xbb8>;
  442. };
  443. };
  444.  
  445. i2c0-sda-z8 {
  446. phandle = <0x75>;
  447.  
  448. mux {
  449. groups = "i2c0_sda_z8";
  450. function = "i2c0";
  451. bias-disable;
  452. drive-strength-microamp = <0xbb8>;
  453. };
  454. };
  455.  
  456. i2c1-sda-x {
  457. phandle = <0x76>;
  458.  
  459. mux {
  460. groups = "i2c1_sda_x";
  461. function = "i2c1";
  462. bias-disable;
  463. drive-strength-microamp = <0xbb8>;
  464. };
  465. };
  466.  
  467. i2c1-sck-x {
  468. phandle = <0x77>;
  469.  
  470. mux {
  471. groups = "i2c1_sck_x";
  472. function = "i2c1";
  473. bias-disable;
  474. drive-strength-microamp = <0xbb8>;
  475. };
  476. };
  477.  
  478. i2c1-sda-h2 {
  479. phandle = <0x78>;
  480.  
  481. mux {
  482. groups = "i2c1_sda_h2";
  483. function = "i2c1";
  484. bias-disable;
  485. drive-strength-microamp = <0xbb8>;
  486. };
  487. };
  488.  
  489. i2c1-sck-h3 {
  490. phandle = <0x79>;
  491.  
  492. mux {
  493. groups = "i2c1_sck_h3";
  494. function = "i2c1";
  495. bias-disable;
  496. drive-strength-microamp = <0xbb8>;
  497. };
  498. };
  499.  
  500. i2c1-sda-h6 {
  501. phandle = <0x7a>;
  502.  
  503. mux {
  504. groups = "i2c1_sda_h6";
  505. function = "i2c1";
  506. bias-disable;
  507. drive-strength-microamp = <0xbb8>;
  508. };
  509. };
  510.  
  511. i2c1-sck-h7 {
  512. phandle = <0x7b>;
  513.  
  514. mux {
  515. groups = "i2c1_sck_h7";
  516. function = "i2c1";
  517. bias-disable;
  518. drive-strength-microamp = <0xbb8>;
  519. };
  520. };
  521.  
  522. i2c2-sda-x {
  523. phandle = <0x7c>;
  524.  
  525. mux {
  526. groups = "i2c2_sda_x";
  527. function = "i2c2";
  528. bias-disable;
  529. drive-strength-microamp = <0xbb8>;
  530. };
  531. };
  532.  
  533. i2c2-sck-x {
  534. phandle = <0x7d>;
  535.  
  536. mux {
  537. groups = "i2c2_sck_x";
  538. function = "i2c2";
  539. bias-disable;
  540. drive-strength-microamp = <0xbb8>;
  541. };
  542. };
  543.  
  544. i2c2-sda-z {
  545. phandle = <0x7e>;
  546.  
  547. mux {
  548. groups = "i2c2_sda_z";
  549. function = "i2c2";
  550. bias-disable;
  551. drive-strength-microamp = <0xbb8>;
  552. };
  553. };
  554.  
  555. i2c2-sck-z {
  556. phandle = <0x7f>;
  557.  
  558. mux {
  559. groups = "i2c2_sck_z";
  560. function = "i2c2";
  561. bias-disable;
  562. drive-strength-microamp = <0xbb8>;
  563. };
  564. };
  565.  
  566. i2c3-sda-h {
  567. phandle = <0x80>;
  568.  
  569. mux {
  570. groups = "i2c3_sda_h";
  571. function = "i2c3";
  572. bias-disable;
  573. drive-strength-microamp = <0xbb8>;
  574. };
  575. };
  576.  
  577. i2c3-sck-h {
  578. phandle = <0x81>;
  579.  
  580. mux {
  581. groups = "i2c3_sck_h";
  582. function = "i2c3";
  583. bias-disable;
  584. drive-strength-microamp = <0xbb8>;
  585. };
  586. };
  587.  
  588. i2c3-sda-a {
  589. phandle = <0x82>;
  590.  
  591. mux {
  592. groups = "i2c3_sda_a";
  593. function = "i2c3";
  594. bias-disable;
  595. drive-strength-microamp = <0xbb8>;
  596. };
  597. };
  598.  
  599. i2c3-sck-a {
  600. phandle = <0x83>;
  601.  
  602. mux {
  603. groups = "i2c3_sck_a";
  604. function = "i2c3";
  605. bias-disable;
  606. drive-strength-microamp = <0xbb8>;
  607. };
  608. };
  609.  
  610. mclk0-a {
  611. phandle = <0x84>;
  612.  
  613. mux {
  614. groups = "mclk0_a";
  615. function = "mclk0";
  616. bias-disable;
  617. drive-strength-microamp = <0xbb8>;
  618. };
  619. };
  620.  
  621. mclk1-a {
  622. phandle = <0x85>;
  623.  
  624. mux {
  625. groups = "mclk1_a";
  626. function = "mclk1";
  627. bias-disable;
  628. drive-strength-microamp = <0xbb8>;
  629. };
  630. };
  631.  
  632. mclk1-x {
  633. phandle = <0x86>;
  634.  
  635. mux {
  636. groups = "mclk1_x";
  637. function = "mclk1";
  638. bias-disable;
  639. drive-strength-microamp = <0xbb8>;
  640. };
  641. };
  642.  
  643. mclk1-z {
  644. phandle = <0x87>;
  645.  
  646. mux {
  647. groups = "mclk1_z";
  648. function = "mclk1";
  649. bias-disable;
  650. drive-strength-microamp = <0xbb8>;
  651. };
  652. };
  653.  
  654. nor {
  655. phandle = <0x28>;
  656.  
  657. mux {
  658. groups = "nor_d\0nor_q\0nor_c\0nor_cs";
  659. function = "nor";
  660. bias-disable;
  661. };
  662. };
  663.  
  664. pdm-din0-a {
  665. phandle = <0x88>;
  666.  
  667. mux {
  668. groups = "pdm_din0_a";
  669. function = "pdm";
  670. bias-disable;
  671. };
  672. };
  673.  
  674. pdm-din0-c {
  675. phandle = <0x89>;
  676.  
  677. mux {
  678. groups = "pdm_din0_c";
  679. function = "pdm";
  680. bias-disable;
  681. };
  682. };
  683.  
  684. pdm-din0-x {
  685. phandle = <0x8a>;
  686.  
  687. mux {
  688. groups = "pdm_din0_x";
  689. function = "pdm";
  690. bias-disable;
  691. };
  692. };
  693.  
  694. pdm-din0-z {
  695. phandle = <0x8b>;
  696.  
  697. mux {
  698. groups = "pdm_din0_z";
  699. function = "pdm";
  700. bias-disable;
  701. };
  702. };
  703.  
  704. pdm-din1-a {
  705. phandle = <0x8c>;
  706.  
  707. mux {
  708. groups = "pdm_din1_a";
  709. function = "pdm";
  710. bias-disable;
  711. };
  712. };
  713.  
  714. pdm-din1-c {
  715. phandle = <0x8d>;
  716.  
  717. mux {
  718. groups = "pdm_din1_c";
  719. function = "pdm";
  720. bias-disable;
  721. };
  722. };
  723.  
  724. pdm-din1-x {
  725. phandle = <0x8e>;
  726.  
  727. mux {
  728. groups = "pdm_din1_x";
  729. function = "pdm";
  730. bias-disable;
  731. };
  732. };
  733.  
  734. pdm-din1-z {
  735. phandle = <0x8f>;
  736.  
  737. mux {
  738. groups = "pdm_din1_z";
  739. function = "pdm";
  740. bias-disable;
  741. };
  742. };
  743.  
  744. pdm-din2-a {
  745. phandle = <0x90>;
  746.  
  747. mux {
  748. groups = "pdm_din2_a";
  749. function = "pdm";
  750. bias-disable;
  751. };
  752. };
  753.  
  754. pdm-din2-c {
  755. phandle = <0x91>;
  756.  
  757. mux {
  758. groups = "pdm_din2_c";
  759. function = "pdm";
  760. bias-disable;
  761. };
  762. };
  763.  
  764. pdm-din2-x {
  765. phandle = <0x92>;
  766.  
  767. mux {
  768. groups = "pdm_din2_x";
  769. function = "pdm";
  770. bias-disable;
  771. };
  772. };
  773.  
  774. pdm-din2-z {
  775. phandle = <0x93>;
  776.  
  777. mux {
  778. groups = "pdm_din2_z";
  779. function = "pdm";
  780. bias-disable;
  781. };
  782. };
  783.  
  784. pdm-din3-a {
  785. phandle = <0x94>;
  786.  
  787. mux {
  788. groups = "pdm_din3_a";
  789. function = "pdm";
  790. bias-disable;
  791. };
  792. };
  793.  
  794. pdm-din3-c {
  795. phandle = <0x95>;
  796.  
  797. mux {
  798. groups = "pdm_din3_c";
  799. function = "pdm";
  800. bias-disable;
  801. };
  802. };
  803.  
  804. pdm-din3-x {
  805. phandle = <0x96>;
  806.  
  807. mux {
  808. groups = "pdm_din3_x";
  809. function = "pdm";
  810. bias-disable;
  811. };
  812. };
  813.  
  814. pdm-din3-z {
  815. phandle = <0x97>;
  816.  
  817. mux {
  818. groups = "pdm_din3_z";
  819. function = "pdm";
  820. bias-disable;
  821. };
  822. };
  823.  
  824. pdm-dclk-a {
  825. phandle = <0x98>;
  826.  
  827. mux {
  828. groups = "pdm_dclk_a";
  829. function = "pdm";
  830. bias-disable;
  831. drive-strength-microamp = <0x1f4>;
  832. };
  833. };
  834.  
  835. pdm-dclk-c {
  836. phandle = <0x99>;
  837.  
  838. mux {
  839. groups = "pdm_dclk_c";
  840. function = "pdm";
  841. bias-disable;
  842. drive-strength-microamp = <0x1f4>;
  843. };
  844. };
  845.  
  846. pdm-dclk-x {
  847. phandle = <0x9a>;
  848.  
  849. mux {
  850. groups = "pdm_dclk_x";
  851. function = "pdm";
  852. bias-disable;
  853. drive-strength-microamp = <0x1f4>;
  854. };
  855. };
  856.  
  857. pdm-dclk-z {
  858. phandle = <0x9b>;
  859.  
  860. mux {
  861. groups = "pdm_dclk_z";
  862. function = "pdm";
  863. bias-disable;
  864. drive-strength-microamp = <0x1f4>;
  865. };
  866. };
  867.  
  868. pwm-a {
  869. phandle = <0x9c>;
  870.  
  871. mux {
  872. groups = "pwm_a";
  873. function = "pwm_a";
  874. bias-disable;
  875. };
  876. };
  877.  
  878. pwm-b-x7 {
  879. phandle = <0x9d>;
  880.  
  881. mux {
  882. groups = "pwm_b_x7";
  883. function = "pwm_b";
  884. bias-disable;
  885. };
  886. };
  887.  
  888. pwm-b-x19 {
  889. phandle = <0x9e>;
  890.  
  891. mux {
  892. groups = "pwm_b_x19";
  893. function = "pwm_b";
  894. bias-disable;
  895. };
  896. };
  897.  
  898. pwm-c-c {
  899. phandle = <0x9f>;
  900.  
  901. mux {
  902. groups = "pwm_c_c";
  903. function = "pwm_c";
  904. bias-disable;
  905. };
  906. };
  907.  
  908. pwm-c-x5 {
  909. phandle = <0xa0>;
  910.  
  911. mux {
  912. groups = "pwm_c_x5";
  913. function = "pwm_c";
  914. bias-disable;
  915. };
  916. };
  917.  
  918. pwm-c-x8 {
  919. phandle = <0xa1>;
  920.  
  921. mux {
  922. groups = "pwm_c_x8";
  923. function = "pwm_c";
  924. bias-disable;
  925. };
  926. };
  927.  
  928. pwm-d-x3 {
  929. phandle = <0xa2>;
  930.  
  931. mux {
  932. groups = "pwm_d_x3";
  933. function = "pwm_d";
  934. bias-disable;
  935. };
  936. };
  937.  
  938. pwm-d-x6 {
  939. phandle = <0xa3>;
  940.  
  941. mux {
  942. groups = "pwm_d_x6";
  943. function = "pwm_d";
  944. bias-disable;
  945. };
  946. };
  947.  
  948. pwm-e {
  949. phandle = <0x29>;
  950.  
  951. mux {
  952. groups = "pwm_e";
  953. function = "pwm_e";
  954. bias-disable;
  955. };
  956. };
  957.  
  958. pwm-f-x {
  959. phandle = <0xa4>;
  960.  
  961. mux {
  962. groups = "pwm_f_x";
  963. function = "pwm_f";
  964. bias-disable;
  965. };
  966. };
  967.  
  968. pwm-f-h {
  969. phandle = <0xa5>;
  970.  
  971. mux {
  972. groups = "pwm_f_h";
  973. function = "pwm_f";
  974. bias-disable;
  975. };
  976. };
  977.  
  978. sdcard_c {
  979. phandle = <0x32>;
  980.  
  981. mux-0 {
  982. groups = "sdcard_d0_c\0sdcard_d1_c\0sdcard_d2_c\0sdcard_d3_c\0sdcard_cmd_c";
  983. function = "sdcard";
  984. bias-pull-up;
  985. drive-strength-microamp = <0xfa0>;
  986. };
  987.  
  988. mux-1 {
  989. groups = "sdcard_clk_c";
  990. function = "sdcard";
  991. bias-disable;
  992. drive-strength-microamp = <0xfa0>;
  993. };
  994. };
  995.  
  996. sdcard_clk_gate_c {
  997. phandle = <0x33>;
  998.  
  999. mux {
  1000. groups = "GPIOC_4";
  1001. function = "gpio_periphs";
  1002. bias-pull-down;
  1003. drive-strength-microamp = <0xfa0>;
  1004. };
  1005. };
  1006.  
  1007. sdcard_z {
  1008. phandle = <0xa6>;
  1009.  
  1010. mux-0 {
  1011. groups = "sdcard_d0_z\0sdcard_d1_z\0sdcard_d2_z\0sdcard_d3_z\0sdcard_cmd_z";
  1012. function = "sdcard";
  1013. bias-pull-up;
  1014. drive-strength-microamp = <0xfa0>;
  1015. };
  1016.  
  1017. mux-1 {
  1018. groups = "sdcard_clk_z";
  1019. function = "sdcard";
  1020. bias-disable;
  1021. drive-strength-microamp = <0xfa0>;
  1022. };
  1023. };
  1024.  
  1025. sdcard_clk_gate_z {
  1026. phandle = <0xa7>;
  1027.  
  1028. mux {
  1029. groups = "GPIOZ_6";
  1030. function = "gpio_periphs";
  1031. bias-pull-down;
  1032. drive-strength-microamp = <0xfa0>;
  1033. };
  1034. };
  1035.  
  1036. sdio {
  1037. phandle = <0x2e>;
  1038.  
  1039. mux {
  1040. groups = "sdio_d0\0sdio_d1\0sdio_d2\0sdio_d3\0sdio_clk\0sdio_cmd";
  1041. function = "sdio";
  1042. bias-disable;
  1043. drive-strength-microamp = <0xfa0>;
  1044. };
  1045. };
  1046.  
  1047. sdio_clk_gate {
  1048. phandle = <0x2f>;
  1049.  
  1050. mux {
  1051. groups = "GPIOX_4";
  1052. function = "gpio_periphs";
  1053. bias-pull-down;
  1054. drive-strength-microamp = <0xfa0>;
  1055. };
  1056. };
  1057.  
  1058. spdif-in-a10 {
  1059. phandle = <0xa8>;
  1060.  
  1061. mux {
  1062. groups = "spdif_in_a10";
  1063. function = "spdif_in";
  1064. bias-disable;
  1065. };
  1066. };
  1067.  
  1068. spdif-in-a12 {
  1069. phandle = <0xa9>;
  1070.  
  1071. mux {
  1072. groups = "spdif_in_a12";
  1073. function = "spdif_in";
  1074. bias-disable;
  1075. };
  1076. };
  1077.  
  1078. spdif-in-h {
  1079. phandle = <0xaa>;
  1080.  
  1081. mux {
  1082. groups = "spdif_in_h";
  1083. function = "spdif_in";
  1084. bias-disable;
  1085. };
  1086. };
  1087.  
  1088. spdif-out-h {
  1089. phandle = <0xab>;
  1090.  
  1091. mux {
  1092. groups = "spdif_out_h";
  1093. function = "spdif_out";
  1094. drive-strength-microamp = <0x1f4>;
  1095. bias-disable;
  1096. };
  1097. };
  1098.  
  1099. spdif-out-a11 {
  1100. phandle = <0xac>;
  1101.  
  1102. mux {
  1103. groups = "spdif_out_a11";
  1104. function = "spdif_out";
  1105. drive-strength-microamp = <0x1f4>;
  1106. bias-disable;
  1107. };
  1108. };
  1109.  
  1110. spdif-out-a13 {
  1111. phandle = <0xad>;
  1112.  
  1113. mux {
  1114. groups = "spdif_out_a13";
  1115. function = "spdif_out";
  1116. drive-strength-microamp = <0x1f4>;
  1117. bias-disable;
  1118. };
  1119. };
  1120.  
  1121. spicc0-x {
  1122. phandle = <0xae>;
  1123.  
  1124. mux {
  1125. groups = "spi0_mosi_x\0spi0_miso_x\0spi0_clk_x";
  1126. function = "spi0";
  1127. drive-strength-microamp = <0xfa0>;
  1128. bias-disable;
  1129. };
  1130. };
  1131.  
  1132. spicc0-ss0-x {
  1133. phandle = <0xaf>;
  1134.  
  1135. mux {
  1136. groups = "spi0_ss0_x";
  1137. function = "spi0";
  1138. drive-strength-microamp = <0xfa0>;
  1139. bias-disable;
  1140. };
  1141. };
  1142.  
  1143. spicc0-c {
  1144. phandle = <0xb0>;
  1145.  
  1146. mux {
  1147. groups = "spi0_mosi_c\0spi0_miso_c\0spi0_ss0_c\0spi0_clk_c";
  1148. function = "spi0";
  1149. drive-strength-microamp = <0xfa0>;
  1150. bias-disable;
  1151. };
  1152. };
  1153.  
  1154. spicc1 {
  1155. phandle = <0xb1>;
  1156.  
  1157. mux {
  1158. groups = "spi1_mosi\0spi1_miso\0spi1_clk";
  1159. function = "spi1";
  1160. drive-strength-microamp = <0xfa0>;
  1161. };
  1162. };
  1163.  
  1164. spicc1-ss0 {
  1165. phandle = <0xb2>;
  1166.  
  1167. mux {
  1168. groups = "spi1_ss0";
  1169. function = "spi1";
  1170. drive-strength-microamp = <0xfa0>;
  1171. bias-disable;
  1172. };
  1173. };
  1174.  
  1175. tdm-a-din0 {
  1176. phandle = <0xb3>;
  1177.  
  1178. mux {
  1179. groups = "tdm_a_din0";
  1180. function = "tdm_a";
  1181. bias-disable;
  1182. };
  1183. };
  1184.  
  1185. tdm-a-din1 {
  1186. phandle = <0xb4>;
  1187.  
  1188. mux {
  1189. groups = "tdm_a_din1";
  1190. function = "tdm_a";
  1191. bias-disable;
  1192. };
  1193. };
  1194.  
  1195. tdm-a-dout0 {
  1196. phandle = <0xb5>;
  1197.  
  1198. mux {
  1199. groups = "tdm_a_dout0";
  1200. function = "tdm_a";
  1201. bias-disable;
  1202. drive-strength-microamp = <0xbb8>;
  1203. };
  1204. };
  1205.  
  1206. tdm-a-dout1 {
  1207. phandle = <0xb6>;
  1208.  
  1209. mux {
  1210. groups = "tdm_a_dout1";
  1211. function = "tdm_a";
  1212. bias-disable;
  1213. drive-strength-microamp = <0xbb8>;
  1214. };
  1215. };
  1216.  
  1217. tdm-a-fs {
  1218. phandle = <0xb7>;
  1219.  
  1220. mux {
  1221. groups = "tdm_a_fs";
  1222. function = "tdm_a";
  1223. bias-disable;
  1224. drive-strength-microamp = <0xbb8>;
  1225. };
  1226. };
  1227.  
  1228. tdm-a-sclk {
  1229. phandle = <0xb8>;
  1230.  
  1231. mux {
  1232. groups = "tdm_a_sclk";
  1233. function = "tdm_a";
  1234. bias-disable;
  1235. drive-strength-microamp = <0xbb8>;
  1236. };
  1237. };
  1238.  
  1239. tdm-a-slv-fs {
  1240. phandle = <0xb9>;
  1241.  
  1242. mux {
  1243. groups = "tdm_a_slv_fs";
  1244. function = "tdm_a";
  1245. bias-disable;
  1246. };
  1247. };
  1248.  
  1249. tdm-a-slv-sclk {
  1250. phandle = <0xba>;
  1251.  
  1252. mux {
  1253. groups = "tdm_a_slv_sclk";
  1254. function = "tdm_a";
  1255. bias-disable;
  1256. };
  1257. };
  1258.  
  1259. tdm-b-din0 {
  1260. phandle = <0xbb>;
  1261.  
  1262. mux {
  1263. groups = "tdm_b_din0";
  1264. function = "tdm_b";
  1265. bias-disable;
  1266. };
  1267. };
  1268.  
  1269. tdm-b-din1 {
  1270. phandle = <0xbc>;
  1271.  
  1272. mux {
  1273. groups = "tdm_b_din1";
  1274. function = "tdm_b";
  1275. bias-disable;
  1276. };
  1277. };
  1278.  
  1279. tdm-b-din2 {
  1280. phandle = <0xbd>;
  1281.  
  1282. mux {
  1283. groups = "tdm_b_din2";
  1284. function = "tdm_b";
  1285. bias-disable;
  1286. };
  1287. };
  1288.  
  1289. tdm-b-din3-a {
  1290. phandle = <0xbe>;
  1291.  
  1292. mux {
  1293. groups = "tdm_b_din3_a";
  1294. function = "tdm_b";
  1295. bias-disable;
  1296. };
  1297. };
  1298.  
  1299. tdm-b-din3-h {
  1300. phandle = <0xbf>;
  1301.  
  1302. mux {
  1303. groups = "tdm_b_din3_h";
  1304. function = "tdm_b";
  1305. bias-disable;
  1306. };
  1307. };
  1308.  
  1309. tdm-b-dout0 {
  1310. phandle = <0xc0>;
  1311.  
  1312. mux {
  1313. groups = "tdm_b_dout0";
  1314. function = "tdm_b";
  1315. bias-disable;
  1316. drive-strength-microamp = <0xbb8>;
  1317. };
  1318. };
  1319.  
  1320. tdm-b-dout1 {
  1321. phandle = <0xc1>;
  1322.  
  1323. mux {
  1324. groups = "tdm_b_dout1";
  1325. function = "tdm_b";
  1326. bias-disable;
  1327. drive-strength-microamp = <0xbb8>;
  1328. };
  1329. };
  1330.  
  1331. tdm-b-dout2 {
  1332. phandle = <0xc2>;
  1333.  
  1334. mux {
  1335. groups = "tdm_b_dout2";
  1336. function = "tdm_b";
  1337. bias-disable;
  1338. drive-strength-microamp = <0xbb8>;
  1339. };
  1340. };
  1341.  
  1342. tdm-b-dout3-a {
  1343. phandle = <0xc3>;
  1344.  
  1345. mux {
  1346. groups = "tdm_b_dout3_a";
  1347. function = "tdm_b";
  1348. bias-disable;
  1349. drive-strength-microamp = <0xbb8>;
  1350. };
  1351. };
  1352.  
  1353. tdm-b-dout3-h {
  1354. phandle = <0xc4>;
  1355.  
  1356. mux {
  1357. groups = "tdm_b_dout3_h";
  1358. function = "tdm_b";
  1359. bias-disable;
  1360. drive-strength-microamp = <0xbb8>;
  1361. };
  1362. };
  1363.  
  1364. tdm-b-fs {
  1365. phandle = <0xc5>;
  1366.  
  1367. mux {
  1368. groups = "tdm_b_fs";
  1369. function = "tdm_b";
  1370. bias-disable;
  1371. drive-strength-microamp = <0xbb8>;
  1372. };
  1373. };
  1374.  
  1375. tdm-b-sclk {
  1376. phandle = <0xc6>;
  1377.  
  1378. mux {
  1379. groups = "tdm_b_sclk";
  1380. function = "tdm_b";
  1381. bias-disable;
  1382. drive-strength-microamp = <0xbb8>;
  1383. };
  1384. };
  1385.  
  1386. tdm-b-slv-fs {
  1387. phandle = <0xc7>;
  1388.  
  1389. mux {
  1390. groups = "tdm_b_slv_fs";
  1391. function = "tdm_b";
  1392. bias-disable;
  1393. };
  1394. };
  1395.  
  1396. tdm-b-slv-sclk {
  1397. phandle = <0xc8>;
  1398.  
  1399. mux {
  1400. groups = "tdm_b_slv_sclk";
  1401. function = "tdm_b";
  1402. bias-disable;
  1403. };
  1404. };
  1405.  
  1406. tdm-c-din0-a {
  1407. phandle = <0xc9>;
  1408.  
  1409. mux {
  1410. groups = "tdm_c_din0_a";
  1411. function = "tdm_c";
  1412. bias-disable;
  1413. };
  1414. };
  1415.  
  1416. tdm-c-din0-z {
  1417. phandle = <0xca>;
  1418.  
  1419. mux {
  1420. groups = "tdm_c_din0_z";
  1421. function = "tdm_c";
  1422. bias-disable;
  1423. };
  1424. };
  1425.  
  1426. tdm-c-din1-a {
  1427. phandle = <0xcb>;
  1428.  
  1429. mux {
  1430. groups = "tdm_c_din1_a";
  1431. function = "tdm_c";
  1432. bias-disable;
  1433. };
  1434. };
  1435.  
  1436. tdm-c-din1-z {
  1437. phandle = <0xcc>;
  1438.  
  1439. mux {
  1440. groups = "tdm_c_din1_z";
  1441. function = "tdm_c";
  1442. bias-disable;
  1443. };
  1444. };
  1445.  
  1446. tdm-c-din2-a {
  1447. phandle = <0xcd>;
  1448.  
  1449. mux {
  1450. groups = "tdm_c_din2_a";
  1451. function = "tdm_c";
  1452. bias-disable;
  1453. };
  1454. };
  1455.  
  1456. eth-leds {
  1457. phandle = <0xce>;
  1458.  
  1459. mux {
  1460. groups = "eth_link_led\0eth_act_led";
  1461. function = "eth";
  1462. bias-disable;
  1463. };
  1464. };
  1465.  
  1466. eth {
  1467. phandle = <0x08>;
  1468.  
  1469. mux {
  1470. groups = "eth_mdio\0eth_mdc\0eth_rgmii_rx_clk\0eth_rx_dv\0eth_rxd0\0eth_rxd1\0eth_txen\0eth_txd0\0eth_txd1";
  1471. function = "eth";
  1472. drive-strength-microamp = <0xfa0>;
  1473. bias-disable;
  1474. };
  1475. };
  1476.  
  1477. eth-rgmii {
  1478. phandle = <0x09>;
  1479.  
  1480. mux {
  1481. groups = "eth_rxd2_rgmii\0eth_rxd3_rgmii\0eth_rgmii_tx_clk\0eth_txd2_rgmii\0eth_txd3_rgmii";
  1482. function = "eth";
  1483. drive-strength-microamp = <0xfa0>;
  1484. bias-disable;
  1485. };
  1486. };
  1487.  
  1488. tdm-c-din2-z {
  1489. phandle = <0xcf>;
  1490.  
  1491. mux {
  1492. groups = "tdm_c_din2_z";
  1493. function = "tdm_c";
  1494. bias-disable;
  1495. };
  1496. };
  1497.  
  1498. tdm-c-din3-a {
  1499. phandle = <0xd0>;
  1500.  
  1501. mux {
  1502. groups = "tdm_c_din3_a";
  1503. function = "tdm_c";
  1504. bias-disable;
  1505. };
  1506. };
  1507.  
  1508. tdm-c-din3-z {
  1509. phandle = <0xd1>;
  1510.  
  1511. mux {
  1512. groups = "tdm_c_din3_z";
  1513. function = "tdm_c";
  1514. bias-disable;
  1515. };
  1516. };
  1517.  
  1518. tdm-c-dout0-a {
  1519. phandle = <0xd2>;
  1520.  
  1521. mux {
  1522. groups = "tdm_c_dout0_a";
  1523. function = "tdm_c";
  1524. bias-disable;
  1525. drive-strength-microamp = <0xbb8>;
  1526. };
  1527. };
  1528.  
  1529. tdm-c-dout0-z {
  1530. phandle = <0xd3>;
  1531.  
  1532. mux {
  1533. groups = "tdm_c_dout0_z";
  1534. function = "tdm_c";
  1535. bias-disable;
  1536. drive-strength-microamp = <0xbb8>;
  1537. };
  1538. };
  1539.  
  1540. tdm-c-dout1-a {
  1541. phandle = <0xd4>;
  1542.  
  1543. mux {
  1544. groups = "tdm_c_dout1_a";
  1545. function = "tdm_c";
  1546. bias-disable;
  1547. drive-strength-microamp = <0xbb8>;
  1548. };
  1549. };
  1550.  
  1551. tdm-c-dout1-z {
  1552. phandle = <0xd5>;
  1553.  
  1554. mux {
  1555. groups = "tdm_c_dout1_z";
  1556. function = "tdm_c";
  1557. bias-disable;
  1558. drive-strength-microamp = <0xbb8>;
  1559. };
  1560. };
  1561.  
  1562. tdm-c-dout2-a {
  1563. phandle = <0xd6>;
  1564.  
  1565. mux {
  1566. groups = "tdm_c_dout2_a";
  1567. function = "tdm_c";
  1568. bias-disable;
  1569. drive-strength-microamp = <0xbb8>;
  1570. };
  1571. };
  1572.  
  1573. tdm-c-dout2-z {
  1574. phandle = <0xd7>;
  1575.  
  1576. mux {
  1577. groups = "tdm_c_dout2_z";
  1578. function = "tdm_c";
  1579. bias-disable;
  1580. drive-strength-microamp = <0xbb8>;
  1581. };
  1582. };
  1583.  
  1584. tdm-c-dout3-a {
  1585. phandle = <0xd8>;
  1586.  
  1587. mux {
  1588. groups = "tdm_c_dout3_a";
  1589. function = "tdm_c";
  1590. bias-disable;
  1591. drive-strength-microamp = <0xbb8>;
  1592. };
  1593. };
  1594.  
  1595. tdm-c-dout3-z {
  1596. phandle = <0xd9>;
  1597.  
  1598. mux {
  1599. groups = "tdm_c_dout3_z";
  1600. function = "tdm_c";
  1601. bias-disable;
  1602. drive-strength-microamp = <0xbb8>;
  1603. };
  1604. };
  1605.  
  1606. tdm-c-fs-a {
  1607. phandle = <0xda>;
  1608.  
  1609. mux {
  1610. groups = "tdm_c_fs_a";
  1611. function = "tdm_c";
  1612. bias-disable;
  1613. drive-strength-microamp = <0xbb8>;
  1614. };
  1615. };
  1616.  
  1617. tdm-c-fs-z {
  1618. phandle = <0xdb>;
  1619.  
  1620. mux {
  1621. groups = "tdm_c_fs_z";
  1622. function = "tdm_c";
  1623. bias-disable;
  1624. drive-strength-microamp = <0xbb8>;
  1625. };
  1626. };
  1627.  
  1628. tdm-c-sclk-a {
  1629. phandle = <0xdc>;
  1630.  
  1631. mux {
  1632. groups = "tdm_c_sclk_a";
  1633. function = "tdm_c";
  1634. bias-disable;
  1635. drive-strength-microamp = <0xbb8>;
  1636. };
  1637. };
  1638.  
  1639. tdm-c-sclk-z {
  1640. phandle = <0xdd>;
  1641.  
  1642. mux {
  1643. groups = "tdm_c_sclk_z";
  1644. function = "tdm_c";
  1645. bias-disable;
  1646. drive-strength-microamp = <0xbb8>;
  1647. };
  1648. };
  1649.  
  1650. tdm-c-slv-fs-a {
  1651. phandle = <0xde>;
  1652.  
  1653. mux {
  1654. groups = "tdm_c_slv_fs_a";
  1655. function = "tdm_c";
  1656. bias-disable;
  1657. };
  1658. };
  1659.  
  1660. tdm-c-slv-fs-z {
  1661. phandle = <0xdf>;
  1662.  
  1663. mux {
  1664. groups = "tdm_c_slv_fs_z";
  1665. function = "tdm_c";
  1666. bias-disable;
  1667. };
  1668. };
  1669.  
  1670. tdm-c-slv-sclk-a {
  1671. phandle = <0xe0>;
  1672.  
  1673. mux {
  1674. groups = "tdm_c_slv_sclk_a";
  1675. function = "tdm_c";
  1676. bias-disable;
  1677. };
  1678. };
  1679.  
  1680. tdm-c-slv-sclk-z {
  1681. phandle = <0xe1>;
  1682.  
  1683. mux {
  1684. groups = "tdm_c_slv_sclk_z";
  1685. function = "tdm_c";
  1686. bias-disable;
  1687. };
  1688. };
  1689.  
  1690. uart-a {
  1691. phandle = <0x2b>;
  1692.  
  1693. mux {
  1694. groups = "uart_a_tx\0uart_a_rx";
  1695. function = "uart_a";
  1696. bias-disable;
  1697. };
  1698. };
  1699.  
  1700. uart-a-cts-rts {
  1701. phandle = <0x2c>;
  1702.  
  1703. mux {
  1704. groups = "uart_a_cts\0uart_a_rts";
  1705. function = "uart_a";
  1706. bias-disable;
  1707. };
  1708. };
  1709.  
  1710. uart-b {
  1711. phandle = <0xe2>;
  1712.  
  1713. mux {
  1714. groups = "uart_b_tx\0uart_b_rx";
  1715. function = "uart_b";
  1716. bias-disable;
  1717. };
  1718. };
  1719.  
  1720. uart-c {
  1721. phandle = <0xe3>;
  1722.  
  1723. mux {
  1724. groups = "uart_c_tx\0uart_c_rx";
  1725. function = "uart_c";
  1726. bias-disable;
  1727. };
  1728. };
  1729.  
  1730. uart-c-cts-rts {
  1731. phandle = <0xe4>;
  1732.  
  1733. mux {
  1734. groups = "uart_c_cts\0uart_c_rts";
  1735. function = "uart_c";
  1736. bias-disable;
  1737. };
  1738. };
  1739. };
  1740. };
  1741.  
  1742. temperature-sensor@34800 {
  1743. compatible = "amlogic,g12a-cpu-thermal\0amlogic,g12a-thermal";
  1744. reg = <0x00 0x34800 0x00 0x50>;
  1745. interrupts = <0x00 0x23 0x01>;
  1746. clocks = <0x02 0xd4>;
  1747. #thermal-sensor-cells = <0x00>;
  1748. amlogic,ao-secure = <0x11>;
  1749. phandle = <0x3d>;
  1750. };
  1751.  
  1752. temperature-sensor@34c00 {
  1753. compatible = "amlogic,g12a-ddr-thermal\0amlogic,g12a-thermal";
  1754. reg = <0x00 0x34c00 0x00 0x50>;
  1755. interrupts = <0x00 0x24 0x01>;
  1756. clocks = <0x02 0xd4>;
  1757. #thermal-sensor-cells = <0x00>;
  1758. amlogic,ao-secure = <0x11>;
  1759. phandle = <0x48>;
  1760. };
  1761.  
  1762. phy@36000 {
  1763. compatible = "amlogic,g12a-usb2-phy";
  1764. reg = <0x00 0x36000 0x00 0x2000>;
  1765. clocks = <0x12>;
  1766. clock-names = "xtal";
  1767. resets = <0x05 0x30>;
  1768. reset-names = "phy";
  1769. #phy-cells = <0x00>;
  1770. phy-supply = <0x13>;
  1771. phandle = <0x3a>;
  1772. };
  1773.  
  1774. bus@38000 {
  1775. compatible = "simple-bus";
  1776. reg = <0x00 0x38000 0x00 0x400>;
  1777. #address-cells = <0x02>;
  1778. #size-cells = <0x02>;
  1779. ranges = <0x00 0x00 0x00 0x38000 0x00 0x400>;
  1780. phandle = <0xe5>;
  1781.  
  1782. video-lut@48 {
  1783. compatible = "amlogic,canvas";
  1784. reg = <0x00 0x48 0x00 0x14>;
  1785. phandle = <0x26>;
  1786. };
  1787. };
  1788.  
  1789. phy@3a000 {
  1790. compatible = "amlogic,g12a-usb2-phy";
  1791. reg = <0x00 0x3a000 0x00 0x2000>;
  1792. clocks = <0x12>;
  1793. clock-names = "xtal";
  1794. resets = <0x05 0x31>;
  1795. reset-names = "phy";
  1796. #phy-cells = <0x00>;
  1797. phy-supply = <0x14>;
  1798. phandle = <0x3b>;
  1799. };
  1800.  
  1801. bus@3c000 {
  1802. compatible = "simple-bus";
  1803. reg = <0x00 0x3c000 0x00 0x1400>;
  1804. #address-cells = <0x02>;
  1805. #size-cells = <0x02>;
  1806. ranges = <0x00 0x00 0x00 0x3c000 0x00 0x1400>;
  1807. phandle = <0xe6>;
  1808.  
  1809. system-controller@0 {
  1810. compatible = "amlogic,meson-gx-hhi-sysctrl\0simple-mfd\0syscon";
  1811. reg = <0x00 0x00 0x00 0x400>;
  1812. phandle = <0xe7>;
  1813.  
  1814. clock-controller {
  1815. compatible = "amlogic,g12b-clkc";
  1816. #clock-cells = <0x01>;
  1817. clocks = <0x12>;
  1818. clock-names = "xtal";
  1819. phandle = <0x02>;
  1820. };
  1821.  
  1822. power-controller {
  1823. compatible = "amlogic,meson-g12a-pwrc";
  1824. #power-domain-cells = <0x01>;
  1825. amlogic,ao-sysctrl = <0x15>;
  1826. resets = <0x05 0x05 0x05 0x0a 0x05 0x0d 0x05 0x25 0x05 0x85 0x05 0x86 0x05 0x87 0x05 0x89 0x05 0x8c 0x05 0x8d 0x05 0xe7>;
  1827. reset-names = "viu\0venc\0vcbus\0bt656\0rdma\0venci\0vencp\0vdac\0vdi6\0vencl\0vid_lock";
  1828. clocks = <0x02 0x74 0x02 0x7c>;
  1829. clock-names = "vpu\0vapb";
  1830. assigned-clocks = <0x02 0x6e 0x02 0x70 0x02 0x74 0x02 0x75 0x02 0x77 0x02 0x7b>;
  1831. assigned-clock-parents = <0x02 0x03 0x00 0x02 0x70 0x02 0x04 0x00 0x02 0x77>;
  1832. assigned-clock-rates = <0x00 0x27bc86aa 0x00 0x00 0xee6b280 0x00>;
  1833. phandle = <0x03>;
  1834. };
  1835. };
  1836. };
  1837.  
  1838. phy@46000 {
  1839. compatible = "amlogic,g12a-usb3-pcie-phy";
  1840. reg = <0x00 0x46000 0x00 0x2000>;
  1841. clocks = <0x02 0xc9>;
  1842. clock-names = "ref_clk";
  1843. resets = <0x05 0x0e>;
  1844. reset-names = "phy";
  1845. assigned-clocks = <0x02 0xc9>;
  1846. assigned-clock-rates = <0x5f5e100>;
  1847. #phy-cells = <0x01>;
  1848. phy-supply = <0x14>;
  1849. phandle = <0x06>;
  1850. };
  1851.  
  1852. mdio-multiplexer@4c000 {
  1853. compatible = "amlogic,g12a-mdio-mux";
  1854. reg = <0x00 0x4c000 0x00 0xa4>;
  1855. clocks = <0x02 0x13 0x12 0x02 0xb1>;
  1856. clock-names = "pclk\0clkin0\0clkin1";
  1857. mdio-parent-bus = <0x16>;
  1858. #address-cells = <0x01>;
  1859. #size-cells = <0x00>;
  1860. phandle = <0xe8>;
  1861.  
  1862. mdio@0 {
  1863. reg = <0x00>;
  1864. #address-cells = <0x01>;
  1865. #size-cells = <0x00>;
  1866. phandle = <0xe9>;
  1867.  
  1868. ethernet-phy@0 {
  1869. reg = <0x00>;
  1870. max-speed = <0x3e8>;
  1871. interrupt-parent = <0x17>;
  1872. interrupts = <0x1a 0x08>;
  1873. phandle = <0x0a>;
  1874. };
  1875. };
  1876.  
  1877. mdio@1 {
  1878. reg = <0x01>;
  1879. #address-cells = <0x01>;
  1880. #size-cells = <0x00>;
  1881. phandle = <0xea>;
  1882.  
  1883. ethernet_phy@8 {
  1884. compatible = "ethernet-phy-id0180.3301\0ethernet-phy-ieee802.3-c22";
  1885. interrupts = <0x00 0x09 0x04>;
  1886. reg = <0x08>;
  1887. max-speed = <0x64>;
  1888. phandle = <0xeb>;
  1889. };
  1890. };
  1891. };
  1892.  
  1893. audio-controller@40000 {
  1894. compatible = "amlogic,g12a-pdm\0amlogic,axg-pdm";
  1895. reg = <0x00 0x40000 0x00 0x34>;
  1896. #sound-dai-cells = <0x00>;
  1897. sound-name-prefix = "PDM";
  1898. clocks = <0x18 0x1e 0x18 0x39 0x18 0x3a>;
  1899. clock-names = "pclk\0dclk\0sysclk";
  1900. resets = <0x18 0x00>;
  1901. status = "disabled";
  1902. phandle = <0xec>;
  1903. };
  1904.  
  1905. bus@42000 {
  1906. compatible = "simple-bus";
  1907. reg = <0x00 0x42000 0x00 0x2000>;
  1908. #address-cells = <0x02>;
  1909. #size-cells = <0x02>;
  1910. ranges = <0x00 0x00 0x00 0x42000 0x00 0x2000>;
  1911. phandle = <0xed>;
  1912.  
  1913. clock-controller@0 {
  1914. status = "okay";
  1915. compatible = "amlogic,g12a-audio-clkc";
  1916. reg = <0x00 0x00 0x00 0xb4>;
  1917. #clock-cells = <0x01>;
  1918. #reset-cells = <0x01>;
  1919. clocks = <0x02 0x25 0x02 0x0b 0x02 0x0c 0x02 0x0d 0x02 0x0e 0x02 0x4a 0x02 0x03 0x02 0x04 0x02 0x07>;
  1920. clock-names = "pclk\0mst_in0\0mst_in1\0mst_in2\0mst_in3\0mst_in4\0mst_in5\0mst_in6\0mst_in7";
  1921. resets = <0x05 0x41>;
  1922. phandle = <0x18>;
  1923. };
  1924.  
  1925. audio-controller@100 {
  1926. compatible = "amlogic,g12a-toddr\0amlogic,axg-toddr";
  1927. reg = <0x00 0x100 0x00 0x2c>;
  1928. #sound-dai-cells = <0x00>;
  1929. sound-name-prefix = "TODDR_A";
  1930. interrupts = <0x00 0x94 0x01>;
  1931. clocks = <0x18 0x29>;
  1932. resets = <0x19 0x00 0x18 0x06>;
  1933. reset-names = "arb\0rst";
  1934. amlogic,fifo-depth = <0x200>;
  1935. status = "okay";
  1936. phandle = <0x59>;
  1937. };
  1938.  
  1939. audio-controller@140 {
  1940. compatible = "amlogic,g12a-toddr\0amlogic,axg-toddr";
  1941. reg = <0x00 0x140 0x00 0x2c>;
  1942. #sound-dai-cells = <0x00>;
  1943. sound-name-prefix = "TODDR_B";
  1944. interrupts = <0x00 0x95 0x01>;
  1945. clocks = <0x18 0x2a>;
  1946. resets = <0x19 0x01 0x18 0x07>;
  1947. reset-names = "arb\0rst";
  1948. amlogic,fifo-depth = <0x100>;
  1949. status = "okay";
  1950. phandle = <0x5a>;
  1951. };
  1952.  
  1953. audio-controller@180 {
  1954. compatible = "amlogic,g12a-toddr\0amlogic,axg-toddr";
  1955. reg = <0x00 0x180 0x00 0x2c>;
  1956. #sound-dai-cells = <0x00>;
  1957. sound-name-prefix = "TODDR_C";
  1958. interrupts = <0x00 0x96 0x01>;
  1959. clocks = <0x18 0x2b>;
  1960. resets = <0x19 0x02 0x18 0x08>;
  1961. reset-names = "arb\0rst";
  1962. amlogic,fifo-depth = <0x100>;
  1963. status = "okay";
  1964. phandle = <0x5b>;
  1965. };
  1966.  
  1967. audio-controller@1c0 {
  1968. compatible = "amlogic,g12a-frddr\0amlogic,axg-frddr";
  1969. reg = <0x00 0x1c0 0x00 0x2c>;
  1970. #sound-dai-cells = <0x00>;
  1971. sound-name-prefix = "FRDDR_A";
  1972. interrupts = <0x00 0x98 0x01>;
  1973. clocks = <0x18 0x26>;
  1974. resets = <0x19 0x03 0x18 0x09>;
  1975. reset-names = "arb\0rst";
  1976. amlogic,fifo-depth = <0x200>;
  1977. status = "okay";
  1978. phandle = <0x56>;
  1979. };
  1980.  
  1981. audio-controller@200 {
  1982. compatible = "amlogic,g12a-frddr\0amlogic,axg-frddr";
  1983. reg = <0x00 0x200 0x00 0x2c>;
  1984. #sound-dai-cells = <0x00>;
  1985. sound-name-prefix = "FRDDR_B";
  1986. interrupts = <0x00 0x99 0x01>;
  1987. clocks = <0x18 0x27>;
  1988. resets = <0x19 0x04 0x18 0x0a>;
  1989. reset-names = "arb\0rst";
  1990. amlogic,fifo-depth = <0x100>;
  1991. status = "okay";
  1992. phandle = <0x57>;
  1993. };
  1994.  
  1995. audio-controller@240 {
  1996. compatible = "amlogic,g12a-frddr\0amlogic,axg-frddr";
  1997. reg = <0x00 0x240 0x00 0x2c>;
  1998. #sound-dai-cells = <0x00>;
  1999. sound-name-prefix = "FRDDR_C";
  2000. interrupts = <0x00 0x9a 0x01>;
  2001. clocks = <0x18 0x28>;
  2002. resets = <0x19 0x05 0x18 0x0b>;
  2003. reset-names = "arb\0rst";
  2004. amlogic,fifo-depth = <0x100>;
  2005. status = "okay";
  2006. phandle = <0x58>;
  2007. };
  2008.  
  2009. reset-controller@280 {
  2010. status = "okay";
  2011. compatible = "amlogic,meson-axg-audio-arb";
  2012. reg = <0x00 0x280 0x00 0x04>;
  2013. #reset-cells = <0x01>;
  2014. clocks = <0x18 0x1d>;
  2015. phandle = <0x19>;
  2016. };
  2017.  
  2018. audio-controller@300 {
  2019. compatible = "amlogic,g12a-tdmin\0amlogic,axg-tdmin";
  2020. reg = <0x00 0x300 0x00 0x40>;
  2021. sound-name-prefix = "TDMIN_A";
  2022. resets = <0x18 0x01>;
  2023. clocks = <0x18 0x1f 0x18 0x7b 0x18 0x74 0x18 0x82 0x18 0x82>;
  2024. clock-names = "pclk\0sclk\0sclk_sel\0lrclk\0lrclk_sel";
  2025. status = "okay";
  2026. phandle = <0x54>;
  2027. };
  2028.  
  2029. audio-controller@340 {
  2030. compatible = "amlogic,g12a-tdmin\0amlogic,axg-tdmin";
  2031. reg = <0x00 0x340 0x00 0x40>;
  2032. sound-name-prefix = "TDMIN_B";
  2033. resets = <0x18 0x02>;
  2034. clocks = <0x18 0x20 0x18 0x7c 0x18 0x75 0x18 0x83 0x18 0x83>;
  2035. clock-names = "pclk\0sclk\0sclk_sel\0lrclk\0lrclk_sel";
  2036. status = "disabled";
  2037. phandle = <0xee>;
  2038. };
  2039.  
  2040. audio-controller@380 {
  2041. compatible = "amlogic,g12a-tdmin\0amlogic,axg-tdmin";
  2042. reg = <0x00 0x380 0x00 0x40>;
  2043. sound-name-prefix = "TDMIN_C";
  2044. resets = <0x18 0x03>;
  2045. clocks = <0x18 0x21 0x18 0x7d 0x18 0x76 0x18 0x84 0x18 0x84>;
  2046. clock-names = "pclk\0sclk\0sclk_sel\0lrclk\0lrclk_sel";
  2047. status = "disabled";
  2048. phandle = <0xef>;
  2049. };
  2050.  
  2051. audio-controller@3c0 {
  2052. compatible = "amlogic,g12a-tdmin\0amlogic,axg-tdmin";
  2053. reg = <0x00 0x3c0 0x00 0x40>;
  2054. sound-name-prefix = "TDMIN_LB";
  2055. resets = <0x18 0x04>;
  2056. clocks = <0x18 0x22 0x18 0x7e 0x18 0x77 0x18 0x85 0x18 0x85>;
  2057. clock-names = "pclk\0sclk\0sclk_sel\0lrclk\0lrclk_sel";
  2058. status = "disabled";
  2059. phandle = <0xf0>;
  2060. };
  2061.  
  2062. audio-controller@400 {
  2063. compatible = "amlogic,g12a-spdifin\0amlogic,axg-spdifin";
  2064. reg = <0x00 0x400 0x00 0x30>;
  2065. #sound-dai-cells = <0x00>;
  2066. sound-name-prefix = "SPDIFIN";
  2067. interrupts = <0x00 0x97 0x01>;
  2068. clocks = <0x18 0x2d 0x18 0x38>;
  2069. clock-names = "pclk\0refclk";
  2070. resets = <0x18 0x11>;
  2071. status = "disabled";
  2072. phandle = <0xf1>;
  2073. };
  2074.  
  2075. audio-controller@480 {
  2076. compatible = "amlogic,g12a-spdifout\0amlogic,axg-spdifout";
  2077. reg = <0x00 0x480 0x00 0x50>;
  2078. #sound-dai-cells = <0x00>;
  2079. sound-name-prefix = "SPDIFOUT";
  2080. clocks = <0x18 0x2e 0x18 0x37>;
  2081. clock-names = "pclk\0mclk";
  2082. resets = <0x18 0x0f>;
  2083. status = "disabled";
  2084. phandle = <0xf2>;
  2085. };
  2086.  
  2087. audio-controller@500 {
  2088. compatible = "amlogic,g12a-tdmout";
  2089. reg = <0x00 0x500 0x00 0x40>;
  2090. sound-name-prefix = "TDMOUT_A";
  2091. resets = <0x18 0x0c>;
  2092. clocks = <0x18 0x23 0x18 0x7f 0x18 0x78 0x18 0x86 0x18 0x86>;
  2093. clock-names = "pclk\0sclk\0sclk_sel\0lrclk\0lrclk_sel";
  2094. status = "okay";
  2095. phandle = <0x55>;
  2096. };
  2097.  
  2098. audio-controller@540 {
  2099. compatible = "amlogic,g12a-tdmout";
  2100. reg = <0x00 0x540 0x00 0x40>;
  2101. sound-name-prefix = "TDMOUT_B";
  2102. resets = <0x18 0x0d>;
  2103. clocks = <0x18 0x24 0x18 0x80 0x18 0x79 0x18 0x87 0x18 0x87>;
  2104. clock-names = "pclk\0sclk\0sclk_sel\0lrclk\0lrclk_sel";
  2105. status = "disabled";
  2106. phandle = <0xf3>;
  2107. };
  2108.  
  2109. audio-controller@580 {
  2110. compatible = "amlogic,g12a-tdmout";
  2111. reg = <0x00 0x580 0x00 0x40>;
  2112. sound-name-prefix = "TDMOUT_C";
  2113. resets = <0x18 0x0e>;
  2114. clocks = <0x18 0x25 0x18 0x81 0x18 0x7a 0x18 0x88 0x18 0x88>;
  2115. clock-names = "pclk\0sclk\0sclk_sel\0lrclk\0lrclk_sel";
  2116. status = "disabled";
  2117. phandle = <0xf4>;
  2118. };
  2119.  
  2120. audio-controller@680 {
  2121. compatible = "amlogic,g12a-spdifout\0amlogic,axg-spdifout";
  2122. reg = <0x00 0x680 0x00 0x50>;
  2123. #sound-dai-cells = <0x00>;
  2124. sound-name-prefix = "SPDIFOUT_B";
  2125. clocks = <0x18 0x97 0x18 0x98>;
  2126. clock-names = "pclk\0mclk";
  2127. resets = <0x18 0x10>;
  2128. status = "disabled";
  2129. phandle = <0xf5>;
  2130. };
  2131.  
  2132. audio-controller@740 {
  2133. compatible = "amlogic,g12a-toacodec";
  2134. reg = <0x00 0x740 0x00 0x04>;
  2135. #sound-dai-cells = <0x01>;
  2136. sound-name-prefix = "TOACODEC";
  2137. resets = <0x18 0x17>;
  2138. status = "disabled";
  2139. phandle = <0xf6>;
  2140. };
  2141.  
  2142. audio-controller@744 {
  2143. compatible = "amlogic,g12a-tohdmitx";
  2144. reg = <0x00 0x744 0x00 0x04>;
  2145. #sound-dai-cells = <0x01>;
  2146. sound-name-prefix = "TOHDMITX";
  2147. resets = <0x18 0x18>;
  2148. status = "okay";
  2149. phandle = <0x5d>;
  2150. };
  2151. };
  2152. };
  2153.  
  2154. bus@ff800000 {
  2155. compatible = "simple-bus";
  2156. reg = <0x00 0xff800000 0x00 0x100000>;
  2157. #address-cells = <0x02>;
  2158. #size-cells = <0x02>;
  2159. ranges = <0x00 0x00 0x00 0xff800000 0x00 0x100000>;
  2160. phandle = <0xf7>;
  2161.  
  2162. sys-ctrl@0 {
  2163. compatible = "amlogic,meson-gx-ao-sysctrl\0simple-mfd\0syscon";
  2164. reg = <0x00 0x00 0x00 0x100>;
  2165. #address-cells = <0x02>;
  2166. #size-cells = <0x02>;
  2167. ranges = <0x00 0x00 0x00 0x00 0x00 0x100>;
  2168. phandle = <0x15>;
  2169.  
  2170. clock-controller {
  2171. compatible = "amlogic,meson-g12a-aoclkc";
  2172. #clock-cells = <0x01>;
  2173. #reset-cells = <0x01>;
  2174. clocks = <0x12 0x02 0x0a>;
  2175. clock-names = "xtal\0mpeg-clk";
  2176. phandle = <0x1b>;
  2177. };
  2178.  
  2179. pinctrl@14 {
  2180. compatible = "amlogic,meson-g12a-aobus-pinctrl";
  2181. #address-cells = <0x02>;
  2182. #size-cells = <0x02>;
  2183. ranges;
  2184. phandle = <0x1a>;
  2185.  
  2186. bank@14 {
  2187. reg = <0x00 0x14 0x00 0x08 0x00 0x1c 0x00 0x08 0x00 0x24 0x00 0x14>;
  2188. reg-names = "mux\0ds\0gpio";
  2189. gpio-controller;
  2190. #gpio-cells = <0x02>;
  2191. gpio-ranges = <0x1a 0x00 0x00 0x0f>;
  2192. phandle = <0x51>;
  2193. };
  2194.  
  2195. i2c_ao_sck_pins {
  2196. phandle = <0x21>;
  2197.  
  2198. mux {
  2199. groups = "i2c_ao_sck";
  2200. function = "i2c_ao";
  2201. bias-disable;
  2202. drive-strength-microamp = <0xbb8>;
  2203. };
  2204. };
  2205.  
  2206. i2c_ao_sda {
  2207. phandle = <0x22>;
  2208.  
  2209. mux {
  2210. groups = "i2c_ao_sda";
  2211. function = "i2c_ao";
  2212. bias-disable;
  2213. drive-strength-microamp = <0xbb8>;
  2214. };
  2215. };
  2216.  
  2217. i2c_ao_sck_e {
  2218. phandle = <0xf8>;
  2219.  
  2220. mux {
  2221. groups = "i2c_ao_sck_e";
  2222. function = "i2c_ao";
  2223. bias-disable;
  2224. drive-strength-microamp = <0xbb8>;
  2225. };
  2226. };
  2227.  
  2228. i2c_ao_sda_e {
  2229. phandle = <0xf9>;
  2230.  
  2231. mux {
  2232. groups = "i2c_ao_sda_e";
  2233. function = "i2c_ao";
  2234. bias-disable;
  2235. drive-strength-microamp = <0xbb8>;
  2236. };
  2237. };
  2238.  
  2239. mclk0-ao {
  2240. phandle = <0xfa>;
  2241.  
  2242. mux {
  2243. groups = "mclk0_ao";
  2244. function = "mclk0_ao";
  2245. bias-disable;
  2246. drive-strength-microamp = <0xbb8>;
  2247. };
  2248. };
  2249.  
  2250. tdm-ao-b-din0 {
  2251. phandle = <0xfb>;
  2252.  
  2253. mux {
  2254. groups = "tdm_ao_b_din0";
  2255. function = "tdm_ao_b";
  2256. bias-disable;
  2257. };
  2258. };
  2259.  
  2260. spdif-ao-out {
  2261. phandle = <0xfc>;
  2262.  
  2263. mux {
  2264. groups = "spdif_ao_out";
  2265. function = "spdif_ao_out";
  2266. drive-strength-microamp = <0x1f4>;
  2267. bias-disable;
  2268. };
  2269. };
  2270.  
  2271. tdm-ao-b-din1 {
  2272. phandle = <0xfd>;
  2273.  
  2274. mux {
  2275. groups = "tdm_ao_b_din1";
  2276. function = "tdm_ao_b";
  2277. bias-disable;
  2278. };
  2279. };
  2280.  
  2281. tdm-ao-b-din2 {
  2282. phandle = <0xfe>;
  2283.  
  2284. mux {
  2285. groups = "tdm_ao_b_din2";
  2286. function = "tdm_ao_b";
  2287. bias-disable;
  2288. };
  2289. };
  2290.  
  2291. tdm-ao-b-dout0 {
  2292. phandle = <0xff>;
  2293.  
  2294. mux {
  2295. groups = "tdm_ao_b_dout0";
  2296. function = "tdm_ao_b";
  2297. bias-disable;
  2298. drive-strength-microamp = <0xbb8>;
  2299. };
  2300. };
  2301.  
  2302. tdm-ao-b-dout1 {
  2303. phandle = <0x100>;
  2304.  
  2305. mux {
  2306. groups = "tdm_ao_b_dout1";
  2307. function = "tdm_ao_b";
  2308. bias-disable;
  2309. drive-strength-microamp = <0xbb8>;
  2310. };
  2311. };
  2312.  
  2313. tdm-ao-b-dout2 {
  2314. phandle = <0x101>;
  2315.  
  2316. mux {
  2317. groups = "tdm_ao_b_dout2";
  2318. function = "tdm_ao_b";
  2319. bias-disable;
  2320. drive-strength-microamp = <0xbb8>;
  2321. };
  2322. };
  2323.  
  2324. tdm-ao-b-fs {
  2325. phandle = <0x102>;
  2326.  
  2327. mux {
  2328. groups = "tdm_ao_b_fs";
  2329. function = "tdm_ao_b";
  2330. bias-disable;
  2331. drive-strength-microamp = <0xbb8>;
  2332. };
  2333. };
  2334.  
  2335. tdm-ao-b-sclk {
  2336. phandle = <0x103>;
  2337.  
  2338. mux {
  2339. groups = "tdm_ao_b_sclk";
  2340. function = "tdm_ao_b";
  2341. bias-disable;
  2342. drive-strength-microamp = <0xbb8>;
  2343. };
  2344. };
  2345.  
  2346. tdm-ao-b-slv-fs {
  2347. phandle = <0x104>;
  2348.  
  2349. mux {
  2350. groups = "tdm_ao_b_slv_fs";
  2351. function = "tdm_ao_b";
  2352. bias-disable;
  2353. };
  2354. };
  2355.  
  2356. tdm-ao-b-slv-sclk {
  2357. phandle = <0x105>;
  2358.  
  2359. mux {
  2360. groups = "tdm_ao_b_slv_sclk";
  2361. function = "tdm_ao_b";
  2362. bias-disable;
  2363. };
  2364. };
  2365.  
  2366. uart-a-ao {
  2367. phandle = <0x20>;
  2368.  
  2369. mux {
  2370. groups = "uart_ao_a_tx\0uart_ao_a_rx";
  2371. function = "uart_ao_a";
  2372. bias-disable;
  2373. };
  2374. };
  2375.  
  2376. uart-ao-a-cts-rts {
  2377. phandle = <0x106>;
  2378.  
  2379. mux {
  2380. groups = "uart_ao_a_cts\0uart_ao_a_rts";
  2381. function = "uart_ao_a";
  2382. bias-disable;
  2383. };
  2384. };
  2385.  
  2386. pwm-a-e {
  2387. phandle = <0x2a>;
  2388.  
  2389. mux {
  2390. groups = "pwm_a_e";
  2391. function = "pwm_a_e";
  2392. bias-disable;
  2393. };
  2394. };
  2395.  
  2396. pwm-ao-a {
  2397. phandle = <0x107>;
  2398.  
  2399. mux {
  2400. groups = "pwm_ao_a";
  2401. function = "pwm_ao_a";
  2402. bias-disable;
  2403. };
  2404. };
  2405.  
  2406. pwm-ao-b {
  2407. phandle = <0x108>;
  2408.  
  2409. mux {
  2410. groups = "pwm_ao_b";
  2411. function = "pwm_ao_b";
  2412. bias-disable;
  2413. };
  2414. };
  2415.  
  2416. pwm-ao-c-4 {
  2417. phandle = <0x109>;
  2418.  
  2419. mux {
  2420. groups = "pwm_ao_c_4";
  2421. function = "pwm_ao_c";
  2422. bias-disable;
  2423. };
  2424. };
  2425.  
  2426. pwm-ao-c-6 {
  2427. phandle = <0x10a>;
  2428.  
  2429. mux {
  2430. groups = "pwm_ao_c_6";
  2431. function = "pwm_ao_c";
  2432. bias-disable;
  2433. };
  2434. };
  2435.  
  2436. pwm-ao-d-5 {
  2437. phandle = <0x10b>;
  2438.  
  2439. mux {
  2440. groups = "pwm_ao_d_5";
  2441. function = "pwm_ao_d";
  2442. bias-disable;
  2443. };
  2444. };
  2445.  
  2446. pwm-ao-d-10 {
  2447. phandle = <0x10c>;
  2448.  
  2449. mux {
  2450. groups = "pwm_ao_d_10";
  2451. function = "pwm_ao_d";
  2452. bias-disable;
  2453. };
  2454. };
  2455.  
  2456. pwm-ao-d-e {
  2457. phandle = <0x1f>;
  2458.  
  2459. mux {
  2460. groups = "pwm_ao_d_e";
  2461. function = "pwm_ao_d";
  2462. };
  2463. };
  2464.  
  2465. remote-input-ao {
  2466. phandle = <0x24>;
  2467.  
  2468. mux {
  2469. groups = "remote_ao_input";
  2470. function = "remote_ao_input";
  2471. bias-disable;
  2472. };
  2473. };
  2474. };
  2475. };
  2476.  
  2477. rtc@a8 {
  2478. compatible = "amlogic,meson-vrtc";
  2479. reg = <0x00 0xa8 0x00 0x04>;
  2480. phandle = <0x10d>;
  2481. };
  2482.  
  2483. cec@100 {
  2484. compatible = "amlogic,meson-gx-ao-cec";
  2485. reg = <0x00 0x100 0x00 0x14>;
  2486. interrupts = <0x00 0xc7 0x01>;
  2487. clocks = <0x1b 0x1b>;
  2488. clock-names = "core";
  2489. status = "disabled";
  2490. pinctrl-0 = <0x1c>;
  2491. pinctrl-names = "default";
  2492. hdmi-phandle = <0x1d>;
  2493. phandle = <0x10e>;
  2494. };
  2495.  
  2496. ao-secure@140 {
  2497. compatible = "amlogic,meson-gx-ao-secure\0syscon";
  2498. reg = <0x00 0x140 0x00 0x140>;
  2499. amlogic,has-chip-id;
  2500. phandle = <0x11>;
  2501. };
  2502.  
  2503. cec@280 {
  2504. compatible = "amlogic,meson-g12a-ao-cec";
  2505. reg = <0x00 0x280 0x00 0x1c>;
  2506. interrupts = <0x00 0xcb 0x01>;
  2507. clocks = <0x1b 0x13>;
  2508. clock-names = "oscin";
  2509. status = "okay";
  2510. pinctrl-0 = <0x1e>;
  2511. pinctrl-names = "default";
  2512. hdmi-phandle = <0x1d>;
  2513. phandle = <0x10f>;
  2514. };
  2515.  
  2516. pwm@2000 {
  2517. compatible = "amlogic,meson-g12a-ao-pwm-cd";
  2518. reg = <0x00 0x2000 0x00 0x20>;
  2519. #pwm-cells = <0x03>;
  2520. status = "okay";
  2521. pinctrl-0 = <0x1f>;
  2522. pinctrl-names = "default";
  2523. clocks = <0x12>;
  2524. clock-names = "clkin1";
  2525. phandle = <0x60>;
  2526. };
  2527.  
  2528. serial@3000 {
  2529. compatible = "amlogic,meson-gx-uart\0amlogic,meson-ao-uart";
  2530. reg = <0x00 0x3000 0x00 0x18>;
  2531. interrupts = <0x00 0xc1 0x01>;
  2532. clocks = <0x12 0x1b 0x04 0x12>;
  2533. clock-names = "xtal\0pclk\0baud";
  2534. status = "okay";
  2535. pinctrl-0 = <0x20>;
  2536. pinctrl-names = "default";
  2537. phandle = <0x110>;
  2538. };
  2539.  
  2540. serial@4000 {
  2541. compatible = "amlogic,meson-gx-uart\0amlogic,meson-ao-uart";
  2542. reg = <0x00 0x4000 0x00 0x18>;
  2543. interrupts = <0x00 0xc5 0x01>;
  2544. clocks = <0x12 0x1b 0x06 0x12>;
  2545. clock-names = "xtal\0pclk\0baud";
  2546. status = "disabled";
  2547. phandle = <0x111>;
  2548. };
  2549.  
  2550. i2c@5000 {
  2551. compatible = "amlogic,meson-axg-i2c";
  2552. status = "okay";
  2553. reg = <0x00 0x5000 0x00 0x20>;
  2554. interrupts = <0x00 0xc3 0x01>;
  2555. #address-cells = <0x01>;
  2556. #size-cells = <0x00>;
  2557. clocks = <0x02 0x18>;
  2558. pinctrl-0 = <0x21 0x22>;
  2559. pinctrl-names = "default";
  2560. phandle = <0x112>;
  2561.  
  2562. system-controller@18 {
  2563. compatible = "khadas,mcu";
  2564. reg = <0x18>;
  2565. #cooling-cells = <0x02>;
  2566. phandle = <0x47>;
  2567. };
  2568.  
  2569. gpio-controller@20 {
  2570. compatible = "ti,tca6408";
  2571. reg = <0x20>;
  2572. vcc-supply = <0x23>;
  2573. gpio-controller;
  2574. #gpio-cells = <0x02>;
  2575. phandle = <0x52>;
  2576. };
  2577.  
  2578. rtc@51 {
  2579. compatible = "haoyu,hym8563";
  2580. reg = <0x51>;
  2581. #clock-cells = <0x00>;
  2582. phandle = <0x113>;
  2583. };
  2584. };
  2585.  
  2586. pwm@7000 {
  2587. compatible = "amlogic,meson-g12a-ao-pwm-ab";
  2588. reg = <0x00 0x7000 0x00 0x20>;
  2589. #pwm-cells = <0x03>;
  2590. status = "disabled";
  2591. phandle = <0x114>;
  2592. };
  2593.  
  2594. ir@8000 {
  2595. compatible = "amlogic,meson-gxbb-ir";
  2596. reg = <0x00 0x8000 0x00 0x20>;
  2597. interrupts = <0x00 0xc4 0x01>;
  2598. status = "okay";
  2599. pinctrl-0 = <0x24>;
  2600. pinctrl-names = "default";
  2601. linux,rc-map-name = "rc-khadas";
  2602. phandle = <0x115>;
  2603. };
  2604.  
  2605. adc@9000 {
  2606. compatible = "amlogic,meson-g12a-saradc\0amlogic,meson-saradc";
  2607. reg = <0x00 0x9000 0x00 0x48>;
  2608. #io-channel-cells = <0x01>;
  2609. interrupts = <0x00 0xc8 0x01>;
  2610. clocks = <0x12 0x1b 0x08 0x1b 0x12 0x1b 0x10>;
  2611. clock-names = "clkin\0core\0adc_clk\0adc_sel";
  2612. status = "okay";
  2613. vref-supply = <0x25>;
  2614. phandle = <0x50>;
  2615. };
  2616. };
  2617.  
  2618. video-decoder@ff620000 {
  2619. compatible = "amlogic,g12a-vdec";
  2620. reg = <0x00 0xff620000 0x00 0x10000 0x00 0xffd0e180 0x00 0xe4>;
  2621. reg-names = "dos\0esparser";
  2622. interrupts = <0x00 0x2c 0x01 0x00 0x20 0x01>;
  2623. interrupt-names = "vdec\0esparser";
  2624. amlogic,ao-sysctrl = <0x15>;
  2625. amlogic,canvas = <0x26>;
  2626. clocks = <0x02 0x2e 0x02 0x10 0x02 0xcc 0x02 0xcf 0x02 0xd2>;
  2627. clock-names = "dos_parser\0dos\0vdec_1\0vdec_hevc\0vdec_hevcf";
  2628. resets = <0x05 0x28>;
  2629. reset-names = "esparser";
  2630. phandle = <0x116>;
  2631. };
  2632.  
  2633. vpu@ff900000 {
  2634. compatible = "amlogic,meson-g12a-vpu";
  2635. reg = <0x00 0xff900000 0x00 0x100000 0x00 0xff63c000 0x00 0x1000>;
  2636. reg-names = "vpu\0hhi";
  2637. interrupts = <0x00 0x03 0x01>;
  2638. #address-cells = <0x01>;
  2639. #size-cells = <0x00>;
  2640. amlogic,canvas = <0x26>;
  2641. power-domains = <0x03 0x00>;
  2642. phandle = <0x117>;
  2643.  
  2644. port@0 {
  2645. reg = <0x00>;
  2646. phandle = <0x118>;
  2647. };
  2648.  
  2649. port@1 {
  2650. reg = <0x01>;
  2651. phandle = <0x119>;
  2652.  
  2653. endpoint {
  2654. remote-endpoint = <0x27>;
  2655. phandle = <0x0e>;
  2656. };
  2657. };
  2658. };
  2659.  
  2660. interrupt-controller@ffc01000 {
  2661. compatible = "arm,gic-400";
  2662. reg = <0x00 0xffc01000 0x00 0x1000 0x00 0xffc02000 0x00 0x2000 0x00 0xffc04000 0x00 0x2000 0x00 0xffc06000 0x00 0x2000>;
  2663. interrupt-controller;
  2664. interrupts = <0x01 0x09 0xff04>;
  2665. #interrupt-cells = <0x03>;
  2666. #address-cells = <0x00>;
  2667. phandle = <0x01>;
  2668. };
  2669.  
  2670. bus@ffd00000 {
  2671. compatible = "simple-bus";
  2672. reg = <0x00 0xffd00000 0x00 0x100000>;
  2673. #address-cells = <0x02>;
  2674. #size-cells = <0x02>;
  2675. ranges = <0x00 0x00 0x00 0xffd00000 0x00 0x100000>;
  2676. phandle = <0x11a>;
  2677.  
  2678. reset-controller@1004 {
  2679. compatible = "amlogic,meson-axg-reset";
  2680. reg = <0x00 0x1004 0x00 0x9c>;
  2681. #reset-cells = <0x01>;
  2682. phandle = <0x05>;
  2683. };
  2684.  
  2685. interrupt-controller@f080 {
  2686. compatible = "amlogic,meson-g12a-gpio-intc\0amlogic,meson-gpio-intc";
  2687. reg = <0x00 0xf080 0x00 0x10>;
  2688. interrupt-controller;
  2689. #interrupt-cells = <0x02>;
  2690. amlogic,channel-interrupts = <0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47>;
  2691. phandle = <0x17>;
  2692. };
  2693.  
  2694. watchdog@f0d0 {
  2695. compatible = "amlogic,meson-gxbb-wdt";
  2696. reg = <0x00 0xf0d0 0x00 0x10>;
  2697. clocks = <0x12>;
  2698. phandle = <0x11b>;
  2699. };
  2700.  
  2701. spi@13000 {
  2702. compatible = "amlogic,meson-g12a-spicc";
  2703. reg = <0x00 0x13000 0x00 0x44>;
  2704. interrupts = <0x00 0x51 0x04>;
  2705. clocks = <0x02 0x17 0x02 0x102>;
  2706. clock-names = "core\0pclk";
  2707. #address-cells = <0x01>;
  2708. #size-cells = <0x00>;
  2709. status = "disabled";
  2710. phandle = <0x11c>;
  2711. };
  2712.  
  2713. spi@15000 {
  2714. compatible = "amlogic,meson-g12a-spicc";
  2715. reg = <0x00 0x15000 0x00 0x44>;
  2716. interrupts = <0x00 0x5a 0x04>;
  2717. clocks = <0x02 0x1d 0x02 0x105>;
  2718. clock-names = "core\0pclk";
  2719. #address-cells = <0x01>;
  2720. #size-cells = <0x00>;
  2721. status = "disabled";
  2722. phandle = <0x11d>;
  2723. };
  2724.  
  2725. spi@14000 {
  2726. compatible = "amlogic,meson-gxbb-spifc";
  2727. status = "disabled";
  2728. reg = <0x00 0x14000 0x00 0x80>;
  2729. #address-cells = <0x01>;
  2730. #size-cells = <0x00>;
  2731. clocks = <0x02 0x0a>;
  2732. pinctrl-0 = <0x28>;
  2733. pinctrl-names = "default";
  2734. phandle = <0x11e>;
  2735.  
  2736. spi-flash@0 {
  2737. #address-cells = <0x01>;
  2738. #size-cells = <0x01>;
  2739. compatible = "winbond,w25q128fw\0jedec,spi-nor";
  2740. reg = <0x00>;
  2741. spi-max-frequency = <0x632ea00>;
  2742. phandle = <0x11f>;
  2743. };
  2744. };
  2745.  
  2746. pwm@19000 {
  2747. compatible = "amlogic,meson-g12a-ee-pwm";
  2748. reg = <0x00 0x19000 0x00 0x20>;
  2749. #pwm-cells = <0x03>;
  2750. status = "okay";
  2751. pinctrl-0 = <0x29>;
  2752. pinctrl-names = "default";
  2753. phandle = <0x5e>;
  2754. };
  2755.  
  2756. pwm@1a000 {
  2757. compatible = "amlogic,meson-g12a-ee-pwm";
  2758. reg = <0x00 0x1a000 0x00 0x20>;
  2759. #pwm-cells = <0x03>;
  2760. status = "disabled";
  2761. phandle = <0x120>;
  2762. };
  2763.  
  2764. pwm@1b000 {
  2765. compatible = "amlogic,meson-g12a-ee-pwm";
  2766. reg = <0x00 0x1b000 0x00 0x20>;
  2767. #pwm-cells = <0x03>;
  2768. status = "okay";
  2769. pinctrl-0 = <0x2a>;
  2770. pinctrl-names = "default";
  2771. clocks = <0x12>;
  2772. clock-names = "clkin0";
  2773. phandle = <0x5f>;
  2774. };
  2775.  
  2776. i2c@1c000 {
  2777. compatible = "amlogic,meson-axg-i2c";
  2778. status = "disabled";
  2779. reg = <0x00 0x1c000 0x00 0x20>;
  2780. interrupts = <0x00 0x27 0x01>;
  2781. #address-cells = <0x01>;
  2782. #size-cells = <0x00>;
  2783. clocks = <0x02 0x18>;
  2784. phandle = <0x121>;
  2785. };
  2786.  
  2787. i2c@1d000 {
  2788. compatible = "amlogic,meson-axg-i2c";
  2789. status = "disabled";
  2790. reg = <0x00 0x1d000 0x00 0x20>;
  2791. interrupts = <0x00 0xd7 0x01>;
  2792. #address-cells = <0x01>;
  2793. #size-cells = <0x00>;
  2794. clocks = <0x02 0x18>;
  2795. phandle = <0x122>;
  2796. };
  2797.  
  2798. i2c@1e000 {
  2799. compatible = "amlogic,meson-axg-i2c";
  2800. status = "disabled";
  2801. reg = <0x00 0x1e000 0x00 0x20>;
  2802. interrupts = <0x00 0xd6 0x01>;
  2803. #address-cells = <0x01>;
  2804. #size-cells = <0x00>;
  2805. clocks = <0x02 0x18>;
  2806. phandle = <0x123>;
  2807. };
  2808.  
  2809. i2c@1f000 {
  2810. compatible = "amlogic,meson-axg-i2c";
  2811. status = "disabled";
  2812. reg = <0x00 0x1f000 0x00 0x20>;
  2813. interrupts = <0x00 0x15 0x01>;
  2814. #address-cells = <0x01>;
  2815. #size-cells = <0x00>;
  2816. clocks = <0x02 0x18>;
  2817. phandle = <0x124>;
  2818. };
  2819.  
  2820. clock-measure@18000 {
  2821. compatible = "amlogic,meson-g12a-clk-measure";
  2822. reg = <0x00 0x18000 0x00 0x10>;
  2823. phandle = <0x125>;
  2824. };
  2825.  
  2826. serial@22000 {
  2827. compatible = "amlogic,meson-gx-uart";
  2828. reg = <0x00 0x22000 0x00 0x18>;
  2829. interrupts = <0x00 0x5d 0x01>;
  2830. clocks = <0x12 0x02 0x39 0x12>;
  2831. clock-names = "xtal\0pclk\0baud";
  2832. status = "disabled";
  2833. phandle = <0x126>;
  2834. };
  2835.  
  2836. serial@23000 {
  2837. compatible = "amlogic,meson-gx-uart";
  2838. reg = <0x00 0x23000 0x00 0x18>;
  2839. interrupts = <0x00 0x4b 0x01>;
  2840. clocks = <0x12 0x02 0x2a 0x12>;
  2841. clock-names = "xtal\0pclk\0baud";
  2842. status = "disabled";
  2843. phandle = <0x127>;
  2844. };
  2845.  
  2846. serial@24000 {
  2847. compatible = "amlogic,meson-gx-uart";
  2848. reg = <0x00 0x24000 0x00 0x18>;
  2849. interrupts = <0x00 0x1a 0x01>;
  2850. clocks = <0x12 0x02 0x1c 0x12>;
  2851. clock-names = "xtal\0pclk\0baud";
  2852. status = "okay";
  2853. fifo-size = <0x80>;
  2854. pinctrl-0 = <0x2b 0x2c>;
  2855. pinctrl-names = "default";
  2856. uart-has-rtscts;
  2857. phandle = <0x128>;
  2858.  
  2859. bluetooth {
  2860. compatible = "brcm,bcm43438-bt";
  2861. shutdown-gpios = <0x07 0x52 0x00>;
  2862. max-speed = <0x1e8480>;
  2863. clocks = <0x2d>;
  2864. clock-names = "lpo";
  2865. };
  2866. };
  2867. };
  2868.  
  2869. sd@ffe03000 {
  2870. compatible = "amlogic,meson-axg-mmc";
  2871. reg = <0x00 0xffe03000 0x00 0x800>;
  2872. interrupts = <0x00 0xbd 0x01>;
  2873. status = "okay";
  2874. clocks = <0x02 0x21 0x02 0x3c 0x02 0x02>;
  2875. clock-names = "core\0clkin0\0clkin1";
  2876. resets = <0x05 0x2c>;
  2877. amlogic,dram-access-quirk;
  2878. pinctrl-0 = <0x2e>;
  2879. pinctrl-1 = <0x2f>;
  2880. pinctrl-names = "default\0clk-gate";
  2881. #address-cells = <0x01>;
  2882. #size-cells = <0x00>;
  2883. bus-width = <0x04>;
  2884. cap-sd-highspeed;
  2885. max-frequency = <0x5f5e100>;
  2886. non-removable;
  2887. disable-wp;
  2888. keep-power-in-suspend;
  2889. mmc-pwrseq = <0x30>;
  2890. vmmc-supply = <0x31>;
  2891. vqmmc-supply = <0x25>;
  2892. phandle = <0x129>;
  2893.  
  2894. wifi@1 {
  2895. reg = <0x01>;
  2896. compatible = "brcm,bcm4329-fmac";
  2897. phandle = <0x12a>;
  2898. };
  2899. };
  2900.  
  2901. sd@ffe05000 {
  2902. compatible = "amlogic,meson-axg-mmc";
  2903. reg = <0x00 0xffe05000 0x00 0x800>;
  2904. interrupts = <0x00 0xbe 0x01>;
  2905. status = "okay";
  2906. clocks = <0x02 0x22 0x02 0x3d 0x02 0x02>;
  2907. clock-names = "core\0clkin0\0clkin1";
  2908. resets = <0x05 0x2d>;
  2909. pinctrl-0 = <0x32>;
  2910. pinctrl-1 = <0x33>;
  2911. pinctrl-names = "default\0clk-gate";
  2912. bus-width = <0x04>;
  2913. cap-sd-highspeed;
  2914. max-frequency = <0x2faf080>;
  2915. disable-wp;
  2916. cd-gpios = <0x07 0x2f 0x01>;
  2917. vmmc-supply = <0x31>;
  2918. vqmmc-supply = <0x31>;
  2919. phandle = <0x12b>;
  2920. };
  2921.  
  2922. mmc@ffe07000 {
  2923. compatible = "amlogic,meson-axg-mmc";
  2924. reg = <0x00 0xffe07000 0x00 0x800>;
  2925. interrupts = <0x00 0xbf 0x01>;
  2926. status = "okay";
  2927. clocks = <0x02 0x23 0x02 0x3e 0x02 0x02>;
  2928. clock-names = "core\0clkin0\0clkin1";
  2929. resets = <0x05 0x2e>;
  2930. pinctrl-0 = <0x34 0x35 0x36>;
  2931. pinctrl-1 = <0x37>;
  2932. pinctrl-names = "default\0clk-gate";
  2933. bus-width = <0x08>;
  2934. cap-mmc-highspeed;
  2935. mmc-ddr-1_8v;
  2936. mmc-hs200-1_8v;
  2937. max-frequency = <0xbebc200>;
  2938. disable-wp;
  2939. mmc-pwrseq = <0x38>;
  2940. vmmc-supply = <0x23>;
  2941. vqmmc-supply = <0x39>;
  2942. phandle = <0x12c>;
  2943. };
  2944.  
  2945. usb@ffe09000 {
  2946. status = "okay";
  2947. compatible = "amlogic,meson-g12a-usb-ctrl";
  2948. reg = <0x00 0xffe09000 0x00 0xa0>;
  2949. interrupts = <0x00 0x10 0x04>;
  2950. #address-cells = <0x02>;
  2951. #size-cells = <0x02>;
  2952. ranges;
  2953. clocks = <0x02 0x2f>;
  2954. resets = <0x05 0x22>;
  2955. dr_mode = "peripheral";
  2956. phys = <0x3a 0x3b 0x06 0x04>;
  2957. phy-names = "usb2-phy0\0usb2-phy1\0usb3-phy0";
  2958. phandle = <0x12d>;
  2959.  
  2960. usb@ff400000 {
  2961. compatible = "amlogic,meson-g12a-usb\0snps,dwc2";
  2962. reg = <0x00 0xff400000 0x00 0x40000>;
  2963. interrupts = <0x00 0x1f 0x04>;
  2964. clocks = <0x02 0x37>;
  2965. clock-names = "otg";
  2966. phys = <0x3b>;
  2967. phy-names = "usb2-phy";
  2968. dr_mode = "peripheral";
  2969. g-rx-fifo-size = <0xc0>;
  2970. g-np-tx-fifo-size = <0x80>;
  2971. g-tx-fifo-size = <0x80 0x80 0x10 0x10 0x10>;
  2972. phandle = <0x12e>;
  2973. };
  2974.  
  2975. usb@ff500000 {
  2976. compatible = "snps,dwc3";
  2977. reg = <0x00 0xff500000 0x00 0x100000>;
  2978. interrupts = <0x00 0x1e 0x04>;
  2979. dr_mode = "host";
  2980. snps,dis_u2_susphy_quirk;
  2981. snps,quirk-frame-length-adjustment = <0x20>;
  2982. snps,parkmode-disable-ss-quirk;
  2983. phandle = <0x12f>;
  2984. };
  2985. };
  2986.  
  2987. gpu@ffe40000 {
  2988. compatible = "amlogic,meson-g12a-mali\0arm,mali-bifrost";
  2989. reg = <0x00 0xffe40000 0x00 0x40000>;
  2990. interrupt-parent = <0x01>;
  2991. interrupts = <0x00 0xa2 0x04 0x00 0xa1 0x04 0x00 0xa0 0x04>;
  2992. interrupt-names = "job\0mmu\0gpu";
  2993. clocks = <0x02 0xaf>;
  2994. resets = <0x05 0x14 0x05 0x4e>;
  2995. operating-points-v2 = <0x3c>;
  2996. #cooling-cells = <0x02>;
  2997. dma-coherent;
  2998. phandle = <0x4a>;
  2999. };
  3000. };
  3001.  
  3002. thermal-zones {
  3003.  
  3004. cpu-thermal {
  3005. polling-delay = <0x3e8>;
  3006. polling-delay-passive = <0x64>;
  3007. thermal-sensors = <0x3d>;
  3008. phandle = <0x130>;
  3009.  
  3010. trips {
  3011.  
  3012. cpu-passive {
  3013. temperature = <0x14c08>;
  3014. hysteresis = <0x7d0>;
  3015. type = "passive";
  3016. phandle = <0x3e>;
  3017. };
  3018.  
  3019. cpu-hot {
  3020. temperature = <0x17318>;
  3021. hysteresis = <0x7d0>;
  3022. type = "hot";
  3023. phandle = <0x45>;
  3024. };
  3025.  
  3026. cpu-critical {
  3027. temperature = <0x1adb0>;
  3028. hysteresis = <0x7d0>;
  3029. type = "critical";
  3030. phandle = <0x131>;
  3031. };
  3032.  
  3033. cpu-active {
  3034. temperature = <0x13880>;
  3035. hysteresis = <0x7d0>;
  3036. type = "active";
  3037. phandle = <0x46>;
  3038. };
  3039. };
  3040.  
  3041. cooling-maps {
  3042.  
  3043. map0 {
  3044. trip = <0x3e>;
  3045. cooling-device = <0x3f 0xffffffff 0xffffffff 0x40 0xffffffff 0xffffffff 0x41 0xffffffff 0xffffffff 0x42 0xffffffff 0xffffffff 0x43 0xffffffff 0xffffffff 0x44 0xffffffff 0xffffffff>;
  3046. };
  3047.  
  3048. map1 {
  3049. trip = <0x45>;
  3050. cooling-device = <0x3f 0xffffffff 0xffffffff 0x40 0xffffffff 0xffffffff 0x41 0xffffffff 0xffffffff 0x42 0xffffffff 0xffffffff 0x43 0xffffffff 0xffffffff 0x44 0xffffffff 0xffffffff>;
  3051. };
  3052.  
  3053. map {
  3054. trip = <0x46>;
  3055. cooling-device = <0x47 0xffffffff 0xffffffff>;
  3056. };
  3057. };
  3058. };
  3059.  
  3060. ddr-thermal {
  3061. polling-delay = <0x3e8>;
  3062. polling-delay-passive = <0x64>;
  3063. thermal-sensors = <0x48>;
  3064. phandle = <0x132>;
  3065.  
  3066. trips {
  3067.  
  3068. ddr-passive {
  3069. temperature = <0x14c08>;
  3070. hysteresis = <0x7d0>;
  3071. type = "passive";
  3072. phandle = <0x49>;
  3073. };
  3074.  
  3075. ddr-critical {
  3076. temperature = <0x1adb0>;
  3077. hysteresis = <0x7d0>;
  3078. type = "critical";
  3079. phandle = <0x133>;
  3080. };
  3081. };
  3082.  
  3083. cooling-maps {
  3084.  
  3085. map {
  3086. trip = <0x49>;
  3087. cooling-device = <0x4a 0xffffffff 0xffffffff>;
  3088. };
  3089. };
  3090. };
  3091. };
  3092.  
  3093. timer {
  3094. compatible = "arm,armv8-timer";
  3095. interrupts = <0x01 0x0d 0xff08 0x01 0x0e 0xff08 0x01 0x0b 0xff08 0x01 0x0a 0xff08>;
  3096. arm,no-tick-in-suspend;
  3097. };
  3098.  
  3099. xtal-clk {
  3100. compatible = "fixed-clock";
  3101. clock-frequency = <0x16e3600>;
  3102. clock-output-names = "xtal";
  3103. #clock-cells = <0x00>;
  3104. phandle = <0x12>;
  3105. };
  3106.  
  3107. audio-controller-0 {
  3108. compatible = "amlogic,axg-tdm-iface";
  3109. #sound-dai-cells = <0x00>;
  3110. sound-name-prefix = "TDM_A";
  3111. clocks = <0x18 0x31 0x18 0x4f 0x18 0x56>;
  3112. clock-names = "mclk\0sclk\0lrclk";
  3113. status = "okay";
  3114. phandle = <0x5c>;
  3115. };
  3116.  
  3117. audio-controller-1 {
  3118. compatible = "amlogic,axg-tdm-iface";
  3119. #sound-dai-cells = <0x00>;
  3120. sound-name-prefix = "TDM_B";
  3121. clocks = <0x18 0x32 0x18 0x50 0x18 0x57>;
  3122. clock-names = "mclk\0sclk\0lrclk";
  3123. status = "disabled";
  3124. phandle = <0x134>;
  3125. };
  3126.  
  3127. audio-controller-2 {
  3128. compatible = "amlogic,axg-tdm-iface";
  3129. #sound-dai-cells = <0x00>;
  3130. sound-name-prefix = "TDM_C";
  3131. clocks = <0x18 0x33 0x18 0x51 0x18 0x58>;
  3132. clock-names = "mclk\0sclk\0lrclk";
  3133. status = "disabled";
  3134. phandle = <0x135>;
  3135. };
  3136.  
  3137. cpus {
  3138. #address-cells = <0x02>;
  3139. #size-cells = <0x00>;
  3140.  
  3141. cpu-map {
  3142.  
  3143. cluster0 {
  3144.  
  3145. core0 {
  3146. cpu = <0x3f>;
  3147. };
  3148.  
  3149. core1 {
  3150. cpu = <0x40>;
  3151. };
  3152. };
  3153.  
  3154. cluster1 {
  3155.  
  3156. core0 {
  3157. cpu = <0x41>;
  3158. };
  3159.  
  3160. core1 {
  3161. cpu = <0x42>;
  3162. };
  3163.  
  3164. core2 {
  3165. cpu = <0x43>;
  3166. };
  3167.  
  3168. core3 {
  3169. cpu = <0x44>;
  3170. };
  3171. };
  3172. };
  3173.  
  3174. cpu@0 {
  3175. device_type = "cpu";
  3176. compatible = "arm,cortex-a53";
  3177. reg = <0x00 0x00>;
  3178. enable-method = "psci";
  3179. capacity-dmips-mhz = <0x250>;
  3180. next-level-cache = <0x4b>;
  3181. #cooling-cells = <0x02>;
  3182. cpu-supply = <0x4c>;
  3183. operating-points-v2 = <0x4d>;
  3184. clocks = <0x02 0xbb>;
  3185. clock-latency = <0xc350>;
  3186. phandle = <0x3f>;
  3187. };
  3188.  
  3189. cpu@1 {
  3190. device_type = "cpu";
  3191. compatible = "arm,cortex-a53";
  3192. reg = <0x00 0x01>;
  3193. enable-method = "psci";
  3194. capacity-dmips-mhz = <0x250>;
  3195. next-level-cache = <0x4b>;
  3196. #cooling-cells = <0x02>;
  3197. cpu-supply = <0x4c>;
  3198. operating-points-v2 = <0x4d>;
  3199. clocks = <0x02 0xbb>;
  3200. clock-latency = <0xc350>;
  3201. phandle = <0x40>;
  3202. };
  3203.  
  3204. cpu@100 {
  3205. device_type = "cpu";
  3206. compatible = "arm,cortex-a73";
  3207. reg = <0x00 0x100>;
  3208. enable-method = "psci";
  3209. capacity-dmips-mhz = <0x400>;
  3210. next-level-cache = <0x4b>;
  3211. #cooling-cells = <0x02>;
  3212. cpu-supply = <0x4e>;
  3213. operating-points-v2 = <0x4f>;
  3214. clocks = <0x02 0xe0>;
  3215. clock-latency = <0xc350>;
  3216. phandle = <0x41>;
  3217. };
  3218.  
  3219. cpu@101 {
  3220. device_type = "cpu";
  3221. compatible = "arm,cortex-a73";
  3222. reg = <0x00 0x101>;
  3223. enable-method = "psci";
  3224. capacity-dmips-mhz = <0x400>;
  3225. next-level-cache = <0x4b>;
  3226. #cooling-cells = <0x02>;
  3227. cpu-supply = <0x4e>;
  3228. operating-points-v2 = <0x4f>;
  3229. clocks = <0x02 0xe0>;
  3230. clock-latency = <0xc350>;
  3231. phandle = <0x42>;
  3232. };
  3233.  
  3234. cpu@102 {
  3235. device_type = "cpu";
  3236. compatible = "arm,cortex-a73";
  3237. reg = <0x00 0x102>;
  3238. enable-method = "psci";
  3239. capacity-dmips-mhz = <0x400>;
  3240. next-level-cache = <0x4b>;
  3241. #cooling-cells = <0x02>;
  3242. cpu-supply = <0x4e>;
  3243. operating-points-v2 = <0x4f>;
  3244. clocks = <0x02 0xe0>;
  3245. clock-latency = <0xc350>;
  3246. phandle = <0x43>;
  3247. };
  3248.  
  3249. cpu@103 {
  3250. device_type = "cpu";
  3251. compatible = "arm,cortex-a73";
  3252. reg = <0x00 0x103>;
  3253. enable-method = "psci";
  3254. capacity-dmips-mhz = <0x400>;
  3255. next-level-cache = <0x4b>;
  3256. #cooling-cells = <0x02>;
  3257. cpu-supply = <0x4e>;
  3258. operating-points-v2 = <0x4f>;
  3259. clocks = <0x02 0xe0>;
  3260. clock-latency = <0xc350>;
  3261. phandle = <0x44>;
  3262. };
  3263.  
  3264. l2-cache0 {
  3265. compatible = "cache";
  3266. phandle = <0x4b>;
  3267. };
  3268. };
  3269.  
  3270. opp-table-0 {
  3271. compatible = "operating-points-v2";
  3272. opp-shared;
  3273. phandle = <0x4d>;
  3274.  
  3275. opp-100000000 {
  3276. opp-hz = <0x00 0x5f5e100>;
  3277. opp-microvolt = <0xb2778>;
  3278. };
  3279.  
  3280. opp-250000000 {
  3281. opp-hz = <0x00 0xee6b280>;
  3282. opp-microvolt = <0xb2778>;
  3283. };
  3284.  
  3285. opp-500000000 {
  3286. opp-hz = <0x00 0x1dcd6500>;
  3287. opp-microvolt = <0xb2778>;
  3288. };
  3289.  
  3290. opp-667000000 {
  3291. opp-hz = <0x00 0x27c19cc0>;
  3292. opp-microvolt = <0xb2778>;
  3293. };
  3294.  
  3295. opp-1000000000 {
  3296. opp-hz = <0x00 0x3b9aca00>;
  3297. opp-microvolt = <0xb9ca8>;
  3298. };
  3299.  
  3300. opp-1200000000 {
  3301. opp-hz = <0x00 0x47868c00>;
  3302. opp-microvolt = <0xbeac8>;
  3303. };
  3304.  
  3305. opp-1398000000 {
  3306. opp-hz = <0x00 0x5353c980>;
  3307. opp-microvolt = <0xc5ff8>;
  3308. };
  3309.  
  3310. opp-1512000000 {
  3311. opp-hz = <0x00 0x5a1f4a00>;
  3312. opp-microvolt = <0xd2348>;
  3313. };
  3314.  
  3315. opp-1608000000 {
  3316. opp-hz = <0x00 0x5fd82200>;
  3317. opp-microvolt = <0xdbf88>;
  3318. };
  3319.  
  3320. opp-1704000000 {
  3321. opp-hz = <0x00 0x6590fa00>;
  3322. opp-microvolt = <0xe82d8>;
  3323. };
  3324.  
  3325. opp-1800000000 {
  3326. opp-hz = <0x00 0x6b49d200>;
  3327. opp-microvolt = <0xf4628>;
  3328. };
  3329. };
  3330.  
  3331. opp-table-1 {
  3332. compatible = "operating-points-v2";
  3333. opp-shared;
  3334. phandle = <0x4f>;
  3335.  
  3336. opp-100000000 {
  3337. opp-hz = <0x00 0x5f5e100>;
  3338. opp-microvolt = <0xb2778>;
  3339. };
  3340.  
  3341. opp-250000000 {
  3342. opp-hz = <0x00 0xee6b280>;
  3343. opp-microvolt = <0xb2778>;
  3344. };
  3345.  
  3346. opp-500000000 {
  3347. opp-hz = <0x00 0x1dcd6500>;
  3348. opp-microvolt = <0xb2778>;
  3349. };
  3350.  
  3351. opp-667000000 {
  3352. opp-hz = <0x00 0x27c19cc0>;
  3353. opp-microvolt = <0xb2778>;
  3354. };
  3355.  
  3356. opp-1000000000 {
  3357. opp-hz = <0x00 0x3b9aca00>;
  3358. opp-microvolt = <0xb2778>;
  3359. };
  3360.  
  3361. opp-1200000000 {
  3362. opp-hz = <0x00 0x47868c00>;
  3363. opp-microvolt = <0xb7598>;
  3364. };
  3365.  
  3366. opp-1398000000 {
  3367. opp-hz = <0x00 0x5353c980>;
  3368. opp-microvolt = <0xbc3b8>;
  3369. };
  3370.  
  3371. opp-1512000000 {
  3372. opp-hz = <0x00 0x5a1f4a00>;
  3373. opp-microvolt = <0xbc3b8>;
  3374. };
  3375.  
  3376. opp-1608000000 {
  3377. opp-hz = <0x00 0x5fd82200>;
  3378. opp-microvolt = <0xbeac8>;
  3379. };
  3380.  
  3381. opp-1704000000 {
  3382. opp-hz = <0x00 0x6590fa00>;
  3383. opp-microvolt = <0xc11d8>;
  3384. };
  3385.  
  3386. opp-1800000000 {
  3387. opp-hz = <0x00 0x6b49d200>;
  3388. opp-microvolt = <0xcae18>;
  3389. };
  3390.  
  3391. opp-1908000000 {
  3392. opp-hz = <0x00 0x71b9c500>;
  3393. opp-microvolt = <0xd2348>;
  3394. };
  3395.  
  3396. opp-2016000000 {
  3397. opp-hz = <0x00 0x7829b800>;
  3398. opp-microvolt = <0xde698>;
  3399. };
  3400.  
  3401. opp-2108000000 {
  3402. opp-hz = <0x00 0x7da58700>;
  3403. opp-microvolt = <0xe82d8>;
  3404. };
  3405.  
  3406. opp-2208000000 {
  3407. opp-hz = <0x00 0x839b6800>;
  3408. opp-microvolt = <0xf6d38>;
  3409. };
  3410. };
  3411.  
  3412. memory@0 {
  3413. device_type = "memory";
  3414. reg = <0x00 0x00 0x00 0x80000000>;
  3415. };
  3416.  
  3417. adc-keys {
  3418. compatible = "adc-keys";
  3419. io-channels = <0x50 0x02>;
  3420. io-channel-names = "buttons";
  3421. keyup-threshold-microvolt = <0x1a17b0>;
  3422.  
  3423. button-function {
  3424. label = "Function";
  3425. linux,code = <0x1d0>;
  3426. press-threshold-microvolt = <0x2710>;
  3427. };
  3428. };
  3429.  
  3430. leds {
  3431. compatible = "gpio-leds";
  3432.  
  3433. led-white {
  3434. color = <0x00>;
  3435. function = "status";
  3436. gpios = <0x51 0x04 0x00>;
  3437. linux,default-trigger = "heartbeat";
  3438. };
  3439.  
  3440. led-red {
  3441. color = <0x01>;
  3442. function = "status";
  3443. gpios = <0x52 0x05 0x00>;
  3444. };
  3445. };
  3446.  
  3447. emmc-pwrseq {
  3448. compatible = "mmc-pwrseq-emmc";
  3449. reset-gpios = <0x07 0x25 0x01>;
  3450. phandle = <0x38>;
  3451. };
  3452.  
  3453. gpio-keys-polled {
  3454. compatible = "gpio-keys-polled";
  3455. poll-interval = <0x64>;
  3456.  
  3457. power-button {
  3458. label = "power";
  3459. linux,code = <0x74>;
  3460. gpios = <0x51 0x07 0x01>;
  3461. };
  3462. };
  3463.  
  3464. sdio-pwrseq {
  3465. compatible = "mmc-pwrseq-simple";
  3466. reset-gpios = <0x07 0x47 0x01>;
  3467. clocks = <0x2d>;
  3468. clock-names = "ext_clock";
  3469. phandle = <0x30>;
  3470. };
  3471.  
  3472. regulator-dc_in {
  3473. compatible = "regulator-fixed";
  3474. regulator-name = "DC_IN";
  3475. regulator-min-microvolt = <0x4c4b40>;
  3476. regulator-max-microvolt = <0x4c4b40>;
  3477. regulator-always-on;
  3478. phandle = <0x13>;
  3479. };
  3480.  
  3481. regulator-vcc_5v {
  3482. compatible = "regulator-fixed";
  3483. regulator-name = "VCC_5V";
  3484. regulator-min-microvolt = <0x4c4b40>;
  3485. regulator-max-microvolt = <0x4c4b40>;
  3486. vin-supply = <0x13>;
  3487. gpio = <0x07 0x18 0x06>;
  3488. enable-active-high;
  3489. phandle = <0x0d>;
  3490. };
  3491.  
  3492. regulator-vcc_1v8 {
  3493. compatible = "regulator-fixed";
  3494. regulator-name = "VCC_1V8";
  3495. regulator-min-microvolt = <0x1b7740>;
  3496. regulator-max-microvolt = <0x1b7740>;
  3497. vin-supply = <0x23>;
  3498. regulator-always-on;
  3499. phandle = <0x136>;
  3500. };
  3501.  
  3502. regulator-vcc_3v3 {
  3503. compatible = "regulator-fixed";
  3504. regulator-name = "VCC_3V3";
  3505. regulator-min-microvolt = <0x325aa0>;
  3506. regulator-max-microvolt = <0x325aa0>;
  3507. vin-supply = <0x31>;
  3508. regulator-always-on;
  3509. phandle = <0x23>;
  3510. };
  3511.  
  3512. regulator-vddao_1v8 {
  3513. compatible = "regulator-fixed";
  3514. regulator-name = "VDDIO_AO1V8";
  3515. regulator-min-microvolt = <0x1b7740>;
  3516. regulator-max-microvolt = <0x1b7740>;
  3517. vin-supply = <0x31>;
  3518. regulator-always-on;
  3519. phandle = <0x25>;
  3520. };
  3521.  
  3522. regulator-emmc_1v8 {
  3523. compatible = "regulator-fixed";
  3524. regulator-name = "EMMC_AO1V8";
  3525. regulator-min-microvolt = <0x1b7740>;
  3526. regulator-max-microvolt = <0x1b7740>;
  3527. vin-supply = <0x23>;
  3528. regulator-always-on;
  3529. phandle = <0x39>;
  3530. };
  3531.  
  3532. regulator-vsys_3v3 {
  3533. compatible = "regulator-fixed";
  3534. regulator-name = "VSYS_3V3";
  3535. regulator-min-microvolt = <0x325aa0>;
  3536. regulator-max-microvolt = <0x325aa0>;
  3537. vin-supply = <0x13>;
  3538. regulator-always-on;
  3539. phandle = <0x31>;
  3540. };
  3541.  
  3542. regulator-usb_pwr {
  3543. compatible = "regulator-fixed";
  3544. regulator-name = "USB_PWR";
  3545. regulator-min-microvolt = <0x4c4b40>;
  3546. regulator-max-microvolt = <0x4c4b40>;
  3547. vin-supply = <0x0d>;
  3548. gpio = <0x07 0x37 0x00>;
  3549. enable-active-high;
  3550. phandle = <0x14>;
  3551. };
  3552.  
  3553. hdmi-connector {
  3554. compatible = "hdmi-connector";
  3555. type = "a";
  3556.  
  3557. port {
  3558.  
  3559. endpoint {
  3560. remote-endpoint = <0x53>;
  3561. phandle = <0x0f>;
  3562. };
  3563. };
  3564. };
  3565.  
  3566. sound {
  3567. compatible = "amlogic,axg-sound-card";
  3568. model = "KHADAS-VIM3";
  3569. audio-aux-devs = <0x54 0x55>;
  3570. audio-routing = "TDMOUT_A IN 0\0FRDDR_A OUT 0\0TDMOUT_A IN 1\0FRDDR_B OUT 0\0TDMOUT_A IN 2\0FRDDR_C OUT 0\0TDM_A Playback\0TDMOUT_A OUT\0TDMIN_A IN 0\0TDM_A Capture\0TDMIN_A IN 3\0TDM_A Loopback\0TODDR_A IN 0\0TDMIN_A OUT\0TODDR_B IN 0\0TDMIN_A OUT\0TODDR_C IN 0\0TDMIN_A OUT";
  3571. assigned-clocks = <0x02 0x0d 0x02 0x0b 0x02 0x0c>;
  3572. assigned-clock-parents = <0x00 0x00 0x00>;
  3573. assigned-clock-rates = <0x11940000 0x10266000 0x17700000>;
  3574. status = "okay";
  3575.  
  3576. dai-link-0 {
  3577. sound-dai = <0x56>;
  3578. };
  3579.  
  3580. dai-link-1 {
  3581. sound-dai = <0x57>;
  3582. };
  3583.  
  3584. dai-link-2 {
  3585. sound-dai = <0x58>;
  3586. };
  3587.  
  3588. dai-link-3 {
  3589. sound-dai = <0x59>;
  3590. };
  3591.  
  3592. dai-link-4 {
  3593. sound-dai = <0x5a>;
  3594. };
  3595.  
  3596. dai-link-5 {
  3597. sound-dai = <0x5b>;
  3598. };
  3599.  
  3600. dai-link-6 {
  3601. sound-dai = <0x5c>;
  3602. dai-format = "i2s";
  3603. dai-tdm-slot-tx-mask-0 = <0x01 0x01>;
  3604. dai-tdm-slot-tx-mask-1 = <0x01 0x01>;
  3605. dai-tdm-slot-tx-mask-2 = <0x01 0x01>;
  3606. dai-tdm-slot-tx-mask-3 = <0x01 0x01>;
  3607. mclk-fs = <0x100>;
  3608.  
  3609. codec {
  3610. sound-dai = <0x5d 0x00>;
  3611. };
  3612. };
  3613.  
  3614. dai-link-7 {
  3615. sound-dai = <0x5d 0x03>;
  3616.  
  3617. codec {
  3618. sound-dai = <0x1d>;
  3619. };
  3620. };
  3621. };
  3622.  
  3623. wifi32k {
  3624. compatible = "pwm-clock";
  3625. #clock-cells = <0x00>;
  3626. clock-frequency = <0x8000>;
  3627. pwms = <0x5e 0x00 0x7736 0x00>;
  3628. phandle = <0x2d>;
  3629. };
  3630.  
  3631. regulator-vddcpu-a {
  3632. compatible = "pwm-regulator";
  3633. regulator-name = "VDDCPU_A";
  3634. regulator-min-microvolt = <0xa8750>;
  3635. regulator-max-microvolt = <0x100590>;
  3636. pwm-supply = <0x13>;
  3637. pwms = <0x5f 0x00 0x4e2 0x00>;
  3638. pwm-dutycycle-range = <0x64 0x00>;
  3639. regulator-boot-on;
  3640. regulator-always-on;
  3641. phandle = <0x4e>;
  3642. };
  3643.  
  3644. regulator-vddcpu-b {
  3645. compatible = "pwm-regulator";
  3646. regulator-name = "VDDCPU_B";
  3647. regulator-min-microvolt = <0xa8750>;
  3648. regulator-max-microvolt = <0x100590>;
  3649. pwm-supply = <0x31>;
  3650. pwms = <0x60 0x01 0x4e2 0x00>;
  3651. pwm-dutycycle-range = <0x64 0x00>;
  3652. regulator-boot-on;
  3653. regulator-always-on;
  3654. phandle = <0x4c>;
  3655. };
  3656.  
  3657. __symbols__ {
  3658. simplefb_cvbs = "/chosen/framebuffer-cvbs";
  3659. simplefb_hdmi = "/chosen/framebuffer-hdmi";
  3660. efuse = "/efuse";
  3661. gpu_opp_table = "/opp-table-gpu";
  3662. secmon_reserved = "/reserved-memory/secmon@5000000";
  3663. secmon_reserved_bl32 = "/reserved-memory/secmon@5300000";
  3664. sm = "/secure-monitor";
  3665. pcie = "/soc/pcie@fc000000";
  3666. ethmac = "/soc/ethernet@ff3f0000";
  3667. mdio0 = "/soc/ethernet@ff3f0000/mdio";
  3668. apb = "/soc/bus@ff600000";
  3669. hdmi_tx = "/soc/bus@ff600000/hdmi-tx@0";
  3670. hdmi_tx_venc_port = "/soc/bus@ff600000/hdmi-tx@0/port@0";
  3671. hdmi_tx_in = "/soc/bus@ff600000/hdmi-tx@0/port@0/endpoint";
  3672. hdmi_tx_tmds_port = "/soc/bus@ff600000/hdmi-tx@0/port@1";
  3673. hdmi_tx_tmds_out = "/soc/bus@ff600000/hdmi-tx@0/port@1/endpoint";
  3674. apb_efuse = "/soc/bus@ff600000/bus@30000";
  3675. hwrng = "/soc/bus@ff600000/bus@30000/rng@218";
  3676. acodec = "/soc/bus@ff600000/audio-controller@32000";
  3677. periphs = "/soc/bus@ff600000/bus@34400";
  3678. periphs_pinctrl = "/soc/bus@ff600000/bus@34400/pinctrl@40";
  3679. gpio = "/soc/bus@ff600000/bus@34400/pinctrl@40/bank@40";
  3680. cec_ao_a_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/cec_ao_a_h";
  3681. cec_ao_b_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/cec_ao_b_h";
  3682. emmc_ctrl_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/emmc-ctrl";
  3683. emmc_data_4b_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/emmc-data-4b";
  3684. emmc_data_8b_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/emmc-data-8b";
  3685. emmc_ds_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/emmc-ds";
  3686. emmc_clk_gate_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/emmc_clk_gate";
  3687. hdmitx_ddc_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/hdmitx_ddc";
  3688. hdmitx_hpd_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/hdmitx_hpd";
  3689. i2c0_sda_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c0-sda-c";
  3690. i2c0_sck_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c0-sck-c";
  3691. i2c0_sda_z0_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c0-sda-z0";
  3692. i2c0_sck_z1_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c0-sck-z1";
  3693. i2c0_sda_z7_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c0-sda-z7";
  3694. i2c0_sda_z8_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c0-sda-z8";
  3695. i2c1_sda_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c1-sda-x";
  3696. i2c1_sck_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c1-sck-x";
  3697. i2c1_sda_h2_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c1-sda-h2";
  3698. i2c1_sck_h3_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c1-sck-h3";
  3699. i2c1_sda_h6_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c1-sda-h6";
  3700. i2c1_sck_h7_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c1-sck-h7";
  3701. i2c2_sda_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c2-sda-x";
  3702. i2c2_sck_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c2-sck-x";
  3703. i2c2_sda_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c2-sda-z";
  3704. i2c2_sck_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c2-sck-z";
  3705. i2c3_sda_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c3-sda-h";
  3706. i2c3_sck_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c3-sck-h";
  3707. i2c3_sda_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c3-sda-a";
  3708. i2c3_sck_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/i2c3-sck-a";
  3709. mclk0_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/mclk0-a";
  3710. mclk1_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/mclk1-a";
  3711. mclk1_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/mclk1-x";
  3712. mclk1_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/mclk1-z";
  3713. nor_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/nor";
  3714. pdm_din0_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din0-a";
  3715. pdm_din0_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din0-c";
  3716. pdm_din0_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din0-x";
  3717. pdm_din0_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din0-z";
  3718. pdm_din1_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din1-a";
  3719. pdm_din1_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din1-c";
  3720. pdm_din1_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din1-x";
  3721. pdm_din1_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din1-z";
  3722. pdm_din2_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din2-a";
  3723. pdm_din2_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din2-c";
  3724. pdm_din2_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din2-x";
  3725. pdm_din2_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din2-z";
  3726. pdm_din3_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din3-a";
  3727. pdm_din3_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din3-c";
  3728. pdm_din3_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din3-x";
  3729. pdm_din3_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-din3-z";
  3730. pdm_dclk_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-dclk-a";
  3731. pdm_dclk_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-dclk-c";
  3732. pdm_dclk_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-dclk-x";
  3733. pdm_dclk_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pdm-dclk-z";
  3734. pwm_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-a";
  3735. pwm_b_x7_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-b-x7";
  3736. pwm_b_x19_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-b-x19";
  3737. pwm_c_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-c-c";
  3738. pwm_c_x5_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-c-x5";
  3739. pwm_c_x8_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-c-x8";
  3740. pwm_d_x3_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-d-x3";
  3741. pwm_d_x6_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-d-x6";
  3742. pwm_e_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-e";
  3743. pwm_f_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-f-x";
  3744. pwm_f_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/pwm-f-h";
  3745. sdcard_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/sdcard_c";
  3746. sdcard_clk_gate_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/sdcard_clk_gate_c";
  3747. sdcard_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/sdcard_z";
  3748. sdcard_clk_gate_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/sdcard_clk_gate_z";
  3749. sdio_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/sdio";
  3750. sdio_clk_gate_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/sdio_clk_gate";
  3751. spdif_in_a10_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spdif-in-a10";
  3752. spdif_in_a12_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spdif-in-a12";
  3753. spdif_in_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spdif-in-h";
  3754. spdif_out_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spdif-out-h";
  3755. spdif_out_a11_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spdif-out-a11";
  3756. spdif_out_a13_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spdif-out-a13";
  3757. spicc0_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spicc0-x";
  3758. spicc0_ss0_x_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spicc0-ss0-x";
  3759. spicc0_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spicc0-c";
  3760. spicc1_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spicc1";
  3761. spicc1_ss0_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/spicc1-ss0";
  3762. tdm_a_din0_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-a-din0";
  3763. tdm_a_din1_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-a-din1";
  3764. tdm_a_dout0_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-a-dout0";
  3765. tdm_a_dout1_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-a-dout1";
  3766. tdm_a_fs_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-a-fs";
  3767. tdm_a_sclk_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-a-sclk";
  3768. tdm_a_slv_fs_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-a-slv-fs";
  3769. tdm_a_slv_sclk_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-a-slv-sclk";
  3770. tdm_b_din0_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-din0";
  3771. tdm_b_din1_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-din1";
  3772. tdm_b_din2_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-din2";
  3773. tdm_b_din3_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-din3-a";
  3774. tdm_b_din3_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-din3-h";
  3775. tdm_b_dout0_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-dout0";
  3776. tdm_b_dout1_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-dout1";
  3777. tdm_b_dout2_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-dout2";
  3778. tdm_b_dout3_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-dout3-a";
  3779. tdm_b_dout3_h_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-dout3-h";
  3780. tdm_b_fs_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-fs";
  3781. tdm_b_sclk_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-sclk";
  3782. tdm_b_slv_fs_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-slv-fs";
  3783. tdm_b_slv_sclk_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-b-slv-sclk";
  3784. tdm_c_din0_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-din0-a";
  3785. tdm_c_din0_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-din0-z";
  3786. tdm_c_din1_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-din1-a";
  3787. tdm_c_din1_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-din1-z";
  3788. tdm_c_din2_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-din2-a";
  3789. eth_leds_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/eth-leds";
  3790. eth_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/eth";
  3791. eth_rgmii_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/eth-rgmii";
  3792. tdm_c_din2_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-din2-z";
  3793. tdm_c_din3_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-din3-a";
  3794. tdm_c_din3_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-din3-z";
  3795. tdm_c_dout0_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-dout0-a";
  3796. tdm_c_dout0_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-dout0-z";
  3797. tdm_c_dout1_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-dout1-a";
  3798. tdm_c_dout1_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-dout1-z";
  3799. tdm_c_dout2_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-dout2-a";
  3800. tdm_c_dout2_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-dout2-z";
  3801. tdm_c_dout3_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-dout3-a";
  3802. tdm_c_dout3_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-dout3-z";
  3803. tdm_c_fs_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-fs-a";
  3804. tdm_c_fs_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-fs-z";
  3805. tdm_c_sclk_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-sclk-a";
  3806. tdm_c_sclk_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-sclk-z";
  3807. tdm_c_slv_fs_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-slv-fs-a";
  3808. tdm_c_slv_fs_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-slv-fs-z";
  3809. tdm_c_slv_sclk_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-slv-sclk-a";
  3810. tdm_c_slv_sclk_z_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/tdm-c-slv-sclk-z";
  3811. uart_a_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/uart-a";
  3812. uart_a_cts_rts_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/uart-a-cts-rts";
  3813. uart_b_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/uart-b";
  3814. uart_c_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/uart-c";
  3815. uart_c_cts_rts_pins = "/soc/bus@ff600000/bus@34400/pinctrl@40/uart-c-cts-rts";
  3816. cpu_temp = "/soc/bus@ff600000/temperature-sensor@34800";
  3817. ddr_temp = "/soc/bus@ff600000/temperature-sensor@34c00";
  3818. usb2_phy0 = "/soc/bus@ff600000/phy@36000";
  3819. dmc = "/soc/bus@ff600000/bus@38000";
  3820. canvas = "/soc/bus@ff600000/bus@38000/video-lut@48";
  3821. usb2_phy1 = "/soc/bus@ff600000/phy@3a000";
  3822. hiu = "/soc/bus@ff600000/bus@3c000";
  3823. hhi = "/soc/bus@ff600000/bus@3c000/system-controller@0";
  3824. clkc = "/soc/bus@ff600000/bus@3c000/system-controller@0/clock-controller";
  3825. pwrc = "/soc/bus@ff600000/bus@3c000/system-controller@0/power-controller";
  3826. usb3_pcie_phy = "/soc/bus@ff600000/phy@46000";
  3827. eth_phy = "/soc/bus@ff600000/mdio-multiplexer@4c000";
  3828. ext_mdio = "/soc/bus@ff600000/mdio-multiplexer@4c000/mdio@0";
  3829. external_phy = "/soc/bus@ff600000/mdio-multiplexer@4c000/mdio@0/ethernet-phy@0";
  3830. int_mdio = "/soc/bus@ff600000/mdio-multiplexer@4c000/mdio@1";
  3831. internal_ephy = "/soc/bus@ff600000/mdio-multiplexer@4c000/mdio@1/ethernet_phy@8";
  3832. pdm = "/soc/bus@ff600000/audio-controller@40000";
  3833. audio = "/soc/bus@ff600000/bus@42000";
  3834. clkc_audio = "/soc/bus@ff600000/bus@42000/clock-controller@0";
  3835. toddr_a = "/soc/bus@ff600000/bus@42000/audio-controller@100";
  3836. toddr_b = "/soc/bus@ff600000/bus@42000/audio-controller@140";
  3837. toddr_c = "/soc/bus@ff600000/bus@42000/audio-controller@180";
  3838. frddr_a = "/soc/bus@ff600000/bus@42000/audio-controller@1c0";
  3839. frddr_b = "/soc/bus@ff600000/bus@42000/audio-controller@200";
  3840. frddr_c = "/soc/bus@ff600000/bus@42000/audio-controller@240";
  3841. arb = "/soc/bus@ff600000/bus@42000/reset-controller@280";
  3842. tdmin_a = "/soc/bus@ff600000/bus@42000/audio-controller@300";
  3843. tdmin_b = "/soc/bus@ff600000/bus@42000/audio-controller@340";
  3844. tdmin_c = "/soc/bus@ff600000/bus@42000/audio-controller@380";
  3845. tdmin_lb = "/soc/bus@ff600000/bus@42000/audio-controller@3c0";
  3846. spdifin = "/soc/bus@ff600000/bus@42000/audio-controller@400";
  3847. spdifout = "/soc/bus@ff600000/bus@42000/audio-controller@480";
  3848. tdmout_a = "/soc/bus@ff600000/bus@42000/audio-controller@500";
  3849. tdmout_b = "/soc/bus@ff600000/bus@42000/audio-controller@540";
  3850. tdmout_c = "/soc/bus@ff600000/bus@42000/audio-controller@580";
  3851. spdifout_b = "/soc/bus@ff600000/bus@42000/audio-controller@680";
  3852. toacodec = "/soc/bus@ff600000/bus@42000/audio-controller@740";
  3853. tohdmitx = "/soc/bus@ff600000/bus@42000/audio-controller@744";
  3854. aobus = "/soc/bus@ff800000";
  3855. rti = "/soc/bus@ff800000/sys-ctrl@0";
  3856. clkc_AO = "/soc/bus@ff800000/sys-ctrl@0/clock-controller";
  3857. ao_pinctrl = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14";
  3858. gpio_ao = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/bank@14";
  3859. i2c_ao_sck_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/i2c_ao_sck_pins";
  3860. i2c_ao_sda_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/i2c_ao_sda";
  3861. i2c_ao_sck_e_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/i2c_ao_sck_e";
  3862. i2c_ao_sda_e_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/i2c_ao_sda_e";
  3863. mclk0_ao_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/mclk0-ao";
  3864. tdm_ao_b_din0_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-din0";
  3865. spdif_ao_out_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/spdif-ao-out";
  3866. tdm_ao_b_din1_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-din1";
  3867. tdm_ao_b_din2_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-din2";
  3868. tdm_ao_b_dout0_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-dout0";
  3869. tdm_ao_b_dout1_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-dout1";
  3870. tdm_ao_b_dout2_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-dout2";
  3871. tdm_ao_b_fs_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-fs";
  3872. tdm_ao_b_sclk_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-sclk";
  3873. tdm_ao_b_slv_fs_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-slv-fs";
  3874. tdm_ao_b_slv_sclk_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/tdm-ao-b-slv-sclk";
  3875. uart_ao_a_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/uart-a-ao";
  3876. uart_ao_a_cts_rts_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/uart-ao-a-cts-rts";
  3877. pwm_a_e_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/pwm-a-e";
  3878. pwm_ao_a_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/pwm-ao-a";
  3879. pwm_ao_b_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/pwm-ao-b";
  3880. pwm_ao_c_4_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/pwm-ao-c-4";
  3881. pwm_ao_c_6_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/pwm-ao-c-6";
  3882. pwm_ao_d_5_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/pwm-ao-d-5";
  3883. pwm_ao_d_10_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/pwm-ao-d-10";
  3884. pwm_ao_d_e_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/pwm-ao-d-e";
  3885. remote_input_ao_pins = "/soc/bus@ff800000/sys-ctrl@0/pinctrl@14/remote-input-ao";
  3886. vrtc = "/soc/bus@ff800000/rtc@a8";
  3887. cec_AO = "/soc/bus@ff800000/cec@100";
  3888. sec_AO = "/soc/bus@ff800000/ao-secure@140";
  3889. cecb_AO = "/soc/bus@ff800000/cec@280";
  3890. pwm_AO_cd = "/soc/bus@ff800000/pwm@2000";
  3891. uart_AO = "/soc/bus@ff800000/serial@3000";
  3892. uart_AO_B = "/soc/bus@ff800000/serial@4000";
  3893. i2c_AO = "/soc/bus@ff800000/i2c@5000";
  3894. khadas_mcu = "/soc/bus@ff800000/i2c@5000/system-controller@18";
  3895. gpio_expander = "/soc/bus@ff800000/i2c@5000/gpio-controller@20";
  3896. rtc = "/soc/bus@ff800000/i2c@5000/rtc@51";
  3897. pwm_AO_ab = "/soc/bus@ff800000/pwm@7000";
  3898. ir = "/soc/bus@ff800000/ir@8000";
  3899. saradc = "/soc/bus@ff800000/adc@9000";
  3900. vdec = "/soc/video-decoder@ff620000";
  3901. vpu = "/soc/vpu@ff900000";
  3902. cvbs_vdac_port = "/soc/vpu@ff900000/port@0";
  3903. hdmi_tx_port = "/soc/vpu@ff900000/port@1";
  3904. hdmi_tx_out = "/soc/vpu@ff900000/port@1/endpoint";
  3905. gic = "/soc/interrupt-controller@ffc01000";
  3906. cbus = "/soc/bus@ffd00000";
  3907. reset = "/soc/bus@ffd00000/reset-controller@1004";
  3908. gpio_intc = "/soc/bus@ffd00000/interrupt-controller@f080";
  3909. watchdog = "/soc/bus@ffd00000/watchdog@f0d0";
  3910. spicc0 = "/soc/bus@ffd00000/spi@13000";
  3911. spicc1 = "/soc/bus@ffd00000/spi@15000";
  3912. spifc = "/soc/bus@ffd00000/spi@14000";
  3913. w25q128 = "/soc/bus@ffd00000/spi@14000/spi-flash@0";
  3914. pwm_ef = "/soc/bus@ffd00000/pwm@19000";
  3915. pwm_cd = "/soc/bus@ffd00000/pwm@1a000";
  3916. pwm_ab = "/soc/bus@ffd00000/pwm@1b000";
  3917. i2c3 = "/soc/bus@ffd00000/i2c@1c000";
  3918. i2c2 = "/soc/bus@ffd00000/i2c@1d000";
  3919. i2c1 = "/soc/bus@ffd00000/i2c@1e000";
  3920. i2c0 = "/soc/bus@ffd00000/i2c@1f000";
  3921. clk_msr = "/soc/bus@ffd00000/clock-measure@18000";
  3922. uart_C = "/soc/bus@ffd00000/serial@22000";
  3923. uart_B = "/soc/bus@ffd00000/serial@23000";
  3924. uart_A = "/soc/bus@ffd00000/serial@24000";
  3925. sd_emmc_a = "/soc/sd@ffe03000";
  3926. brcmf = "/soc/sd@ffe03000/wifi@1";
  3927. sd_emmc_b = "/soc/sd@ffe05000";
  3928. sd_emmc_c = "/soc/mmc@ffe07000";
  3929. usb = "/soc/usb@ffe09000";
  3930. dwc2 = "/soc/usb@ffe09000/usb@ff400000";
  3931. dwc3 = "/soc/usb@ffe09000/usb@ff500000";
  3932. mali = "/soc/gpu@ffe40000";
  3933. cpu_thermal = "/thermal-zones/cpu-thermal";
  3934. cpu_passive = "/thermal-zones/cpu-thermal/trips/cpu-passive";
  3935. cpu_hot = "/thermal-zones/cpu-thermal/trips/cpu-hot";
  3936. cpu_critical = "/thermal-zones/cpu-thermal/trips/cpu-critical";
  3937. cpu_active = "/thermal-zones/cpu-thermal/trips/cpu-active";
  3938. ddr_thermal = "/thermal-zones/ddr-thermal";
  3939. ddr_passive = "/thermal-zones/ddr-thermal/trips/ddr-passive";
  3940. ddr_critical = "/thermal-zones/ddr-thermal/trips/ddr-critical";
  3941. xtal = "/xtal-clk";
  3942. tdmif_a = "/audio-controller-0";
  3943. tdmif_b = "/audio-controller-1";
  3944. tdmif_c = "/audio-controller-2";
  3945. cpu0 = "/cpus/cpu@0";
  3946. cpu1 = "/cpus/cpu@1";
  3947. cpu100 = "/cpus/cpu@100";
  3948. cpu101 = "/cpus/cpu@101";
  3949. cpu102 = "/cpus/cpu@102";
  3950. cpu103 = "/cpus/cpu@103";
  3951. l2 = "/cpus/l2-cache0";
  3952. cpu_opp_table_0 = "/opp-table-0";
  3953. cpub_opp_table_1 = "/opp-table-1";
  3954. emmc_pwrseq = "/emmc-pwrseq";
  3955. sdio_pwrseq = "/sdio-pwrseq";
  3956. dc_in = "/regulator-dc_in";
  3957. vcc_5v = "/regulator-vcc_5v";
  3958. vcc_1v8 = "/regulator-vcc_1v8";
  3959. vcc_3v3 = "/regulator-vcc_3v3";
  3960. vddao_1v8 = "/regulator-vddao_1v8";
  3961. emmc_1v8 = "/regulator-emmc_1v8";
  3962. vsys_3v3 = "/regulator-vsys_3v3";
  3963. usb_pwr = "/regulator-usb_pwr";
  3964. hdmi_connector_in = "/hdmi-connector/port/endpoint";
  3965. wifi32k = "/wifi32k";
  3966. vddcpu_a = "/regulator-vddcpu-a";
  3967. vddcpu_b = "/regulator-vddcpu-b";
  3968. };
  3969. };
  3970.  
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