Advertisement
Guest User

Untitled

a guest
Jul 17th, 2019
204
0
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 58.71 KB | None | 0 0
  1. Peripheral, Register, Value, Fields
  2. AAR, TASKS_START, <Write-Only>
  3. AAR, TASKS_STOP, <Write-Only>
  4. AAR, EVENTS_END, 0x00000000
  5. AAR, EVENTS_RESOLVED, 0x00000000
  6. AAR, EVENTS_NOTRESOLVED, 0x00000000
  7. AAR, INTENSET, 0x00000000, END: 0b0; RESOLVED: 0b0; NOTRESOLVED: 0b0
  8. AAR, INTENCLR, 0x00000000, END: 0b0; RESOLVED: 0b0; NOTRESOLVED: 0b0
  9. AAR, STATUS, 0x00000000, STATUS: 0b0000
  10. AAR, ENABLE, 0x00000000, ENABLE: 0b00
  11. AAR, NIRK, 0x00000000, NIRK: 0b00000
  12. AAR, IRKPTR, 0x20006E40, IRKPTR: 0b00100000000000000110111001000000
  13. AAR, ADDRPTR, 0x20006DE0, ADDRPTR: 0b00100000000000000110110111100000
  14. AAR, SCRATCHPTR, 0x20006E0C, SCRATCHPTR: 0b00100000000000000110111000001100
  15. BPROT, CONFIG0, 0x00000000, REGION0: 0b0; REGION1: 0b0; REGION2: 0b0; REGION3: 0b0; REGION4: 0b0; REGION5: 0b0; REGION6: 0b0; REGION7: 0b0; REGION8: 0b0; REGION9: 0b0; REGION10: 0b0; REGION11: 0b0; REGION12: 0b0; REGION13: 0b0; REGION14: 0b0; REGION15: 0b0; REGION16: 0b0; REGION17: 0b0; REGION18: 0b0; REGION19: 0b0; REGION20: 0b0; REGION21: 0b0; REGION22: 0b0; REGION23: 0b0; REGION24: 0b0; REGION25: 0b0; REGION26: 0b0; REGION27: 0b0; REGION28: 0b0; REGION29: 0b0; REGION30: 0b0; REGION31: 0b0
  16. BPROT, CONFIG1, 0x00000000, REGION32: 0b0; REGION33: 0b0; REGION34: 0b0; REGION35: 0b0; REGION36: 0b0; REGION37: 0b0; REGION38: 0b0; REGION39: 0b0; REGION40: 0b0; REGION41: 0b0; REGION42: 0b0; REGION43: 0b0; REGION44: 0b0; REGION45: 0b0; REGION46: 0b0; REGION47: 0b0; REGION48: 0b0; REGION49: 0b0; REGION50: 0b0; REGION51: 0b0; REGION52: 0b0; REGION53: 0b0; REGION54: 0b0; REGION55: 0b0; REGION56: 0b0; REGION57: 0b0; REGION58: 0b0; REGION59: 0b0; REGION60: 0b0; REGION61: 0b0; REGION62: 0b0; REGION63: 0b0
  17. BPROT, DISABLEINDEBUG, 0x00000001, DISABLEINDEBUG: 0b1
  18. BPROT, UNUSED0, 0x00000000
  19. BPROT, CONFIG2, 0x00000000, REGION64: 0b0; REGION65: 0b0; REGION66: 0b0; REGION67: 0b0; REGION68: 0b0; REGION69: 0b0; REGION70: 0b0; REGION71: 0b0; REGION72: 0b0; REGION73: 0b0; REGION74: 0b0; REGION75: 0b0; REGION76: 0b0; REGION77: 0b0; REGION78: 0b0; REGION79: 0b0; REGION80: 0b0; REGION81: 0b0; REGION82: 0b0; REGION83: 0b0; REGION84: 0b0; REGION85: 0b0; REGION86: 0b0; REGION87: 0b0; REGION88: 0b0; REGION89: 0b0; REGION90: 0b0; REGION91: 0b0; REGION92: 0b0; REGION93: 0b0; REGION94: 0b0; REGION95: 0b0
  20. BPROT, CONFIG3, 0x00000000, REGION96: 0b0; REGION97: 0b0; REGION98: 0b0; REGION99: 0b0; REGION100: 0b0; REGION101: 0b0; REGION102: 0b0; REGION103: 0b0; REGION104: 0b0; REGION105: 0b0; REGION106: 0b0; REGION107: 0b0; REGION108: 0b0; REGION109: 0b0; REGION110: 0b0; REGION111: 0b0; REGION112: 0b0; REGION113: 0b0; REGION114: 0b0; REGION115: 0b0; REGION116: 0b0; REGION117: 0b0; REGION118: 0b0; REGION119: 0b0; REGION120: 0b0; REGION121: 0b0; REGION122: 0b0; REGION123: 0b0; REGION124: 0b0; REGION125: 0b0; REGION126: 0b0; REGION127: 0b0
  21. CCM, TASKS_KSGEN, <Write-Only>
  22. CCM, TASKS_CRYPT, <Write-Only>
  23. CCM, TASKS_STOP, <Write-Only>
  24. CCM, EVENTS_ENDKSGEN, 0x00000000
  25. CCM, EVENTS_ENDCRYPT, 0x00000000
  26. CCM, EVENTS_ERROR, 0x00000000
  27. CCM, SHORTS, 0x00000000, ENDKSGEN_CRYPT: 0b0
  28. CCM, INTENSET, 0x00000000, ENDKSGEN: 0b0; ENDCRYPT: 0b0; ERROR: 0b0
  29. CCM, INTENCLR, 0x00000000, ENDKSGEN: 0b0; ENDCRYPT: 0b0; ERROR: 0b0
  30. CCM, MICSTATUS, 0x00000000, MICSTATUS: 0b0
  31. CCM, ENABLE, 0x00000000, ENABLE: 0b00
  32. CCM, MODE, 0x00000000, MODE: 0b0; DATARATE: 0b0; LENGTH: 0b0
  33. CCM, CNFPTR, 0x20006E40, CNFPTR: 0b00100000000000000110111001000000
  34. CCM, INPTR, 0x20006DAC, INPTR: 0b00100000000000000110110110101100
  35. CCM, OUTPTR, 0x20006DE0, OUTPTR: 0b00100000000000000110110111100000
  36. CCM, SCRATCHPTR, 0x20006E0C, SCRATCHPTR: 0b00100000000000000110111000001100
  37. CLOCK, TASKS_HFCLKSTART, <Write-Only>
  38. CLOCK, TASKS_HFCLKSTOP, <Write-Only>
  39. CLOCK, TASKS_LFCLKSTART, <Write-Only>
  40. CLOCK, TASKS_LFCLKSTOP, <Write-Only>
  41. CLOCK, TASKS_CAL, <Write-Only>
  42. CLOCK, TASKS_CTSTART, <Write-Only>
  43. CLOCK, TASKS_CTSTOP, <Write-Only>
  44. CLOCK, EVENTS_HFCLKSTARTED, 0x00000001
  45. CLOCK, EVENTS_LFCLKSTARTED, 0x00000000
  46. CLOCK, EVENTS_DONE, 0x00000000
  47. CLOCK, EVENTS_CTTO, 0x00000000
  48. CLOCK, INTENSET, 0x00000000, HFCLKSTARTED: 0b0; LFCLKSTARTED: 0b0; DONE: 0b0; CTTO: 0b0
  49. CLOCK, INTENCLR, 0x00000000, HFCLKSTARTED: 0b0; LFCLKSTARTED: 0b0; DONE: 0b0; CTTO: 0b0
  50. CLOCK, HFCLKRUN, 0x00000001, STATUS: 0b1
  51. CLOCK, HFCLKSTAT, 0x00010001, SRC: 0b1; STATE: 0b1
  52. CLOCK, LFCLKRUN, 0x00000001, STATUS: 0b1
  53. CLOCK, LFCLKSTAT, 0x00010002, SRC: 0b10; STATE: 0b1
  54. CLOCK, LFCLKSRCCOPY, 0x00000002, SRC: 0b10
  55. CLOCK, LFCLKSRC, 0x00000002, SRC: 0b10; BYPASS: 0b0; EXTERNAL: 0b0
  56. CLOCK, CTIV, 0x00000000, CTIV: 0b0000000
  57. CLOCK, TRACECONFIG, 0x00000000, TRACEPORTSPEED: 0b00; TRACEMUX: 0b00
  58. COMP, TASKS_START, <Write-Only>
  59. COMP, TASKS_STOP, <Write-Only>
  60. COMP, TASKS_SAMPLE, <Write-Only>
  61. COMP, EVENTS_READY, 0x00000000
  62. COMP, EVENTS_DOWN, 0x00000000
  63. COMP, EVENTS_UP, 0x00000000
  64. COMP, EVENTS_CROSS, 0x00000000
  65. COMP, SHORTS, 0x00000000, READY_SAMPLE: 0b0; READY_STOP: 0b0; DOWN_STOP: 0b0; UP_STOP: 0b0; CROSS_STOP: 0b0
  66. COMP, INTEN, 0x00000000, READY: 0b0; DOWN: 0b0; UP: 0b0; CROSS: 0b0
  67. COMP, INTENSET, 0x00000000, READY: 0b0; DOWN: 0b0; UP: 0b0; CROSS: 0b0
  68. COMP, INTENCLR, 0x00000000, READY: 0b0; DOWN: 0b0; UP: 0b0; CROSS: 0b0
  69. COMP, RESULT, 0x00000000, RESULT: 0b0
  70. COMP, ENABLE, 0x00000000, ENABLE: 0b00
  71. COMP, PSEL, 0x00000000, PSEL: 0b000
  72. COMP, REFSEL, 0x00000004, REFSEL: 0b100
  73. COMP, EXTREFSEL, 0x00000000, EXTREFSEL: 0b000
  74. COMP, TH, 0x00000000, THDOWN: 0b000000; THUP: 0b000000
  75. COMP, MODE, 0x00000000, SP: 0b00; MAIN: 0b0
  76. COMP, HYST, 0x00000000, HYST: 0b0
  77. COMP, ISOURCE, 0x00000000, ISOURCE: 0b00
  78. ECB, TASKS_STARTECB, <Write-Only>
  79. ECB, TASKS_STOPECB, <Write-Only>
  80. ECB, EVENTS_ENDECB, 0x00000000
  81. ECB, EVENTS_ERRORECB, 0x00000000
  82. ECB, INTENSET, 0x00000000, ENDECB: 0b0; ERRORECB: 0b0
  83. ECB, INTENCLR, 0x00000000, ENDECB: 0b0; ERRORECB: 0b0
  84. ECB, ECBDATAPTR, 0x00000000, ECBDATAPTR: 0b00000000000000000000000000000000
  85. EGU0, TASKS_TRIGGER[%s], <Write-Only>
  86. EGU0, EVENTS_TRIGGERED[%s], 0x00000000
  87. EGU0, INTEN, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  88. EGU0, INTENSET, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  89. EGU0, INTENCLR, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  90. EGU1, TASKS_TRIGGER[%s], <Write-Only>
  91. EGU1, EVENTS_TRIGGERED[%s], 0x00000000
  92. EGU1, INTEN, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  93. EGU1, INTENSET, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  94. EGU1, INTENCLR, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  95. EGU2, TASKS_TRIGGER[%s], <Write-Only>
  96. EGU2, EVENTS_TRIGGERED[%s], 0x00000000
  97. EGU2, INTEN, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  98. EGU2, INTENSET, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  99. EGU2, INTENCLR, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  100. EGU3, TASKS_TRIGGER[%s], <Write-Only>
  101. EGU3, EVENTS_TRIGGERED[%s], 0x00000000
  102. EGU3, INTEN, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  103. EGU3, INTENSET, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  104. EGU3, INTENCLR, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  105. EGU4, TASKS_TRIGGER[%s], <Write-Only>
  106. EGU4, EVENTS_TRIGGERED[%s], 0x00000000
  107. EGU4, INTEN, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  108. EGU4, INTENSET, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  109. EGU4, INTENCLR, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  110. EGU5, TASKS_TRIGGER[%s], <Write-Only>
  111. EGU5, EVENTS_TRIGGERED[%s], 0x00000000
  112. EGU5, INTEN, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  113. EGU5, INTENSET, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  114. EGU5, INTENCLR, 0x00000000, TRIGGERED0: 0b0; TRIGGERED1: 0b0; TRIGGERED2: 0b0; TRIGGERED3: 0b0; TRIGGERED4: 0b0; TRIGGERED5: 0b0; TRIGGERED6: 0b0; TRIGGERED7: 0b0; TRIGGERED8: 0b0; TRIGGERED9: 0b0; TRIGGERED10: 0b0; TRIGGERED11: 0b0; TRIGGERED12: 0b0; TRIGGERED13: 0b0; TRIGGERED14: 0b0; TRIGGERED15: 0b0
  115. FICR, CODEPAGESIZE, 0x00001000, CODEPAGESIZE: 0b00000000000000000001000000000000
  116. FICR, CODESIZE, 0x00000080, CODESIZE: 0b00000000000000000000000010000000
  117. FICR, DEVICEID[%s], 0xFD2F7613, DEVICEID: 0b11111101001011110111011000010011
  118. FICR, ER[%s], 0xD8CB415C, ER: 0b11011000110010110100000101011100
  119. FICR, IR[%s], 0x62AC4D0B, IR: 0b01100010101011000100110100001011
  120. FICR, DEVICEADDRTYPE, 0xFFFFFFFF, DEVICEADDRTYPE: 0b1
  121. FICR, DEVICEADDR[%s], 0x185CC134, DEVICEADDR: 0b00011000010111001100000100110100
  122. FPU, UNUSED, 0x00000000
  123. GPIOTE, TASKS_OUT[%s], <Write-Only>
  124. GPIOTE, TASKS_SET[%s], <Write-Only>
  125. GPIOTE, TASKS_CLR[%s], <Write-Only>
  126. GPIOTE, EVENTS_IN[%s], 0x00000000
  127. GPIOTE, EVENTS_PORT, 0x00000000
  128. GPIOTE, INTENSET, 0x80000000, IN0: 0b0; IN1: 0b0; IN2: 0b0; IN3: 0b0; IN4: 0b0; IN5: 0b0; IN6: 0b0; IN7: 0b0; PORT: 0b1
  129. GPIOTE, INTENCLR, 0x80000000, IN0: 0b0; IN1: 0b0; IN2: 0b0; IN3: 0b0; IN4: 0b0; IN5: 0b0; IN6: 0b0; IN7: 0b0; PORT: 0b1
  130. GPIOTE, CONFIG[%s], 0x00000000, MODE: 0b00; PSEL: 0b00000; POLARITY: 0b00; OUTINIT: 0b0
  131. I2S, TASKS_START, <Write-Only>
  132. I2S, TASKS_STOP, <Write-Only>
  133. I2S, EVENTS_RXPTRUPD, 0x00000000
  134. I2S, EVENTS_STOPPED, 0x00000000
  135. I2S, EVENTS_TXPTRUPD, 0x00000000
  136. I2S, INTEN, 0x00000000, RXPTRUPD: 0b0; STOPPED: 0b0; TXPTRUPD: 0b0
  137. I2S, INTENSET, 0x00000000, RXPTRUPD: 0b0; STOPPED: 0b0; TXPTRUPD: 0b0
  138. I2S, INTENCLR, 0x00000000, RXPTRUPD: 0b0; STOPPED: 0b0; TXPTRUPD: 0b0
  139. I2S, ENABLE, 0x00000000, ENABLE: 0b0
  140. LPCOMP, TASKS_START, <Write-Only>
  141. LPCOMP, TASKS_STOP, <Write-Only>
  142. LPCOMP, TASKS_SAMPLE, <Write-Only>
  143. LPCOMP, EVENTS_READY, 0x00000000
  144. LPCOMP, EVENTS_DOWN, 0x00000000
  145. LPCOMP, EVENTS_UP, 0x00000000
  146. LPCOMP, EVENTS_CROSS, 0x00000000
  147. LPCOMP, SHORTS, 0x00000000, READY_SAMPLE: 0b0; READY_STOP: 0b0; DOWN_STOP: 0b0; UP_STOP: 0b0; CROSS_STOP: 0b0
  148. LPCOMP, INTENSET, 0x00000000, READY: 0b0; DOWN: 0b0; UP: 0b0; CROSS: 0b0
  149. LPCOMP, INTENCLR, 0x00000000, READY: 0b0; DOWN: 0b0; UP: 0b0; CROSS: 0b0
  150. LPCOMP, RESULT, 0x00000000, RESULT: 0b0
  151. LPCOMP, ENABLE, 0x00000000, ENABLE: 0b00
  152. LPCOMP, PSEL, 0x00000000, PSEL: 0b000
  153. LPCOMP, REFSEL, 0x00000004, REFSEL: 0b0100
  154. LPCOMP, EXTREFSEL, 0x00000000, EXTREFSEL: 0b0
  155. LPCOMP, ANADETECT, 0x00000000, ANADETECT: 0b00
  156. LPCOMP, HYST, 0x00000000, HYST: 0b0
  157. MWU, INTEN, 0x00000000, REGION0WA: 0b0; REGION0RA: 0b0; REGION1WA: 0b0; REGION1RA: 0b0; REGION2WA: 0b0; REGION2RA: 0b0; REGION3WA: 0b0; REGION3RA: 0b0; PREGION0WA: 0b0; PREGION0RA: 0b0; PREGION1WA: 0b0; PREGION1RA: 0b0
  158. MWU, INTENSET, 0x00000000, REGION0WA: 0b0; REGION0RA: 0b0; REGION1WA: 0b0; REGION1RA: 0b0; REGION2WA: 0b0; REGION2RA: 0b0; REGION3WA: 0b0; REGION3RA: 0b0; PREGION0WA: 0b0; PREGION0RA: 0b0; PREGION1WA: 0b0; PREGION1RA: 0b0
  159. MWU, INTENCLR, 0x00000000, REGION0WA: 0b0; REGION0RA: 0b0; REGION1WA: 0b0; REGION1RA: 0b0; REGION2WA: 0b0; REGION2RA: 0b0; REGION3WA: 0b0; REGION3RA: 0b0; PREGION0WA: 0b0; PREGION0RA: 0b0; PREGION1WA: 0b0; PREGION1RA: 0b0
  160. MWU, NMIEN, 0x00000000, REGION0WA: 0b0; REGION0RA: 0b0; REGION1WA: 0b0; REGION1RA: 0b0; REGION2WA: 0b0; REGION2RA: 0b0; REGION3WA: 0b0; REGION3RA: 0b0; PREGION0WA: 0b0; PREGION0RA: 0b0; PREGION1WA: 0b0; PREGION1RA: 0b0
  161. MWU, NMIENSET, 0x00000000, REGION0WA: 0b0; REGION0RA: 0b0; REGION1WA: 0b0; REGION1RA: 0b0; REGION2WA: 0b0; REGION2RA: 0b0; REGION3WA: 0b0; REGION3RA: 0b0; PREGION0WA: 0b0; PREGION0RA: 0b0; PREGION1WA: 0b0; PREGION1RA: 0b0
  162. MWU, NMIENCLR, 0x00000000, REGION0WA: 0b0; REGION0RA: 0b0; REGION1WA: 0b0; REGION1RA: 0b0; REGION2WA: 0b0; REGION2RA: 0b0; REGION3WA: 0b0; REGION3RA: 0b0; PREGION0WA: 0b0; PREGION0RA: 0b0; PREGION1WA: 0b0; PREGION1RA: 0b0
  163. MWU, REGIONEN, 0x00000000, RGN0WA: 0b0; RGN0RA: 0b0; RGN1WA: 0b0; RGN1RA: 0b0; RGN2WA: 0b0; RGN2RA: 0b0; RGN3WA: 0b0; RGN3RA: 0b0; PRGN0WA: 0b0; PRGN0RA: 0b0; PRGN1WA: 0b0; PRGN1RA: 0b0
  164. MWU, REGIONENSET, 0x00000000, RGN0WA: 0b0; RGN0RA: 0b0; RGN1WA: 0b0; RGN1RA: 0b0; RGN2WA: 0b0; RGN2RA: 0b0; RGN3WA: 0b0; RGN3RA: 0b0; PRGN0WA: 0b0; PRGN0RA: 0b0; PRGN1WA: 0b0; PRGN1RA: 0b0
  165. MWU, REGIONENCLR, 0x00000000, RGN0WA: 0b0; RGN0RA: 0b0; RGN1WA: 0b0; RGN1RA: 0b0; RGN2WA: 0b0; RGN2RA: 0b0; RGN3WA: 0b0; RGN3RA: 0b0; PRGN0WA: 0b0; PRGN0RA: 0b0; PRGN1WA: 0b0; PRGN1RA: 0b0
  166. NFCT, TASKS_ACTIVATE, <Write-Only>
  167. NFCT, TASKS_DISABLE, <Write-Only>
  168. NFCT, TASKS_SENSE, <Write-Only>
  169. NFCT, TASKS_STARTTX, <Write-Only>
  170. NFCT, TASKS_ENABLERXDATA, <Write-Only>
  171. NFCT, TASKS_GOIDLE, <Write-Only>
  172. NFCT, TASKS_GOSLEEP, <Write-Only>
  173. NFCT, EVENTS_READY, 0x00000000
  174. NFCT, EVENTS_FIELDDETECTED, 0x00000000
  175. NFCT, EVENTS_FIELDLOST, 0x00000000
  176. NFCT, EVENTS_TXFRAMESTART, 0x00000000
  177. NFCT, EVENTS_TXFRAMEEND, 0x00000000
  178. NFCT, EVENTS_RXFRAMESTART, 0x00000000
  179. NFCT, EVENTS_RXFRAMEEND, 0x00000000
  180. NFCT, EVENTS_ERROR, 0x00000000
  181. NFCT, EVENTS_RXERROR, 0x00000000
  182. NFCT, EVENTS_ENDRX, 0x00000000
  183. NFCT, EVENTS_ENDTX, 0x00000000
  184. NFCT, EVENTS_AUTOCOLRESSTARTED, 0x00000000
  185. NFCT, EVENTS_COLLISION, 0x00000000
  186. NFCT, EVENTS_SELECTED, 0x00000000
  187. NFCT, EVENTS_STARTED, 0x00000000
  188. NFCT, SHORTS, 0x00000000, FIELDDETECTED_ACTIVATE: 0b0; FIELDLOST_SENSE: 0b0
  189. NFCT, INTEN, 0x00000000, READY: 0b0; FIELDDETECTED: 0b0; FIELDLOST: 0b0; TXFRAMESTART: 0b0; TXFRAMEEND: 0b0; RXFRAMESTART: 0b0; RXFRAMEEND: 0b0; ERROR: 0b0; RXERROR: 0b0; ENDRX: 0b0; ENDTX: 0b0; AUTOCOLRESSTARTED: 0b0; COLLISION: 0b0; SELECTED: 0b0; STARTED: 0b0
  190. NFCT, INTENSET, 0x00000000, READY: 0b0; FIELDDETECTED: 0b0; FIELDLOST: 0b0; TXFRAMESTART: 0b0; TXFRAMEEND: 0b0; RXFRAMESTART: 0b0; RXFRAMEEND: 0b0; ERROR: 0b0; RXERROR: 0b0; ENDRX: 0b0; ENDTX: 0b0; AUTOCOLRESSTARTED: 0b0; COLLISION: 0b0; SELECTED: 0b0; STARTED: 0b0
  191. NFCT, INTENCLR, 0x00000000, READY: 0b0; FIELDDETECTED: 0b0; FIELDLOST: 0b0; TXFRAMESTART: 0b0; TXFRAMEEND: 0b0; RXFRAMESTART: 0b0; RXFRAMEEND: 0b0; ERROR: 0b0; RXERROR: 0b0; ENDRX: 0b0; ENDTX: 0b0; AUTOCOLRESSTARTED: 0b0; COLLISION: 0b0; SELECTED: 0b0; STARTED: 0b0
  192. NFCT, ERRORSTATUS, 0x00000000, FRAMEDELAYTIMEOUT: 0b0; NFCFIELDTOOSTRONG: 0b0; NFCFIELDTOOWEAK: 0b0
  193. NFCT, CURRENTLOADCTRL, 0x00000000, CURRENTLOADCTRL: 0b000000
  194. NFCT, FIELDPRESENT, 0x00000000, FIELDPRESENT: 0b0; LOCKDETECT: 0b0
  195. NFCT, FRAMEDELAYMIN, 0x00000480, FRAMEDELAYMIN: 0b0000010010000000
  196. NFCT, FRAMEDELAYMAX, 0x00001000, FRAMEDELAYMAX: 0b0001000000000000
  197. NFCT, FRAMEDELAYMODE, 0x00000001, FRAMEDELAYMODE: 0b01
  198. NFCT, PACKETPTR, 0x00000000, PTR: 0b00000000000000000000000000000000
  199. NFCT, MAXLEN, 0x00000000, MAXLEN: 0b000000000
  200. NFCT, NFCID1_LAST, 0x00006363, NFCID1_Z: 0b01100011; NFCID1_Y: 0b01100011; NFCID1_X: 0b00000000; NFCID1_W: 0b00000000
  201. NFCT, NFCID1_2ND_LAST, 0x00000000, NFCID1_V: 0b00000000; NFCID1_U: 0b00000000; NFCID1_T: 0b00000000
  202. NFCT, NFCID1_3RD_LAST, 0x00000000, NFCID1_S: 0b00000000; NFCID1_R: 0b00000000; NFCID1_Q: 0b00000000
  203. NFCT, SENSRES, 0x00000001, BITFRAMESDD: 0b00001; RFU5: 0b0; NFCIDSIZE: 0b00; PLATFCONFIG: 0b0000; RFU74: 0b0000
  204. NFCT, SELRES, 0x00000000, RFU10: 0b00; CASCADE: 0b0; RFU43: 0b00; PROTOCOL: 0b00; RFU7: 0b0
  205. NVMC, READY, 0x00000001, READY: 0b1
  206. NVMC, CONFIG, 0x00000000, WEN: 0b00
  207. NVMC, ERASEPAGE, 0x00000000, ERASEPAGE: 0b00000000000000000000000000000000
  208. NVMC, ERASEPCR1, 0x00000000, ERASEPCR1: 0b00000000000000000000000000000000
  209. NVMC, ERASEALL, 0x00000000, ERASEALL: 0b0
  210. NVMC, ERASEPCR0, 0x00000000, ERASEPCR0: 0b00000000000000000000000000000000
  211. NVMC, ERASEUICR, 0x00000000, ERASEUICR: 0b0
  212. NVMC, ICACHECNF, 0x00000001, CACHEEN: 0b1; CACHEPROFEN: 0b0
  213. NVMC, IHIT, 0x00000000, HITS: 0b00000000000000000000000000000000
  214. NVMC, IMISS, 0x00000000, MISSES: 0b00000000000000000000000000000000
  215. P0, OUT, 0x00000000, PIN0: 0b0; PIN1: 0b0; PIN2: 0b0; PIN3: 0b0; PIN4: 0b0; PIN5: 0b0; PIN6: 0b0; PIN7: 0b0; PIN8: 0b0; PIN9: 0b0; PIN10: 0b0; PIN11: 0b0; PIN12: 0b0; PIN13: 0b0; PIN14: 0b0; PIN15: 0b0; PIN16: 0b0; PIN17: 0b0; PIN18: 0b0; PIN19: 0b0; PIN20: 0b0; PIN21: 0b0; PIN22: 0b0; PIN23: 0b0; PIN24: 0b0; PIN25: 0b0; PIN26: 0b0; PIN27: 0b0; PIN28: 0b0; PIN29: 0b0; PIN30: 0b0; PIN31: 0b0
  216. P0, OUTSET, 0x00000000, PIN0: 0b0; PIN1: 0b0; PIN2: 0b0; PIN3: 0b0; PIN4: 0b0; PIN5: 0b0; PIN6: 0b0; PIN7: 0b0; PIN8: 0b0; PIN9: 0b0; PIN10: 0b0; PIN11: 0b0; PIN12: 0b0; PIN13: 0b0; PIN14: 0b0; PIN15: 0b0; PIN16: 0b0; PIN17: 0b0; PIN18: 0b0; PIN19: 0b0; PIN20: 0b0; PIN21: 0b0; PIN22: 0b0; PIN23: 0b0; PIN24: 0b0; PIN25: 0b0; PIN26: 0b0; PIN27: 0b0; PIN28: 0b0; PIN29: 0b0; PIN30: 0b0; PIN31: 0b0
  217. P0, OUTCLR, 0x00000000, PIN0: 0b0; PIN1: 0b0; PIN2: 0b0; PIN3: 0b0; PIN4: 0b0; PIN5: 0b0; PIN6: 0b0; PIN7: 0b0; PIN8: 0b0; PIN9: 0b0; PIN10: 0b0; PIN11: 0b0; PIN12: 0b0; PIN13: 0b0; PIN14: 0b0; PIN15: 0b0; PIN16: 0b0; PIN17: 0b0; PIN18: 0b0; PIN19: 0b0; PIN20: 0b0; PIN21: 0b0; PIN22: 0b0; PIN23: 0b0; PIN24: 0b0; PIN25: 0b0; PIN26: 0b0; PIN27: 0b0; PIN28: 0b0; PIN29: 0b0; PIN30: 0b0; PIN31: 0b0
  218. P0, IN, 0x00200000, PIN0: 0b0; PIN1: 0b0; PIN2: 0b0; PIN3: 0b0; PIN4: 0b0; PIN5: 0b0; PIN6: 0b0; PIN7: 0b0; PIN8: 0b0; PIN9: 0b0; PIN10: 0b0; PIN11: 0b0; PIN12: 0b0; PIN13: 0b0; PIN14: 0b0; PIN15: 0b0; PIN16: 0b0; PIN17: 0b0; PIN18: 0b0; PIN19: 0b0; PIN20: 0b0; PIN21: 0b1; PIN22: 0b0; PIN23: 0b0; PIN24: 0b0; PIN25: 0b0; PIN26: 0b0; PIN27: 0b0; PIN28: 0b0; PIN29: 0b0; PIN30: 0b0; PIN31: 0b0
  219. P0, DIR, 0x00020020, PIN0: 0b0; PIN1: 0b0; PIN2: 0b0; PIN3: 0b0; PIN4: 0b0; PIN5: 0b1; PIN6: 0b0; PIN7: 0b0; PIN8: 0b0; PIN9: 0b0; PIN10: 0b0; PIN11: 0b0; PIN12: 0b0; PIN13: 0b0; PIN14: 0b0; PIN15: 0b0; PIN16: 0b0; PIN17: 0b1; PIN18: 0b0; PIN19: 0b0; PIN20: 0b0; PIN21: 0b0; PIN22: 0b0; PIN23: 0b0; PIN24: 0b0; PIN25: 0b0; PIN26: 0b0; PIN27: 0b0; PIN28: 0b0; PIN29: 0b0; PIN30: 0b0; PIN31: 0b0
  220. P0, DIRSET, 0x00020020, PIN0: 0b0; PIN1: 0b0; PIN2: 0b0; PIN3: 0b0; PIN4: 0b0; PIN5: 0b1; PIN6: 0b0; PIN7: 0b0; PIN8: 0b0; PIN9: 0b0; PIN10: 0b0; PIN11: 0b0; PIN12: 0b0; PIN13: 0b0; PIN14: 0b0; PIN15: 0b0; PIN16: 0b0; PIN17: 0b1; PIN18: 0b0; PIN19: 0b0; PIN20: 0b0; PIN21: 0b0; PIN22: 0b0; PIN23: 0b0; PIN24: 0b0; PIN25: 0b0; PIN26: 0b0; PIN27: 0b0; PIN28: 0b0; PIN29: 0b0; PIN30: 0b0; PIN31: 0b0
  221. P0, DIRCLR, 0x00020020, PIN0: 0b0; PIN1: 0b0; PIN2: 0b0; PIN3: 0b0; PIN4: 0b0; PIN5: 0b1; PIN6: 0b0; PIN7: 0b0; PIN8: 0b0; PIN9: 0b0; PIN10: 0b0; PIN11: 0b0; PIN12: 0b0; PIN13: 0b0; PIN14: 0b0; PIN15: 0b0; PIN16: 0b0; PIN17: 0b1; PIN18: 0b0; PIN19: 0b0; PIN20: 0b0; PIN21: 0b0; PIN22: 0b0; PIN23: 0b0; PIN24: 0b0; PIN25: 0b0; PIN26: 0b0; PIN27: 0b0; PIN28: 0b0; PIN29: 0b0; PIN30: 0b0; PIN31: 0b0
  222. P0, LATCH, 0x00000000, PIN0: 0b0; PIN1: 0b0; PIN2: 0b0; PIN3: 0b0; PIN4: 0b0; PIN5: 0b0; PIN6: 0b0; PIN7: 0b0; PIN8: 0b0; PIN9: 0b0; PIN10: 0b0; PIN11: 0b0; PIN12: 0b0; PIN13: 0b0; PIN14: 0b0; PIN15: 0b0; PIN16: 0b0; PIN17: 0b0; PIN18: 0b0; PIN19: 0b0; PIN20: 0b0; PIN21: 0b0; PIN22: 0b0; PIN23: 0b0; PIN24: 0b0; PIN25: 0b0; PIN26: 0b0; PIN27: 0b0; PIN28: 0b0; PIN29: 0b0; PIN30: 0b0; PIN31: 0b0
  223. P0, DETECTMODE, 0x00000000, DETECTMODE: 0b0
  224. P0, PIN_CNF[%s], 0x00000002, DIR: 0b0; INPUT: 0b1; PULL: 0b00; DRIVE: 0b000; SENSE: 0b00
  225. PDM, TASKS_START, <Write-Only>
  226. PDM, TASKS_STOP, <Write-Only>
  227. PDM, EVENTS_STARTED, 0x00000000
  228. PDM, EVENTS_STOPPED, 0x00000000
  229. PDM, EVENTS_END, 0x00000000
  230. PDM, INTEN, 0x00000000, STARTED: 0b0; STOPPED: 0b0; END: 0b0
  231. PDM, INTENSET, 0x00000000, STARTED: 0b0; STOPPED: 0b0; END: 0b0
  232. PDM, INTENCLR, 0x00000000, STARTED: 0b0; STOPPED: 0b0; END: 0b0
  233. PDM, ENABLE, 0x00000000, ENABLE: 0b0
  234. PDM, PDMCLKCTRL, 0x08400000, FREQ: 0b00001000010000000000000000000000
  235. PDM, MODE, 0x00000000, OPERATION: 0b0; EDGE: 0b0
  236. PDM, GAINL, 0x00000028, GAINL: 0b0101000
  237. PDM, GAINR, 0x00000028, GAINR: 0b00101000
  238. POWER, TASKS_CONSTLAT, <Write-Only>
  239. POWER, TASKS_LOWPWR, <Write-Only>
  240. POWER, EVENTS_POFWARN, 0x00000000
  241. POWER, EVENTS_SLEEPENTER, 0x00000001
  242. POWER, EVENTS_SLEEPEXIT, 0x00000001
  243. POWER, INTENSET, 0x00000000, POFWARN: 0b0; SLEEPENTER: 0b0; SLEEPEXIT: 0b0
  244. POWER, INTENCLR, 0x00000000, POFWARN: 0b0; SLEEPENTER: 0b0; SLEEPEXIT: 0b0
  245. POWER, RESETREAS, 0x0000000C, RESETPIN: 0b0; DOG: 0b0; SREQ: 0b1; LOCKUP: 0b1; OFF: 0b0; LPCOMP: 0b0; DIF: 0b0; NFC: 0b0
  246. POWER, RAMSTATUS, 0x0000000F, RAMBLOCK0: 0b1; RAMBLOCK1: 0b1; RAMBLOCK2: 0b1; RAMBLOCK3: 0b1
  247. POWER, SYSTEMOFF, <Write-Only>, SYSTEMOFF: -
  248. POWER, POFCON, 0x00000000, POF: 0b0; THRESHOLD: 0b0000
  249. POWER, GPREGRET, 0x00000000, GPREGRET: 0b00000000
  250. POWER, GPREGRET2, 0x00000000, GPREGRET: 0b00000000
  251. POWER, RAMON, 0x00000003, ONRAM0: 0b1; ONRAM1: 0b1; OFFRAM0: 0b0; OFFRAM1: 0b0
  252. POWER, RAMONB, 0x00000003, ONRAM2: 0b1; ONRAM3: 0b1; OFFRAM2: 0b0; OFFRAM3: 0b0
  253. POWER, DCDCEN, 0x00000000, DCDCEN: 0b0
  254. PPI, CHEN, 0x00008000, CH0: 0b0; CH1: 0b0; CH2: 0b0; CH3: 0b0; CH4: 0b0; CH5: 0b0; CH6: 0b0; CH7: 0b0; CH8: 0b0; CH9: 0b0; CH10: 0b0; CH11: 0b0; CH12: 0b0; CH13: 0b0; CH14: 0b0; CH15: 0b1; CH16: 0b0; CH17: 0b0; CH18: 0b0; CH19: 0b0; CH20: 0b0; CH21: 0b0; CH22: 0b0; CH23: 0b0; CH24: 0b0; CH25: 0b0; CH26: 0b0; CH27: 0b0; CH28: 0b0; CH29: 0b0; CH30: 0b0; CH31: 0b0
  255. PPI, CHENSET, 0x00008000, CH0: 0b0; CH1: 0b0; CH2: 0b0; CH3: 0b0; CH4: 0b0; CH5: 0b0; CH6: 0b0; CH7: 0b0; CH8: 0b0; CH9: 0b0; CH10: 0b0; CH11: 0b0; CH12: 0b0; CH13: 0b0; CH14: 0b0; CH15: 0b1; CH16: 0b0; CH17: 0b0; CH18: 0b0; CH19: 0b0; CH20: 0b0; CH21: 0b0; CH22: 0b0; CH23: 0b0; CH24: 0b0; CH25: 0b0; CH26: 0b0; CH27: 0b0; CH28: 0b0; CH29: 0b0; CH30: 0b0; CH31: 0b0
  256. PPI, CHENCLR, 0x00008000, CH0: 0b0; CH1: 0b0; CH2: 0b0; CH3: 0b0; CH4: 0b0; CH5: 0b0; CH6: 0b0; CH7: 0b0; CH8: 0b0; CH9: 0b0; CH10: 0b0; CH11: 0b0; CH12: 0b0; CH13: 0b0; CH14: 0b0; CH15: 0b1; CH16: 0b0; CH17: 0b0; CH18: 0b0; CH19: 0b0; CH20: 0b0; CH21: 0b0; CH22: 0b0; CH23: 0b0; CH24: 0b0; CH25: 0b0; CH26: 0b0; CH27: 0b0; CH28: 0b0; CH29: 0b0; CH30: 0b0; CH31: 0b0
  257. PPI, CHG[%s], 0x00000000, CH0: 0b0; CH1: 0b0; CH2: 0b0; CH3: 0b0; CH4: 0b0; CH5: 0b0; CH6: 0b0; CH7: 0b0; CH8: 0b0; CH9: 0b0; CH10: 0b0; CH11: 0b0; CH12: 0b0; CH13: 0b0; CH14: 0b0; CH15: 0b0; CH16: 0b0; CH17: 0b0; CH18: 0b0; CH19: 0b0; CH20: 0b0; CH21: 0b0; CH22: 0b0; CH23: 0b0; CH24: 0b0; CH25: 0b0; CH26: 0b0; CH27: 0b0; CH28: 0b0; CH29: 0b0; CH30: 0b0; CH31: 0b0
  258. PWM0, TASKS_STOP, <Write-Only>
  259. PWM0, TASKS_SEQSTART[%s], <Write-Only>
  260. PWM0, TASKS_NEXTSTEP, <Write-Only>
  261. PWM0, EVENTS_STOPPED, 0x00000000
  262. PWM0, EVENTS_SEQSTARTED[%s], 0x00000000
  263. PWM0, EVENTS_SEQEND[%s], 0x00000000
  264. PWM0, EVENTS_PWMPERIODEND, 0x00000000
  265. PWM0, EVENTS_LOOPSDONE, 0x00000000
  266. PWM0, SHORTS, 0x00000000, SEQEND0_STOP: 0b0; SEQEND1_STOP: 0b0; LOOPSDONE_SEQSTART0: 0b0; LOOPSDONE_SEQSTART1: 0b0; LOOPSDONE_STOP: 0b0
  267. PWM0, INTEN, 0x00000000, STOPPED: 0b0; SEQSTARTED0: 0b0; SEQSTARTED1: 0b0; SEQEND0: 0b0; SEQEND1: 0b0; PWMPERIODEND: 0b0; LOOPSDONE: 0b0
  268. PWM0, INTENSET, 0x00000000, STOPPED: 0b0; SEQSTARTED0: 0b0; SEQSTARTED1: 0b0; SEQEND0: 0b0; SEQEND1: 0b0; PWMPERIODEND: 0b0; LOOPSDONE: 0b0
  269. PWM0, INTENCLR, 0x00000000, STOPPED: 0b0; SEQSTARTED0: 0b0; SEQSTARTED1: 0b0; SEQEND0: 0b0; SEQEND1: 0b0; PWMPERIODEND: 0b0; LOOPSDONE: 0b0
  270. PWM0, ENABLE, 0x00000000, ENABLE: 0b0
  271. PWM0, MODE, 0x00000000, UPDOWN: 0b0
  272. PWM0, COUNTERTOP, 0x000003FF, COUNTERTOP: 0b000001111111111
  273. PWM0, PRESCALER, 0x00000000, PRESCALER: 0b000
  274. PWM0, DECODER, 0x00000000, LOAD: 0b00; MODE: 0b0
  275. PWM0, LOOP, 0x00000000, CNT: 0b0000000000000000
  276. PWM1, TASKS_STOP, <Write-Only>
  277. PWM1, TASKS_SEQSTART[%s], <Write-Only>
  278. PWM1, TASKS_NEXTSTEP, <Write-Only>
  279. PWM1, EVENTS_STOPPED, 0x00000000
  280. PWM1, EVENTS_SEQSTARTED[%s], 0x00000000
  281. PWM1, EVENTS_SEQEND[%s], 0x00000000
  282. PWM1, EVENTS_PWMPERIODEND, 0x00000000
  283. PWM1, EVENTS_LOOPSDONE, 0x00000000
  284. PWM1, SHORTS, 0x00000000, SEQEND0_STOP: 0b0; SEQEND1_STOP: 0b0; LOOPSDONE_SEQSTART0: 0b0; LOOPSDONE_SEQSTART1: 0b0; LOOPSDONE_STOP: 0b0
  285. PWM1, INTEN, 0x00000000, STOPPED: 0b0; SEQSTARTED0: 0b0; SEQSTARTED1: 0b0; SEQEND0: 0b0; SEQEND1: 0b0; PWMPERIODEND: 0b0; LOOPSDONE: 0b0
  286. PWM1, INTENSET, 0x00000000, STOPPED: 0b0; SEQSTARTED0: 0b0; SEQSTARTED1: 0b0; SEQEND0: 0b0; SEQEND1: 0b0; PWMPERIODEND: 0b0; LOOPSDONE: 0b0
  287. PWM1, INTENCLR, 0x00000000, STOPPED: 0b0; SEQSTARTED0: 0b0; SEQSTARTED1: 0b0; SEQEND0: 0b0; SEQEND1: 0b0; PWMPERIODEND: 0b0; LOOPSDONE: 0b0
  288. PWM1, ENABLE, 0x00000000, ENABLE: 0b0
  289. PWM1, MODE, 0x00000000, UPDOWN: 0b0
  290. PWM1, COUNTERTOP, 0x000003FF, COUNTERTOP: 0b000001111111111
  291. PWM1, PRESCALER, 0x00000000, PRESCALER: 0b000
  292. PWM1, DECODER, 0x00000000, LOAD: 0b00; MODE: 0b0
  293. PWM1, LOOP, 0x00000000, CNT: 0b0000000000000000
  294. PWM2, TASKS_STOP, <Write-Only>
  295. PWM2, TASKS_SEQSTART[%s], <Write-Only>
  296. PWM2, TASKS_NEXTSTEP, <Write-Only>
  297. PWM2, EVENTS_STOPPED, 0x00000000
  298. PWM2, EVENTS_SEQSTARTED[%s], 0x00000000
  299. PWM2, EVENTS_SEQEND[%s], 0x00000000
  300. PWM2, EVENTS_PWMPERIODEND, 0x00000000
  301. PWM2, EVENTS_LOOPSDONE, 0x00000000
  302. PWM2, SHORTS, 0x00000000, SEQEND0_STOP: 0b0; SEQEND1_STOP: 0b0; LOOPSDONE_SEQSTART0: 0b0; LOOPSDONE_SEQSTART1: 0b0; LOOPSDONE_STOP: 0b0
  303. PWM2, INTEN, 0x00000000, STOPPED: 0b0; SEQSTARTED0: 0b0; SEQSTARTED1: 0b0; SEQEND0: 0b0; SEQEND1: 0b0; PWMPERIODEND: 0b0; LOOPSDONE: 0b0
  304. PWM2, INTENSET, 0x00000000, STOPPED: 0b0; SEQSTARTED0: 0b0; SEQSTARTED1: 0b0; SEQEND0: 0b0; SEQEND1: 0b0; PWMPERIODEND: 0b0; LOOPSDONE: 0b0
  305. PWM2, INTENCLR, 0x00000000, STOPPED: 0b0; SEQSTARTED0: 0b0; SEQSTARTED1: 0b0; SEQEND0: 0b0; SEQEND1: 0b0; PWMPERIODEND: 0b0; LOOPSDONE: 0b0
  306. PWM2, ENABLE, 0x00000000, ENABLE: 0b0
  307. PWM2, MODE, 0x00000000, UPDOWN: 0b0
  308. PWM2, COUNTERTOP, 0x000003FF, COUNTERTOP: 0b000001111111111
  309. PWM2, PRESCALER, 0x00000000, PRESCALER: 0b000
  310. PWM2, DECODER, 0x00000000, LOAD: 0b00; MODE: 0b0
  311. PWM2, LOOP, 0x00000000, CNT: 0b0000000000000000
  312. QDEC, TASKS_START, <Write-Only>
  313. QDEC, TASKS_STOP, <Write-Only>
  314. QDEC, TASKS_READCLRACC, <Write-Only>
  315. QDEC, TASKS_RDCLRACC, <Write-Only>
  316. QDEC, TASKS_RDCLRDBL, <Write-Only>
  317. QDEC, EVENTS_SAMPLERDY, 0x00000000
  318. QDEC, EVENTS_REPORTRDY, 0x00000000
  319. QDEC, EVENTS_ACCOF, 0x00000000
  320. QDEC, EVENTS_DBLRDY, 0x00000000
  321. QDEC, EVENTS_STOPPED, 0x00000000
  322. QDEC, SHORTS, 0x00000000, REPORTRDY_READCLRACC: 0b0; SAMPLERDY_STOP: 0b0; REPORTRDY_RDCLRACC: 0b0; REPORTRDY_STOP: 0b0; DBLRDY_RDCLRDBL: 0b0; DBLRDY_STOP: 0b0; SAMPLERDY_READCLRACC: 0b0
  323. QDEC, INTENSET, 0x00000000, SAMPLERDY: 0b0; REPORTRDY: 0b0; ACCOF: 0b0; DBLRDY: 0b0; STOPPED: 0b0
  324. QDEC, INTENCLR, 0x00000000, SAMPLERDY: 0b0; REPORTRDY: 0b0; ACCOF: 0b0; DBLRDY: 0b0; STOPPED: 0b0
  325. QDEC, ENABLE, 0x00000000, ENABLE: 0b0
  326. QDEC, LEDPOL, 0x00000000, LEDPOL: 0b0
  327. QDEC, SAMPLEPER, 0x00000000, SAMPLEPER: 0b0000
  328. QDEC, SAMPLE, 0x00000000, SAMPLE: 0b00000000000000000000000000000000
  329. QDEC, REPORTPER, 0x00000000, REPORTPER: 0b0000
  330. QDEC, ACC, 0x00000000, ACC: 0b00000000000000000000000000000000
  331. QDEC, ACCREAD, 0x00000000, ACCREAD: 0b00000000000000000000000000000000
  332. QDEC, DBFEN, 0x00000000, DBFEN: 0b0
  333. QDEC, LEDPRE, 0x00000010, LEDPRE: 0b000010000
  334. QDEC, ACCDBL, 0x00000000, ACCDBL: 0b0000
  335. QDEC, ACCDBLREAD, 0x00000000, ACCDBLREAD: 0b0000
  336. RADIO, TASKS_TXEN, <Write-Only>
  337. RADIO, TASKS_RXEN, <Write-Only>
  338. RADIO, TASKS_START, <Write-Only>
  339. RADIO, TASKS_STOP, <Write-Only>
  340. RADIO, TASKS_DISABLE, <Write-Only>
  341. RADIO, TASKS_RSSISTART, <Write-Only>
  342. RADIO, TASKS_RSSISTOP, <Write-Only>
  343. RADIO, TASKS_BCSTART, <Write-Only>
  344. RADIO, TASKS_BCSTOP, <Write-Only>
  345. RADIO, EVENTS_READY, 0x00000000
  346. RADIO, EVENTS_ADDRESS, 0x00000000
  347. RADIO, EVENTS_PAYLOAD, 0x00000000
  348. RADIO, EVENTS_END, 0x00000000
  349. RADIO, EVENTS_DISABLED, 0x00000000
  350. RADIO, EVENTS_DEVMATCH, 0x00000000
  351. RADIO, EVENTS_DEVMISS, 0x00000001
  352. RADIO, EVENTS_RSSIEND, 0x00000001
  353. RADIO, EVENTS_BCMATCH, 0x00000000
  354. RADIO, EVENTS_CRCOK, 0x00000001
  355. RADIO, EVENTS_CRCERROR, 0x00000000
  356. RADIO, SHORTS, 0x00000113, READY_START: 0b1; END_DISABLE: 0b1; DISABLED_TXEN: 0b0; DISABLED_RXEN: 0b0; ADDRESS_RSSISTART: 0b1; END_START: 0b0; ADDRESS_BCSTART: 0b0; DISABLED_RSSISTOP: 0b1
  357. RADIO, INTENSET, 0x0000000D, READY: 0b1; ADDRESS: 0b0; PAYLOAD: 0b1; END: 0b1; DISABLED: 0b0; DEVMATCH: 0b0; DEVMISS: 0b0; RSSIEND: 0b0; BCMATCH: 0b0; CRCOK: 0b0; CRCERROR: 0b0
  358. RADIO, INTENCLR, 0x0000000D, READY: 0b1; ADDRESS: 0b0; PAYLOAD: 0b1; END: 0b1; DISABLED: 0b0; DEVMATCH: 0b0; DEVMISS: 0b0; RSSIEND: 0b0; BCMATCH: 0b0; CRCOK: 0b0; CRCERROR: 0b0
  359. RADIO, CRCSTATUS, 0x00000001, CRCSTATUS: 0b1
  360. RADIO, RXMATCH, 0x00000000, RXMATCH: 0b000
  361. RADIO, RXCRC, 0x004B57AF, RXCRC: 0b010010110101011110101111
  362. RADIO, DAI, 0x00000000, DAI: 0b000
  363. RADIO, PACKETPTR, 0x200020E0, PACKETPTR: 0b00100000000000000010000011100000
  364. RADIO, FREQUENCY, 0x00000050, FREQUENCY: 0b1010000; MAP: 0b0
  365. RADIO, TXPOWER, 0x00000000, TXPOWER: 0b00000000
  366. RADIO, MODE, 0x00000003, MODE: 0b0011
  367. RADIO, PCNF0, 0x00000108, LFLEN: 0b1000; S0LEN: 0b1; S1LEN: 0b0000; S1INCL: 0b0; PLEN: 0b0
  368. RADIO, PCNF1, 0x02030022, MAXLEN: 0b00100010; STATLEN: 0b00000000; BALEN: 0b011; ENDIAN: 0b0; WHITEEN: 0b1
  369. RADIO, BASE0, 0x89BED600, BASE0: 0b10001001101111101101011000000000
  370. RADIO, BASE1, 0x00000000, BASE1: 0b00000000000000000000000000000000
  371. RADIO, PREFIX0, 0x0000008E, AP0: 0b10001110; AP1: 0b00000000; AP2: 0b00000000; AP3: 0b00000000
  372. RADIO, PREFIX1, 0x00000000, AP4: 0b00000000; AP5: 0b00000000; AP6: 0b00000000; AP7: 0b00000000
  373. RADIO, TXADDRESS, 0x00000000, TXADDRESS: 0b000
  374. RADIO, RXADDRESSES, 0x00000001, ADDR0: 0b1; ADDR1: 0b0; ADDR2: 0b0; ADDR3: 0b0; ADDR4: 0b0; ADDR5: 0b0; ADDR6: 0b0; ADDR7: 0b0
  375. RADIO, CRCCNF, 0x00000103, LEN: 0b11; SKIPADDR: 0b1
  376. RADIO, CRCPOLY, 0x0000065B, CRCPOLY: 0b000000000000011001011011
  377. RADIO, CRCINIT, 0x00555555, CRCINIT: 0b010101010101010101010101
  378. RADIO, UNUSED0, 0x00000000
  379. RADIO, TIFS, 0x00000000, TIFS: 0b00000000
  380. RADIO, RSSISAMPLE, 0x00000029, RSSISAMPLE: 0b0101001
  381. RADIO, STATE, 0x00000000, STATE: 0b0000
  382. RADIO, DATAWHITEIV, 0x00000067, DATAWHITEIV: 0b1100111
  383. RADIO, BCC, 0x00000000, BCC: 0b00000000000000000000000000000000
  384. RADIO, DAB[%s], 0x00000000, DAB: 0b00000000000000000000000000000000
  385. RADIO, DAP[%s], 0x00000000, DAP: 0b0000000000000000
  386. RADIO, DACNF, 0x00000000, ENA0: 0b0; ENA1: 0b0; ENA2: 0b0; ENA3: 0b0; ENA4: 0b0; ENA5: 0b0; ENA6: 0b0; ENA7: 0b0; TXADD0: 0b0; TXADD1: 0b0; TXADD2: 0b0; TXADD3: 0b0; TXADD4: 0b0; TXADD5: 0b0; TXADD6: 0b0; TXADD7: 0b0
  387. RADIO, MODECNF0, 0x00000001, RU: 0b1; DTX: 0b00
  388. RADIO, POWER, 0x00000001, POWER: 0b1
  389. RNG, TASKS_START, <Write-Only>
  390. RNG, TASKS_STOP, <Write-Only>
  391. RNG, EVENTS_VALRDY, 0x00000001
  392. RNG, SHORTS, 0x00000000, VALRDY_STOP: 0b0
  393. RNG, INTENSET, 0x00000000, VALRDY: 0b0
  394. RNG, INTENCLR, 0x00000000, VALRDY: 0b0
  395. RNG, CONFIG, 0x00000000, DERCEN: 0b0
  396. RNG, VALUE, 0x00000003, VALUE: 0b00000011
  397. RTC0, TASKS_START, <Write-Only>
  398. RTC0, TASKS_STOP, <Write-Only>
  399. RTC0, TASKS_CLEAR, <Write-Only>
  400. RTC0, TASKS_TRIGOVRFLW, <Write-Only>
  401. RTC0, EVENTS_TICK, 0x00000000
  402. RTC0, EVENTS_OVRFLW, 0x00000000
  403. RTC0, EVENTS_COMPARE[%s], 0x00000000
  404. RTC0, INTENSET, 0x00000000, TICK: 0b0; OVRFLW: 0b0; COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0
  405. RTC0, INTENCLR, 0x00000000, TICK: 0b0; OVRFLW: 0b0; COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0
  406. RTC0, EVTEN, 0x00000000, TICK: 0b0; OVRFLW: 0b0; COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0
  407. RTC0, EVTENSET, 0x00000000, TICK: 0b0; OVRFLW: 0b0; COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0
  408. RTC0, EVTENCLR, 0x00000000, TICK: 0b0; OVRFLW: 0b0; COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0
  409. RTC0, COUNTER, 0x0052438B, COUNTER: 0b010100100100001110001011
  410. RTC0, PRESCALER, 0x00000000, PRESCALER: 0b000000000000
  411. RTC0, CC[%s], 0x00000000, COMPARE: 0b000000000000000000000000
  412. RTC1, TASKS_START, <Write-Only>
  413. RTC1, TASKS_STOP, <Write-Only>
  414. RTC1, TASKS_CLEAR, <Write-Only>
  415. RTC1, TASKS_TRIGOVRFLW, <Write-Only>
  416. RTC1, EVENTS_TICK, 0x00000000
  417. RTC1, EVENTS_OVRFLW, 0x00000000
  418. RTC1, EVENTS_COMPARE[%s], 0x00000000
  419. RTC1, INTENSET, 0x00020002, TICK: 0b0; OVRFLW: 0b1; COMPARE0: 0b0; COMPARE1: 0b1; COMPARE2: 0b0; COMPARE3: 0b0
  420. RTC1, INTENCLR, 0x00020002, TICK: 0b0; OVRFLW: 0b1; COMPARE0: 0b0; COMPARE1: 0b1; COMPARE2: 0b0; COMPARE3: 0b0
  421. RTC1, EVTEN, 0x00000000, TICK: 0b0; OVRFLW: 0b0; COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0
  422. RTC1, EVTENSET, 0x00000000, TICK: 0b0; OVRFLW: 0b0; COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0
  423. RTC1, EVTENCLR, 0x00000000, TICK: 0b0; OVRFLW: 0b0; COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0
  424. RTC1, COUNTER, 0x0052478C, COUNTER: 0b010100100100011110001100
  425. RTC1, PRESCALER, 0x00000000, PRESCALER: 0b000000000000
  426. RTC1, CC[%s], 0x00000000, COMPARE: 0b000000000000000000000000
  427. RTC2, TASKS_START, <Write-Only>
  428. RTC2, TASKS_STOP, <Write-Only>
  429. RTC2, TASKS_CLEAR, <Write-Only>
  430. RTC2, TASKS_TRIGOVRFLW, <Write-Only>
  431. RTC2, EVENTS_TICK, 0x00000000
  432. RTC2, EVENTS_OVRFLW, 0x00000000
  433. RTC2, EVENTS_COMPARE[%s], 0x00000000
  434. RTC2, INTENSET, 0x00000000, TICK: 0b0; OVRFLW: 0b0; COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0
  435. RTC2, INTENCLR, 0x00000000, TICK: 0b0; OVRFLW: 0b0; COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0
  436. RTC2, EVTEN, 0x00000000, TICK: 0b0; OVRFLW: 0b0; COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0
  437. RTC2, EVTENSET, 0x00000000, TICK: 0b0; OVRFLW: 0b0; COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0
  438. RTC2, EVTENCLR, 0x00000000, TICK: 0b0; OVRFLW: 0b0; COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0
  439. RTC2, COUNTER, 0x00000000, COUNTER: 0b000000000000000000000000
  440. RTC2, PRESCALER, 0x00000000, PRESCALER: 0b000000000000
  441. RTC2, CC[%s], 0x00000000, COMPARE: 0b000000000000000000000000
  442. SAADC, TASKS_START, <Write-Only>
  443. SAADC, TASKS_SAMPLE, <Write-Only>
  444. SAADC, TASKS_STOP, <Write-Only>
  445. SAADC, TASKS_CALIBRATEOFFSET, <Write-Only>
  446. SAADC, EVENTS_STARTED, 0x00000000
  447. SAADC, EVENTS_END, 0x00000000
  448. SAADC, EVENTS_DONE, 0x00000000
  449. SAADC, EVENTS_RESULTDONE, 0x00000000
  450. SAADC, EVENTS_CALIBRATEDONE, 0x00000000
  451. SAADC, EVENTS_STOPPED, 0x00000000
  452. SAADC, INTEN, 0x00000000, STARTED: 0b0; END: 0b0; DONE: 0b0; RESULTDONE: 0b0; CALIBRATEDONE: 0b0; STOPPED: 0b0; CH0LIMITH: 0b0; CH0LIMITL: 0b0; CH1LIMITH: 0b0; CH1LIMITL: 0b0; CH2LIMITH: 0b0; CH2LIMITL: 0b0; CH3LIMITH: 0b0; CH3LIMITL: 0b0; CH4LIMITH: 0b0; CH4LIMITL: 0b0; CH5LIMITH: 0b0; CH5LIMITL: 0b0; CH6LIMITH: 0b0; CH6LIMITL: 0b0; CH7LIMITH: 0b0; CH7LIMITL: 0b0
  453. SAADC, INTENSET, 0x00000000, STARTED: 0b0; END: 0b0; DONE: 0b0; RESULTDONE: 0b0; CALIBRATEDONE: 0b0; STOPPED: 0b0; CH0LIMITH: 0b0; CH0LIMITL: 0b0; CH1LIMITH: 0b0; CH1LIMITL: 0b0; CH2LIMITH: 0b0; CH2LIMITL: 0b0; CH3LIMITH: 0b0; CH3LIMITL: 0b0; CH4LIMITH: 0b0; CH4LIMITL: 0b0; CH5LIMITH: 0b0; CH5LIMITL: 0b0; CH6LIMITH: 0b0; CH6LIMITL: 0b0; CH7LIMITH: 0b0; CH7LIMITL: 0b0
  454. SAADC, INTENCLR, 0x00000000, STARTED: 0b0; END: 0b0; DONE: 0b0; RESULTDONE: 0b0; CALIBRATEDONE: 0b0; STOPPED: 0b0; CH0LIMITH: 0b0; CH0LIMITL: 0b0; CH1LIMITH: 0b0; CH1LIMITL: 0b0; CH2LIMITH: 0b0; CH2LIMITL: 0b0; CH3LIMITH: 0b0; CH3LIMITL: 0b0; CH4LIMITH: 0b0; CH4LIMITL: 0b0; CH5LIMITH: 0b0; CH5LIMITL: 0b0; CH6LIMITH: 0b0; CH6LIMITL: 0b0; CH7LIMITH: 0b0; CH7LIMITL: 0b0
  455. SAADC, STATUS, 0x00000000, STATUS: 0b0
  456. SAADC, ENABLE, 0x00000000, ENABLE: 0b0
  457. SAADC, RESOLUTION, 0x00000001, VAL: 0b001
  458. SAADC, OVERSAMPLE, 0x00000000, OVERSAMPLE: 0b0000
  459. SAADC, SAMPLERATE, 0x00000000, CC: 0b00000000000; MODE: 0b0
  460. SPI0, EVENTS_READY, 0x00000000
  461. SPI0, INTENSET, 0x00000000, READY: 0b0
  462. SPI0, INTENCLR, 0x00000000, READY: 0b0
  463. SPI0, ENABLE, 0x00000000, ENABLE: 0b0000
  464. SPI0, RXD, 0x00000000, RXD: 0b00000000
  465. SPI0, TXD, 0x00000000, TXD: 0b00000000
  466. SPI0, FREQUENCY, 0x04000000, FREQUENCY: 0b00000100000000000000000000000000
  467. SPI0, CONFIG, 0x00000000, ORDER: 0b0; CPHA: 0b0; CPOL: 0b0
  468. SPI1, EVENTS_READY, 0x00000000
  469. SPI1, INTENSET, 0x00000000, READY: 0b0
  470. SPI1, INTENCLR, 0x00000000, READY: 0b0
  471. SPI1, ENABLE, 0x00000000, ENABLE: 0b0000
  472. SPI1, RXD, 0x00000000, RXD: 0b00000000
  473. SPI1, TXD, 0x00000000, TXD: 0b00000000
  474. SPI1, FREQUENCY, 0x04000000, FREQUENCY: 0b00000100000000000000000000000000
  475. SPI1, CONFIG, 0x00000000, ORDER: 0b0; CPHA: 0b0; CPOL: 0b0
  476. SPI2, EVENTS_READY, 0x00000000
  477. SPI2, INTENSET, 0x00000000, READY: 0b0
  478. SPI2, INTENCLR, 0x00000000, READY: 0b0
  479. SPI2, ENABLE, 0x00000000, ENABLE: 0b0000
  480. SPI2, RXD, 0x00000000, RXD: 0b00000000
  481. SPI2, TXD, 0x00000000, TXD: 0b00000000
  482. SPI2, FREQUENCY, 0x04000000, FREQUENCY: 0b00000100000000000000000000000000
  483. SPI2, CONFIG, 0x00000000, ORDER: 0b0; CPHA: 0b0; CPOL: 0b0
  484. SPIM0, TASKS_START, <Write-Only>
  485. SPIM0, TASKS_STOP, <Write-Only>
  486. SPIM0, TASKS_SUSPEND, <Write-Only>
  487. SPIM0, TASKS_RESUME, <Write-Only>
  488. SPIM0, EVENTS_STOPPED, 0x00000000
  489. SPIM0, EVENTS_ENDRX, 0x00000000
  490. SPIM0, EVENTS_END, 0x00000000
  491. SPIM0, EVENTS_ENDTX, 0x00000000
  492. SPIM0, EVENTS_STARTED, 0x00000000
  493. SPIM0, SHORTS, 0x00000000, END_START: 0b0
  494. SPIM0, INTENSET, 0x00000000, STOPPED: 0b0; ENDRX: 0b0; END: 0b0; ENDTX: 0b0; STARTED: 0b0
  495. SPIM0, INTENCLR, 0x00000000, STOPPED: 0b0; ENDRX: 0b0; END: 0b0; ENDTX: 0b0; STARTED: 0b0
  496. SPIM0, ENABLE, 0x00000000, ENABLE: 0b0000
  497. SPIM0, FREQUENCY, 0x04000000, FREQUENCY: 0b00000100000000000000000000000000
  498. SPIM0, CONFIG, 0x00000000, ORDER: 0b0; CPHA: 0b0; CPOL: 0b0
  499. SPIM0, ORC, 0x00000000, ORC: 0b00000000
  500. SPIM1, TASKS_START, <Write-Only>
  501. SPIM1, TASKS_STOP, <Write-Only>
  502. SPIM1, TASKS_SUSPEND, <Write-Only>
  503. SPIM1, TASKS_RESUME, <Write-Only>
  504. SPIM1, EVENTS_STOPPED, 0x00000000
  505. SPIM1, EVENTS_ENDRX, 0x00000000
  506. SPIM1, EVENTS_END, 0x00000000
  507. SPIM1, EVENTS_ENDTX, 0x00000000
  508. SPIM1, EVENTS_STARTED, 0x00000000
  509. SPIM1, SHORTS, 0x00000000, END_START: 0b0
  510. SPIM1, INTENSET, 0x00000000, STOPPED: 0b0; ENDRX: 0b0; END: 0b0; ENDTX: 0b0; STARTED: 0b0
  511. SPIM1, INTENCLR, 0x00000000, STOPPED: 0b0; ENDRX: 0b0; END: 0b0; ENDTX: 0b0; STARTED: 0b0
  512. SPIM1, ENABLE, 0x00000000, ENABLE: 0b0000
  513. SPIM1, FREQUENCY, 0x04000000, FREQUENCY: 0b00000100000000000000000000000000
  514. SPIM1, CONFIG, 0x00000000, ORDER: 0b0; CPHA: 0b0; CPOL: 0b0
  515. SPIM1, ORC, 0x00000000, ORC: 0b00000000
  516. SPIM2, TASKS_START, <Write-Only>
  517. SPIM2, TASKS_STOP, <Write-Only>
  518. SPIM2, TASKS_SUSPEND, <Write-Only>
  519. SPIM2, TASKS_RESUME, <Write-Only>
  520. SPIM2, EVENTS_STOPPED, 0x00000000
  521. SPIM2, EVENTS_ENDRX, 0x00000000
  522. SPIM2, EVENTS_END, 0x00000000
  523. SPIM2, EVENTS_ENDTX, 0x00000000
  524. SPIM2, EVENTS_STARTED, 0x00000000
  525. SPIM2, SHORTS, 0x00000000, END_START: 0b0
  526. SPIM2, INTENSET, 0x00000000, STOPPED: 0b0; ENDRX: 0b0; END: 0b0; ENDTX: 0b0; STARTED: 0b0
  527. SPIM2, INTENCLR, 0x00000000, STOPPED: 0b0; ENDRX: 0b0; END: 0b0; ENDTX: 0b0; STARTED: 0b0
  528. SPIM2, ENABLE, 0x00000000, ENABLE: 0b0000
  529. SPIM2, FREQUENCY, 0x04000000, FREQUENCY: 0b00000100000000000000000000000000
  530. SPIM2, CONFIG, 0x00000000, ORDER: 0b0; CPHA: 0b0; CPOL: 0b0
  531. SPIM2, ORC, 0x00000000, ORC: 0b00000000
  532. SPIS0, TASKS_ACQUIRE, <Write-Only>
  533. SPIS0, TASKS_RELEASE, <Write-Only>
  534. SPIS0, EVENTS_END, 0x00000000
  535. SPIS0, EVENTS_ENDRX, 0x00000000
  536. SPIS0, EVENTS_ACQUIRED, 0x00000000
  537. SPIS0, SHORTS, 0x00000000, END_ACQUIRE: 0b0
  538. SPIS0, INTENSET, 0x00000000, END: 0b0; ENDRX: 0b0; ACQUIRED: 0b0
  539. SPIS0, INTENCLR, 0x00000000, END: 0b0; ENDRX: 0b0; ACQUIRED: 0b0
  540. SPIS0, SEMSTAT, 0x00000001, SEMSTAT: 0b01
  541. SPIS0, STATUS, 0x00000000, OVERREAD: 0b0; OVERFLOW: 0b0
  542. SPIS0, ENABLE, 0x00000000, ENABLE: 0b0000
  543. SPIS0, CONFIG, 0x00000000, ORDER: 0b0; CPHA: 0b0; CPOL: 0b0
  544. SPIS0, DEF, 0x00000000, DEF: 0b00000000
  545. SPIS0, ORC, 0x00000000, ORC: 0b00000000
  546. SPIS1, TASKS_ACQUIRE, <Write-Only>
  547. SPIS1, TASKS_RELEASE, <Write-Only>
  548. SPIS1, EVENTS_END, 0x00000000
  549. SPIS1, EVENTS_ENDRX, 0x00000000
  550. SPIS1, EVENTS_ACQUIRED, 0x00000000
  551. SPIS1, SHORTS, 0x00000000, END_ACQUIRE: 0b0
  552. SPIS1, INTENSET, 0x00000000, END: 0b0; ENDRX: 0b0; ACQUIRED: 0b0
  553. SPIS1, INTENCLR, 0x00000000, END: 0b0; ENDRX: 0b0; ACQUIRED: 0b0
  554. SPIS1, SEMSTAT, 0x00000001, SEMSTAT: 0b01
  555. SPIS1, STATUS, 0x00000000, OVERREAD: 0b0; OVERFLOW: 0b0
  556. SPIS1, ENABLE, 0x00000000, ENABLE: 0b0000
  557. SPIS1, CONFIG, 0x00000000, ORDER: 0b0; CPHA: 0b0; CPOL: 0b0
  558. SPIS1, DEF, 0x00000000, DEF: 0b00000000
  559. SPIS1, ORC, 0x00000000, ORC: 0b00000000
  560. SPIS2, TASKS_ACQUIRE, <Write-Only>
  561. SPIS2, TASKS_RELEASE, <Write-Only>
  562. SPIS2, EVENTS_END, 0x00000000
  563. SPIS2, EVENTS_ENDRX, 0x00000000
  564. SPIS2, EVENTS_ACQUIRED, 0x00000000
  565. SPIS2, SHORTS, 0x00000000, END_ACQUIRE: 0b0
  566. SPIS2, INTENSET, 0x00000000, END: 0b0; ENDRX: 0b0; ACQUIRED: 0b0
  567. SPIS2, INTENCLR, 0x00000000, END: 0b0; ENDRX: 0b0; ACQUIRED: 0b0
  568. SPIS2, SEMSTAT, 0x00000001, SEMSTAT: 0b01
  569. SPIS2, STATUS, 0x00000000, OVERREAD: 0b0; OVERFLOW: 0b0
  570. SPIS2, ENABLE, 0x00000000, ENABLE: 0b0000
  571. SPIS2, CONFIG, 0x00000000, ORDER: 0b0; CPHA: 0b0; CPOL: 0b0
  572. SPIS2, DEF, 0x00000000, DEF: 0b00000000
  573. SPIS2, ORC, 0x00000000, ORC: 0b00000000
  574. SWI0, UNUSED, 0x00000000
  575. SWI1, UNUSED, 0x00000000
  576. SWI2, UNUSED, 0x00000000
  577. SWI3, UNUSED, 0x00000000
  578. SWI4, UNUSED, 0x00000000
  579. SWI5, UNUSED, 0x00000000
  580. TEMP, TASKS_START, <Write-Only>
  581. TEMP, TASKS_STOP, <Write-Only>
  582. TEMP, EVENTS_DATARDY, 0x00000000
  583. TEMP, INTENSET, 0x00000000, DATARDY: 0b0
  584. TEMP, INTENCLR, 0x00000000, DATARDY: 0b0
  585. TEMP, TEMP, 0x00000000, TEMP: 0b00000000000000000000000000000000
  586. TEMP, A0, 0x00000320, A0: 0b001100100000
  587. TEMP, A1, 0x00000343, A1: 0b001101000011
  588. TEMP, A2, 0x0000035D, A2: 0b001101011101
  589. TEMP, A3, 0x00000400, A3: 0b010000000000
  590. TEMP, A4, 0x00000452, A4: 0b010001010010
  591. TEMP, A5, 0x0000037B, A5: 0b001101111011
  592. TEMP, B0, 0x00003FCC, B0: 0b11111111001100
  593. TEMP, B1, 0x00003F98, B1: 0b11111110011000
  594. TEMP, B2, 0x00003F98, B2: 0b11111110011000
  595. TEMP, B3, 0x00000012, B3: 0b00000000010010
  596. TEMP, B4, 0x0000004D, B4: 0b00000001001101
  597. TEMP, B5, 0x00003E10, B5: 0b11111000010000
  598. TEMP, T0, 0x000000E2, T0: 0b11100010
  599. TEMP, T1, 0x00000000, T1: 0b00000000
  600. TEMP, T2, 0x00000014, T2: 0b00010100
  601. TEMP, T3, 0x00000019, T3: 0b00011001
  602. TEMP, T4, 0x00000050, T4: 0b01010000
  603. TIMER0, TASKS_START, <Write-Only>
  604. TIMER0, TASKS_STOP, <Write-Only>
  605. TIMER0, TASKS_COUNT, <Write-Only>
  606. TIMER0, TASKS_CLEAR, <Write-Only>
  607. TIMER0, TASKS_SHUTDOWN, <Write-Only>
  608. TIMER0, TASKS_CAPTURE[%s], <Write-Only>
  609. TIMER0, EVENTS_COMPARE[%s], 0x00000001
  610. TIMER0, SHORTS, 0x00000000, COMPARE0_CLEAR: 0b0; COMPARE1_CLEAR: 0b0; COMPARE2_CLEAR: 0b0; COMPARE3_CLEAR: 0b0; COMPARE4_CLEAR: 0b0; COMPARE5_CLEAR: 0b0; COMPARE0_STOP: 0b0; COMPARE1_STOP: 0b0; COMPARE2_STOP: 0b0; COMPARE3_STOP: 0b0; COMPARE4_STOP: 0b0; COMPARE5_STOP: 0b0
  611. TIMER0, INTENSET, 0x00000000, COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0; COMPARE4: 0b0; COMPARE5: 0b0
  612. TIMER0, INTENCLR, 0x00000000, COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0; COMPARE4: 0b0; COMPARE5: 0b0
  613. TIMER0, MODE, 0x00000000, MODE: 0b00
  614. TIMER0, BITMODE, 0x00000003, BITMODE: 0b11
  615. TIMER0, PRESCALER, 0x00000004, PRESCALER: 0b0100
  616. TIMER0, CC[%s], 0x0994806A, CC: 0b00001001100101001000000001101010
  617. TIMER1, TASKS_START, <Write-Only>
  618. TIMER1, TASKS_STOP, <Write-Only>
  619. TIMER1, TASKS_COUNT, <Write-Only>
  620. TIMER1, TASKS_CLEAR, <Write-Only>
  621. TIMER1, TASKS_SHUTDOWN, <Write-Only>
  622. TIMER1, TASKS_CAPTURE[%s], <Write-Only>
  623. TIMER1, EVENTS_COMPARE[%s], 0x00000000
  624. TIMER1, SHORTS, 0x00000000, COMPARE0_CLEAR: 0b0; COMPARE1_CLEAR: 0b0; COMPARE2_CLEAR: 0b0; COMPARE3_CLEAR: 0b0; COMPARE4_CLEAR: 0b0; COMPARE5_CLEAR: 0b0; COMPARE0_STOP: 0b0; COMPARE1_STOP: 0b0; COMPARE2_STOP: 0b0; COMPARE3_STOP: 0b0; COMPARE4_STOP: 0b0; COMPARE5_STOP: 0b0
  625. TIMER1, INTENSET, 0x00000000, COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0; COMPARE4: 0b0; COMPARE5: 0b0
  626. TIMER1, INTENCLR, 0x00000000, COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0; COMPARE4: 0b0; COMPARE5: 0b0
  627. TIMER1, MODE, 0x00000000, MODE: 0b00
  628. TIMER1, BITMODE, 0x00000000, BITMODE: 0b00
  629. TIMER1, PRESCALER, 0x00000004, PRESCALER: 0b0100
  630. TIMER1, CC[%s], 0x00000000, CC: 0b00000000000000000000000000000000
  631. TIMER2, TASKS_START, <Write-Only>
  632. TIMER2, TASKS_STOP, <Write-Only>
  633. TIMER2, TASKS_COUNT, <Write-Only>
  634. TIMER2, TASKS_CLEAR, <Write-Only>
  635. TIMER2, TASKS_SHUTDOWN, <Write-Only>
  636. TIMER2, TASKS_CAPTURE[%s], <Write-Only>
  637. TIMER2, EVENTS_COMPARE[%s], 0x00000001
  638. TIMER2, SHORTS, 0x00000000, COMPARE0_CLEAR: 0b0; COMPARE1_CLEAR: 0b0; COMPARE2_CLEAR: 0b0; COMPARE3_CLEAR: 0b0; COMPARE4_CLEAR: 0b0; COMPARE5_CLEAR: 0b0; COMPARE0_STOP: 0b0; COMPARE1_STOP: 0b0; COMPARE2_STOP: 0b0; COMPARE3_STOP: 0b0; COMPARE4_STOP: 0b0; COMPARE5_STOP: 0b0
  639. TIMER2, INTENSET, 0x00010000, COMPARE0: 0b1; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0; COMPARE4: 0b0; COMPARE5: 0b0
  640. TIMER2, INTENCLR, 0x00010000, COMPARE0: 0b1; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0; COMPARE4: 0b0; COMPARE5: 0b0
  641. TIMER2, MODE, 0x00000000, MODE: 0b00
  642. TIMER2, BITMODE, 0x00000003, BITMODE: 0b11
  643. TIMER2, PRESCALER, 0x00000004, PRESCALER: 0b0100
  644. TIMER2, CC[%s], 0x09A41610, CC: 0b00001001101001000001011000010000
  645. TIMER3, TASKS_START, <Write-Only>
  646. TIMER3, TASKS_STOP, <Write-Only>
  647. TIMER3, TASKS_COUNT, <Write-Only>
  648. TIMER3, TASKS_CLEAR, <Write-Only>
  649. TIMER3, TASKS_SHUTDOWN, <Write-Only>
  650. TIMER3, TASKS_CAPTURE[%s], <Write-Only>
  651. TIMER3, EVENTS_COMPARE[%s], 0x00000000
  652. TIMER3, SHORTS, 0x00000000, COMPARE0_CLEAR: 0b0; COMPARE1_CLEAR: 0b0; COMPARE2_CLEAR: 0b0; COMPARE3_CLEAR: 0b0; COMPARE4_CLEAR: 0b0; COMPARE5_CLEAR: 0b0; COMPARE0_STOP: 0b0; COMPARE1_STOP: 0b0; COMPARE2_STOP: 0b0; COMPARE3_STOP: 0b0; COMPARE4_STOP: 0b0; COMPARE5_STOP: 0b0
  653. TIMER3, INTENSET, 0x00000000, COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0; COMPARE4: 0b0; COMPARE5: 0b0
  654. TIMER3, INTENCLR, 0x00000000, COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0; COMPARE4: 0b0; COMPARE5: 0b0
  655. TIMER3, MODE, 0x00000000, MODE: 0b00
  656. TIMER3, BITMODE, 0x00000000, BITMODE: 0b00
  657. TIMER3, PRESCALER, 0x00000004, PRESCALER: 0b0100
  658. TIMER3, CC[%s], 0x00000000, CC: 0b00000000000000000000000000000000
  659. TIMER4, TASKS_START, <Write-Only>
  660. TIMER4, TASKS_STOP, <Write-Only>
  661. TIMER4, TASKS_COUNT, <Write-Only>
  662. TIMER4, TASKS_CLEAR, <Write-Only>
  663. TIMER4, TASKS_SHUTDOWN, <Write-Only>
  664. TIMER4, TASKS_CAPTURE[%s], <Write-Only>
  665. TIMER4, EVENTS_COMPARE[%s], 0x00000000
  666. TIMER4, SHORTS, 0x00000000, COMPARE0_CLEAR: 0b0; COMPARE1_CLEAR: 0b0; COMPARE2_CLEAR: 0b0; COMPARE3_CLEAR: 0b0; COMPARE4_CLEAR: 0b0; COMPARE5_CLEAR: 0b0; COMPARE0_STOP: 0b0; COMPARE1_STOP: 0b0; COMPARE2_STOP: 0b0; COMPARE3_STOP: 0b0; COMPARE4_STOP: 0b0; COMPARE5_STOP: 0b0
  667. TIMER4, INTENSET, 0x00000000, COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0; COMPARE4: 0b0; COMPARE5: 0b0
  668. TIMER4, INTENCLR, 0x00000000, COMPARE0: 0b0; COMPARE1: 0b0; COMPARE2: 0b0; COMPARE3: 0b0; COMPARE4: 0b0; COMPARE5: 0b0
  669. TIMER4, MODE, 0x00000000, MODE: 0b00
  670. TIMER4, BITMODE, 0x00000000, BITMODE: 0b00
  671. TIMER4, PRESCALER, 0x00000004, PRESCALER: 0b0100
  672. TIMER4, CC[%s], 0x00000000, CC: 0b00000000000000000000000000000000
  673. TWI0, TASKS_STARTRX, <Write-Only>
  674. TWI0, TASKS_STARTTX, <Write-Only>
  675. TWI0, TASKS_STOP, <Write-Only>
  676. TWI0, TASKS_SUSPEND, <Write-Only>
  677. TWI0, TASKS_RESUME, <Write-Only>
  678. TWI0, EVENTS_STOPPED, 0x00000000
  679. TWI0, EVENTS_RXDREADY, 0x00000000
  680. TWI0, EVENTS_TXDSENT, 0x00000000
  681. TWI0, EVENTS_ERROR, 0x00000000
  682. TWI0, EVENTS_BB, 0x00000000
  683. TWI0, EVENTS_SUSPENDED, 0x00000000
  684. TWI0, SHORTS, 0x00000000, BB_SUSPEND: 0b0; BB_STOP: 0b0
  685. TWI0, INTENSET, 0x00000000, STOPPED: 0b0; RXDREADY: 0b0; TXDSENT: 0b0; ERROR: 0b0; BB: 0b0; SUSPENDED: 0b0
  686. TWI0, INTENCLR, 0x00000000, STOPPED: 0b0; RXDREADY: 0b0; TXDSENT: 0b0; ERROR: 0b0; BB: 0b0; SUSPENDED: 0b0
  687. TWI0, ERRORSRC, 0x00000000, OVERRUN: 0b0; ANACK: 0b0; DNACK: 0b0
  688. TWI0, ENABLE, 0x00000000, ENABLE: 0b0000
  689. TWI0, PSELSCL, 0xFFFFFFFF, PSELSCL: 0b11111111111111111111111111111111
  690. TWI0, PSELSDA, 0xFFFFFFFF, PSELSDA: 0b11111111111111111111111111111111
  691. TWI0, RXD, 0x00000000, RXD: 0b00000000
  692. TWI0, TXD, 0x00000000, TXD: 0b00000000
  693. TWI0, FREQUENCY, 0x04000000, FREQUENCY: 0b00000100000000000000000000000000
  694. TWI0, ADDRESS, 0x00000000, ADDRESS: 0b0000000
  695. TWI1, TASKS_STARTRX, <Write-Only>
  696. TWI1, TASKS_STARTTX, <Write-Only>
  697. TWI1, TASKS_STOP, <Write-Only>
  698. TWI1, TASKS_SUSPEND, <Write-Only>
  699. TWI1, TASKS_RESUME, <Write-Only>
  700. TWI1, EVENTS_STOPPED, 0x00000000
  701. TWI1, EVENTS_RXDREADY, 0x00000000
  702. TWI1, EVENTS_TXDSENT, 0x00000000
  703. TWI1, EVENTS_ERROR, 0x00000000
  704. TWI1, EVENTS_BB, 0x00000000
  705. TWI1, EVENTS_SUSPENDED, 0x00000000
  706. TWI1, SHORTS, 0x00000000, BB_SUSPEND: 0b0; BB_STOP: 0b0
  707. TWI1, INTENSET, 0x00000000, STOPPED: 0b0; RXDREADY: 0b0; TXDSENT: 0b0; ERROR: 0b0; BB: 0b0; SUSPENDED: 0b0
  708. TWI1, INTENCLR, 0x00000000, STOPPED: 0b0; RXDREADY: 0b0; TXDSENT: 0b0; ERROR: 0b0; BB: 0b0; SUSPENDED: 0b0
  709. TWI1, ERRORSRC, 0x00000000, OVERRUN: 0b0; ANACK: 0b0; DNACK: 0b0
  710. TWI1, ENABLE, 0x00000000, ENABLE: 0b0000
  711. TWI1, PSELSCL, 0xFFFFFFFF, PSELSCL: 0b11111111111111111111111111111111
  712. TWI1, PSELSDA, 0xFFFFFFFF, PSELSDA: 0b11111111111111111111111111111111
  713. TWI1, RXD, 0x00000000, RXD: 0b00000000
  714. TWI1, TXD, 0x00000000, TXD: 0b00000000
  715. TWI1, FREQUENCY, 0x04000000, FREQUENCY: 0b00000100000000000000000000000000
  716. TWI1, ADDRESS, 0x00000000, ADDRESS: 0b0000000
  717. TWIM0, TASKS_STARTRX, <Write-Only>
  718. TWIM0, TASKS_STARTTX, <Write-Only>
  719. TWIM0, TASKS_STOP, <Write-Only>
  720. TWIM0, TASKS_SUSPEND, <Write-Only>
  721. TWIM0, TASKS_RESUME, <Write-Only>
  722. TWIM0, EVENTS_STOPPED, 0x00000000
  723. TWIM0, EVENTS_ERROR, 0x00000000
  724. TWIM0, EVENTS_SUSPENDED, 0x00000000
  725. TWIM0, EVENTS_RXSTARTED, 0x00000000
  726. TWIM0, EVENTS_TXSTARTED, 0x00000000
  727. TWIM0, EVENTS_LASTRX, 0x00000000
  728. TWIM0, EVENTS_LASTTX, 0x00000000
  729. TWIM0, SHORTS, 0x00000000, LASTTX_STARTRX: 0b0; LASTTX_SUSPEND: 0b0; LASTTX_STOP: 0b0; LASTRX_STARTTX: 0b0; LASTRX_STOP: 0b0
  730. TWIM0, INTEN, 0x00000000, STOPPED: 0b0; ERROR: 0b0; SUSPENDED: 0b0; RXSTARTED: 0b0; TXSTARTED: 0b0; LASTRX: 0b0; LASTTX: 0b0
  731. TWIM0, INTENSET, 0x00000000, STOPPED: 0b0; ERROR: 0b0; SUSPENDED: 0b0; RXSTARTED: 0b0; TXSTARTED: 0b0; LASTRX: 0b0; LASTTX: 0b0
  732. TWIM0, INTENCLR, 0x00000000, STOPPED: 0b0; ERROR: 0b0; SUSPENDED: 0b0; RXSTARTED: 0b0; TXSTARTED: 0b0; LASTRX: 0b0; LASTTX: 0b0
  733. TWIM0, ERRORSRC, 0x00000000, OVERRUN: 0b0; ANACK: 0b0; DNACK: 0b0
  734. TWIM0, ENABLE, 0x00000000, ENABLE: 0b0000
  735. TWIM0, FREQUENCY, 0x04000000, FREQUENCY: 0b00000100000000000000000000000000
  736. TWIM0, ADDRESS, 0x00000000, ADDRESS: 0b0000000
  737. TWIM1, TASKS_STARTRX, <Write-Only>
  738. TWIM1, TASKS_STARTTX, <Write-Only>
  739. TWIM1, TASKS_STOP, <Write-Only>
  740. TWIM1, TASKS_SUSPEND, <Write-Only>
  741. TWIM1, TASKS_RESUME, <Write-Only>
  742. TWIM1, EVENTS_STOPPED, 0x00000000
  743. TWIM1, EVENTS_ERROR, 0x00000000
  744. TWIM1, EVENTS_SUSPENDED, 0x00000000
  745. TWIM1, EVENTS_RXSTARTED, 0x00000000
  746. TWIM1, EVENTS_TXSTARTED, 0x00000000
  747. TWIM1, EVENTS_LASTRX, 0x00000000
  748. TWIM1, EVENTS_LASTTX, 0x00000000
  749. TWIM1, SHORTS, 0x00000000, LASTTX_STARTRX: 0b0; LASTTX_SUSPEND: 0b0; LASTTX_STOP: 0b0; LASTRX_STARTTX: 0b0; LASTRX_STOP: 0b0
  750. TWIM1, INTEN, 0x00000000, STOPPED: 0b0; ERROR: 0b0; SUSPENDED: 0b0; RXSTARTED: 0b0; TXSTARTED: 0b0; LASTRX: 0b0; LASTTX: 0b0
  751. TWIM1, INTENSET, 0x00000000, STOPPED: 0b0; ERROR: 0b0; SUSPENDED: 0b0; RXSTARTED: 0b0; TXSTARTED: 0b0; LASTRX: 0b0; LASTTX: 0b0
  752. TWIM1, INTENCLR, 0x00000000, STOPPED: 0b0; ERROR: 0b0; SUSPENDED: 0b0; RXSTARTED: 0b0; TXSTARTED: 0b0; LASTRX: 0b0; LASTTX: 0b0
  753. TWIM1, ERRORSRC, 0x00000000, OVERRUN: 0b0; ANACK: 0b0; DNACK: 0b0
  754. TWIM1, ENABLE, 0x00000000, ENABLE: 0b0000
  755. TWIM1, FREQUENCY, 0x04000000, FREQUENCY: 0b00000100000000000000000000000000
  756. TWIM1, ADDRESS, 0x00000000, ADDRESS: 0b0000000
  757. TWIS0, TASKS_STOP, <Write-Only>
  758. TWIS0, TASKS_SUSPEND, <Write-Only>
  759. TWIS0, TASKS_RESUME, <Write-Only>
  760. TWIS0, TASKS_PREPARERX, <Write-Only>
  761. TWIS0, TASKS_PREPARETX, <Write-Only>
  762. TWIS0, EVENTS_STOPPED, 0x00000000
  763. TWIS0, EVENTS_ERROR, 0x00000000
  764. TWIS0, EVENTS_RXSTARTED, 0x00000000
  765. TWIS0, EVENTS_TXSTARTED, 0x00000000
  766. TWIS0, EVENTS_WRITE, 0x00000000
  767. TWIS0, EVENTS_READ, 0x00000000
  768. TWIS0, SHORTS, 0x00000000, WRITE_SUSPEND: 0b0; READ_SUSPEND: 0b0
  769. TWIS0, INTEN, 0x00000000, STOPPED: 0b0; ERROR: 0b0; RXSTARTED: 0b0; TXSTARTED: 0b0; WRITE: 0b0; READ: 0b0
  770. TWIS0, INTENSET, 0x00000000, STOPPED: 0b0; ERROR: 0b0; RXSTARTED: 0b0; TXSTARTED: 0b0; WRITE: 0b0; READ: 0b0
  771. TWIS0, INTENCLR, 0x00000000, STOPPED: 0b0; ERROR: 0b0; RXSTARTED: 0b0; TXSTARTED: 0b0; WRITE: 0b0; READ: 0b0
  772. TWIS0, ERRORSRC, 0x00000000, OVERFLOW: 0b0; DNACK: 0b0; OVERREAD: 0b0
  773. TWIS0, MATCH, 0x00000000, MATCH: 0b0
  774. TWIS0, ENABLE, 0x00000000, ENABLE: 0b0000
  775. TWIS0, ADDRESS[%s], 0x00000000, ADDRESS: 0b0000000
  776. TWIS0, CONFIG, 0x00000001, ADDRESS0: 0b1; ADDRESS1: 0b0
  777. TWIS0, ORC, 0x00000000, ORC: 0b00000000
  778. TWIS1, TASKS_STOP, <Write-Only>
  779. TWIS1, TASKS_SUSPEND, <Write-Only>
  780. TWIS1, TASKS_RESUME, <Write-Only>
  781. TWIS1, TASKS_PREPARERX, <Write-Only>
  782. TWIS1, TASKS_PREPARETX, <Write-Only>
  783. TWIS1, EVENTS_STOPPED, 0x00000000
  784. TWIS1, EVENTS_ERROR, 0x00000000
  785. TWIS1, EVENTS_RXSTARTED, 0x00000000
  786. TWIS1, EVENTS_TXSTARTED, 0x00000000
  787. TWIS1, EVENTS_WRITE, 0x00000000
  788. TWIS1, EVENTS_READ, 0x00000000
  789. TWIS1, SHORTS, 0x00000000, WRITE_SUSPEND: 0b0; READ_SUSPEND: 0b0
  790. TWIS1, INTEN, 0x00000000, STOPPED: 0b0; ERROR: 0b0; RXSTARTED: 0b0; TXSTARTED: 0b0; WRITE: 0b0; READ: 0b0
  791. TWIS1, INTENSET, 0x00000000, STOPPED: 0b0; ERROR: 0b0; RXSTARTED: 0b0; TXSTARTED: 0b0; WRITE: 0b0; READ: 0b0
  792. TWIS1, INTENCLR, 0x00000000, STOPPED: 0b0; ERROR: 0b0; RXSTARTED: 0b0; TXSTARTED: 0b0; WRITE: 0b0; READ: 0b0
  793. TWIS1, ERRORSRC, 0x00000000, OVERFLOW: 0b0; DNACK: 0b0; OVERREAD: 0b0
  794. TWIS1, MATCH, 0x00000000, MATCH: 0b0
  795. TWIS1, ENABLE, 0x00000000, ENABLE: 0b0000
  796. TWIS1, ADDRESS[%s], 0x00000000, ADDRESS: 0b0000000
  797. TWIS1, CONFIG, 0x00000001, ADDRESS0: 0b1; ADDRESS1: 0b0
  798. TWIS1, ORC, 0x00000000, ORC: 0b00000000
  799. UART0, TASKS_STARTRX, <Write-Only>
  800. UART0, TASKS_STOPRX, <Write-Only>
  801. UART0, TASKS_STARTTX, <Write-Only>
  802. UART0, TASKS_STOPTX, <Write-Only>
  803. UART0, TASKS_SUSPEND, <Write-Only>
  804. UART0, EVENTS_CTS, 0x00000000
  805. UART0, EVENTS_NCTS, 0x00000000
  806. UART0, EVENTS_RXDRDY, 0x00000000
  807. UART0, EVENTS_TXDRDY, 0x00000000
  808. UART0, EVENTS_ERROR, 0x00000000
  809. UART0, EVENTS_RXTO, 0x00000000
  810. UART0, SHORTS, 0x00000000, CTS_STARTRX: 0b0; NCTS_STOPRX: 0b0
  811. UART0, INTENSET, 0x00000000, CTS: 0b0; NCTS: 0b0; RXDRDY: 0b0; TXDRDY: 0b0; ERROR: 0b0; RXTO: 0b0
  812. UART0, INTENCLR, 0x00000000, CTS: 0b0; NCTS: 0b0; RXDRDY: 0b0; TXDRDY: 0b0; ERROR: 0b0; RXTO: 0b0
  813. UART0, ERRORSRC, 0x00000000, OVERRUN: 0b0; PARITY: 0b0; FRAMING: 0b0; BREAK: 0b0
  814. UART0, ENABLE, 0x00000000, ENABLE: 0b0000
  815. UART0, PSELRTS, 0xFFFFFFFF, PSELRTS: 0b11111111111111111111111111111111
  816. UART0, PSELTXD, 0xFFFFFFFF, PSELTXD: 0b11111111111111111111111111111111
  817. UART0, PSELCTS, 0xFFFFFFFF, PSELCTS: 0b11111111111111111111111111111111
  818. UART0, PSELRXD, 0xFFFFFFFF, PSELRXD: 0b11111111111111111111111111111111
  819. UART0, RXD, 0x00000000, RXD: 0b00000000
  820. UART0, TXD, <Write-Only>, TXD: -
  821. UART0, BAUDRATE, 0x04000000, BAUDRATE: 0b00000100000000000000000000000000
  822. UART0, CONFIG, 0x00000000, HWFC: 0b0; PARITY: 0b000
  823. UARTE0, TASKS_STARTRX, <Write-Only>
  824. UARTE0, TASKS_STOPRX, <Write-Only>
  825. UARTE0, TASKS_STARTTX, <Write-Only>
  826. UARTE0, TASKS_STOPTX, <Write-Only>
  827. UARTE0, TASKS_FLUSHRX, <Write-Only>
  828. UARTE0, EVENTS_CTS, 0x00000000
  829. UARTE0, EVENTS_NCTS, 0x00000000
  830. UARTE0, EVENTS_RXDRDY, 0x00000000
  831. UARTE0, EVENTS_ENDRX, 0x00000000
  832. UARTE0, EVENTS_TXDRDY, 0x00000000
  833. UARTE0, EVENTS_ENDTX, 0x00000000
  834. UARTE0, EVENTS_ERROR, 0x00000000
  835. UARTE0, EVENTS_RXTO, 0x00000000
  836. UARTE0, EVENTS_RXSTARTED, 0x00000000
  837. UARTE0, EVENTS_TXSTARTED, 0x00000000
  838. UARTE0, EVENTS_TXSTOPPED, 0x00000000
  839. UARTE0, SHORTS, 0x00000000, ENDRX_STARTRX: 0b0; ENDRX_STOPRX: 0b0
  840. UARTE0, INTEN, 0x00000000, CTS: 0b0; NCTS: 0b0; RXDRDY: 0b0; ENDRX: 0b0; TXDRDY: 0b0; ENDTX: 0b0; ERROR: 0b0; RXTO: 0b0; RXSTARTED: 0b0; TXSTARTED: 0b0; TXSTOPPED: 0b0
  841. UARTE0, INTENSET, 0x00000000, CTS: 0b0; NCTS: 0b0; RXDRDY: 0b0; ENDRX: 0b0; TXDRDY: 0b0; ENDTX: 0b0; ERROR: 0b0; RXTO: 0b0; RXSTARTED: 0b0; TXSTARTED: 0b0; TXSTOPPED: 0b0
  842. UARTE0, INTENCLR, 0x00000000, CTS: 0b0; NCTS: 0b0; RXDRDY: 0b0; ENDRX: 0b0; TXDRDY: 0b0; ENDTX: 0b0; ERROR: 0b0; RXTO: 0b0; RXSTARTED: 0b0; TXSTARTED: 0b0; TXSTOPPED: 0b0
  843. UARTE0, ERRORSRC, 0x00000000, OVERRUN: 0b0; PARITY: 0b0; FRAMING: 0b0; BREAK: 0b0
  844. UARTE0, ENABLE, 0x00000000, ENABLE: 0b0000
  845. UARTE0, BAUDRATE, 0x04000000, BAUDRATE: 0b00000100000000000000000000000000
  846. UARTE0, CONFIG, 0x00000000, HWFC: 0b0; PARITY: 0b000
  847. UICR, UNUSED0, 0xFFFFFFFF
  848. UICR, UNUSED1, 0xFFFFFFFF
  849. UICR, UNUSED2, 0xFFFFFFFF
  850. UICR, UNUSED3, 0xFFFFFFFF
  851. UICR, NRFFW[%s], 0xFFFFFFFF, NRFFW: 0b11111111111111111111111111111111
  852. UICR, NRFHW[%s], 0xFFFFFFFF, NRFHW: 0b11111111111111111111111111111111
  853. UICR, CUSTOMER[%s], 0xFFFFFFFF, CUSTOMER: 0b11111111111111111111111111111111
  854. UICR, PSELRESET[%s], 0x00000015, PIN: 0b010101; CONNECT: 0b0
  855. UICR, APPROTECT, 0xFFFFFFFF, PALL: 0b11111111
  856. UICR, NFCPINS, 0xFFFFFFFF, PROTECT: 0b1
  857. WDT, TASKS_START, <Write-Only>
  858. WDT, EVENTS_TIMEOUT, 0x00000000
  859. WDT, INTENSET, 0x00000000, TIMEOUT: 0b0
  860. WDT, INTENCLR, 0x00000000, TIMEOUT: 0b0
  861. WDT, RUNSTATUS, 0x00000000, RUNSTATUS: 0b0
  862. WDT, REQSTATUS, 0x00000001, RR0: 0b1; RR1: 0b0; RR2: 0b0; RR3: 0b0; RR4: 0b0; RR5: 0b0; RR6: 0b0; RR7: 0b0
  863. WDT, CRV, 0xFFFFFFFF, CRV: 0b11111111111111111111111111111111
  864. WDT, RREN, 0x00000001, RR0: 0b1; RR1: 0b0; RR2: 0b0; RR3: 0b0; RR4: 0b0; RR5: 0b0; RR6: 0b0; RR7: 0b0
  865. WDT, CONFIG, 0x00000001, SLEEP: 0b1; HALT: 0b0
  866. WDT, RR[%s], <Write-Only>, RR: -
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement