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  1. Unable to open path /sys/bus/coreboot/devices/cbmem-43425442/address for reading. Error: No such file or directory
  2. Looking for coreboot table at 0 4096 bytes.
  3. Mapping 4096B of physical memory at 0x0 (requested 0x0).
  4. Mapping 1320B of physical memory at 0x0 (requested 0x500).
  5. ... padding virtual address with 0x500 bytes.
  6. Found at 0x500
  7. coreboot table entry 0x11
  8. Found forwarding entry.
  9. Looking for coreboot table at 76a09000 4096 bytes.
  10. Mapping 4096B of physical memory at 0x76a09000 (requested 0x76a09000).
  11. Mapping 5132B of physical memory at 0x76a09000 (requested 0x76a09000).
  12. Found at 0x76a09000
  13. coreboot table entry 0x47
  14. coreboot table entry 0x01
  15. coreboot table entry 0x03
  16. coreboot table entry 0x0f
  17. coreboot table entry 0x10
  18. coreboot table entry 0x04
  19. coreboot table entry 0x05
  20. coreboot table entry 0x06
  21. coreboot table entry 0x07
  22. coreboot table entry 0x38
  23. coreboot table entry 0x26
  24. coreboot table entry 0x12
  25. coreboot table entry 0x29
  26. coreboot table entry 0x16
  27. coreboot table entry 0x17
  28. coreboot table entry 0x24
  29. coreboot table entry 0x37
  30. coreboot table entry 0x39
  31. coreboot table entry 0x30
  32. coreboot table entry 0x40
  33. coreboot table entry 0x32
  34. coreboot table entry 0x31
  35. coreboot table entry 0x31
  36. coreboot table entry 0x31
  37. coreboot table entry 0x31
  38. coreboot table entry 0x31
  39. coreboot table entry 0x31
  40. coreboot table entry 0x31
  41. coreboot table entry 0x31
  42. coreboot table entry 0x31
  43. coreboot table entry 0x31
  44. coreboot table entry 0x31
  45. coreboot table entry 0x31
  46. coreboot table entry 0x31
  47. coreboot table entry 0x31
  48. coreboot table entry 0x31
  49. coreboot table entry 0x31
  50. coreboot table entry 0x31
  51. coreboot table entry 0x31
  52. coreboot table entry 0x31
  53. coreboot table entry 0x31
  54. coreboot table entry 0x31
  55. coreboot table entry 0x43
  56. correct coreboot table found.
  57. Initialized CBMEM backend: devmem
  58. Mapping 262144B of physical memory at 0x76c0e000 (requested 0x76c0e000).
  59.  
  60. [NOTE ] coreboot-25.12-110-g6b52f82df270 Wed Jan 07 12:21:01 UTC 2026 x86_32 bootblock starting (log level: 7)...
  61. [DEBUG] CPU: Intel(R) N100
  62. [DEBUG] CPU: ID b06e0, Alderlake-N Platform, ucode: 0000001e
  63. [DEBUG] CPU: AES supported, TXT NOT supported, VT supported
  64. [INFO ] Cache: Level 3: Associativity = 12 Partitions = 1 Line Size = 64 Sets = 8192
  65. [INFO ] Cache size = 6 MiB
  66. [DEBUG] MCH: device id 461c (rev 00) is Alderlake-N
  67. [DEBUG] PCH: device id 5481 (rev 00) is Alderlake-N SKU
  68. [DEBUG] IGD: device id 46d1 (rev 00) is Alderlake N GT2
  69. [DEBUG] Starting cbfs_boot_device
  70. [DEBUG] Starting cbfs_boot_device
  71. [DEBUG] FMAP: Found "FLASH" version 1.1 at 0xc90000.
  72. [DEBUG] FMAP: base = 0x0 size = 0x1000000 #areas = 5
  73. [DEBUG] FMAP: area COREBOOT found @ c91000 (3600384 bytes)
  74. [INFO ] Booting from COREBOOT region
  75. [INFO ] CBFS: mcache @0xfef8c200 built for 15 files, used 0x33c of 0x4000 bytes
  76. [INFO ] CBFS: Found 'fallback/romstage' @0x22140 size 0x13308 in mcache @0xfef8c28c
  77. [DEBUG] BS: bootblock times (exec / console): total (unknown) / 110 ms
  78.  
  79.  
  80. [NOTE ] coreboot-25.12-110-g6b52f82df270 Wed Jan 07 12:21:01 UTC 2026 x86_32 romstage starting (log level: 7)...
  81. [DEBUG] pm1_sts: 8000 pm1_en: 0000 pm1_cnt: 00001c00
  82. [DEBUG] gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  83. [DEBUG] gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
  84. [DEBUG] gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  85. [DEBUG] gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
  86. [DEBUG] TCO_STS: 0000 0000
  87. [DEBUG] GEN_PMCON: d9801078 00002200
  88. [DEBUG] GBLRST_CAUSE: 00000042 00000000
  89. [DEBUG] HPR_CAUSE0: 00000000
  90. [DEBUG] PM1_STS: WAK
  91. [DEBUG] prev_sleep_state 5 (S5)
  92. [INFO ] OC Watchdog: disabling watchdog timer
  93. [DEBUG] Abort disabling TXT, as CPU is not TXT capable.
  94. [DEBUG] Starting cbfs_boot_device
  95. [DEBUG] FMAP: area COREBOOT found @ c91000 (3600384 bytes)
  96. [INFO ] Fixed Decode Window: SPI flash base=0x600000, Host base=0xff600000, Size=0xa00000
  97. [INFO ] Booting from COREBOOT region
  98. [INFO ] CBFS: Found 'fspm.bin' @0x59fc0 size 0xc0000 in mcache @0xfef8c3e4
  99. [DEBUG] FMAP: area RW_MRC_CACHE found @ c00000 (65536 bytes)
  100. [INFO ] SPD: module type is DDR5
  101. [INFO ] SPD: banks 4, ranks 5, rows 12, columns 9, density 4096 Mb
  102. [INFO ] SPD: device width 4 bits, bus width 16 bits
  103. [INFO ] SPD: module size is 10240 MB (per channel)
  104. [DEBUG] CBMEM:
  105. [DEBUG] IMD: root @ 0x76fff000 254 entries.
  106. [DEBUG] IMD: root @ 0x76ffec00 62 entries.
  107. [DEBUG] Starting cbfs_boot_device
  108. [DEBUG] External stage cache:
  109. [DEBUG] IMD: root @ 0x7bbff000 254 entries.
  110. [DEBUG] IMD: root @ 0x7bbfec00 62 entries.
  111. [DEBUG] FMAP: area RW_MRC_CACHE found @ c00000 (65536 bytes)
  112. [DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'.
  113. [DEBUG] MRC: 'RW_MRC_CACHE' does not need update.
  114. [DEBUG] 1 DIMMs found
  115. [DEBUG] SMM Memory Map
  116. [DEBUG] SMRAM : 0x7b800000 0x800000
  117. [DEBUG] Subregion 0: 0x7b800000 0x200000
  118. [DEBUG] Subregion 1: 0x7ba00000 0x200000
  119. [DEBUG] Subregion 2: 0x7bc00000 0x400000
  120. [DEBUG] top_of_ram = 0x77000000
  121. [DEBUG] Normal boot
  122. [DEBUG] Starting cbfs_boot_device
  123. [INFO ] CBFS: Found 'fallback/postcar' @0x164240 size 0xe6e8 in mcache @0xfef8c488
  124. [DEBUG] Loading module at 0x76bf6000 with entry 0x76bf6031. filesize: 0xd9c8 memsize: 0x13e00
  125. [DEBUG] Processing 824 relocs. Offset value of 0x74bf6000
  126. [DEBUG] BS: romstage times (exec / console): total (unknown) / 254 ms
  127.  
  128.  
  129. [NOTE ] coreboot-25.12-110-g6b52f82df270 Wed Jan 07 12:21:01 UTC 2026 x86_32 postcar starting (log level: 7)...
  130. [DEBUG] Normal boot
  131. [DEBUG] Starting cbfs_boot_device
  132. [DEBUG] FMAP: area COREBOOT found @ c91000 (3600384 bytes)
  133. [INFO ] Booting from COREBOOT region
  134. [INFO ] CBFS: Found 'fallback/ramstage' @0x354c0 size 0x21112 in mcache @0x76c0d0ec
  135. [DEBUG] Loading module at 0x76a96000 with entry 0x76a96000. filesize: 0x46560 memsize: 0x15ee10
  136. [DEBUG] Processing 5017 relocs. Offset value of 0x72a96000
  137. [DEBUG] BS: postcar times (exec / console): total (unknown) / 57 ms
  138.  
  139.  
  140. [NOTE ] coreboot-25.12-110-g6b52f82df270 Wed Jan 07 12:21:01 UTC 2026 x86_32 ramstage starting (log level: 7)...
  141. [DEBUG] Normal boot
  142. [DEBUG] microcode: sig=0xb06e0 pf=0x1 revision=0x1e
  143. [DEBUG] Starting cbfs_boot_device
  144. [DEBUG] FMAP: area COREBOOT found @ c91000 (3600384 bytes)
  145. [INFO ] Booting from COREBOOT region
  146. [INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x80 size 0x22000 in mcache @0x76c0d02c
  147. [INFO ] microcode: Update skipped, already up-to-date
  148. [DEBUG] Starting cbfs_boot_device
  149. [INFO ] CBFS: Found 'fsps.bin' @0x11a000 size 0x49cb4 in mcache @0x76c0d224
  150. [DEBUG] Detected 4 core, 4 thread CPU.
  151. [DEBUG] Setting up SMI for CPU
  152. [DEBUG] IED base = 0x7bc00000
  153. [DEBUG] IED size = 0x00400000
  154. [INFO ] Will perform SMM setup.
  155. [INFO ] CPU: Intel(R) N100.
  156. [INFO ] LAPIC 0x0 in XAPIC mode.
  157. [DEBUG] CPU: APIC: 00 enabled
  158. [DEBUG] CPU: APIC: 01 enabled
  159. [DEBUG] CPU: APIC: 02 enabled
  160. [DEBUG] CPU: APIC: 03 enabled
  161. [DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
  162. [DEBUG] Processing 16 relocs. Offset value of 0x00030000
  163. [DEBUG] Attempting to start 3 APs
  164. [DEBUG] Waiting for 10ms after sending INIT.
  165. [DEBUG] Waiting for SIPI to complete...
  166. [DEBUG] done.
  167. [INFO ] LAPIC 0x6 in XAPIC mode.
  168. [INFO ] LAPIC 0x4 in XAPIC mode.
  169. [INFO ] AP: slot 3 apic_id 6, MCU rev: 0x0000001e
  170. [INFO ] AP: slot 2 apic_id 4, MCU rev: 0x0000001e
  171. [DEBUG] Waiting for SIPI to complete...
  172. [DEBUG] done.
  173. [INFO ] LAPIC 0x2 in XAPIC mode.
  174. [INFO ] AP: slot 1 apic_id 2, MCU rev: 0x0000001e
  175. [DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1c0 memsize: 0x1c0
  176. [DEBUG] Processing 9 relocs. Offset value of 0x00038000
  177. [DEBUG] smm_module_setup_stub: stack_top = 0x7b802000
  178. [DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800
  179. [DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000
  180. [DEBUG] SMM Module: stub loaded at 38000. Will call 0x76ab711a
  181. [DEBUG] Installing permanent SMM handler to 0x7b800000
  182. [DEBUG] HANDLER [0x7b9fd000-0x7b9ffea7]
  183.  
  184. [DEBUG] CPU 0
  185. [DEBUG] ss0 [0x7b9fcc00-0x7b9fcfff]
  186. [DEBUG] stub0 [0x7b9f5000-0x7b9f51bf]
  187.  
  188. [DEBUG] CPU 1
  189. [DEBUG] ss1 [0x7b9fc800-0x7b9fcbff]
  190. [DEBUG] stub1 [0x7b9f4c00-0x7b9f4dbf]
  191.  
  192. [DEBUG] CPU 2
  193. [DEBUG] ss2 [0x7b9fc400-0x7b9fc7ff]
  194. [DEBUG] stub2 [0x7b9f4800-0x7b9f49bf]
  195.  
  196. [DEBUG] CPU 3
  197. [DEBUG] ss3 [0x7b9fc000-0x7b9fc3ff]
  198. [DEBUG] stub3 [0x7b9f4400-0x7b9f45bf]
  199.  
  200. [DEBUG] stacks [0x7b800000-0x7b801fff]
  201. [DEBUG] Loading module at 0x7b9fd000 with entry 0x7b9fd724. filesize: 0x2d50 memsize: 0x2ea8
  202. [DEBUG] Processing 219 relocs. Offset value of 0x7b9fd000
  203. [DEBUG] FMAP: area SMMSTORE found @ c10000 (524288 bytes)
  204. [DEBUG] smm store: 8 # blocks with size 0x10000
  205. [DEBUG] Loading module at 0x7b9f5000 with entry 0x7b9f5000. filesize: 0x1c0 memsize: 0x1c0
  206. [DEBUG] Processing 9 relocs. Offset value of 0x7b9f5000
  207. [DEBUG] smm_module_setup_stub: stack_top = 0x7b802000
  208. [DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800
  209. [DEBUG] smm_module_setup_stub: runtime.smm_size = 0x200000
  210. [DEBUG] SMM Module: placing smm entry code at 7b9f4c00, cpu # 0x1
  211. [DEBUG] SMM Module: placing smm entry code at 7b9f4800, cpu # 0x2
  212. [DEBUG] SMM Module: placing smm entry code at 7b9f4400, cpu # 0x3
  213. [DEBUG] SMM Module: stub loaded at 7b9f5000. Will call 0x7b9fd724
  214. [DEBUG] Clearing SMI status registers
  215. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ed000, cpu = 0
  216. [DEBUG] In relocation handler: CPU 0
  217. [DEBUG] New SMBASE=0x7b9ed000 IEDBASE=0x7bc00000
  218. [DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
  219. [DEBUG] Relocation complete.
  220. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ec800, cpu = 2
  221. [DEBUG] In relocation handler: CPU 2
  222. [DEBUG] New SMBASE=0x7b9ec800 IEDBASE=0x7bc00000
  223. [DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
  224. [DEBUG] Relocation complete.
  225. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ecc00, cpu = 1
  226. [DEBUG] In relocation handler: CPU 1
  227. [DEBUG] New SMBASE=0x7b9ecc00 IEDBASE=0x7bc00000
  228. [DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
  229. [DEBUG] Relocation complete.
  230. [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b9ec400, cpu = 3
  231. [DEBUG] In relocation handler: CPU 3
  232. [DEBUG] New SMBASE=0x7b9ec400 IEDBASE=0x7bc00000
  233. [DEBUG] Writing SMRR. base = 0x7b800006, mask=0xff800c00
  234. [DEBUG] Relocation complete.
  235. [INFO ] Initializing CPU #0
  236. [DEBUG] CPU: vendor Intel device b06e0
  237. [DEBUG] CPU: family 06, model be, stepping 00
  238. [DEBUG] Clearing out pending MCEs
  239. [DEBUG] cpu: energy policy set to 7
  240. [INFO ] Turbo is available but hidden
  241. [INFO ] Turbo is available and visible
  242. [INFO ] microcode: Update skipped, already up-to-date
  243. [INFO ] CPU #0 initialized
  244. [INFO ] Initializing CPU #1
  245. [INFO ] Initializing CPU #3
  246. [INFO ] Initializing CPU #2
  247. [DEBUG] CPU: vendor Intel device b06e0
  248. [DEBUG] CPU: family 06, model be, stepping 00
  249. [DEBUG] CPU: vendor Intel device b06e0
  250. [DEBUG] CPU: family 06, model be, stepping 00
  251. [DEBUG] Clearing out pending MCEs
  252. [DEBUG] CPU: vendor Intel device b06e0
  253. [DEBUG] CPU: family 06, model be, stepping 00
  254. [DEBUG] cpu: energy policy set to 7
  255. [DEBUG] Clearing out pending MCEs
  256. [INFO ] microcode: Update skipped, already up-to-date
  257. [INFO ] CPU #3 initialized
  258. [DEBUG] Clearing out pending MCEs
  259. [DEBUG] cpu: energy policy set to 7
  260. [DEBUG] cpu: energy policy set to 7
  261. [INFO ] microcode: Update skipped, already up-to-date
  262. [INFO ] CPU #1 initialized
  263. [INFO ] microcode: Update skipped, already up-to-date
  264. [INFO ] CPU #2 initialized
  265. [INFO ] bsp_do_flight_plan done after 473 msecs.
  266. [DEBUG] CPU: frequency set to 3400 MHz
  267. [DEBUG] Enabling SMIs.
  268. [DEBUG] BS: BS_DEV_INIT_CHIPS entry times (exec / console): 240 / 426 ms
  269. [ERROR] gpio_pad_reset_config_override: Logical to Chipset mapping not found
  270. [ERROR] gpio_pad_reset_config_override: Logical to Chipset mapping not found
  271. [ERROR] gpio_pad_reset_config_override: Logical to Chipset mapping not found
  272. [ERROR] gpio_pad_reset_config_override: Logical to Chipset mapping not found
  273. [DEBUG] All HSPHY ports disabled, skipping HSPHY loading
  274. [DEBUG] Starting cbfs_boot_device
  275. [INFO ] CBFS: Found 'vbt.bin' @0x163d00 size 0x4e8 in mcache @0x76c0d258
  276. [INFO ] Found a VBT of 9216 bytes
  277. [INFO ] PCI 1.0, PIN A, using IRQ #16
  278. [INFO ] PCI 2.0, PIN A, using IRQ #17
  279. [INFO ] PCI 4.0, PIN A, using IRQ #18
  280. [INFO ] PCI 5.0, PIN A, using IRQ #16
  281. [INFO ] PCI 6.0, PIN D, using IRQ #16
  282. [INFO ] PCI 6.2, PIN B, using IRQ #18
  283. [INFO ] PCI 7.0, PIN A, using IRQ #19
  284. [INFO ] PCI 7.1, PIN B, using IRQ #20
  285. [INFO ] PCI 7.2, PIN C, using IRQ #21
  286. [INFO ] PCI 7.3, PIN D, using IRQ #22
  287. [INFO ] PCI 8.0, PIN A, using IRQ #23
  288. [INFO ] PCI D.0, PIN A, using IRQ #17
  289. [INFO ] PCI D.1, PIN B, using IRQ #19
  290. [INFO ] PCI 10.0, PIN A, using IRQ #24
  291. [INFO ] PCI 10.1, PIN B, using IRQ #25
  292. [INFO ] PCI 10.6, PIN C, using IRQ #20
  293. [INFO ] PCI 10.7, PIN D, using IRQ #21
  294. [INFO ] PCI 11.0, PIN A, using IRQ #26
  295. [INFO ] PCI 11.1, PIN B, using IRQ #27
  296. [INFO ] PCI 11.2, PIN C, using IRQ #28
  297. [INFO ] PCI 11.3, PIN D, using IRQ #29
  298. [INFO ] PCI 12.0, PIN A, using IRQ #30
  299. [INFO ] PCI 12.6, PIN B, using IRQ #31
  300. [INFO ] PCI 12.7, PIN C, using IRQ #22
  301. [INFO ] PCI 13.0, PIN A, using IRQ #32
  302. [INFO ] PCI 13.1, PIN B, using IRQ #33
  303. [INFO ] PCI 13.2, PIN C, using IRQ #34
  304. [INFO ] PCI 13.3, PIN D, using IRQ #35
  305. [INFO ] PCI 14.0, PIN B, using IRQ #23
  306. [INFO ] PCI 14.1, PIN A, using IRQ #36
  307. [INFO ] PCI 14.3, PIN C, using IRQ #17
  308. [INFO ] PCI 15.0, PIN A, using IRQ #37
  309. [INFO ] PCI 15.1, PIN B, using IRQ #38
  310. [INFO ] PCI 15.2, PIN C, using IRQ #39
  311. [INFO ] PCI 15.3, PIN D, using IRQ #40
  312. [INFO ] PCI 16.0, PIN A, using IRQ #18
  313. [INFO ] PCI 16.1, PIN B, using IRQ #19
  314. [INFO ] PCI 16.2, PIN C, using IRQ #20
  315. [INFO ] PCI 16.3, PIN D, using IRQ #21
  316. [INFO ] PCI 16.4, PIN A, using IRQ #18
  317. [INFO ] PCI 16.5, PIN B, using IRQ #19
  318. [INFO ] PCI 17.0, PIN A, using IRQ #22
  319. [INFO ] PCI 19.0, PIN A, using IRQ #41
  320. [INFO ] PCI 19.1, PIN B, using IRQ #42
  321. [INFO ] PCI 19.2, PIN C, using IRQ #44
  322. [INFO ] PCI 1A.0, PIN A, using IRQ #23
  323. [INFO ] PCI 1C.0, PIN A, using IRQ #16
  324. [INFO ] PCI 1C.1, PIN B, using IRQ #17
  325. [INFO ] PCI 1C.2, PIN C, using IRQ #18
  326. [INFO ] PCI 1C.3, PIN D, using IRQ #19
  327. [INFO ] PCI 1C.4, PIN A, using IRQ #16
  328. [INFO ] PCI 1C.5, PIN B, using IRQ #17
  329. [INFO ] PCI 1C.6, PIN C, using IRQ #18
  330. [INFO ] PCI 1C.7, PIN D, using IRQ #19
  331. [INFO ] PCI 1D.0, PIN A, using IRQ #16
  332. [INFO ] PCI 1D.1, PIN B, using IRQ #17
  333. [INFO ] PCI 1D.2, PIN C, using IRQ #18
  334. [INFO ] PCI 1D.3, PIN D, using IRQ #19
  335. [INFO ] PCI 1E.0, PIN A, using IRQ #20
  336. [INFO ] PCI 1E.1, PIN B, using IRQ #21
  337. [INFO ] PCI 1E.2, PIN C, using IRQ #45
  338. [INFO ] PCI 1E.3, PIN D, using IRQ #46
  339. [INFO ] PCI 1F.3, PIN B, using IRQ #23
  340. [INFO ] PCI 1F.4, PIN C, using IRQ #20
  341. [INFO ] PCI 1F.6, PIN D, using IRQ #21
  342. [INFO ] PCI 1F.7, PIN A, using IRQ #22
  343. [INFO ] IRQ: Using dynamically assigned PCI IO-APIC IRQs
  344. [DEBUG] Detected 4 core, 4 thread CPU.
  345. [DEBUG] Detected 4 core, 4 thread CPU.
  346. [DEBUG] Detected 4 core, 4 thread CPU.
  347. [DEBUG] Detected 4 core, 4 thread CPU.
  348. [DEBUG] Detected 4 core, 4 thread CPU.
  349. [DEBUG] Detected 4 core, 4 thread CPU.
  350. [DEBUG] Detected 4 core, 4 thread CPU.
  351. [DEBUG] Detected 4 core, 4 thread CPU.
  352. [DEBUG] Detected 4 core, 4 thread CPU.
  353. [DEBUG] Detected 4 core, 4 thread CPU.
  354. [DEBUG] Detected 4 core, 4 thread CPU.
  355. [DEBUG] Detected 4 core, 4 thread CPU.
  356. [DEBUG] Detected 4 core, 4 thread CPU.
  357. [DEBUG] Detected 4 core, 4 thread CPU.
  358. [DEBUG] Detected 4 core, 4 thread CPU.
  359. [DEBUG] Detected 4 core, 4 thread CPU.
  360. [DEBUG] Detected 4 core, 4 thread CPU.
  361. [DEBUG] Detected 4 core, 4 thread CPU.
  362. [DEBUG] Detected 4 core, 4 thread CPU.
  363. [DEBUG] Detected 4 core, 4 thread CPU.
  364. [DEBUG] Detected 4 core, 4 thread CPU.
  365. [DEBUG] Detected 4 core, 4 thread CPU.
  366. [DEBUG] Detected 4 core, 4 thread CPU.
  367. [DEBUG] Detected 4 core, 4 thread CPU.
  368. [DEBUG] Detected 4 core, 4 thread CPU.
  369. [DEBUG] Detected 4 core, 4 thread CPU.
  370. [INFO ] FSPS, status=0x00000000
  371. [DEBUG] Display FSP Version Info HOB
  372. [DEBUG] Reference Code - CPU = c.e0.8a.20
  373. [DEBUG] uCode Version = 0.0.0.1e
  374. [DEBUG] TXT ACM version = ff.ff.ff.ffff
  375. [DEBUG] Reference Code - ME = c.e0.8a.20
  376. [DEBUG] MEBx version = 0.0.0.0
  377. [DEBUG] ME Firmware Version = Consumer SKU
  378. [DEBUG] Reference Code - PCH = c.e0.8a.20
  379. [DEBUG] PCH-CRID Status = Disabled
  380. [DEBUG] PCH-CRID Original Value = ff.ff.ff.ffff
  381. [DEBUG] PCH-CRID New Value = ff.ff.ff.ffff
  382. [DEBUG] OPROM - RST - RAID = ff.ff.ff.ffff
  383. [DEBUG] PCH Hsio Version = 4.0.0.0
  384. [DEBUG] Reference Code - SA - System Agent = c.e0.8a.20
  385. [DEBUG] Reference Code - MRC = 1.0.4.4d
  386. [DEBUG] SA - PCIe Version = c.e0.8a.20
  387. [DEBUG] SA-CRID Status = Disabled
  388. [DEBUG] SA-CRID Original Value = 0.0.0.0
  389. [DEBUG] SA-CRID New Value = 0.0.0.0
  390. [DEBUG] OPROM - VBIOS = ff.ff.ff.ffff
  391. [DEBUG] IO Manageability Engine FW Version = 23.0.8.0
  392. [DEBUG] PHY Build Version = 0.0.0.0
  393. [DEBUG] Thunderbolt(TM) FW Version = 0.0.0.0
  394. [DEBUG] System Agent Manageability Engine FW Version = ff.ff.ff.ffff
  395. [INFO ] Found PCIe Root Port #1 at PCI: 00:1c.0.
  396. [INFO ] Found PCIe Root Port #2 at PCI: 00:1c.1.
  397. [INFO ] Found PCIe Root Port #3 at PCI: 00:1c.2.
  398. [INFO ] Found PCIe Root Port #7 at PCI: 00:1c.6.
  399. [INFO ] Found PCIe Root Port #9 at PCI: 00:1d.0.
  400. [NOTE ] pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:00:1d.2) which was enabled in devicetree, removing and disabling.
  401. [DEBUG] BS: BS_DEV_INIT_CHIPS run times (exec / console): 254 / 660 ms
  402. [INFO ] Enumerating buses...
  403. [DEBUG] Root Device scanning...
  404. [DEBUG] CPU_CLUSTER: 0 enabled
  405. [DEBUG] DOMAIN: 00000000 enabled
  406. [DEBUG] DOMAIN: 00000000 scanning...
  407. [DEBUG] PCI: pci_scan_bus for segment group 00 bus 00
  408. [DEBUG] PCI: 00:00:00.0 [8086/461c] enabled
  409. [DEBUG] PCI: 00:00:02.0 [8086/46d1] enabled
  410. [INFO ] PCI: Static device PCI: 00:00:0a.0 not found, disabling it.
  411. [DEBUG] PCI: 00:00:14.0 [8086/54ed] enabled
  412. [DEBUG] PCI: 00:00:14.2 [8086/54ef] enabled
  413. [DEBUG] HSFSTS: 0x6000
  414. [DEBUG] CMOS: me_state = 1
  415. [DEBUG] ME is disabled.
  416. [DEBUG] found existing variable me_state_counter, match = 0
  417. [DEBUG] PCI: 00:00:16.0 [8086/54e0] enabled
  418. [DEBUG] PCI: 00:00:17.0 [8086/54d3] enabled
  419. [DEBUG] PCI: 00:00:1c.0 [8086/54b8] enabled
  420. [DEBUG] PCI: 00:00:1c.1 [8086/54b9] enabled
  421. [DEBUG] PCI: 00:00:1c.2 [8086/54ba] enabled
  422. [DEBUG] PCI: 00:00:1c.6 [8086/54be] enabled
  423. [DEBUG] PCI: 00:00:1d.0 [8086/54b0] enabled
  424. [DEBUG] PCI: 00:00:1f.0 [8086/5481] enabled
  425. [DEBUG] PCI: 00:00:1f.1 [0000/0000] hidden
  426. [DEBUG] RTC Init
  427. [INFO ] Set power on after power failure.
  428. [DEBUG] Disabling Deep S3
  429. [DEBUG] Disabling Deep S3
  430. [DEBUG] Disabling Deep S4
  431. [DEBUG] Disabling Deep S4
  432. [DEBUG] Disabling Deep S5
  433. [DEBUG] Disabling Deep S5
  434. [DEBUG] PCI: 00:00:1f.2 [0000/0000] hidden
  435. [DEBUG] PCI: 00:00:1f.3 [8086/54c8] enabled
  436. [DEBUG] PCI: 00:00:1f.4 [8086/54a3] enabled
  437. [DEBUG] PCI: 00:00:1f.5 [8086/54a4] enabled
  438. [DEBUG] GPIO: 0 enabled
  439. [DEBUG] MMIO: fed40000 enabled
  440. [WARN ] PCI: Leftover static devices:
  441. [WARN ] PCI: 00:00:01.0
  442. [WARN ] PCI: 00:00:01.1
  443. [WARN ] PCI: 00:00:04.0
  444. [WARN ] PCI: 00:00:05.0
  445. [WARN ] PCI: 00:00:06.0
  446. [WARN ] PCI: 00:00:06.2
  447. [WARN ] PCI: 00:00:07.0
  448. [WARN ] PCI: 00:00:07.1
  449. [WARN ] PCI: 00:00:07.2
  450. [WARN ] PCI: 00:00:07.3
  451. [WARN ] PCI: 00:00:08.0
  452. [WARN ] PCI: 00:00:09.0
  453. [WARN ] PCI: 00:00:0a.0
  454. [WARN ] PCI: 00:00:0d.0
  455. [WARN ] PCI: 00:00:0d.1
  456. [WARN ] PCI: 00:00:0d.2
  457. [WARN ] PCI: 00:00:0d.3
  458. [WARN ] PCI: 00:00:0e.0
  459. [WARN ] PCI: 00:00:10.0
  460. [WARN ] PCI: 00:00:10.1
  461. [WARN ] PCI: 00:00:10.6
  462. [WARN ] PCI: 00:00:10.7
  463. [WARN ] PCI: 00:00:12.0
  464. [WARN ] PCI: 00:00:12.6
  465. [WARN ] PCI: 00:00:12.7
  466. [WARN ] PCI: 00:00:13.0
  467. [WARN ] PCI: 00:00:14.1
  468. [WARN ] PCI: 00:00:14.3
  469. [WARN ] PCI: 00:00:15.0
  470. [WARN ] PCI: 00:00:15.1
  471. [WARN ] PCI: 00:00:15.2
  472. [WARN ] PCI: 00:00:15.3
  473. [WARN ] PCI: 00:00:16.1
  474. [WARN ] PCI: 00:00:16.2
  475. [WARN ] PCI: 00:00:16.3
  476. [WARN ] PCI: 00:00:16.4
  477. [WARN ] PCI: 00:00:16.5
  478. [WARN ] PCI: 00:00:19.0
  479. [WARN ] PCI: 00:00:19.1
  480. [WARN ] PCI: 00:00:19.2
  481. [WARN ] PCI: 00:00:1a.0
  482. [WARN ] PCI: 00:00:1e.0
  483. [WARN ] PCI: 00:00:1e.1
  484. [WARN ] PCI: 00:00:1e.2
  485. [WARN ] PCI: 00:00:1e.3
  486. [WARN ] PCI: 00:00:1f.6
  487. [WARN ] PCI: 00:00:1f.7
  488. [WARN ] PCI: Check your devicetree.cb.
  489. [DEBUG] PCI: 00:00:02.0 scanning...
  490. [DEBUG] scan_bus: bus PCI: 00:00:02.0 finished in 0 msecs
  491. [DEBUG] PCI: 00:00:14.0 scanning...
  492. [DEBUG] USB0 port 0 disabled
  493. [DEBUG] scan_bus: bus PCI: 00:00:14.0 finished in 3 msecs
  494. [DEBUG] PCI: 00:00:1c.0 scanning...
  495. [INFO ] PCI: 00:00:1c.0: Enabled LTR
  496. [DEBUG] PCI: pci_scan_bus for segment group 00 bus 01
  497. [DEBUG] PCI: 00:01:00.0 [8086/125c] enabled
  498. [INFO ] PCIe: Common Clock Configuration already enabled
  499. [INFO ] PCIE CLK PM is not supported by endpoint
  500. [INFO ] L1 Sub-State supported from root port 28
  501. [INFO ] L1 Sub-State Support = 0xf
  502. [INFO ] CommonModeRestoreTime = 0x37
  503. [INFO ] Power On Value = 0x7, Power On Scale = 0x1
  504. [INFO ] ASPM: Enabled L1
  505. [INFO ] PCI: 00:01:00.0: Enabled LTR
  506. [INFO ] PCI: 00:01:00.0: Programmed LTR max latencies
  507. [INFO ] PCI: 00:00:1c.0: Setting Max_Payload_Size to 128 for devices under this root port
  508. [DEBUG] scan_bus: bus PCI: 00:00:1c.0 finished in 71 msecs
  509. [DEBUG] PCI: 00:00:1c.1 scanning...
  510. [INFO ] PCI: 00:00:1c.1: Enabled LTR
  511. [DEBUG] PCI: pci_scan_bus for segment group 00 bus 02
  512. [DEBUG] PCI: 00:02:00.0 [8086/125c] enabled
  513. [INFO ] PCIe: Common Clock Configuration already enabled
  514. [INFO ] PCIE CLK PM is not supported by endpoint
  515. [INFO ] L1 Sub-State supported from root port 28
  516. [INFO ] L1 Sub-State Support = 0xf
  517. [INFO ] CommonModeRestoreTime = 0x37
  518. [INFO ] Power On Value = 0x7, Power On Scale = 0x1
  519. [INFO ] ASPM: Enabled L1
  520. [INFO ] PCI: 00:02:00.0: Enabled LTR
  521. [INFO ] PCI: 00:02:00.0: Programmed LTR max latencies
  522. [INFO ] PCI: 00:00:1c.1: Setting Max_Payload_Size to 128 for devices under this root port
  523. [DEBUG] scan_bus: bus PCI: 00:00:1c.1 finished in 71 msecs
  524. [DEBUG] PCI: 00:00:1c.2 scanning...
  525. [INFO ] PCI: 00:00:1c.2: Enabled LTR
  526. [DEBUG] PCI: pci_scan_bus for segment group 00 bus 03
  527. [DEBUG] PCI: 00:03:00.0 [8086/125c] enabled
  528. [INFO ] PCIe: Common Clock Configuration already enabled
  529. [INFO ] PCIE CLK PM is not supported by endpoint
  530. [INFO ] L1 Sub-State supported from root port 28
  531. [INFO ] L1 Sub-State Support = 0xf
  532. [INFO ] CommonModeRestoreTime = 0x37
  533. [INFO ] Power On Value = 0x7, Power On Scale = 0x1
  534. [INFO ] ASPM: Enabled L1
  535. [INFO ] PCI: 00:03:00.0: Enabled LTR
  536. [INFO ] PCI: 00:03:00.0: Programmed LTR max latencies
  537. [INFO ] PCI: 00:00:1c.2: Setting Max_Payload_Size to 128 for devices under this root port
  538. [DEBUG] scan_bus: bus PCI: 00:00:1c.2 finished in 71 msecs
  539. [DEBUG] PCI: 00:00:1c.6 scanning...
  540. [INFO ] PCI: 00:00:1c.6: Enabled LTR
  541. [DEBUG] PCI: pci_scan_bus for segment group 00 bus 04
  542. [DEBUG] PCI: 00:04:00.0 [8086/125c] enabled
  543. [INFO ] PCIe: Common Clock Configuration already enabled
  544. [INFO ] PCIE CLK PM is not supported by endpoint
  545. [INFO ] L1 Sub-State supported from root port 28
  546. [INFO ] L1 Sub-State Support = 0xf
  547. [INFO ] CommonModeRestoreTime = 0x37
  548. [INFO ] Power On Value = 0x7, Power On Scale = 0x1
  549. [INFO ] ASPM: Enabled L1
  550. [INFO ] PCI: 00:04:00.0: Enabled LTR
  551. [INFO ] PCI: 00:04:00.0: Programmed LTR max latencies
  552. [INFO ] PCI: 00:00:1c.6: Setting Max_Payload_Size to 128 for devices under this root port
  553. [DEBUG] scan_bus: bus PCI: 00:00:1c.6 finished in 71 msecs
  554. [DEBUG] PCI: 00:00:1d.0 scanning...
  555. [INFO ] PCI: 00:00:1d.0: Enabled LTR
  556. [DEBUG] PCI: pci_scan_bus for segment group 00 bus 05
  557. [DEBUG] PCI: 00:05:00.0 [144d/a809] enabled
  558. [INFO ] PCIe: Common Clock Configuration already enabled
  559. [INFO ] L1 Sub-State supported from root port 29
  560. [INFO ] L1 Sub-State Support = 0xf
  561. [INFO ] CommonModeRestoreTime = 0x28
  562. [INFO ] Power On Value = 0x16, Power On Scale = 0x0
  563. [INFO ] ASPM: Enabled L1
  564. [INFO ] PCI: 00:05:00.0: Enabled LTR
  565. [INFO ] PCI: 00:05:00.0: Programmed LTR max latencies
  566. [INFO ] PCI: 00:00:1d.0: Setting Max_Payload_Size to 128 for devices under this root port
  567. [DEBUG] scan_bus: bus PCI: 00:00:1d.0 finished in 66 msecs
  568. [DEBUG] PCI: 00:00:1f.0 scanning...
  569. [DEBUG] PNP: 002e.1 enabled
  570. [DEBUG] PNP: 002e.2 enabled
  571. [DEBUG] PNP: 002e.3 enabled
  572. [DEBUG] PNP: 002e.4 enabled
  573. [DEBUG] PNP: 002e.5 enabled
  574. [DEBUG] PNP: 002e.6 enabled
  575. [DEBUG] PNP: 002e.7 enabled
  576. [DEBUG] PNP: 002e.8 enabled
  577. [DEBUG] scan_bus: bus PCI: 00:00:1f.0 finished in 29 msecs
  578. [DEBUG] PCI: 00:00:1f.2 scanning...
  579. [DEBUG] scan_bus: bus PCI: 00:00:1f.2 finished in 0 msecs
  580. [DEBUG] PCI: 00:00:1f.3 scanning...
  581. [DEBUG] scan_bus: bus PCI: 00:00:1f.3 finished in 0 msecs
  582. [DEBUG] PCI: 00:00:1f.4 scanning...
  583. [DEBUG] scan_bus: bus PCI: 00:00:1f.4 finished in 0 msecs
  584. [DEBUG] PCI: 00:00:1f.5 scanning...
  585. [DEBUG] scan_bus: bus PCI: 00:00:1f.5 finished in 0 msecs
  586. [DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 851 msecs
  587. [DEBUG] scan_bus: bus Root Device finished in 870 msecs
  588. [INFO ] done
  589. [DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 877 ms
  590. [INFO ] MRC: Could not find region 'UNIFIED_MRC_CACHE'
  591. [DEBUG] FMAP: area RW_MRC_CACHE found @ c00000 (65536 bytes)
  592. [INFO ] MRC: NOT enabling PRR for 'RW_MRC_CACHE'.
  593. [DEBUG] BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 19 ms
  594. [DEBUG] found VGA at PCI: 00:00:02.0
  595. [DEBUG] Setting up VGA for PCI: 00:00:02.0
  596. [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000
  597. [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
  598. [INFO ] Allocating resources...
  599. [INFO ] Reading resources...
  600. [DEBUG] SA MMIO resource: MCHBAR -> base = 0xfedc0000, size = 0x00020000
  601. [DEBUG] SA MMIO resource: DMIBAR -> base = 0xfeda0000, size = 0x00001000
  602. [DEBUG] SA MMIO resource: EPBAR -> base = 0xfeda1000, size = 0x00001000
  603. [DEBUG] SA MMIO resource: REGBAR -> base = 0xfb000000, size = 0x00001000
  604. [DEBUG] SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x00004000
  605. [DEBUG] SA MMIO resource: CRAB_ABORT -> base = 0xfeb00000, size = 0x00080000
  606. [DEBUG] SA MMIO resource: TPM -> base = 0xfed40000, size = 0x00010000
  607. [DEBUG] SA MMIO resource: LT_SECURITY -> base = 0xfed50000, size = 0x00020000
  608. [DEBUG] SA MMIO resource: APIC -> base = 0xfec00000, size = 0x00100000
  609. [DEBUG] SA MMIO resource: PCH_RESERVED -> base = 0xfc800000, size = 0x02000000
  610. [DEBUG] SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x00001000
  611. [DEBUG] SA MMIO resource: IPUVTBAR -> base = 0xfed92000, size = 0x00001000
  612. [DEBUG] SA MMIO resource: TBT0BAR -> base = 0xfed84000, size = 0x00001000
  613. [DEBUG] SA MMIO resource: TBT1BAR -> base = 0xfed85000, size = 0x00001000
  614. [DEBUG] SA MMIO resource: TBT2BAR -> base = 0xfed86000, size = 0x00001000
  615. [DEBUG] SA MMIO resource: TBT3BAR -> base = 0xfed87000, size = 0x00001000
  616. [DEBUG] SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x00001000
  617. [DEBUG] SA MMIO resource: MMCONF -> base = 0xc0000000, size = 0x10000000
  618. [DEBUG] SA MMIO resource: DSM -> base = 0x7c800000, size = 0x03c00000
  619. [DEBUG] SA MMIO resource: TSEG -> base = 0x7b800000, size = 0x00800000
  620. [DEBUG] SA MMIO resource: GSM -> base = 0x7c000000, size = 0x00800000
  621. [INFO ] Available memory above 4GB: 30716M
  622. [DEBUG] PCI: 00:00:02.0: supports 7 SR-IOV VFs
  623. [DEBUG] PCI: 00:00:02.0: found 64bit SR-IOV BAR, size 0x1000000 @ index 344
  624. [DEBUG] PCI: 00:00:02.0: found 64bit SR-IOV BAR, size 0x20000000 @ index 34c
  625. [INFO ] Done reading resources.
  626. [INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) ===
  627. [DEBUG] PCI: 00:00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
  628. [DEBUG] PCI: 00:00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
  629. [DEBUG] PCI: 00:00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  630. [DEBUG] PCI: 00:01:00.0 10 * [0x0 - 0xfffff] mem
  631. [DEBUG] PCI: 00:01:00.0 30 * [0x100000 - 0x1fffff] mem
  632. [DEBUG] PCI: 00:01:00.0 1c * [0x200000 - 0x203fff] mem
  633. [DEBUG] PCI: 00:00:1c.0 mem: size: 300000 align: 20 gran: 20 limit: ffffffff done
  634. [DEBUG] PCI: 00:00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  635. [DEBUG] PCI: 00:00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
  636. [DEBUG] PCI: 00:00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
  637. [DEBUG] PCI: 00:00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done
  638. [DEBUG] PCI: 00:00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  639. [DEBUG] PCI: 00:02:00.0 10 * [0x0 - 0xfffff] mem
  640. [DEBUG] PCI: 00:02:00.0 30 * [0x100000 - 0x1fffff] mem
  641. [DEBUG] PCI: 00:02:00.0 1c * [0x200000 - 0x203fff] mem
  642. [DEBUG] PCI: 00:00:1c.1 mem: size: 300000 align: 20 gran: 20 limit: ffffffff done
  643. [DEBUG] PCI: 00:00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  644. [DEBUG] PCI: 00:00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
  645. [DEBUG] PCI: 00:00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff
  646. [DEBUG] PCI: 00:00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff done
  647. [DEBUG] PCI: 00:00:1c.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  648. [DEBUG] PCI: 00:03:00.0 10 * [0x0 - 0xfffff] mem
  649. [DEBUG] PCI: 00:03:00.0 30 * [0x100000 - 0x1fffff] mem
  650. [DEBUG] PCI: 00:03:00.0 1c * [0x200000 - 0x203fff] mem
  651. [DEBUG] PCI: 00:00:1c.2 mem: size: 300000 align: 20 gran: 20 limit: ffffffff done
  652. [DEBUG] PCI: 00:00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  653. [DEBUG] PCI: 00:00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
  654. [DEBUG] PCI: 00:00:1c.6 io: size: 0 align: 12 gran: 12 limit: ffff
  655. [DEBUG] PCI: 00:00:1c.6 io: size: 0 align: 12 gran: 12 limit: ffff done
  656. [DEBUG] PCI: 00:00:1c.6 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  657. [DEBUG] PCI: 00:04:00.0 10 * [0x0 - 0xfffff] mem
  658. [DEBUG] PCI: 00:04:00.0 30 * [0x100000 - 0x1fffff] mem
  659. [DEBUG] PCI: 00:04:00.0 1c * [0x200000 - 0x203fff] mem
  660. [DEBUG] PCI: 00:00:1c.6 mem: size: 300000 align: 20 gran: 20 limit: ffffffff done
  661. [DEBUG] PCI: 00:00:1c.6 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  662. [DEBUG] PCI: 00:00:1c.6 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
  663. [DEBUG] PCI: 00:00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
  664. [DEBUG] PCI: 00:00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
  665. [DEBUG] PCI: 00:00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
  666. [DEBUG] PCI: 00:05:00.0 10 * [0x0 - 0x3fff] mem
  667. [DEBUG] PCI: 00:00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
  668. [DEBUG] PCI: 00:00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
  669. [DEBUG] PCI: 00:00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
  670. [INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) ===
  671. [DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
  672. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 00 base 00000000 limit 00000fff io (fixed)
  673. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 84 base 00000080 limit 0000008f io (fixed)
  674. [DEBUG] avoid_fixed_resources: PNP: 002e.1 60 base 000003f8 limit 000003ff io (fixed)
  675. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.2 01 base 00001800 limit 000018ff io (fixed)
  676. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
  677. [INFO ] DOMAIN: 00000000: Resource ranges:
  678. [INFO ] * Base: 1000, Size: 800, Tag: 100
  679. [INFO ] * Base: 1900, Size: d6a0, Tag: 100
  680. [INFO ] * Base: efc0, Size: 1040, Tag: 100
  681. [DEBUG] PCI: 00:00:02.0 20 * [0xffc0 - 0xffff] limit: ffff io
  682. [DEBUG] PCI: 00:00:17.0 20 * [0xffa0 - 0xffbf] limit: ffbf io
  683. [DEBUG] PCI: 00:00:17.0 18 * [0xff98 - 0xff9f] limit: ff9f io
  684. [DEBUG] PCI: 00:00:17.0 1c * [0xff94 - 0xff97] limit: ff97 io
  685. [DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
  686. [DEBUG] DOMAIN: 00000000 mem: base: 77000000 size: 0 align: 0 gran: 0 limit: dfffffff
  687. [DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff
  688. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 00 base fedc0000 limit feddffff mem (fixed)
  689. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 01 base feda0000 limit feda0fff mem (fixed)
  690. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 02 base feda1000 limit feda1fff mem (fixed)
  691. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 03 base fb000000 limit fb000fff mem (fixed)
  692. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 04 base fed80000 limit fed83fff mem (fixed)
  693. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 05 base feb00000 limit feb7ffff mem (fixed)
  694. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 06 base fed40000 limit fed4ffff mem (fixed)
  695. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 07 base fed50000 limit fed6ffff mem (fixed)
  696. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 08 base fec00000 limit fecfffff mem (fixed)
  697. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 09 base fc800000 limit fe7fffff mem (fixed)
  698. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0a base fed90000 limit fed90fff mem (fixed)
  699. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0b base fed92000 limit fed92fff mem (fixed)
  700. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0c base fed84000 limit fed84fff mem (fixed)
  701. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0d base fed85000 limit fed85fff mem (fixed)
  702. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0e base fed86000 limit fed86fff mem (fixed)
  703. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0f base fed87000 limit fed87fff mem (fixed)
  704. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 10 base fed91000 limit fed91fff mem (fixed)
  705. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 11 base c0000000 limit cfffffff mem (fixed)
  706. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 12 base 7c800000 limit 803fffff mem (fixed)
  707. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 13 base 7b800000 limit 7bffffff mem (fixed)
  708. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 14 base 7c000000 limit 7c7fffff mem (fixed)
  709. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 15 base 00000000 limit 0009ffff mem (fixed)
  710. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 16 base 000c0000 limit 76ffffff mem (fixed)
  711. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 17 base 77000000 limit 803fffff mem (fixed)
  712. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 18 base 100000000 limit 87fbfffff mem (fixed)
  713. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 19 base 000a0000 limit 000bffff mem (fixed)
  714. [DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 1a base 000c0000 limit 000fffff mem (fixed)
  715. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 98 base fe0b0000 limit fe0bffff mem (fixed)
  716. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.1 10 base fd000000 limit fdffffff mem (fixed)
  717. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.2 10 base fe000000 limit fe00ffff mem (fixed)
  718. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.5 00 base ff000000 limit ffffffff mem (fixed)
  719. [DEBUG] avoid_fixed_resources: PCI: 00:00:1f.5 01 base f8000000 limit f9ffffff mem (fixed)
  720. [INFO ] DOMAIN: 00000000: Resource ranges:
  721. [INFO ] * Base: 80400000, Size: 3fc00000, Tag: 200
  722. [INFO ] * Base: d0000000, Size: 10000000, Tag: 200
  723. [INFO ] * Base: 87fc00000, Size: 7780400000, Tag: 200
  724. [DEBUG] PCI: 00:00:02.0 34c * [0x7f00000000 - 0x7fffffffff] limit: 7fffffffff prefmem
  725. [DEBUG] PCI: 00:00:02.0 18 * [0xd0000000 - 0xdfffffff] limit: dfffffff prefmem
  726. [DEBUG] PCI: 00:00:02.0 344 * [0x7ef8000000 - 0x7effffffff] limit: 7effffffff mem
  727. [DEBUG] PCI: 00:00:02.0 10 * [0xbf000000 - 0xbfffffff] limit: bfffffff mem
  728. [DEBUG] PCI: 00:00:1c.0 20 * [0xbed00000 - 0xbeffffff] limit: beffffff mem
  729. [DEBUG] PCI: 00:00:1c.1 20 * [0xbea00000 - 0xbecfffff] limit: becfffff mem
  730. [DEBUG] PCI: 00:00:1c.2 20 * [0xbe700000 - 0xbe9fffff] limit: be9fffff mem
  731. [DEBUG] PCI: 00:00:1c.6 20 * [0xbe400000 - 0xbe6fffff] limit: be6fffff mem
  732. [DEBUG] PCI: 00:00:1d.0 20 * [0xbe300000 - 0xbe3fffff] limit: be3fffff mem
  733. [DEBUG] PCI: 00:00:1f.3 20 * [0xbe200000 - 0xbe2fffff] limit: be2fffff mem
  734. [DEBUG] PCI: 00:00:14.0 10 * [0xbe1f0000 - 0xbe1fffff] limit: be1fffff mem
  735. [DEBUG] PCI: 00:00:14.2 10 * [0xbe1ec000 - 0xbe1effff] limit: be1effff mem
  736. [DEBUG] PCI: 00:00:1f.3 10 * [0xbe1e8000 - 0xbe1ebfff] limit: be1ebfff mem
  737. [DEBUG] PCI: 00:00:17.0 10 * [0xbe1e6000 - 0xbe1e7fff] limit: be1e7fff mem
  738. [DEBUG] PCI: 00:00:14.2 18 * [0xbe1e5000 - 0xbe1e5fff] limit: be1e5fff mem
  739. [DEBUG] PCI: 00:00:16.0 10 * [0xbe1e4000 - 0xbe1e4fff] limit: be1e4fff mem
  740. [DEBUG] PCI: 00:00:1f.5 10 * [0xbe1e3000 - 0xbe1e3fff] limit: be1e3fff mem
  741. [DEBUG] PCI: 00:00:17.0 24 * [0xbe1e2000 - 0xbe1e27ff] limit: be1e27ff mem
  742. [DEBUG] PCI: 00:00:17.0 14 * [0xbe1e1000 - 0xbe1e10ff] limit: be1e10ff mem
  743. [DEBUG] PCI: 00:00:1f.4 10 * [0xbe1e0000 - 0xbe1e00ff] limit: be1e00ff mem
  744. [DEBUG] DOMAIN: 00000000 mem: base: 77000000 size: 0 align: 0 gran: 0 limit: dfffffff done
  745. [DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff done
  746. [DEBUG] PCI: 00:01:00.0 10 * [0xbed00000 - 0xbedfffff] limit: bedfffff mem
  747. [DEBUG] PCI: 00:01:00.0 1c * [0xbef00000 - 0xbef03fff] limit: bef03fff mem
  748. [DEBUG] PCI: 00:01:00.0 30 * [0xbee00000 - 0xbeefffff] limit: beefffff mem
  749. [DEBUG] PCI: 00:02:00.0 10 * [0xbea00000 - 0xbeafffff] limit: beafffff mem
  750. [DEBUG] PCI: 00:02:00.0 1c * [0xbec00000 - 0xbec03fff] limit: bec03fff mem
  751. [DEBUG] PCI: 00:02:00.0 30 * [0xbeb00000 - 0xbebfffff] limit: bebfffff mem
  752. [DEBUG] PCI: 00:03:00.0 10 * [0xbe700000 - 0xbe7fffff] limit: be7fffff mem
  753. [DEBUG] PCI: 00:03:00.0 1c * [0xbe900000 - 0xbe903fff] limit: be903fff mem
  754. [DEBUG] PCI: 00:03:00.0 30 * [0xbe800000 - 0xbe8fffff] limit: be8fffff mem
  755. [DEBUG] PCI: 00:04:00.0 10 * [0xbe400000 - 0xbe4fffff] limit: be4fffff mem
  756. [DEBUG] PCI: 00:04:00.0 1c * [0xbe600000 - 0xbe603fff] limit: be603fff mem
  757. [DEBUG] PCI: 00:04:00.0 30 * [0xbe500000 - 0xbe5fffff] limit: be5fffff mem
  758. [DEBUG] PCI: 00:05:00.0 10 * [0xbe300000 - 0xbe303fff] limit: be303fff mem
  759. [INFO ] === Resource allocator: DOMAIN: 00000000 - resource allocation complete ===
  760. [DEBUG] PCI: 00:00:02.0 10 <- [0x00000000bf000000 - 0x00000000bfffffff] size 0x01000000 gran 0x18 mem64
  761. [DEBUG] PCI: 00:00:02.0 18 <- [0x00000000d0000000 - 0x00000000dfffffff] size 0x10000000 gran 0x1c prefmem64
  762. [DEBUG] PCI: 00:00:02.0 20 <- [0x000000000000ffc0 - 0x000000000000ffff] size 0x00000040 gran 0x06 io
  763. [DEBUG] PCI: 00:00:02.0 344 <- [0x0000007ef8000000 - 0x0000007effffffff] size 0x08000000 gran 0x1b mem64
  764. [DEBUG] PCI: 00:00:02.0 34c <- [0x0000007f00000000 - 0x0000007fffffffff] size 0x100000000 gran 0x20 prefmem64
  765. [DEBUG] PCI: 00:00:14.0 10 <- [0x00000000be1f0000 - 0x00000000be1fffff] size 0x00010000 gran 0x10 mem64
  766. [DEBUG] PCI: 00:00:14.2 10 <- [0x00000000be1ec000 - 0x00000000be1effff] size 0x00004000 gran 0x0e mem64
  767. [DEBUG] PCI: 00:00:14.2 18 <- [0x00000000be1e5000 - 0x00000000be1e5fff] size 0x00001000 gran 0x0c mem64
  768. [DEBUG] PCI: 00:00:16.0 10 <- [0x00000000be1e4000 - 0x00000000be1e4fff] size 0x00001000 gran 0x0c mem64
  769. [DEBUG] PCI: 00:00:17.0 10 <- [0x00000000be1e6000 - 0x00000000be1e7fff] size 0x00002000 gran 0x0d mem
  770. [DEBUG] PCI: 00:00:17.0 14 <- [0x00000000be1e1000 - 0x00000000be1e10ff] size 0x00000100 gran 0x08 mem
  771. [DEBUG] PCI: 00:00:17.0 18 <- [0x000000000000ff98 - 0x000000000000ff9f] size 0x00000008 gran 0x03 io
  772. [DEBUG] PCI: 00:00:17.0 1c <- [0x000000000000ff94 - 0x000000000000ff97] size 0x00000004 gran 0x02 io
  773. [DEBUG] PCI: 00:00:17.0 20 <- [0x000000000000ffa0 - 0x000000000000ffbf] size 0x00000020 gran 0x05 io
  774. [DEBUG] PCI: 00:00:17.0 24 <- [0x00000000be1e2000 - 0x00000000be1e27ff] size 0x00000800 gran 0x0b mem
  775. [DEBUG] PCI: 00:00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 01 io
  776. [DEBUG] PCI: 00:00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 01 prefmem
  777. [DEBUG] PCI: 00:00:1c.0 20 <- [0x00000000bed00000 - 0x00000000beffffff] size 0x00300000 gran 0x14 seg 00 bus 01 mem
  778. [DEBUG] PCI: 00:01:00.0 10 <- [0x00000000bed00000 - 0x00000000bedfffff] size 0x00100000 gran 0x14 mem
  779. [DEBUG] PCI: 00:01:00.0 1c <- [0x00000000bef00000 - 0x00000000bef03fff] size 0x00004000 gran 0x0e mem
  780. [DEBUG] PCI: 00:01:00.0 30 <- [0x00000000bee00000 - 0x00000000beefffff] size 0x00100000 gran 0x14 romem
  781. [DEBUG] PCI: 00:00:1c.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 02 io
  782. [DEBUG] PCI: 00:00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 02 prefmem
  783. [DEBUG] PCI: 00:00:1c.1 20 <- [0x00000000bea00000 - 0x00000000becfffff] size 0x00300000 gran 0x14 seg 00 bus 02 mem
  784. [DEBUG] PCI: 00:02:00.0 10 <- [0x00000000bea00000 - 0x00000000beafffff] size 0x00100000 gran 0x14 mem
  785. [DEBUG] PCI: 00:02:00.0 1c <- [0x00000000bec00000 - 0x00000000bec03fff] size 0x00004000 gran 0x0e mem
  786. [DEBUG] PCI: 00:02:00.0 30 <- [0x00000000beb00000 - 0x00000000bebfffff] size 0x00100000 gran 0x14 romem
  787. [DEBUG] PCI: 00:00:1c.2 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 03 io
  788. [DEBUG] PCI: 00:00:1c.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 03 prefmem
  789. [DEBUG] PCI: 00:00:1c.2 20 <- [0x00000000be700000 - 0x00000000be9fffff] size 0x00300000 gran 0x14 seg 00 bus 03 mem
  790. [DEBUG] PCI: 00:03:00.0 10 <- [0x00000000be700000 - 0x00000000be7fffff] size 0x00100000 gran 0x14 mem
  791. [DEBUG] PCI: 00:03:00.0 1c <- [0x00000000be900000 - 0x00000000be903fff] size 0x00004000 gran 0x0e mem
  792. [DEBUG] PCI: 00:03:00.0 30 <- [0x00000000be800000 - 0x00000000be8fffff] size 0x00100000 gran 0x14 romem
  793. [DEBUG] PCI: 00:00:1c.6 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 04 io
  794. [DEBUG] PCI: 00:00:1c.6 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 04 prefmem
  795. [DEBUG] PCI: 00:00:1c.6 20 <- [0x00000000be400000 - 0x00000000be6fffff] size 0x00300000 gran 0x14 seg 00 bus 04 mem
  796. [DEBUG] PCI: 00:04:00.0 10 <- [0x00000000be400000 - 0x00000000be4fffff] size 0x00100000 gran 0x14 mem
  797. [DEBUG] PCI: 00:04:00.0 1c <- [0x00000000be600000 - 0x00000000be603fff] size 0x00004000 gran 0x0e mem
  798. [DEBUG] PCI: 00:04:00.0 30 <- [0x00000000be500000 - 0x00000000be5fffff] size 0x00100000 gran 0x14 romem
  799. [DEBUG] PCI: 00:00:1d.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 05 io
  800. [DEBUG] PCI: 00:00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 bus 05 prefmem
  801. [DEBUG] PCI: 00:00:1d.0 20 <- [0x00000000be300000 - 0x00000000be3fffff] size 0x00100000 gran 0x14 seg 00 bus 05 mem
  802. [DEBUG] PCI: 00:05:00.0 10 <- [0x00000000be300000 - 0x00000000be303fff] size 0x00004000 gran 0x0e mem64
  803. [DEBUG] PNP: 002e.1 60 <- [0x00000000000003f8 - 0x00000000000003ff] size 0x00000008 gran 0x03 io
  804. [DEBUG] PNP: 002e.1 70 <- [0x0000000000000004 - 0x0000000000000004] size 0x00000001 gran 0x00 irq
  805. [DEBUG] PNP: 002e.1 f0 <- [0x0000000000000001 - 0x0000000000000000] size 0x00000000 gran 0x00 irq
  806. [NOTE ] PNP: 002e.2 60 io size: 0x0000000008 not assigned in devicetree
  807. [NOTE ] PNP: 002e.2 70 irq size: 0x0000000001 not assigned in devicetree
  808. [NOTE ] PNP: 002e.3 60 io size: 0x0000000008 not assigned in devicetree
  809. [NOTE ] PNP: 002e.3 62 io size: 0x0000000008 not assigned in devicetree
  810. [NOTE ] PNP: 002e.3 70 irq size: 0x0000000001 not assigned in devicetree
  811. [NOTE ] PNP: 002e.3 74 drq size: 0x0000000001 not assigned in devicetree
  812. [NOTE ] PNP: 002e.4 60 io size: 0x0000000010 not assigned in devicetree
  813. [NOTE ] PNP: 002e.4 62 io size: 0x0000000010 not assigned in devicetree
  814. [NOTE ] PNP: 002e.4 70 irq size: 0x0000000001 not assigned in devicetree
  815. [NOTE ] PNP: 002e.5 60 io size: 0x0000000001 not assigned in devicetree
  816. [NOTE ] PNP: 002e.5 62 io size: 0x0000000001 not assigned in devicetree
  817. [NOTE ] PNP: 002e.5 70 irq size: 0x0000000001 not assigned in devicetree
  818. [NOTE ] PNP: 002e.6 70 irq size: 0x0000000001 not assigned in devicetree
  819. [NOTE ] PNP: 002e.7 60 io size: 0x0000000001 not assigned in devicetree
  820. [NOTE ] PNP: 002e.7 62 io size: 0x0000000020 not assigned in devicetree
  821. [NOTE ] PNP: 002e.7 64 io size: 0x0000000001 not assigned in devicetree
  822. [NOTE ] PNP: 002e.7 70 irq size: 0x0000000001 not assigned in devicetree
  823. [NOTE ] PNP: 002e.8 60 io size: 0x0000000008 not assigned in devicetree
  824. [NOTE ] PNP: 002e.8 70 irq size: 0x0000000001 not assigned in devicetree
  825. [NOTE ] PNP: 002e.8 f0 irq size: 0x0000000001 not assigned in devicetree
  826. [DEBUG] LPC: enabling default decode range LPC_IOE_COMA_EN
  827. [DEBUG] PCI: 00:00:1f.3 10 <- [0x00000000be1e8000 - 0x00000000be1ebfff] size 0x00004000 gran 0x0e mem64
  828. [DEBUG] PCI: 00:00:1f.3 20 <- [0x00000000be200000 - 0x00000000be2fffff] size 0x00100000 gran 0x14 mem64
  829. [DEBUG] PCI: 00:00:1f.4 10 <- [0x00000000be1e0000 - 0x00000000be1e00ff] size 0x00000100 gran 0x08 mem64
  830. [DEBUG] PCI: 00:00:1f.5 10 <- [0x00000000be1e3000 - 0x00000000be1e3fff] size 0x00001000 gran 0x0c mem
  831. [INFO ] Done setting resources.
  832. [INFO ] Done allocating resources.
  833. [DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 5 / 2093 ms
  834. [INFO ] coreboot skipped calling FSP notify phase: 00000020.
  835. [INFO ] LAPIC 0x0 in XAPIC mode.
  836. [DEBUG] MTRR: Physical address space:
  837. [DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
  838. [DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
  839. [DEBUG] 0x00000000000c0000 - 0x0000000076ffffff size 0x76f40000 type 6
  840. [DEBUG] 0x0000000077000000 - 0x00000000cfffffff size 0x59000000 type 0
  841. [DEBUG] 0x00000000d0000000 - 0x00000000dfffffff size 0x10000000 type 1
  842. [DEBUG] 0x00000000e0000000 - 0x00000000ffffffff size 0x20000000 type 0
  843. [DEBUG] 0x0000000100000000 - 0x000000087fbfffff size 0x77fc00000 type 6
  844. [DEBUG] 0x0000007ef8000000 - 0x0000007effffffff size 0x08000000 type 0
  845. [DEBUG] 0x0000007f00000000 - 0x0000007fffffffff size 0x100000000 type 1
  846. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
  847. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
  848. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
  849. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
  850. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
  851. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
  852. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
  853. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
  854. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
  855. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
  856. [DEBUG] apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
  857. [DEBUG] apic_id 0x0 setup mtrr for CPU physical address size: 39 bits
  858. [DEBUG] MTRR: default type WB/UC MTRR counts: 8/10.
  859. [DEBUG] MTRR: WB selected as default type.
  860. [DEBUG] MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
  861. [DEBUG] MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
  862. [DEBUG] MTRR: 2 base 0x0000000080000000 mask 0x0000007fc0000000 type 0
  863. [DEBUG] MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 0
  864. [DEBUG] MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 1
  865. [DEBUG] MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
  866. [DEBUG] MTRR: 6 base 0x0000007ef8000000 mask 0x0000007ff8000000 type 0
  867. [DEBUG] MTRR: 7 base 0x0000007f00000000 mask 0x0000007f00000000 type 1
  868. [INFO ] LAPIC 0x6 in XAPIC mode.
  869. [INFO ] LAPIC 0x2 in XAPIC mode.
  870. [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x250 0x0606060606060606
  871. [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x258 0x0606060606060606
  872. [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x259 0x0000000000000000
  873. [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x268 0x0606060606060606
  874. [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x269 0x0606060606060606
  875. [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26a 0x0606060606060606
  876. [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26b 0x0606060606060606
  877. [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26c 0x0606060606060606
  878. [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26d 0x0606060606060606
  879. [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26e 0x0606060606060606
  880. [DEBUG] apic_id 0x6: MTRR: Fixed MSR 0x26f 0x0606060606060606
  881. [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x250 0x0606060606060606
  882. [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x258 0x0606060606060606
  883. [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x259 0x0000000000000000
  884. [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x268 0x0606060606060606
  885. [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x269 0x0606060606060606
  886. [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26a 0x0606060606060606
  887. [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26b 0x0606060606060606
  888. [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26c 0x0606060606060606
  889. [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26d 0x0606060606060606
  890. [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26e 0x0606060606060606
  891. [DEBUG] apic_id 0x2: MTRR: Fixed MSR 0x26f 0x0606060606060606
  892. [DEBUG] apic_id 0x6 setup mtrr for CPU physical address size: 39 bits
  893. [DEBUG] apic_id 0x2 setup mtrr for CPU physical address size: 39 bits
  894. [INFO ] LAPIC 0x4 in XAPIC mode.
  895. [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x250 0x0606060606060606
  896. [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x258 0x0606060606060606
  897. [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x259 0x0000000000000000
  898. [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x268 0x0606060606060606
  899. [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x269 0x0606060606060606
  900. [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26a 0x0606060606060606
  901. [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26b 0x0606060606060606
  902. [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26c 0x0606060606060606
  903. [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26d 0x0606060606060606
  904. [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26e 0x0606060606060606
  905. [DEBUG] apic_id 0x4: MTRR: Fixed MSR 0x26f 0x0606060606060606
  906. [DEBUG] apic_id 0x4 setup mtrr for CPU physical address size: 39 bits
  907. [DEBUG] MTRR: TEMPORARY Physical address space:
  908. [DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
  909. [DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
  910. [DEBUG] 0x00000000000c0000 - 0x0000000076ffffff size 0x76f40000 type 6
  911. [DEBUG] 0x0000000077000000 - 0x00000000feffffff size 0x88000000 type 0
  912. [DEBUG] 0x00000000ff000000 - 0x00000000ffffffff size 0x01000000 type 5
  913. [DEBUG] 0x0000000100000000 - 0x000000087fbfffff size 0x77fc00000 type 6
  914. [DEBUG] 0x0000007ef8000000 - 0x0000007fffffffff size 0x108000000 type 0
  915. [DEBUG] MTRR: default type WB/UC MTRR counts: 12/9.
  916. [DEBUG] MTRR: UC selected as default type.
  917. [DEBUG] MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
  918. [DEBUG] MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
  919. [DEBUG] MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
  920. [DEBUG] MTRR: 3 base 0x00000000ff000000 mask 0x0000007fff000000 type 5
  921. [DEBUG] MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
  922. [DEBUG] MTRR: 5 base 0x0000000200000000 mask 0x0000007e00000000 type 6
  923. [DEBUG] MTRR: 6 base 0x0000000400000000 mask 0x0000007c00000000 type 6
  924. [DEBUG] MTRR: 7 base 0x0000000800000000 mask 0x0000007f80000000 type 6
  925. [DEBUG] MTRR: 8 base 0x000000087fc00000 mask 0x0000007fffc00000 type 0
  926.  
  927. [DEBUG] MTRR check
  928. [DEBUG] Fixed MTRRs : Enabled
  929. [DEBUG] Variable MTRRs: Enabled
  930.  
  931. [DEBUG] BS: BS_DEV_ENABLE entry times (exec / console): 216 / 394 ms
  932. [INFO ] Enabling resources...
  933. [DEBUG] PCI: 00:00:00.0 subsystem <- 8086/461c
  934. [DEBUG] PCI: 00:00:00.0 cmd <- 06
  935. [DEBUG] PCI: 00:00:02.0 subsystem <- 8086/46d1
  936. [DEBUG] PCI: 00:00:02.0 cmd <- 03
  937. [DEBUG] PCI: 00:00:14.0 subsystem <- 8086/54ed
  938. [DEBUG] PCI: 00:00:14.0 cmd <- 02
  939. [DEBUG] PCI: 00:00:14.2 subsystem <- 8086/54ef
  940. [DEBUG] PCI: 00:00:14.2 cmd <- 02
  941. [DEBUG] PCI: 00:00:16.0 subsystem <- 8086/54e0
  942. [DEBUG] PCI: 00:00:16.0 cmd <- 02
  943. [DEBUG] PCI: 00:00:17.0 subsystem <- 8086/54d3
  944. [DEBUG] PCI: 00:00:17.0 cmd <- 03
  945. [DEBUG] PCI: 00:00:1c.0 bridge ctrl <- 0013
  946. [DEBUG] PCI: 00:00:1c.0 subsystem <- 8086/54b8
  947. [DEBUG] PCI: 00:00:1c.0 cmd <- 06
  948. [DEBUG] PCI: 00:00:1c.1 bridge ctrl <- 0013
  949. [DEBUG] PCI: 00:00:1c.1 subsystem <- 8086/54b9
  950. [DEBUG] PCI: 00:00:1c.1 cmd <- 06
  951. [DEBUG] PCI: 00:00:1c.2 bridge ctrl <- 0013
  952. [DEBUG] PCI: 00:00:1c.2 subsystem <- 8086/54ba
  953. [DEBUG] PCI: 00:00:1c.2 cmd <- 06
  954. [DEBUG] PCI: 00:00:1c.6 bridge ctrl <- 0013
  955. [DEBUG] PCI: 00:00:1c.6 subsystem <- 8086/54be
  956. [DEBUG] PCI: 00:00:1c.6 cmd <- 06
  957. [DEBUG] PCI: 00:00:1d.0 bridge ctrl <- 0013
  958. [DEBUG] PCI: 00:00:1d.0 subsystem <- 8086/54b0
  959. [DEBUG] PCI: 00:00:1d.0 cmd <- 06
  960. [DEBUG] PCI: 00:00:1f.0 subsystem <- 8086/5481
  961. [DEBUG] PCI: 00:00:1f.0 cmd <- 407
  962. [DEBUG] PCI: 00:00:1f.3 subsystem <- 8086/54c8
  963. [DEBUG] PCI: 00:00:1f.3 cmd <- 02
  964. [DEBUG] PCI: 00:00:1f.4 subsystem <- 8086/54a3
  965. [DEBUG] PCI: 00:00:1f.4 cmd <- 03
  966. [DEBUG] PCI: 00:00:1f.5 subsystem <- 8086/54a4
  967. [DEBUG] PCI: 00:00:1f.5 cmd <- 406
  968. [DEBUG] PCI: 00:01:00.0 cmd <- 02
  969. [DEBUG] PCI: 00:02:00.0 cmd <- 02
  970. [DEBUG] PCI: 00:03:00.0 cmd <- 02
  971. [DEBUG] PCI: 00:04:00.0 cmd <- 02
  972. [DEBUG] PCI: 00:05:00.0 cmd <- 02
  973. [INFO ] done.
  974. [DEBUG] BS: BS_DEV_ENABLE run times (exec / console): 1 / 198 ms
  975. [DEBUG] ME: Version: Unavailable
  976. [DEBUG] BS: BS_DEV_ENABLE exit times (exec / console): 0 / 4 ms
  977. [INFO ] Initializing devices...
  978. [DEBUG] PCI: 00:00:00.0 init
  979. [INFO ] CPU TDP = 6 Watts
  980. [INFO ] CPU PL1 = 6 Watts
  981. [INFO ] CPU PL2 = 25 Watts
  982. [INFO ] CPU PL4 = 78 Watts
  983. [DEBUG] PCI: 00:00:00.0 init finished in 13 msecs
  984. [DEBUG] PCI: 00:00:02.0 init
  985. [INFO ] GMA: Found VBT in CBFS
  986. [INFO ] GMA: Found valid VBT in CBFS
  987. [INFO ] framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
  988. [INFO ] x_res x y_res: 1920 x 1080, size: 8294400 at 0xd0000000
  989. [DEBUG] PCI: 00:00:02.0 init finished in 24 msecs
  990. [DEBUG] PCI: 00:00:14.0 init
  991. [DEBUG] PCI: 00:00:14.0 init finished in 0 msecs
  992. [DEBUG] PCI: 00:00:14.2 init
  993. [DEBUG] PCI: 00:00:14.2 init finished in 0 msecs
  994. [DEBUG] PCI: 00:00:16.0 init
  995. [DEBUG] PCI: 00:00:16.0 init finished in 0 msecs
  996. [DEBUG] PCI: 00:00:1c.0 init
  997. [DEBUG] Initializing PCH PCIe bridge.
  998. [DEBUG] PCI: 00:00:1c.0 init finished in 4 msecs
  999. [DEBUG] PCI: 00:00:1c.1 init
  1000. [DEBUG] Initializing PCH PCIe bridge.
  1001. [DEBUG] PCI: 00:00:1c.1 init finished in 4 msecs
  1002. [DEBUG] PCI: 00:00:1c.2 init
  1003. [DEBUG] Initializing PCH PCIe bridge.
  1004. [DEBUG] PCI: 00:00:1c.2 init finished in 4 msecs
  1005. [DEBUG] PCI: 00:00:1c.6 init
  1006. [DEBUG] Initializing PCH PCIe bridge.
  1007. [DEBUG] PCI: 00:00:1c.6 init finished in 4 msecs
  1008. [DEBUG] PCI: 00:00:1d.0 init
  1009. [DEBUG] Initializing PCH PCIe bridge.
  1010. [DEBUG] PCI: 00:00:1d.0 init finished in 4 msecs
  1011. [DEBUG] PCI: 00:00:1f.0 init
  1012. [DEBUG] IOAPIC: Initializing IOAPIC at fec00000
  1013. [DEBUG] IOAPIC: ID = 0x00
  1014. [DEBUG] IOAPIC: 120 interrupts
  1015. [DEBUG] IOAPIC: Clearing IOAPIC at fec00000
  1016. [DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00
  1017. [DEBUG] PCI: 00:00:1f.0 init finished in 24 msecs
  1018. [DEBUG] PCI: 00:00:1f.2 init
  1019. [DEBUG] apm_control: Disabling ACPI.
  1020. [DEBUG] APMC done.
  1021. [DEBUG] PCI: 00:00:1f.2 init finished in 7 msecs
  1022. [DEBUG] PCI: 00:00:1f.3 init
  1023. [DEBUG] azalia_audio: base = 0xbe1e8000
  1024. [DEBUG] azalia_audio: no codec!
  1025. [DEBUG] PCI: 00:00:1f.3 init finished in 13 msecs
  1026. [DEBUG] PCI: 00:00:1f.4 init
  1027. [DEBUG] PCI: 00:00:1f.4 init finished in 0 msecs
  1028. [DEBUG] PCI: 00:01:00.0 init
  1029. [DEBUG] PCI: 00:01:00.0 init finished in 0 msecs
  1030. [DEBUG] PCI: 00:02:00.0 init
  1031. [DEBUG] PCI: 00:02:00.0 init finished in 0 msecs
  1032. [DEBUG] PCI: 00:03:00.0 init
  1033. [DEBUG] PCI: 00:03:00.0 init finished in 0 msecs
  1034. [DEBUG] PCI: 00:04:00.0 init
  1035. [DEBUG] PCI: 00:04:00.0 init finished in 0 msecs
  1036. [DEBUG] PCI: 00:05:00.0 init
  1037. [DEBUG] PCI: 00:05:00.0 init finished in 0 msecs
  1038. [DEBUG] PNP: 002e.1 init
  1039. [DEBUG] PNP: 002e.1 init finished in 0 msecs
  1040. [DEBUG] PNP: 002e.2 init
  1041. [DEBUG] PNP: 002e.2 init finished in 0 msecs
  1042. [DEBUG] PNP: 002e.3 init
  1043. [DEBUG] PNP: 002e.3 init finished in 0 msecs
  1044. [DEBUG] PNP: 002e.4 init
  1045. [DEBUG] PNP: 002e.4 init finished in 0 msecs
  1046. [DEBUG] PNP: 002e.5 init
  1047. [DEBUG] PNP: 002e.5 init finished in 0 msecs
  1048. [DEBUG] PNP: 002e.6 init
  1049. [DEBUG] PNP: 002e.6 init finished in 0 msecs
  1050. [DEBUG] PNP: 002e.7 init
  1051. [DEBUG] PNP: 002e.7 init finished in 0 msecs
  1052. [DEBUG] PNP: 002e.8 init
  1053. [DEBUG] PNP: 002e.8 init finished in 0 msecs
  1054. [INFO ] Devices initialized
  1055. [DEBUG] BS: BS_DEV_INIT run times (exec / console): 6 / 357 ms
  1056. [INFO ] Finalize devices...
  1057. [DEBUG] PCI: 00:00:02.0 final
  1058. [DEBUG] PCI: 00:00:16.0 final
  1059. [DEBUG] PCI: 00:00:17.0 final
  1060. [DEBUG] PCI: 00:00:1f.2 final
  1061. [DEBUG] PCI: 00:00:1f.3 final
  1062. [DEBUG] PCI: 00:00:1f.4 final
  1063. [INFO ] Devices finalized
  1064. [DEBUG] BS: BS_POST_DEVICE run times (exec / console): 0 / 30 ms
  1065. [DEBUG] ME: HFSTS1 : 0x80032054
  1066. [DEBUG] ME: HFSTS2 : 0x32284106
  1067. [DEBUG] ME: HFSTS3 : 0x00000020
  1068. [DEBUG] ME: HFSTS4 : 0x00004000
  1069. [DEBUG] ME: HFSTS5 : 0x00000000
  1070. [DEBUG] ME: HFSTS6 : 0x00400002
  1071. [DEBUG] ME: Manufacturing Mode : YES
  1072. [DEBUG] ME: SPI Protection Mode Enabled : NO
  1073. [DEBUG] ME: FW Partition Table : OK
  1074. [DEBUG] ME: Bringup Loader Failure : NO
  1075. [DEBUG] ME: Firmware Init Complete : NO
  1076. [DEBUG] ME: Boot Options Present : NO
  1077. [DEBUG] ME: Update In Progress : NO
  1078. [DEBUG] ME: D0i3 Support : YES
  1079. [DEBUG] ME: Low Power State Enabled : NO
  1080. [DEBUG] ME: CPU Replaced : NO
  1081. [DEBUG] ME: CPU Replacement Valid : YES
  1082. [DEBUG] ME: Current Working State : 4
  1083. [DEBUG] ME: Current Operation State : 1
  1084. [DEBUG] ME: Current Operation Mode : 3
  1085. [DEBUG] ME: Error Code : 2
  1086. [DEBUG] ME: FPFs Committed : NO
  1087. [DEBUG] ME: Enhanced Debug Mode : NO
  1088. [DEBUG] ME: CPU Debug Disabled : YES
  1089. [DEBUG] ME: TXT Support : NO
  1090. [DEBUG] ME: Manufacturing Vars Locked : NO
  1091. [DEBUG] BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 141 ms
  1092. [DEBUG] Starting cbfs_boot_device
  1093. [INFO ] CBFS: Found 'fallback/dsdt.aml' @0x57c40 size 0x214d in mcache @0x76c0d1b8
  1094. [DEBUG] Starting cbfs_boot_device
  1095. [WARN ] CBFS: 'fallback/slic' not found.
  1096. [INFO ] ACPI: Writing ACPI tables at 769e5000.
  1097. [DEBUG] ACPI: * FACS
  1098. [DEBUG] SCI is IRQ 9, GSI 9
  1099. [DEBUG] ACPI: * FACP
  1100. [DEBUG] ACPI: added table 1/32, length now 44
  1101. [DEBUG] Found 1 CPU(s) with 4/4 physical/logical core(s) each.
  1102. [DEBUG] PCI space above 4GB MMIO is at 0x87fc00000, len = 0x7780400000
  1103. [INFO ] \_SB.PCI0.PEPD: Intel Power Engine Plug-in
  1104. [INFO ] \_SB.PCI0.PMC: Intel Alderlake at PCI: 00:00:1f.2
  1105. [DEBUG] Intel ME Establishment bit not valid.
  1106. [DEBUG] ACPI: * SSDT
  1107. [DEBUG] ACPI: added table 2/32, length now 52
  1108. [DEBUG] ACPI: * MCFG
  1109. [DEBUG] ACPI: added table 3/32, length now 60
  1110. [DEBUG] ACPI: * LPIT
  1111. [DEBUG] ACPI: added table 4/32, length now 68
  1112. [DEBUG] IOAPIC: 120 interrupts
  1113. [DEBUG] SCI is IRQ 9, GSI 9
  1114. [DEBUG] ACPI: * APIC
  1115. [DEBUG] ACPI: added table 5/32, length now 76
  1116. [DEBUG] ACPI: * SPCR
  1117. [DEBUG] ACPI: added table 6/32, length now 84
  1118. [DEBUG] current = 769e8b10
  1119. [DEBUG] ACPI: * DMAR
  1120. [DEBUG] ACPI: added table 7/32, length now 92
  1121. [DEBUG] acpi_write_dbg2_pci_uart: Device not found
  1122. [DEBUG] ACPI: * HPET
  1123. [DEBUG] ACPI: added table 8/32, length now 100
  1124. [INFO ] ACPI: done.
  1125. [DEBUG] ACPI tables: 15328 bytes.
  1126. [DEBUG] smbios_write_tables: 769dd000
  1127. [DEBUG] SMBIOS firmware version is set to coreboot_version: '25.12-110-g6b52f82df270'
  1128. [INFO ] Create SMBIOS type 16
  1129. [INFO ] Create SMBIOS type 17
  1130. [INFO ] Create SMBIOS type 20
  1131. [DEBUG] SMBIOS tables: 786 bytes.
  1132. [DEBUG] Writing table forward entry at 0x00000500
  1133. [DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum f93d
  1134. [DEBUG] Writing coreboot table at 0x76a09000
  1135. [DEBUG] CFR: Written 3684 bytes of CFR structures at 0x76a09018, with CRC32 0xbefafb34
  1136. [DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
  1137. [DEBUG] 1. 0000000000001000-000000000009ffff: RAM
  1138. [DEBUG] 2. 00000000000a0000-00000000000f5fff: RESERVED
  1139. [DEBUG] 3. 00000000000f6000-00000000000f6fff: CONFIGURATION TABLES
  1140. [DEBUG] 4. 00000000000f7000-00000000000fffff: RESERVED
  1141. [DEBUG] 5. 0000000000100000-00000000769dcfff: RAM
  1142. [DEBUG] 6. 00000000769dd000-0000000076a95fff: CONFIGURATION TABLES
  1143. [DEBUG] 7. 0000000076a96000-0000000076bf4fff: RAMSTAGE
  1144. [DEBUG] 8. 0000000076bf5000-0000000076ffffff: CONFIGURATION TABLES
  1145. [DEBUG] 9. 0000000077000000-00000000803fffff: RESERVED
  1146. [DEBUG] 10. 00000000c0000000-00000000cfffffff: RESERVED
  1147. [DEBUG] 11. 00000000f8000000-00000000f9ffffff: RESERVED
  1148. [DEBUG] 12. 00000000fb000000-00000000fb000fff: RESERVED
  1149. [DEBUG] 13. 00000000fc800000-00000000fe7fffff: RESERVED
  1150. [DEBUG] 14. 00000000feb00000-00000000feb7ffff: RESERVED
  1151. [DEBUG] 15. 00000000fec00000-00000000fecfffff: RESERVED
  1152. [DEBUG] 16. 00000000fed40000-00000000fed6ffff: RESERVED
  1153. [DEBUG] 17. 00000000fed80000-00000000fed87fff: RESERVED
  1154. [DEBUG] 18. 00000000fed90000-00000000fed92fff: RESERVED
  1155. [DEBUG] 19. 00000000feda0000-00000000feda1fff: RESERVED
  1156. [DEBUG] 20. 00000000fedc0000-00000000feddffff: RESERVED
  1157. [DEBUG] 21. 00000000ff000000-00000000ffffffff: RESERVED
  1158. [DEBUG] 22. 0000000100000000-000000087fbfffff: RAM
  1159. [DEBUG] FMAP: area SMMSTORE found @ c10000 (524288 bytes)
  1160. [DEBUG] smm store: 8 # blocks with size 0x10000
  1161. [DEBUG] Starting cbfs_boot_device
  1162. [DEBUG] Wrote coreboot table at: 0x76a09000, 0x13f4 bytes, checksum 47f3
  1163. [DEBUG] coreboot table: 5132 bytes.
  1164. [DEBUG] IMD ROOT 0. 0x76fff000 0x00001000
  1165. [DEBUG] IMD SMALL 1. 0x76ffe000 0x00001000
  1166. [DEBUG] FSP MEMORY 2. 0x76c4e000 0x003b0000
  1167. [DEBUG] CONSOLE 3. 0x76c0e000 0x00040000
  1168. [DEBUG] RO MCACHE 4. 0x76c0d000 0x0000033c
  1169. [DEBUG] TIME STAMP 5. 0x76c0c000 0x00000910
  1170. [DEBUG] MEM INFO 6. 0x76c0a000 0x000010c8
  1171. [DEBUG] AFTER CAR 7. 0x76bf5000 0x00015000
  1172. [DEBUG] RAMSTAGE 8. 0x76a95000 0x00160000
  1173. [DEBUG] REFCODE 9. 0x76a36000 0x0005f000
  1174. [DEBUG] SMM BACKUP 10. 0x76a26000 0x00010000
  1175. [DEBUG] SMM COMBUFFER11. 0x76a16000 0x00010000
  1176. [DEBUG] IGD OPREGION12. 0x76a11000 0x00004400
  1177. [DEBUG] COREBOOT 13. 0x76a09000 0x00008000
  1178. [DEBUG] ACPI 14. 0x769e5000 0x00024000
  1179. [DEBUG] SMBIOS 15. 0x769dd000 0x00008000
  1180. [DEBUG] IMD small region:
  1181. [DEBUG] IMD ROOT 0. 0x76ffec00 0x00000400
  1182. [DEBUG] FSP RUNTIME 1. 0x76ffebe0 0x00000004
  1183. [DEBUG] FMAP 2. 0x76ffeac0 0x0000010a
  1184. [DEBUG] POWER STATE 3. 0x76ffea60 0x00000044
  1185. [DEBUG] FSPM VERSION 4. 0x76ffea40 0x00000004
  1186. [DEBUG] ROMSTAGE 5. 0x76ffea20 0x00000004
  1187. [DEBUG] ROMSTG STCK 6. 0x76ffe960 0x000000a8
  1188. [DEBUG] ACPI GNVS 7. 0x76ffe920 0x00000038
  1189. [DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 2 / 527 ms
  1190. [DEBUG] Starting cbfs_boot_device
  1191. [INFO ] CBFS: Found 'fallback/payload' @0x172980 size 0x16590a in mcache @0x76c0d2cc
  1192. [DEBUG] Checking segment from ROM address 0xffe039ac
  1193. [DEBUG] Checking segment from ROM address 0xffe039c8
  1194. [DEBUG] Loading segment from ROM address 0xffe039ac
  1195. [DEBUG] code (compression=1)
  1196. [DEBUG] New segment dstaddr 0x00800000 memsize 0x800000 srcaddr 0xffe039e4 filesize 0x1658d2
  1197. [DEBUG] Loading Segment: addr: 0x00800000 memsz: 0x0000000000800000 filesz: 0x00000000001658d2
  1198. [DEBUG] using LZMA
  1199. [DEBUG] Loading segment from ROM address 0xffe039c8
  1200. [DEBUG] Entry Point 0x00802659
  1201. [DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 68 ms
  1202. [INFO ] coreboot skipped calling FSP notify phase: 00000040.
  1203. [INFO ] coreboot skipped calling FSP notify phase: 000000f0.
  1204. [DEBUG] BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 14 ms
  1205. [DEBUG] Finalizing chipset.
  1206. [DEBUG] apm_control: Finalizing SMM.
  1207. [DEBUG] APMC done.
  1208. [INFO ] HECI: coreboot in recovery mode; found CSE in expected SOFT TEMP DISABLE state, skipping EOP
  1209. [INFO ] Disabling Heci using PMC IPC
  1210. [WARN ] HECI: CSE device 16.0 is hidden
  1211. [WARN ] HECI: CSE device 16.1 is disabled
  1212. [WARN ] HECI: CSE device 16.2 is disabled
  1213. [WARN ] HECI: CSE device 16.3 is disabled
  1214. [WARN ] HECI: CSE device 16.4 is disabled
  1215. [WARN ] HECI: CSE device 16.5 is disabled
  1216. [DEBUG] BS: BS_PAYLOAD_BOOT entry times (exec / console): 0 / 57 ms
  1217. [DEBUG] mp_park_aps done after 0 msecs.
  1218. [DEBUG] Jumping to boot code at 0x00802659(0x76a09000)
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