adc_activa

ldi r16, 0b11111111
out ddrb, r16
RCALL config_ADC ;Configurar el conversor ADC
conv:
    LDS r17, ADCSRA
    ORI r17, (1<< ADSC)
    STS ADCSRA, r17         ;Disparo la conversion AC to Digital
    bit:
        LDS r20, ADCSRA
        SBRC r20, ADSC      ;Espero que termine la conversion.
        rjmp bit
    LDS r21, ADCH           ;Leo el valor de la conversion.
    cpi r21, 127
    if:
        brlo else
    then:
        ldi r16, 0x00
        out portb, r16
        rjmp fin_if
    else:
        ldi r16, 0xff
        out portb, r16
    fin_if:
rjmp conv


config_ADC:
    push r16
    LDI R16, (1<<ADEN)
    ;ADC Enable
    ORI R16, (0<<ADATE)
    ;ADC Auto Trigger Enable
    ORI R16, (1<<ADPS2) | (1<<ADPS1) | (1<<ADPS0)
    ;ADPSx=3: ADC Prescaler Select Bits (ADPS2:0=111 -> 128)
    STS ADCSRA, R16
    ;_> ADOSRA: The ADC Control and Status register A
    LDI R16, (0<<ADTS2) | (0<<ADTS1) | (1<<ADTS0)
    ;ADTSx-1: trigger source Analog Comparator
    STS ADCSRB, R16
    ;-> ADCSRB: The ADC Control and Status register B
    LDI R16, (2<<MUX0)
    ;MUXx-1: input channel 1: MUX5:0-00001
    ORI R16, (0<<REFS1) | (1<<REFS0)
    ;AREF-1: internal 5V reference (REF$1:0-01)
    ORI R16, (1<<ADLAR)
    ;ADC 8 bits resolution
    STS ADMUX, R16
    ; -> ADMUX: The ADC multiplexer Selection Register
    LDI R16, (1<<ADC1D)
    ;ADC disable digital input circuitry for channel 1 (saves energy)
    STS DIDR0, R16
    ; -> DIDRO: Digital Input Disable Register
    LDI R16, (0<<PRADC)
    ;ADC disable the power reduction saving for the ADC circuitry (not necesary)
    STS PRR, R16
    ;-> PRR: Power Reduction Register
    pop r16
RET