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  1. ; ---------------------------------------------------------------------------
  2. ; Newd13 disassembly
  3. ;
  4. ; Newd13 with the following changes:
  5. ; InsA0-FF sending bytes bug fixed
  6. ; Ins70 instruction cycle counting routine added
  7. ; ---------------------------------------------------------------------------
  8.  
  9.  
  10. .INCLUDE "2313def.inc"
  11.  
  12. ; Processor : AVR [AT90S2313]
  13. ; Target assembler: AVR Assembler
  14.  
  15.  
  16. ; ---------------------------------------------------------------------------
  17. ; IO Pins Usage (Reference Modded Kypro Tucker Unlooper)
  18.  
  19. ; B0 - LED red
  20. ; B1 - LED green
  21. ; B2 - VCC glitch
  22. ; B3 - LM358 (PWM)
  23. ; B4 - cardslot switch
  24. ; B5 - (ICP MOSI)
  25. ; B6 - CLK line (ICP MISO)
  26. ; B7 - (ICP SCK)
  27.  
  28. ; D0 - UART RXD (PC)
  29. ; D1 - UART TXD (PC)
  30. ; D2 - ISO VCC Mux Select
  31. ; D3 - Clock Enable (When 1)
  32. ; D4 - Glitch Enable (When 0)
  33. ; D5 - card RST
  34. ; D6 - card IO
  35.  
  36.  
  37. ; ---------------------------------------------------------------------------
  38. ; setup equates for PORTD and PORTB usage
  39.  
  40. .equ CARDIO = 6 ; card IO = D6
  41. .equ CARDRST = 5 ; card RST = D5
  42. .equ CARDVCC = 4 ; card VCC = D4
  43. .equ CLK46 = 3 ; 4.608 MHz CLK enable = D3
  44.  
  45. .equ CLKOUT = 6 ; CLK output = B6
  46. .equ CARDSLOT = 4 ; cardslot switch status = B4
  47. .equ VCCGLITCH = 2 ; VCC glitch enable = B2
  48.  
  49.  
  50. ; ---------------------------------------------------------------------------
  51. ; define register names
  52.  
  53. .def RxVectorLow = r2
  54. .def RxVectorHigh = r3
  55. .def TxVectorLow = r4
  56. .def TxVectorHigh = r5
  57. .def GlitchOn = r6
  58. .def GlitchExtend = r7 ; unused
  59. .def GlitchOff = r8
  60. .def EEP_Pointer = r9
  61. .def TimeoutCounter = r13
  62. .def TimeoutLimit = r14
  63. .def ResponseLen = r15
  64. .def BitCount = r16 ; used within Tx/Rx routines, can be reused outside for temp use
  65. .def IOReg = r19
  66. .def DelayLowByte = r21
  67. .def DelayMidByte = r22
  68. .def DelayHighByte = r23
  69.  
  70.  
  71. ; ===========================================================================
  72.  
  73. .org 0
  74.  
  75. rjmp Start ; POR
  76. rjmp Start ; IRQ0
  77. rjmp Start ; IRQ1
  78. rjmp Start ; Timer1 Capture
  79. rjmp Start ; Timer1 Compare
  80. rjmp Start ; Timer1 Overflow
  81. rjmp TimeoutISR ; Timer0 Overflow
  82. rjmp Start ; UART RX Complete
  83. rjmp Start ; UDR Empty
  84. rjmp Start ; UART TX Complete
  85. rjmp Start ; Analog Comparator
  86.  
  87. ; ---------------------------------------------------------------------------
  88. ; Start of Ins jump vectors, do not re-locate unless other adjustments are made (must start below 0100)
  89. ; * denotes instruction modified in NewdRS
  90.  
  91. InsJumpVectors:
  92. rjmp EndProg ; Ins00 - end program
  93. rjmp Ins01 ; Ins01 - Reset Card - freeze Card Clock at 0000
  94. rjmp Ins02 ; Ins02 - Stop Card clock
  95. rjmp Ins03 ; Ins03 - Start Card clock
  96. rjmp Ins04 ;*Ins04 - DOUBLE HIT Glitch, CLOCK LOW, .5 CYCLE DELAY
  97. rjmp Ins05 ;*Ins05 - DOUBLE HIT Glitch, CLOCK LOW, 1.5 CYCLE DELAY
  98. rjmp Ins06 ;*Ins06 - DOUBLE HIT Glitch, CLOCK LOW, 6 CYCLE DELAY,
  99. rjmp Ins07 ;*Ins07 - Three HITS Glitch, CLOCK LOW , 6 CYCLE DELAY = 18 cycle spread
  100. rjmp Ins08 ;*Ins08 - Five HITS Glitch, LOW CLOCK, 5 CYCLE DELAY = 25 cycle spread
  101. rjmp Ins09 ;*Ins09 - LOW CLOCK single hit glitch
  102. rjmp Ins0A ;*Ins0A - save data to EEPROM buffer
  103. rjmp Ins0B ;*Ins0B - send data to card from EEPROM buffer
  104. rjmp Ins0C ; Ins0C - unused instruction
  105. rjmp Ins0D ;*Ins0D - unused instruction
  106. rjmp Ins0E ; Ins0E - set timeout for WDT
  107. rjmp Ins0F ;*Ins0F - receive bytes from card and send to PC immediately (0F0000 = receive 1 byte)
  108. rjmp Ins1x ;*Ins1x - set Tx/Rx speeds (select routines via vectors)
  109. rjmp Ins2x ; Ins2x - delay Atmel cycles (200000 - 2FFFFF)
  110. rjmp Ins3x ; Ins3x - unused instruction
  111. rjmp Ins4x ; Ins4x - unused instruction
  112. rjmp Ins5x ; Ins50 xx - receive xx bytes
  113. rjmp Ins6x ; Ins60 xx - send xx bytes
  114. rjmp Ins7x ;*Ins70 - ins timer test routine (custom - not in ND13)
  115. rjmp Ins8x ; Block Rx - 80 = receive 1 byte, 9F = receive 32 bytes
  116. rjmp Ins8x ; Block Rx - 80 = receive 1 byte, 9F = receive 32 bytes
  117. rjmp InsAx ; Block Tx - A0 = send 1 byte, FF = send 96 bytes
  118. rjmp InsAx ; Block Tx - A0 = send 1 byte, FF = send 96 bytes
  119. rjmp InsAx ; Block Tx - A0 = send 1 byte, FF = send 96 bytes
  120. rjmp InsAx ; Block Tx - A0 = send 1 byte, FF = send 96 bytes
  121. rjmp InsAx ; Block Tx - A0 = send 1 byte, FF = send 96 bytes
  122. rjmp InsAx ; Block Tx - A0 = send 1 byte, FF = send 96 bytes
  123.  
  124. ; ---------------------------------------------------------------------------
  125. ; Start of Cmd jump vectors, do not re-locate unless other adjustments are made (must start below 0100)
  126.  
  127. CmdJumpVectors:
  128. rjmp Cmd8x ; Cmd80 - Check for card present
  129. rjmp Cmd9x ; Cmd90 - send Atmel flash version to PC
  130. rjmp CmdAx ; CmdAx - Set LED - 0(off), 1(red) or 2(green)
  131. rjmp CmdBx ; CmdB0 - set glitch VCC - VCC = (5/255) * Param1
  132. rjmp CmdCx ; CmdCx - unused command
  133. rjmp CmdDx ; CmdDx - unused command
  134. rjmp CmdEx ; CmdEx - unused command
  135. rjmp CmdFx ; CmdF0 - send data in EEPROM buffer to PC
  136.  
  137.  
  138. ; ===========================================================================
  139. ; Power On Reset start
  140.  
  141. Start:
  142.  
  143. cli
  144. ldi r17, 0x10 ; raise PortB pin 4. (Card Switch Sense/Start)
  145. out PORTB, r17
  146. ldi r17, 0x12 ; raise PortD pins 4 and 1. (Glitch disable, UART TXD)
  147. out PORTD, r17
  148. ldi r17, 0x4F ; Set pins for New CLK Line, ADC, VCC Glitch, LED as output.
  149. out DDRB, r17
  150. ldi r17, 0x3A ; Set pins for ISO Reset, Glitch Enable, CLK Enable, UART TXD as output.
  151. out DDRD, r17
  152.  
  153. clr YH ; clear memory indexing registers
  154. clr XH
  155.  
  156. ldi r17, 5 ; Set timer/counter0 pre-scaler to CLK/1024.
  157. out TCCR0, r17
  158. ldi r17, 2 ; Enable timer/counter0 Oveflow interrupt
  159. out TIMSK, r17
  160. out OCR1AH, XH ; Set timer/counter1 output
  161. ldi r17, 0x81 ; output compare to $81.
  162. out OCR1AL, r17
  163. out TCCR1A, r17 ; clear OC1 output line, set PWM to 8-bits.
  164. ldi r17, 1 ; Set timer/counter1 pre-scaler to CLK/1.
  165. out TCCR1B, r17
  166.  
  167. ldi r17, 4 ; Set BAUD rate to 115200 (18.432 MHz crystal)
  168. out UBRR, r17
  169. ldi r17, 0x18 ; Enable RX and TX.
  170. out UCR, r17
  171.  
  172. ldi r17, 0xDF ; Init. stack pointer to start at $DF.
  173. out SPL, r17
  174.  
  175. ldi r17, 0x54 ; Set glitch registers
  176. mov GlitchOn, r17
  177. ldi r17, 0x50
  178. mov GlitchOff, r17
  179. mov GlitchExtend, r17
  180.  
  181. clr r17 ; Default tx/rx = of Rx1 and Tx1 jump vectors (during ATR time).
  182. rcall SetRxTxVectors ; low nibble of instruction codes Tx/Rx selection - bits 0-1 = rx, bits 2-3 = tx
  183.  
  184. GetProgOrCmd: ; Get byte from UART (sent by PC)
  185. rcall RecvFromHost
  186. tst IOReg
  187. breq GetProgOrCmd ; loop until received byte is non-zero.
  188. brpl GetProgram ; If IOReg < $80 it is length of program
  189.  
  190. mov ZL, IOReg ; setup Z for indirect jump to command's jump vector entry
  191. swap ZL
  192. andi ZL, 7
  193. ldi ZH, 0
  194. adiw ZL, Low(CmdJumpVectors) ; 2A = start of command jump vectors
  195. ijmp ; indirect jump to Z (command's jump vector Cmd8x-CmdFx)
  196.  
  197. ; ---------------------------------------------------------------------------
  198.  
  199. GetProgram:
  200. mov r0, IOReg ; First byte is packet length
  201. ldi YL, 0x60 ; 0060 = start of program packet from PC
  202.  
  203. loop_GetPacket:
  204. rcall RecvFromHost
  205. st Y+, IOReg
  206. dec r0
  207. brne loop_GetPacket ; loop to receive r0 bytes of data from PC (receive full packet)
  208.  
  209. ldi IOReg, 3
  210. mov TimeoutLimit, IOReg ; initialize TimeoutLimit to 3
  211. clr ResponseLen ; initialize ResponseLen to 0
  212.  
  213. ldi XL, 0x60 ; set packet PC to start of program packet in RAM
  214.  
  215. ExecProg: ; Get byte from RX'ed block, increment byte index.
  216. ld r17, X+
  217. mov ZL, r17 ; set up indirect jump to Ins00-InsFx
  218. cpi ZL, 0x10
  219. brcs GotInsBelow10
  220. swap ZL
  221. andi ZL, 0xF
  222. adiw ZL, 0xF
  223.  
  224. GotInsBelow10:
  225. ldi ZH, 0
  226. adiw ZL, Low(InsJumpVectors) ; 0B = start of Ins jump vectors
  227. ijmp ; indirect jump to Z (instruction's jump vector Ins00-InsAx)
  228.  
  229. ; ---------------------------------------------------------------------------
  230.  
  231. EndProg: ; reset stack pointer to DF
  232. ldi r17, 0xDF
  233. out SPL, r17
  234.  
  235. mov IOReg, XL ; Get PC pointer into program packet
  236. subi IOReg, 0x60 ; adjusted pointer for start of program packet in RAM
  237. rcall SendToPC ; send exec'd bytes of packet to PC (first byte of response)
  238. mov IOReg, ResponseLen
  239. rcall SendToPC ; send number of response data bytes to PC (second byte of response)
  240. tst ResponseLen
  241. breq ResponseSent
  242. mov r17, YL
  243. cp YL, XL
  244. brcs SendResponse_Overflow
  245. breq SendResponse_Overflow
  246. sub YL, ResponseLen ; set Y to point to beginning of response data bytes
  247.  
  248. loop_SendResponseData: ; read byte from response data bytes in RAM
  249. ld IOReg, Y+
  250. rcall SendToPC
  251. dec ResponseLen
  252. brne loop_SendResponseData ; loop to send all response data bytes to PC
  253.  
  254. ResponseSent: ; Receive and process command/packet from PC
  255. rjmp GetProgOrCmd
  256. ; ---------------------------------------------------------------------------
  257.  
  258. SendResponse_Overflow:
  259. mov r17, ResponseLen
  260. mov ZL, YL
  261. subi ZL, 0x60
  262. sub ResponseLen, ZL
  263. ldi YL, 0xD8
  264. sub YL, ResponseLen
  265.  
  266. loop_SendResponseData2:
  267. ld IOReg, Y+
  268. rcall SendToPC
  269. dec ResponseLen
  270. brne loop_SendResponseData2
  271. ldi YL, 0x60
  272.  
  273. loc_90:
  274. ld IOReg, Y+
  275. rcall SendToPC
  276. dec ZL
  277. brne loc_90
  278. rjmp GetProgOrCmd ; Receive and process command/packet from PC
  279.  
  280. ; End of function Start
  281.  
  282.  
  283. ; ===========================================================================
  284. ; Ins01 - Reset Card - freeze Card Clock at 0000
  285.  
  286. Ins01:
  287. sbi PORTD, CARDVCC ; inhibit on (glitch disable)
  288. ; turn card off
  289. cbi DDRD, CARDIO ; make D6 input
  290. cbi PORTD, CARDIO ; high Z D6
  291. cbi PORTD, CLK46 ; 4.608 MHz CLK off
  292. cbi PORTB, VCCGLITCH ; VCC glitch off
  293. cbi PORTB, CLKOUT ; CLK low
  294. cbi PORTD, CARDRST ; reset low (chip in reset state)
  295.  
  296. rjmp ExecProg ; execute next instruction in program packet
  297. ; End of function Ins01
  298.  
  299.  
  300. ; ===========================================================================
  301. ; Ins02 - Stop Card clock
  302.  
  303. Ins02:
  304. cbi PORTD, CLK46 ; 4.608 MHz CLK off
  305. cbi PORTB, CLKOUT ; CLK low
  306. rjmp ExecProg ; execute next instruction in program packet
  307. ; End of function Ins02
  308.  
  309.  
  310. ; ===========================================================================
  311. ; Ins03 - Start Card clock
  312.  
  313. Ins03:
  314. cbi PORTD, CARDVCC ; inhibit off (glitch enable)
  315. sbi PORTB, CLKOUT ; CLK high
  316. sbi PORTD, CLK46 ; 4.608 MHz CLK on
  317. ldi ZL, Low(0x60)
  318. ldi ZH, High(0x60)
  319. rcall DelayCardCycles ; delay 96 + 4 card cycles
  320. sbi PORTD, CARDRST ; reset high (chip in running state)
  321. rjmp ExecProg ; execute next instruction in program packet
  322. ; End of function Ins03
  323.  
  324.  
  325. ; ===========================================================================
  326. ; Ins04 - DOUBLE HIT Glitch, CLOCK LOW, .5 CYCLE DELAY
  327.  
  328. Ins04:
  329.  
  330. ldi r16, 0x14 ; setup GlitchOn
  331. mov GlitchOn, r16
  332. ldi r17, 0x10 ; setup GlitchOff
  333. mov GlitchOff, r17
  334.  
  335. out PORTB, GlitchOn ; glitch for half a card cycle
  336. out PORTB, GlitchOff
  337. nop
  338. out PORTB, GlitchOn ; glitch for half a card cycle
  339. out PORTB, GlitchOff
  340. sbi PORTB, CLKOUT ; CLK high
  341. sbi PORTD, CLK46 ; 4.608 MHz CLK on
  342.  
  343. rjmp ExecProg ; execute next instruction in program packet
  344. ; End of function Ins04
  345.  
  346.  
  347. ; ===========================================================================
  348. ; Ins05 - DOUBLE HIT Glitch, CLOCK LOW, 1.5 CYCLE DELAY
  349.  
  350. Ins05:
  351. ldi r16, 0x14 ; setup GlitchOn
  352. mov GlitchOn, r16
  353. ldi r17, 0x10 ; setup GlitchOff
  354. mov GlitchOff, r17
  355.  
  356. out PORTB, GlitchOn ; glitch for half a card cycle
  357. out PORTB, GlitchOff
  358. nop ; one cycle delay
  359. nop
  360. nop
  361. out PORTB, GlitchOn ; glitch for half a card cycle
  362. out PORTB, GlitchOff
  363. sbi PORTB, CLKOUT ; CLK high
  364. sbi PORTD, CLK46 ; 4.608 MHz CLK on
  365.  
  366. rjmp ExecProg ; execute next instruction in program packet
  367. ; End of function Ins05
  368.  
  369.  
  370. ; ===========================================================================
  371. ; Ins06 - DOUBLE HIT Glitch, CLOCK LOW, 6 CYCLE DELAY,
  372.  
  373. Ins06:
  374. ldi r16, 0x14 ; setup GlitchOn
  375. mov GlitchOn, r16
  376. ldi r17, 0x10 ; setup GlitchOff
  377. mov GlitchOff, r17
  378.  
  379. out PORTB, GlitchOn ; glitch for half a card cycle
  380. out PORTB, GlitchOff
  381. sbi PORTB, CLKOUT ; CLK high
  382. sbi PORTD, CLK46 ; 4.608 MHz CLK on
  383. nop ; one cycle delay
  384. nop
  385. nop ; one cycle delay
  386. nop
  387. nop ; one cycle delay
  388. nop
  389. nop ; one cycle delay
  390. nop
  391. ldi r16, 0x14 ; setup GlitchOn (one cycle delay)
  392. mov GlitchOn, r16
  393. ldi r17, 0x10 ; setup GlitchOff (one cycle delay)
  394. mov GlitchOff, r17
  395. out PORTB, GlitchOn ; glitch for half a card cycle
  396. out PORTB, GlitchOff
  397. sbi PORTB, CLKOUT ; CLK high
  398. sbi PORTD, CLK46 ; 4.608 MHz CLK on
  399. rjmp ExecProg ; execute next instruction in program packet
  400. ; End of function Ins06
  401.  
  402.  
  403. ; ===========================================================================
  404. ; Ins07 - Three HITS Glitch, CLOCK LOW , 6 CYCLE DELAY = 18 cycle spread
  405.  
  406. Ins07:
  407. ldi r16, 0x14 ; setup GlitchOn
  408. mov GlitchOn, r16
  409. ldi r17, 0x10 ; setup GlitchOff
  410. mov GlitchOff, r17
  411. out PORTB, GlitchOn ; glitch for half a card cycle
  412. out PORTB, GlitchOff
  413. sbi PORTB, CLKOUT ; CLK high
  414. sbi PORTD, CLK46 ; 4.608 MHz on
  415. nop ; one cycle delay
  416. nop
  417. nop ; one cycle delay
  418. nop
  419. nop ; one cycle delay
  420. nop
  421. nop ; one cycle delay
  422. nop
  423. ldi r16, 0x14 ; setup GlitchOn (one cycle delay)
  424. mov GlitchOn, r16
  425. ldi r17, 0x10 ; setup GlitchOff (one cycle delay)
  426. mov GlitchOff, r17
  427. out PORTB, GlitchOn ; glitch for half a card cycle
  428. out PORTB, GlitchOff
  429. sbi PORTB, CLKOUT ; CLK high
  430. sbi PORTD, CLK46 ; 4.608 MHz on
  431. nop ; one cycle delay
  432. nop
  433. nop ; one cycle delay
  434. nop
  435. nop ; one cycle delay
  436. nop
  437. nop ; one cycle delay
  438. nop
  439. ldi r16, 0x14 ; setup GlitchOn (one cycle delay)
  440. mov GlitchOn, r16
  441. ldi r17, 0x10 ; setup GlitchOff (one cycle delay)
  442. mov GlitchOff, r17
  443. out PORTB, GlitchOn ; glitch for half a card cycle
  444. out PORTB, GlitchOff
  445. sbi PORTB, CLKOUT ; CLK high
  446. sbi PORTD, CLK46 ; 4.608 MHz on
  447. rjmp ExecProg ; execute next instruction in program packet
  448. ; End of function Ins07
  449.  
  450.  
  451. ; ===========================================================================
  452. ; Ins08 - Five HITS Glitch, LOW CLOCK, 5 CYCLE DELAY = 25 cycle spread
  453.  
  454. Ins08:
  455. ldi r16, 0x14 ; setup GlitchOn
  456. mov GlitchOn, r16
  457. ldi r17, 0x10 ; setup GlitchOff
  458. mov GlitchOff, r17
  459. out PORTB, GlitchOn ; glitch for half a card cycle
  460. out PORTB, GlitchOff
  461. sbi PORTB, CLKOUT ; CLK high
  462. sbi PORTD, CLK46 ; 4.608 MHz on
  463. nop ; one cycle delay
  464. nop
  465. nop ; one cycle delay
  466. nop
  467. nop ; one cycle delay
  468. nop
  469. ldi r16, 0x14 ; setup GlitchOn (one cycle delay)
  470. mov GlitchOn, r16
  471. ldi r17, 0x10 ; setup GlitchOff (one cycle delay)
  472. mov GlitchOff, r17
  473. out PORTB, GlitchOn ; glitch for half a card cycle
  474. out PORTB, GlitchOff
  475. sbi PORTB, CLKOUT ; CLK high
  476. sbi PORTD, CLK46 ; 4.608 MHz on
  477. nop ; one cycle delay
  478. nop
  479. nop ; one cycle delay
  480. nop
  481. nop ; one cycle delay
  482. nop
  483. ldi r16, 0x14 ; setup GlitchOn (one cycle delay)
  484. mov GlitchOn, r16
  485. ldi r17, 0x10 ; setup GlitchOff (one cycle delay)
  486. mov GlitchOff, r17
  487. out PORTB, GlitchOn ; glitch for half a card cycle
  488. out PORTB, GlitchOff
  489. sbi PORTB, CLKOUT ; CLK high
  490. sbi PORTD, CLK46 ; 4.608 MHz on
  491. nop ; one cycle delay
  492. nop
  493. nop ; one cycle delay
  494. nop
  495. nop ; one cycle delay
  496. nop
  497. ldi r16, 0x14 ; setup GlitchOn (one cycle delay)
  498. mov GlitchOn, r16
  499. ldi r17, 0x10 ; setup GlitchOff (one cycle delay)
  500. mov GlitchOff, r17
  501. out PORTB, GlitchOn ; glitch for half a card cycle
  502. out PORTB, GlitchOff
  503. sbi PORTB, CLKOUT ; CLK high
  504. sbi PORTD, CLK46 ; 4.608 MHz on
  505. nop ; one cycle delay
  506. nop
  507. nop ; one cycle delay
  508. nop
  509. nop ; one cycle delay
  510. nop
  511. ldi r16, 0x14 ; setup GlitchOn (one cycle delay)
  512. mov GlitchOn, r16
  513. ldi r17, 0x10 ; setup GlitchOff (one cycle delay)
  514. mov GlitchOff, r17
  515. out PORTB, GlitchOn ; glitch for half a card cycle
  516. out PORTB, GlitchOff
  517. sbi PORTB, CLKOUT ; CLK high
  518. sbi PORTD, CLK46 ; 4.608 MHz on
  519. rjmp ExecProg ; execute next instruction in program packet
  520. ; End of function Ins08
  521.  
  522.  
  523. ; ===========================================================================
  524. ; Ins09 - LOW CLOCK single hit glitch
  525.  
  526. Ins09:
  527. ldi r16, 0x14 ; setup GlitchOn
  528. mov GlitchOn, r16
  529. ldi r17, 0x10 ; setup GlitchOff
  530. mov GlitchOff, r17
  531. out PORTB, GlitchOn ; glitch for half a card cycle
  532. out PORTB, GlitchOff
  533. sbi PORTB, CLKOUT ; CLK high
  534. sbi PORTD, CLK46 ; 4.608 MHz on
  535. rjmp ExecProg ; execute next instruction in program packet
  536. ; End of function Ins09
  537.  
  538.  
  539. ; ===========================================================================
  540. ; Ins4x - unused instruction
  541.  
  542. Ins4x:
  543. rjmp ExecProg ; execute next instruction in program packet
  544. ; End of function Ins4x
  545.  
  546. ; ---------------------------------------------------------------------------
  547. rjmp ExecProg ; execute next instruction in program packet
  548.  
  549. ; ===========================================================================
  550. ; Ins3x - unused instruction
  551.  
  552. Ins3x:
  553. rjmp ExecProg ; execute next instruction in program packet
  554. ; End of function Ins3x
  555.  
  556. ; ---------------------------------------------------------------------------
  557. rjmp ExecProg ; execute next instruction in program packet
  558.  
  559. ; ===========================================================================
  560. ; Ins0D - unused instruction
  561.  
  562. Ins0D:
  563. rjmp ExecProg ; execute next instruction in program packet
  564. ; End of function Ins0D
  565.  
  566.  
  567. ; ===========================================================================
  568. ; Ins0E - set timeout for WDT
  569.  
  570. Ins0E:
  571.  
  572. ld TimeoutLimit, X+ ; TimeoutLimit for WDT = byte following 0E in program packet
  573. rjmp ExecProg ; execute next instruction in program packet
  574. ; End of function Ins0E
  575.  
  576.  
  577. ; ===========================================================================
  578. ; Ins1x - set Tx/Rx speeds (select routines via vectors)
  579.  
  580. Ins1x:
  581. rcall SetRxTxVectors ; low nibble of instruction codes Tx/Rx selection - bits 0-1 = rx, bits 2-3 = tx
  582. rjmp ExecProg ; execute next instruction in program packet
  583. ; End of function Ins1x
  584.  
  585.  
  586. ; ===========================================================================
  587. ; Ins2x - delay Atmel cycles (200000 - 2FFFFF)
  588.  
  589. Ins2x:
  590. subi r17, 0x20 ; adjust byte from packet for offset of 20 (200000 = 0 delay)
  591. mov DelayHighByte, r17
  592. ld DelayMidByte, X+ ; read mid byte of delay value from program packet
  593. ld DelayLowByte, X+ ; read low byte of delay value from program packet
  594. lsr DelayLowByte
  595. brcs loc_15D
  596.  
  597. loc_15D:
  598. lsr DelayLowByte
  599. brcc loc_161
  600. nop
  601. rjmp loc_161
  602.  
  603. loc_161:
  604. inc DelayLowByte
  605. inc DelayMidByte
  606. inc DelayHighByte
  607.  
  608. loc_164:
  609. nop
  610. dec DelayLowByte
  611. brne loc_164
  612. nop
  613. ldi DelayLowByte, 0x3F
  614. dec DelayMidByte
  615. brne loc_164
  616. nop
  617. dec DelayLowByte
  618. dec DelayHighByte
  619. brne loc_164
  620. rjmp ExecProg ; execute next instruction in program packet
  621. ; End of function Ins2x
  622.  
  623.  
  624. ; ===========================================================================
  625. ; Block Rx - 80 = receive 1 byte, 9F = receive 32 bytes
  626.  
  627. Ins8x:
  628. andi r17, 0x1F ; mask off bits of instruction to give # of bytes to receive, 00-1F
  629. mov r1, r17
  630. inc r1 ; inc number of bytes to receive (adjust for 0=1)
  631.  
  632. loop_BlockRx:
  633. rcall CardRx
  634. st Y+, IOReg
  635. inc ResponseLen
  636. dec r1
  637. brne loop_BlockRx
  638. rjmp ExecProg ; execute next instruction in program packet
  639. ; End of function Ins8x
  640.  
  641.  
  642. ; ===========================================================================
  643. ; Block Tx - A0 = send 1 byte, FF = send 96 bytes
  644.  
  645. InsAx:
  646. subi r17, 0xA0 ; adjust instruction so A0=00 (number of bytes to send)
  647. mov r1, r17
  648. inc r1 ; inc number of bytes to send (adjust for 0=1)
  649.  
  650. loop_BlockTx:
  651. ld IOReg, X+
  652. rcall CardTx
  653. dec r1
  654. brne loop_BlockTx
  655. rjmp ExecProg ; execute next instruction in program packet
  656. ; End of function InsAx
  657.  
  658.  
  659. ; ===========================================================================
  660. ; Cmd80 - Check for card present
  661.  
  662. Cmd8x:
  663. clr IOReg ; default status = 00 (no card)
  664. sbic PINB, CARDSLOT ; check cardslot switch status
  665. dec IOReg ; if cardslot switch status is high, set status = FF (card inserted)
  666. rcall SendToPC
  667. rjmp GetProgOrCmd ; Receive and process command/packet from PC
  668. ; End of function Cmd8x
  669.  
  670.  
  671. ; ===========================================================================
  672. ; Cmd90 - send Atmel flash version to PC
  673.  
  674. Cmd9x:
  675. ldi IOReg, 'N'
  676. rcall SendToPC
  677. ldi IOReg, 'D'
  678. rcall SendToPC
  679. ldi IOReg, '1'
  680. rcall SendToPC
  681. ldi IOReg, '3'
  682. rcall SendToPC
  683. rjmp GetProgOrCmd ; Receive and process command/packet from PC
  684. ; End of function Cmd9x
  685.  
  686.  
  687. ; ===========================================================================
  688. ; CmdAx - Set LED - 0(off), 1(red) or 2(green)
  689.  
  690. CmdAx:
  691. andi IOReg, 3 ; mask off all but low 2 bits of cmd
  692. in r17, PORTB ; read PORTB status (LED is PB0-PB1)
  693. andi r17, 0xFC ; mask off PB0-PB1 (LED)
  694. or r17, IOReg ; turn on requested LED bits
  695. out PORTB, r17 ; output PORTB status (with updated LED status)
  696. rjmp GetProgOrCmd ; Receive and process command/packet from PC
  697. ; End of function CmdAx
  698.  
  699.  
  700. ; ===========================================================================
  701. ; CmdB0 - set glitch VCC - VCC = (5/255) * Param1
  702.  
  703. CmdBx:
  704. rcall RecvFromHost ; get requested VCC value
  705. out OCR1AH, XH ; setup PWM (00yy) where yy=requested VCC value
  706. out OCR1AL, IOReg
  707. rjmp GetProgOrCmd ; Receive and process command/packet from PC
  708. ; End of function CmdBx
  709.  
  710.  
  711. ; ===========================================================================
  712. ; CmdCx - unused command
  713.  
  714. CmdCx:
  715. rjmp GetProgOrCmd ; Receive and process command/packet from PC
  716. ; End of function CmdCx
  717.  
  718.  
  719. ; ===========================================================================
  720. ; CmdDx - unused command
  721.  
  722. CmdDx:
  723. rjmp GetProgOrCmd ; Receive and process command/packet from PC
  724. ; End of function CmdDx
  725.  
  726.  
  727. ; ===========================================================================
  728. RecvFromHost:
  729. sbis USR, RXC
  730. rjmp RecvFromHost ; loop until there is data waiting in UART receive buffer
  731. in IOReg, UDR ; copy UART data into software IOReg
  732. ret
  733. ; End of function RecvFromHost
  734.  
  735.  
  736. ; ===========================================================================
  737. SendToPC:
  738. sbis USR, UDRE
  739. rjmp SendToPC ; loop until UART is ready to transmit
  740. out UDR, IOReg ; output software IOReg to UART
  741. ret
  742. ; End of function SendToPC
  743.  
  744.  
  745. ; ===========================================================================
  746. ; DelayCardCycles - delay for total of 4 + Z card cycles, including ldi/call/ret
  747.  
  748. DelayCardCycles:
  749. lsr ZH ; Z = cycles to delay
  750. ror ZL
  751.  
  752. loop_DelayCardCycles:
  753. sbiw ZL, 1
  754. brne loop_DelayCardCycles ; loop to use up requested delay
  755. ret
  756. ; End of function DelayCardCycles
  757.  
  758.  
  759. ; ===========================================================================
  760. ; ClockCard - Clock card at 921.6 KHz ZH:ZL card clocks [UNUSED IN ND13]
  761.  
  762. ClockCard:
  763. ldi r16, 0x50 ; setup CLK high
  764. ldi r17, 0x10 ; setup CLK low
  765.  
  766. loop_ClockCard: ; CLK high
  767. out PORTB, r16
  768. rjmp cc_waste1 ; 2 atmel cycles
  769.  
  770. cc_waste1: ; 2 atmel cycles
  771. rjmp cc_waste2
  772.  
  773. cc_waste2: ; CLK low
  774. out PORTB, r17
  775. sbiw ZL, 1
  776. brne loop_ClockCard ; loop to give Z clocks
  777. ret
  778. ; End of function ClockCard
  779.  
  780.  
  781. ; ===========================================================================
  782. ; EnableTimeout - enable software watchdog timer while executing program packet
  783.  
  784. EnableTimeout:
  785.  
  786. out TCNT0, XL
  787. ldi r17, 2 ; enable Timer0 overflow interrupt
  788. out TIFR, r17
  789. mov TimeoutCounter, TimeoutLimit ; init TimeoutCounter = TimeoutLimit
  790. sei ; enable interrupts (for WDT)
  791. ret
  792. ; End of function EnableTimeout
  793.  
  794.  
  795. ; ===========================================================================
  796. ; Timer/Counter0 Overflow
  797.  
  798. TimeoutISR:
  799. dec TimeoutCounter
  800. breq WDT_Expired ; if TimeoutCounter = 0, WDT has expired
  801. reti
  802.  
  803. ; ---------------------------------------------------------------------------
  804.  
  805. WDT_Expired:
  806. cli
  807. sbi PORTD, CARDVCC ; inhibit on (glitch disable)
  808. cbi DDRD, CARDIO ; make D6 input
  809. cbi PORTD, CARDIO ; high Z D6
  810. cbi PORTD, CLK46 ; CLK off
  811. cbi PORTB, VCCGLITCH ; VCC glitch off
  812. cbi PORTB, CARDSLOT ; CLK low
  813. cbi PORTD, CARDRST ; reset low
  814. rjmp EndProg
  815. ; End of function TimeoutISR
  816.  
  817.  
  818. ; ===========================================================================
  819. ; GetStartBit - wait for falling edge of start bit on card IO
  820.  
  821. GetStartBit:
  822. cbi DDRD, CARDIO ; make D6 input
  823. sbi PORTD, CARDIO ; enable pullup
  824. rcall EnableTimeout
  825.  
  826. wait_BeforeStart:
  827. sbis PIND, CARDIO
  828. rjmp wait_BeforeStart ; loop until IO is high (not active / flow control disabled)
  829.  
  830. wait_StartFallingEdge:
  831. sbic PIND, CARDIO
  832. rjmp wait_StartFallingEdge ; loop until falling edge of start bit
  833. cli
  834. ret
  835. ; End of function GetStartBit
  836.  
  837.  
  838. ; ===========================================================================
  839. ; WaitForIOIdle - wait for card IO to be high (idle)
  840.  
  841. WaitForIOIdle:
  842. cbi DDRD, CARDIO ; make D6 input
  843. sbi PORTD, CARDIO ; enable pullup
  844. rcall EnableTimeout
  845.  
  846. wait_IOIdle:
  847. sbis PIND, CARDIO
  848. rjmp wait_IOIdle ; loop until IO is high (not active / flow control disabled)
  849. cli
  850. ret
  851. ; End of function WaitForIOIdle
  852.  
  853.  
  854. ; ===========================================================================
  855. ; CalcParity - calculate parity of IOReg, return with r17.7 = parity
  856.  
  857. CalcParity:
  858. mov r17, IOReg
  859. swap r17
  860. eor r17, IOReg
  861. mov r0, r17
  862. lsl r0
  863. lsl r0
  864. eor r17, r0
  865. mov r0, r17
  866. lsl r0
  867. eor r17, r0
  868. andi r17, 0x80 ; mask off bits 0-6, leave bit 7 as parity
  869. ret
  870. ; End of function CalcParity
  871.  
  872.  
  873. ; ===========================================================================
  874. ; CardRx - receive one byte from card, using selected routine from CardRxTable
  875.  
  876. CardRx:
  877. mov ZL, RxVectorLow ; setup Z for indirect jump to Rx routine
  878. mov ZH, RxVectorHigh
  879. ijmp ; indirect jump to card Rx routine
  880. ; End of function CardRx
  881.  
  882. ; ---------------------------------------------------------------------------
  883.  
  884. CardRxTable: ; Rx from card at ATR speed (etu = 372 cycles) 9600 @ 3.58 MHz
  885. rjmp Rx_etu372
  886. rjmp Rx_etu32 ; Rx from card at working speed (etu = 32 cycles)
  887. rjmp nullsub_2 ; unused transmit/receive speed
  888. rjmp rx_4 ; Rx from card at speed based on start bit timing (nonstandard protocol added to ND13)
  889.  
  890.  
  891. ; ===========================================================================
  892. ; CardTx - send one byte to card, using selected routine from CardTxTable
  893.  
  894. CardTx:
  895. mov ZL, TxVectorLow ; setup Z for indirect jump to Tx routine
  896. mov ZH, TxVectorHigh
  897. ijmp ; indirect jump to card Tx routine
  898. ; End of function CardTx
  899.  
  900. ; ---------------------------------------------------------------------------
  901.  
  902. CardTxTable: ; unused transmit speed (should be ATR speed tx)
  903. rjmp nullsub_1
  904. rjmp Tx_etu32 ; Tx to card at working speed (etu = 32 cycles)
  905. rjmp nullsub_2 ; unused transmit/receive speed
  906. rjmp Tx_etu32 ; Tx to card at working speed (etu = 32 cycles)
  907.  
  908.  
  909. ; ===========================================================================
  910. ; SetRxTxVectors - low nibble of instruction codes Tx/Rx selection - bits 0-1 = rx, bits 2-3 = tx
  911.  
  912. SetRxTxVectors:
  913. andi r17, 0xF ; Passed bits 0,1 = RX offset: 2,3= TX offset
  914. mov r0, r17
  915. andi r17, 3 ; mask all but bits 0-1 (rx offset)
  916. lsr r0
  917. lsr r0
  918. ldi IOReg, Low(CardRxTable)
  919. mov r2, IOReg
  920. ldi IOReg, High(CardRxTable)
  921. mov r3, IOReg
  922. add r2, r0
  923. adc r3, XH
  924. ldi IOReg, Low(CardTxTable)
  925. mov TxVectorLow, IOReg
  926. ldi IOReg, High(CardTxTable)
  927. mov TxVectorHigh, IOReg
  928. add TxVectorLow, r17
  929. adc TxVectorHigh, XH
  930. ret
  931. ; End of function SetRxTxVectors
  932.  
  933.  
  934. ; ===========================================================================
  935. ; Rx_etu372 - Rx from card at ATR speed (etu = 372 cycles) 9600 @ 3.58 MHz
  936.  
  937. Rx_etu372:
  938. rcall GetStartBit
  939. ldi ZL, Low(0xB4)
  940. ldi ZH, High(0xB4)
  941. rcall DelayCardCycles ; delay for total of 4 + Z card cycles, including ldi/call/ret
  942. ldi BitCount, 8
  943.  
  944. loc_204:
  945. ldi ZL, Low(0x16B)
  946. ldi ZH, High(0x16B)
  947. rcall DelayCardCycles ; delay for total of 4 + Z card cycles, including ldi/call/ret
  948. rjmp Rx1_waste1
  949.  
  950. Rx1_waste1:
  951. nop
  952. clc
  953. sbis PIND, CARDIO ; check IO status
  954. sec
  955. rol IOReg
  956. dec BitCount
  957. brne loc_204
  958. ldi ZL, Low(0x31C)
  959. ldi ZH, High(0x31C)
  960. rcall DelayCardCycles ; delay for total of 4 + Z card cycles, including ldi/call/ret
  961. cbi DDRD, CARDIO
  962. cbi PORTD, CARDIO
  963. ret
  964. ; End of function Rx_etu372
  965.  
  966.  
  967. ; ===========================================================================
  968. ; Rx_etu32 - Rx from card at working speed (etu = 32 cycles)
  969.  
  970. Rx_etu32:
  971. rcall GetStartBit
  972. ldi ZL, Low(0xA)
  973. ldi ZH, High(0xA)
  974. rcall DelayCardCycles ; delay for total of 4 + Z card cycles, including ldi/call/ret
  975. ldi r16, 8
  976.  
  977. loc_21A:
  978. ldi ZL, Low(0x17)
  979. ldi ZH, High(0x17)
  980. rcall DelayCardCycles ; delay for total of 4 + Z card cycles, including ldi/call/ret
  981. rjmp loc_21E
  982.  
  983. loc_21E:
  984. nop
  985. clc
  986. sbis PIND, CARDIO
  987. sec
  988. rol IOReg
  989. dec r16
  990. brne loc_21A
  991. nop
  992. ldi ZL, Low(0x1B)
  993. ldi ZH, High(0x1B)
  994. rcall DelayCardCycles ; delay for total of 4 + Z card cycles, including ldi/call/ret
  995. cbi DDRD, CARDIO
  996. cbi PORTD, CARDIO
  997. ret
  998. ; End of function Rx_etu32
  999.  
  1000.  
  1001. ; ===========================================================================
  1002. ; unused transmit speed (should be ATR speed tx)
  1003.  
  1004. nullsub_1:
  1005. ret
  1006. ; End of function nullsub_1
  1007.  
  1008.  
  1009. ; ===========================================================================
  1010. ; Tx_etu32 - Tx to card at working speed (etu = 32 cycles)
  1011.  
  1012. Tx_etu32:
  1013. ldi ZL, Low(0x2B8)
  1014. ldi ZH, High(0x2B8)
  1015. rcall DelayCardCycles ; delay for total of 4 + Z card cycles, including ldi/call/ret
  1016. rcall WaitForIOIdle
  1017. rcall CalcParity ; calculate parity of IOReg, return with r17.7 = parity
  1018. ldi r16, 0xA
  1019. sec
  1020.  
  1021. loc_234:
  1022. brcc loc_238
  1023. cbi PORTD, CARDIO
  1024. sbi DDRD, CARDIO
  1025. rjmp loc_23B
  1026. ; ---------------------------------------------------------------------------
  1027.  
  1028. loc_238:
  1029. nop
  1030. sbi PORTD, CARDIO
  1031. cbi DDRD, CARDIO
  1032.  
  1033. loc_23B:
  1034. ldi ZL, Low(0x15)
  1035. ldi ZH, High(0x15)
  1036. rcall DelayCardCycles ; delay for total of 4 + Z card cycles, including ldi/call/ret
  1037. rjmp loc_23F
  1038.  
  1039. loc_23F:
  1040. lsl r17
  1041. rol IOReg
  1042. dec r16
  1043. brne loc_234
  1044. nop
  1045. cbi DDRD, CARDIO
  1046. cbi PORTD, CARDIO
  1047. ret
  1048. ; End of function Tx_etu32
  1049.  
  1050.  
  1051. ; ===========================================================================
  1052. ; Ins0B - send data to card from EEPROM buffer
  1053.  
  1054. Ins0B:
  1055. clr EEP_Pointer
  1056. clr ZL
  1057. rcall EEP_Read ; read byte from EEPROM @ ZL to IOReg
  1058. mov r1, IOReg ; r1 = byte EEPROM:00 (length of data to send)
  1059. inc EEP_Pointer
  1060.  
  1061. loop_SendFromEE:
  1062. mov ZL, EEP_Pointer
  1063. rcall EEP_Read ; read byte from EEPROM @ ZL to IOReg
  1064. rcall CardTx
  1065. inc EEP_Pointer
  1066. dec r1
  1067. brne loop_SendFromEE ; loop to send data from EEPROM buffer
  1068. rjmp ExecProg ; execute next instruction in program packet
  1069. ; End of function Ins0B
  1070.  
  1071.  
  1072. ; ===========================================================================
  1073. ; Ins50 xx - receive xx bytes
  1074.  
  1075. Ins5x:
  1076. ld r17, X+ ; read length from program packet
  1077. cpi r17, 0x78 ; limit = 78h (120) bytes
  1078. brcs loc_257
  1079. rjmp ExecProg ; execute next instruction in program packet
  1080. ; ---------------------------------------------------------------------------
  1081.  
  1082. loc_257: ; check if respone data pointer has reached 00D8 (max)
  1083. cpi YL, 0xD8
  1084. brcs loc_25A
  1085. ldi YL, 0x60 ; init response data pointer to 0060
  1086.  
  1087. loc_25A:
  1088. mov r1, r17
  1089. inc r1
  1090.  
  1091. loop_rx50:
  1092. rcall CardRx
  1093. st Y+, IOReg
  1094. inc ResponseLen
  1095. cp YL, XL ; check if response data pointer has reached packet PC
  1096. breq abort_rx50
  1097. cpi YL, 0xD8 ; check if response data pointer has reached D8 (max)
  1098. brcs loc_264
  1099. ldi YL, 0x60 ; reset response data pointer to 0060
  1100.  
  1101. loc_264:
  1102. dec r1
  1103. brne loop_rx50 ; loop to rx requested bytes
  1104.  
  1105. abort_rx50: ; execute next instruction in program packet
  1106. rjmp ExecProg
  1107. ; End of function Ins5x
  1108.  
  1109.  
  1110. ; ===========================================================================
  1111. ; Ins60 xx - send xx bytes
  1112.  
  1113. Ins6x:
  1114. ld r17, X+ ; read length from program packet
  1115. mov r1, r17
  1116. inc r1
  1117.  
  1118. loop_tx60: ; read byte to transmit from program packet
  1119. ld IOReg, X+
  1120. rcall CardTx
  1121. dec r1
  1122. brne loop_tx60 ; loop to tx bytes
  1123. rjmp ExecProg ; execute next instruction in program packet
  1124. ; End of function Ins6x
  1125.  
  1126.  
  1127. ; ===========================================================================
  1128. ; CmdF0 - send data in EEPROM buffer to PC
  1129.  
  1130. CmdFx:
  1131. clr ZL
  1132. rcall EEP_Read ; read byte from EEPROM @ ZL to IOReg
  1133. mov r1, IOReg
  1134. rcall SendToPC
  1135. inc ZL
  1136.  
  1137. loop_sendEEtoPC: ; read byte from EEPROM @ ZL to IOReg
  1138. rcall EEP_Read
  1139. rcall SendToPC
  1140. inc ZL
  1141. dec r1
  1142. brne loop_sendEEtoPC
  1143. rjmp GetProgOrCmd ; Receive and process command/packet from PC
  1144. ; End of function CmdFx
  1145.  
  1146.  
  1147. ; ===========================================================================
  1148.  
  1149. ; Ins0A - save data to EEPROM buffer
  1150.  
  1151. Ins0A:
  1152. ld r1, X+ ; read length from program packet
  1153. clr ZL
  1154. mov IOReg, r1
  1155. rcall EEP_Write ; write length to EEPROM:00
  1156. inc ZL
  1157. rcall WriteXBufToEEP ; write r1 bytes from X to EEPROM @ ZL
  1158. rjmp ExecProg ; execute next instruction in program packet
  1159. ; End of function Ins0A
  1160.  
  1161.  
  1162. ; ===========================================================================
  1163. ; Ins0C - unused instruction
  1164.  
  1165. Ins0C:
  1166. rjmp ExecProg
  1167. ; End of function Ins0C
  1168.  
  1169.  
  1170. ; ===========================================================================
  1171. ; CmdEx - unused command
  1172.  
  1173. CmdEx:
  1174. rjmp GetProgOrCmd
  1175. ; End of function CmdEx
  1176.  
  1177.  
  1178. ; ===========================================================================
  1179. ; EEP_Read - read byte from EEPROM @ ZL to IOReg
  1180.  
  1181. EEP_Read:
  1182. sbic EECR, EEWE
  1183. rjmp EEP_Read ; read byte from EEPROM @ ZL to IOReg
  1184. out EEAR, ZL
  1185. sbi EECR, EERE
  1186. in IOReg, EEDR
  1187. ret
  1188. ; End of function EEP_Read
  1189.  
  1190.  
  1191. ; ===========================================================================
  1192. ; EEP_Write write byte from IOReg to EEPROM @ ZL
  1193.  
  1194. EEP_Write:
  1195. sbic EECR, EEWE
  1196. rjmp EEP_Write ; write byte from IOReg to EEPROM @ ZL
  1197. out EEAR, ZL
  1198. out EEDR, IOReg
  1199. sbi EECR, EEMWE
  1200. sbi EECR, EEWE
  1201. ret
  1202. ; End of function EEP_Write
  1203.  
  1204.  
  1205. ; ===========================================================================
  1206. ; WriteXBufToEEP - write r1 bytes from X to EEPROM @ ZL
  1207.  
  1208. WriteXBufToEEP:
  1209. ld EEP_Pointer, X+
  1210. rcall EEP_Read ; read byte from EEPROM @ ZL to IOReg
  1211. cp IOReg, EEP_Pointer
  1212. breq SkipWrite ; don't write value if it is already in EEP
  1213. mov IOReg, EEP_Pointer
  1214. rcall EEP_Write ; write byte from IOReg to EEPROM @ ZL
  1215.  
  1216. SkipWrite:
  1217. inc ZL
  1218. dec r1
  1219. brne WriteXBufToEEP ; write r1 bytes from X to EEPROM @ ZL
  1220. ret
  1221. ; End of function WriteXBufToEEP
  1222.  
  1223.  
  1224. ; ===========================================================================
  1225. ; rx_4 - Rx from card at speed based on start bit timing (nonstandard protocol added to ND13)
  1226.  
  1227. rx_4:
  1228. out TCCR1B, XH
  1229. out TCCR1A, XH
  1230. out TCNT1H, XH
  1231. out TCNT1L, XH
  1232. ldi r24, 1
  1233. rcall EnableTimeout
  1234.  
  1235. loc_2A0:
  1236. sbis PIND, CARDIO
  1237. rjmp loc_2A0
  1238. cli
  1239. rcall GetStartBit
  1240. out TCCR1B, r24
  1241. rcall EnableTimeout
  1242.  
  1243. loc_2A6:
  1244. sbis PIND, CARDIO
  1245. rjmp loc_2A6
  1246. out TCCR1B, XH
  1247. cli
  1248. in r24, TCNT1L
  1249. in r25, TCNT1H
  1250. sbiw r24, 0x10
  1251. lsr r25
  1252. ror r24
  1253. rcall GetStartBit
  1254. rcall sub_2C0
  1255. ldi r16, 8
  1256.  
  1257. loc_2B2:
  1258. rcall sub_2BD
  1259. clc
  1260. sbis PIND, CARDIO
  1261. sec
  1262. rol IOReg
  1263. dec r16
  1264. brne loc_2B2
  1265. rcall sub_2BD
  1266. cbi DDRD, CARDIO
  1267. cbi PORTD, CARDIO
  1268. ret
  1269. ; End of function rx_4
  1270.  
  1271.  
  1272. ; ===========================================================================
  1273.  
  1274. sub_2BD:
  1275. mov ZL, r24
  1276. mov ZH, r25
  1277. rjmp DelayCardCycles ; delay for total of 4 + Z card cycles, including ldi/call/ret
  1278. ; End of function sub_2BD
  1279.  
  1280.  
  1281. ; ===========================================================================
  1282.  
  1283. sub_2C0:
  1284. mov ZL, r24
  1285. mov ZH, r25
  1286. sbiw ZL, 8
  1287. lsr ZH
  1288. ror ZL
  1289. rjmp DelayCardCycles ; delay for total of 4 + Z card cycles, including ldi/call/ret
  1290. ; End of function sub_2C0
  1291.  
  1292.  
  1293. ; ===========================================================================
  1294. ; unused transmit/receive speed
  1295.  
  1296. nullsub_2:
  1297. ret
  1298. ; End of function nullsub_2
  1299.  
  1300.  
  1301. ; ===========================================================================
  1302. ; Ins0F - receive bytes from card and send to PC immediately (0F0000 = receive 1 byte)
  1303.  
  1304. Ins0F:
  1305. ld r11, X+ ; get high byte of requested length from program packet
  1306. ld r10, X+ ; get low byte of requested length from program packet
  1307. mov ZL, r10
  1308. mov ZH, r11
  1309. adiw ZL, 1
  1310.  
  1311. loop_Ins0FRx:
  1312. mov r10, ZL
  1313. mov r11, ZH
  1314. rcall rx_4
  1315. rcall SendToPC
  1316. mov ZL, r10
  1317. mov ZH, r11
  1318. sbiw ZL, 1
  1319. brne loop_Ins0FRx
  1320. rjmp ExecProg ; execute next instruction in program packet
  1321. ; End of function Ins0F
  1322.  
  1323.  
  1324. ; ===========================================================================
  1325. ; Ins70 - ins timer test routine (custom - not in ND13/NDRS)
  1326.  
  1327. Ins7x:
  1328. clr r16
  1329. out TCCR1A, r16
  1330. out TCCR1B, r16
  1331. out TCNT1H, r16
  1332. out TCNT1L, r16
  1333. mov r1, r16 ; this will be used to stop timer
  1334. ldi r16, 1
  1335. clr r17
  1336. cbi PORTD, CARDIO ; set IO low
  1337. sbi DDRD, CARDIO ; set port as output
  1338.  
  1339. Ins70_TrigLoop:
  1340. dec r17
  1341. brne Ins70_TrigLoop
  1342. sbi PORTD, CARDIO ; set IO high
  1343. cbi DDRD, CARDIO ; set port as input (pull-up on)
  1344. nop
  1345.  
  1346. Ins80_waitLowIO: ; wait for IO to go low
  1347. sbic PIND, CARDIO
  1348. rjmp Ins80_waitLowIO
  1349.  
  1350. out TCCR1B, r16 ; start Counter1
  1351.  
  1352. Ins70_waitHighIO: ; wait for IO to go high
  1353. sbis PIND, CARDIO
  1354. rjmp Ins70_waitHighIO
  1355.  
  1356. out TCCR1B, r1 ; stop Counter1
  1357. in r16, TCNT1L ; read Timer1 value
  1358. in r17, TCNT1H
  1359. st Y+, r17 ; save Timer1 value in response data buffer
  1360. st Y+, r16
  1361. inc ResponseLen ; adjust ResponseLen for the two bytes added to response data
  1362. inc ResponseLen
  1363. rjmp ExecProg ; execute next instruction in program packet
  1364. ; End of function Ins7x
  1365.  
  1366.  
  1367. ; ---------------------------------------------------------------------------
  1368.  
  1369. .exit
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