Building several configurations from same source code in a single makefile
CINPUTFILES = Testfile.c

all: v12target v13target

# the same source code is built several different ways depending on a
# list of preset configurations
v12target: lots_of_common_variables = hello
v12target: more_variables = v12_specific
v12target: Rev12Output.mycommontargets

v13target: lots_of_common_variables = hello
v13target: more_variables = v13_specific
v13target: Rev13Output.mycommontargets

# (more vXXtarget targets omitted)

# TODO:  why is @echo required?
%.mycommontargets: %.hex %.elf
    @echo

# TODO: why are these output files deleted?
%.elf: $(CINPUTFILES)
    cp $< $@

%.hex: %.elf
    cp $< $@

# TODO: correct way of adding the dummy mycommontargets to PHONY?
.PHONY : all clean

make: *** No rule to make target `Rev12Output.mycommontargets', needed by `v12target'.  Stop.

$ make
cp Testfile.c Rev12Output.elf
cp Rev12Output.elf Rev12Output.hex

cp Testfile.c Rev13Output.elf
cp Rev13Output.elf Rev13Output.hex

rm Rev12Output.hex Rev12Output.elf Rev13Output.hex Rev13Output.elf